TWI725820B - Semiconductor device having tsv structure and manufaturing method thereof - Google Patents

Abstract

A semiconductor device having TSV structure and manufacturing method thereof are provided. The semiconductor device having TSV structure comprises: a substrate provided with a plurality of trenches penetrating through a first surface at a front side and a second surface at a back side; A through electrode disposed in the trench; A lining layer disposed on the inner wall of the trench; A plurality of solder pads disposed on the first end face of the through electrode; A first insulating layer disposed at the front side so as to partial surface of each solder pad; A first conductive element covering the exposed solder pads and a portion of the first insulating layer; A second insulating layer disposed at the back side covering the lining layer at the back side, and exposing the second end face of each through electrode in whole or in part; And a second conductive element disposed on the second end face of the through electrode, and extending to cover a portion of the second insulating layer.

Description

Semiconductor element with silicon through hole structure and manufacturing method thereof

The invention relates to a semiconductor packaging technology, in particular to a silicon through hole structure and a manufacturing method of the silicon through hole structure.

With the rapid and diversified development of the current wafer market demand, the evolution of integrated circuit (IC) size reduction technology has reached an extremely small scale of tens of nanometers. Therefore, the wafer module must have the requirements of light, thin, short, low cost, low power consumption, high transmission efficiency, high multi-functional hetero-integration (Hetero-integration), and immediate listing. Not only must the manufacturing technology at the wafer level be accelerated, but also the packaging technology at the wafer module packaging level will face severe challenges. As the integration of wafers has become quite complex, packaging technology has therefore changed with product requirements. Although Flip Chip, which is common in high-end products, can solve the problem of short-wiring wafer packaging, it can only be packaged in a single-layer wafer, and with the number of transistors and the number of signal pins (I/ O) With the rapid increase, the flip chip bonding package is gradually unable to cope with the package requirements with bump gaps less than 150μm.

Another example is the so-called Multi-chip package (MCP), POP (Package on package), PIP (Package in package) and other types of system-in-package technology (System in package, SIP). The package layout must Extending from two-dimensional to three-dimensional, greatly increasing the difficulty of packaging technology. therefore, The so-called 3D Integrated Circuits Through Silicon Via (3D IC TSV) technology is a key technology that can solve the above-mentioned problems. It can evolve the wafer from a two-dimensional planar layout to a three-dimensional vertical stacking layout. It is a three-dimensional interconnection technology using three-dimensional silicon vias, which has the advantages of shorter wire interconnection paths, lower resistance and inductance, and more efficient transmission of signals, electricity and heat.

The process steps of the three-dimensional silicon through hole are mainly in sequence: (1) silicon through hole etching, (2) silicon through hole filling, (3) carrier bonding, (4) wafer thinning, and (5) carrier detachment. Relying on technologies include: through-silicon via forming technology, wafer handling technology, wafer thinning technology, bonding assembly technology, and wafer testing technology. These technologies involve complicated process steps, such as dry etching that requires etching masks, chemical vapor deposition (CVD), and chemical-mechanical planarization that require expensive raw materials or equipment. , CMP), resulting in manufacturing costs difficult to repair. In the steps of silicon via etching, carrier bonding, wafer thinning, etc., there are often processing risks. If the support strength of the wafer is not enough, it is difficult to prevent the wafer from cracking and damage, resulting in poor yield, and The cost of raw materials paid will remain high.

In order to solve the above-mentioned problems, the main purpose of the present invention is to provide a semiconductor device with a silicon through hole structure. The three-dimensional interconnection technology using three-dimensional silicon through hole has a shorter wire interconnection path, lower resistance and inductance, and more efficiency. Ground transmission of signals, electricity and heat and other advantages.

According to an embodiment of the present invention, a semiconductor device with a silicon through hole structure includes a substrate having a first surface and a second surface opposite to the first surface, and a plurality of holes are provided to penetrate through the first surface and the second surface of the substrate. Surface; through electrodes, provided in each hole of the substrate, the through electrodes have a first end surface and a second end surface opposite to the first end surface, the first end surface is located on the first surface of the substrate The second end surface is located on the side of the second surface of the substrate; the lining layer is provided on the inner wall of each hole and extends from the side of the first surface of the substrate to the side of the second surface; Each pad corresponds to and covers the first end surface of the through electrode and the liner layer located on one side of the first surface of the substrate; the first insulating layer is arranged on the first surface of the substrate and makes each pad Part of the surface of the exposed; a plurality of first conductive elements, covering each exposed pad and part of the first insulating layer; the second insulating layer, covering the second surface of the substrate, and a second surface of the substrate And a plurality of second conductive elements covering the second end surface of each through electrode and extending to a part of the second insulating layer.

Another object of the present invention is to provide a method for fabricating a semiconductor device with a through-silicon via structure, which constructs a large area for electrical contact between the conductive element and the through electrode, and enhances the electrical connection.

According to an embodiment of the present invention, a method for manufacturing a semiconductor device with a silicon through hole structure includes: providing a substrate, the substrate having a first surface and a second surface opposite to the first surface; and forming a plurality of first penetrating through the substrate in the substrate. Holes on the surface and the second surface; forming a liner on the inner wall of each hole in the substrate; forming a metal in each hole to form a through electrode, wherein the through electrode has a first end surface and a first end surface opposite to the first end surface Two end surfaces, the first end surface is located on one side of the first surface of the substrate, and the second end surface is located on one side of the second surface of the substrate; a plurality of solder pads are formed to cover the first end surface of the through electrode; a first insulating layer is formed on the substrate And expose part of the surface of each soldering pad; forming a first conductive element on each soldering pad, and each soldering pad is electrically connected to the first conductive element; performing on the side of the substrate opposite to the first surface Thinning process to expose the liner layer to the second surface of the substrate; form a second insulating layer on the second surface of the substrate; remove part of the second insulating layer and liner to expose the second end surface of the through electrode; And forming a plurality of second conductive elements, and each second conductive element covers the second end surface of the through electrode and extends to a part of the second insulating layer.

Another object of the present invention is to provide a method for manufacturing a semiconductor element with a silicon through hole structure, which design increases the contact area between the conductive element and the silicon through hole structure, so that the bonding degree is enhanced and the product reliability is improved.

According to an embodiment of the present invention, a method for manufacturing a semiconductor device with a silicon through hole structure includes: providing a substrate, the substrate having a first surface and a second surface opposite to the first surface; and forming a plurality of first penetrating through the substrate in the substrate Holes on the surface and the second surface; forming a liner on the inner wall of each hole in the substrate; forming a metal in each hole to form a through electrode, wherein the through electrode has a first end surface and a first end surface opposite to the first end surface. Two end surfaces, the first end surface is located on one side of the first surface of the substrate, and the second end surface is located on one side of the second surface of the substrate; a plurality of solder pads are formed to cover the first end surface of the through electrode; a first insulating layer is formed on the substrate And expose part of the surface of each soldering pad; forming a first conductive element on each soldering pad, and each soldering pad is electrically connected to the first conductive element; performing on the side of the substrate opposite to the first surface Thinning process to make the through electrode protrude from the second surface of the substrate; form a second insulating layer to cover the second surface of the substrate and the protruding through electrode; remove part of the second insulating layer and liner to expose the through electrode And forming a plurality of second conductive elements, and each second conductive element covers the part of the second end surface of the through electrode, and extends to part of the second insulating layer.

The semiconductor device with the silicon through hole structure disclosed in the present invention has good electrical connectivity and electrical insulation. In another embodiment, since the contact area between the second conductive element and the silicon through hole structure is increased, the bonding degree is enhanced and Strengthen the support strength of semiconductor components to improve product reliability and avoid high cost of raw materials. In the manufacturing method, the partial removal of the liner layer and the second insulating layer can be completed in the same etching step, which can save the time and labor consumption of the manufacturing process.

10: substrate

100: Hole

101: Through electrode

110: Lining

200: pad

210: first insulating layer

220: second insulating layer

11: The first surface

12: second surface

1011: first end face

1012: second end face

300: Metal layer

310: Solder ball

320: front bump

420: Back bump

400: Grinding roller

500: Mask

1 is a side view of a semiconductor device with a silicon through hole structure according to a first embodiment of the present invention; FIGS. 2A to 2H are according to the first embodiment of the present invention, which shows a view of a semiconductor device with a silicon through hole structure Fig. 3 is a side view of a semiconductor device with a silicon via structure according to a second embodiment of the present invention; and Figs. 4A to 4H are a second embodiment of the present invention, showing a A side view of a method for manufacturing a semiconductor device with a through-silicon via structure.

The semiconductor device structure and manufacturing method of the first embodiment and the second embodiment of the present invention are discussed in detail below. It should be understood that in any case, the illustrated embodiment provides an applicable inventive concept that can be implemented in a wide variety of scenarios. The specific embodiments discussed are only specific ways to make and use the invention, and do not limit the scope of the invention.

The present invention will be described with reference to the illustrated embodiment in a specific environment, that is, using silicon via technology to bond one semiconductor element to another semiconductor element, or to bond a semiconductor element to glass. However, the present invention can also be applied to other bonding and packaging processes.

First, referring to FIG. 1, a semiconductor device with a silicon through hole structure according to the first embodiment of the present invention will be described. As shown in FIG. 1, the semiconductor device with a silicon through hole structure includes a substrate 10, a through electrode 101 vertically penetrating the substrate 10, The front bump 320 and the back bump 420 are electrically connected to the through electrode 101. The first surface 11 of the substrate 10 is located on the front side, and the second surface 12 of the substrate 10 is located on the back side corresponding to the front side. The substrate 10 may include a silicon wafer and have a front side and a back side opposite to each other. The substrate 10 may be a substrate used in the process of manufacturing semiconductor memory elements, semiconductor logic elements, optoelectronic elements, display units, and the like. The front side may correspond to the side adjacent to the active area where active elements such as field-effect transistors, analog integrated circuits, or passive elements such as resistors, capacitors, connectors, etc. are formed, and the back side may correspond to the front side. The opposite side of the other side. The front bump 320 is disposed on the first surface 11 of the substrate 10, and the back bump 420 is disposed on the second surface 12 of the substrate 10 and is opposite to the front bump 320.

The hole 100 penetrates the substrate 10 from the first surface 11 to the second surface 12, and the hole 100 is filled with metal to form the through electrode 101. The metal of the through electrode 101 may include copper, silver or tin. The silicon via structure (not shown) includes a through electrode 101 and a lining layer 110 surrounding the inner wall of the through electrode 101. Therefore, the liner layer 110 is provided between the through electrode 101 and the substrate 10. The material of the liner layer 110 is oxide, preferably silicon dioxide. The liner layer 110 extends from the front side to the back side of the substrate 10, which can basically prevent The metal atoms or metal ions in the through electrode 101 diffuse into the substrate 10.

The through electrode 101 has a first end surface 1011 and a second end surface 1012 opposite to the first end surface 1011. The first end surface 1011 of the through electrode 101 is located on the front side of the substrate 10, and the second end surface 1012 of the through electrode 101 is located on the back side of the substrate 10. . The first end surface 1011 of the through electrode 101 may be in contact with the circuit pattern, so that the through electrode 101 is electrically connected to the circuit pattern. In addition, solder pads 200 are provided on the first end surface 1011 of the through electrode 101, and the plurality of solder pads 200 also cover the liner layer 110 located on the front side of the substrate 10. Since the first insulating layer 210 covering the circuit pattern is located on the second surface of the substrate 10. One surface 11, and the bonding pad 200 also located on the first surface 11 of the substrate 10 needs to be exposed to be electrically connected to the circuit pattern, so as to be electrically connected to the external circuit of the substrate (not shown).

The first insulating layer 210 for covering the circuit pattern is formed on the first surface 11 of the substrate 10, and the first insulating layer 210 is patterned to expose a part of the surface of each bonding pad 200. The material of the first insulating layer 210 is preferably a patternable polymer or a light-curing resin, and among them, polyimide has the most excellent heat resistance.

In order to be electrically connected to the through electrode 101, the front bump 320 is attached to the exposed part of the surface of the bonding pad 200. The front bump 320 includes a metal layer 300 (Under Bump Metallurgy, UBM) disposed on the bonding pad 200 and a solder ball 310 disposed on the surface of the metal layer 300 opposite to the bonding pad 200. The preferred shape of the metal layer 300 is a cylindrical shape. The metal layer 300 can be formed of at least three layers of conductive materials, such as a layer of nickel, a layer of tin-silver alloy, and a layer of copper. Nickel; the solder ball 310 can be formed of at least two layers of conductive materials, such as a layer of tin-silver alloy and a layer of copper, and optionally an alloy layer on the top layer of the copper layer. In one embodiment, once the tin layer has been formed on the metal layer 300, it is preferable to perform reflow to make the tin layer form the desired ball point shape. In addition, there are other conductive materials well-known in the art, such as the arrangement of titanium/tungsten/copper, the arrangement of copper/nickel/gold, or the arrangement of copper/chromium copper, so it is not limited thereto.

Furthermore, on the back side of the substrate 10, the second insulating layer 220 is provided on the second surface 12 of the substrate 10. The material of the second insulating layer 220 is preferably polyamide with good insulation, solvent resistance, and heat resistance. Amine, the second insulating layer 220 may be patterned to cover only the liner layer 110 located on the back side of the substrate 10 and on the inner wall, so that the second end surface 1012 of the through electrode 101 is exposed. In addition, the back bump 420 covers the entire second end surface 1012 exposed by the through electrode 101 and extends laterally to a part of the second insulating layer 220. The back bump 420 can be formed of at least three layers of conductive materials, such as a layer of gold, a layer of nickel, and a layer of copper. It can optionally have a nickel layer on the copper layer and the top layer of gold; it can also be made of one or two layers of conductive materials. To form, the preferred conductive material is copper, nickel, tin, silver, gold or their alloys. The area where the back bump 420 is in electrical contact with the through electrode 101 is relatively large, and the electrical connection is relatively strong. In addition, the back bump 420 and the second surface 12 of the substrate 10 are separated by the second insulating layer 220, and the back bump 420 and the inner wall of the silicon via structure are separated by the lining layer 110, which can exert the effect of electrical insulation.

Next, the flow of the manufacturing method of the first embodiment of the present invention will be described with reference to FIGS. 2A to 2H. First, as shown in FIG. 2A, a substrate 10 is provided, and the substrate 10 is grooved. Preferably, a plurality of holes 100 penetrating through the substrate 10 are formed in the substrate 10 by etching or laser drilling. The surface side extends toward the back side by a predetermined depth. Then, for example, physical vapor deposition (PVD) is used to form a liner 110 on the inner wall of each hole 100 in the substrate 10; and each hole 100 is filled with metal to form through electrodes 101 separated from each other by a predetermined distance. , The through electrode 101 has a first end surface 1011 located on the front side of the substrate 10 and a second end surface 1012 located on the back side of the substrate 10. Then, a plurality of bonding pads 200 are formed for each through electrode 101 by evaporation or electroplating to cover the first end surface 1011 of the through electrode 101, and the bonding pad 200 does not cover the entire first surface 11 of the substrate 10. The material of the bonding pad 200 is preferably aluminum.

Next, as shown in FIG. 2B, the first surface 11 of the substrate 10 is coated with polyimide, and the polyimide is cured by irradiation or heating to form a first insulating layer 210 on the first surface 11 of the substrate 10. Then, etching is performed on the first insulating layer 210 to form a patterned first insulating layer 210 to expose a part of the surface of each bonding pad 200.

Next, as shown in FIG. 2C, forming front bumps 320 on each pad 200 includes first forming a metal layer 300 on each pad 200 using, for example, plasma enhanced chemical vapor deposition (PECVD), and then using The solder balls 310 are formed on the cylindrical metal layer 300 by evaporation, electroplating, printing, solder migration, or ball planting, and a reflow method is used to form the solder balls 310 into a desired ball point shape. The metal layer 300 is stacked on each bonding pad 200 and covers a part of the first insulating layer 210 so that the front bump 320 is electrically connected to the through electrode 101 through the bonding pad 200.

Next, as shown in FIG. 2D, the substrate 10 is turned over and the back side is facing upward to thin the back side of the substrate 10. It is preferable to grind the back side of the substrate 10 with a grinding roller 400 until the liner 110 is removed from the substrate 10. When the second surface 12 is exposed, the grinding is stopped.

Next, as shown in FIG. 2E, the second surface 12 of the substrate 10 is coated with polyimide. The polyimide is cured by irradiation or heating to form a second insulating layer 220 on the second surface 12 of the substrate 10. .

Next, as shown in FIGS. 2F and 2G, the second insulating layer 220 is etched using a dry etching method such as plasma bombardment and an etching mask 500, which corresponds to the second insulating layer 220 above the second end surface 1012 of the through electrode 101 The liner layer 110 is removed because it is not covered by the etching mask 500 to form a patterned second insulating layer 220 so that the second end surface 1012 of the through electrode 101 is exposed.

Next, as shown in FIG. 2H, a back bump 420 is formed on the back side of the substrate 10 at a position corresponding to the second end surface 1012 of the through electrode 101 by vapor deposition, electroplating, printing, solder migration, or bumping. The back bump 420 is stacked on the second end surface 1012 of each through electrode 101 and extends to cover part of the second insulating layer 220 so that the back bump 420 is electrically connected to the through electrode 101.

Next, referring to FIG. 3, a semiconductor device with a silicon through hole structure in the second embodiment of the present invention will be described. As shown in FIG. 3 and in conjunction with FIG. 1, in the second embodiment, the structure configuration on the front side of the substrate 10 is the same as that of the first The implementation is the same, so I won’t repeat them here. The difference is that on the back side of the substrate 10, the second end surface 1012 of the through electrode 101 and a part of the liner 110 surrounding the second end surface 1012 of the through electrode 101 protrude from the second surface 12 of the substrate 10. In other words, the second end surface 1012 of the through electrode 101 is higher than the second surface 12 of the substrate 10, and the silicon via structure protrudes above the second surface 12 of the substrate 10.

The second insulating layer 220 is disposed on the second surface 12 of the substrate 10 and covers one end of the protruding silicon through hole structure. The second insulating layer 220 may be patterned to cover the liner 110 on the inner wall and part of the liner 110 on the second end surface 1012 of the through electrode 101, so that a part of the second end surface 1012 of the through electrode 101 is exposed . In detail, the second insulating layer 220 covers one end of the protruding silicon through hole structure, and includes a liner layer 110 that covers the second surface 12 of the substrate 10 and a liner layer disposed on the second end surface 1012 of the through electrode 101 part 110, but does not extend beyond the liner 110 to cover the entire second end surface 1012 of the through electrode 101.

The back bump 420 covers a part of the second end surface 1012 exposed by the through electrode 101, contacts a part of the lining layer 110 on the second end surface 1012 of the through electrode 101, and extends laterally to a part of the second insulating layer 220. In detail, the back bump 420 includes a part of the through electrode 101 stacked in sequence. The two end surfaces 1012 and the part of the second insulating layer 220 surrounding the liner 110 are in contact with the part of the liner 110 on the second end surface 1012 of the through electrode 101 and the sidewall of the second insulating layer 220. In the second embodiment, the back bump 420 covers one end of the protruding silicon through hole structure, and the back bump 420 extends laterally from the inner wall of the protruding silicon through hole structure and covers a portion of the second insulating layer 220. Compared with the back bump 420 that only touches the second end surface 1012 of the through electrode 101 (that is, the first embodiment), the second embodiment has good electrical connectivity and electrical insulation. In addition, because the back bump 420 is in contact with The contact area of the silicon perforated structure is enlarged, which enhances the bonding degree and improves the product reliability.

Next, the flow of the manufacturing method of the second embodiment of the present invention will be described with reference to FIGS. 4A to 4H. First, as shown in FIG. 4A, a substrate 10 is provided, and the substrate 10 is grooved. Preferably, a plurality of holes 100 through the substrate 10 are formed in the substrate 10 by etching or laser drilling. The side extends a predetermined depth toward the back side. Then, for example, a physical vapor deposition method is used to form a liner 110 on the inner wall of each hole 100 in the substrate 10; and each hole 100 is filled with metal to form through electrodes 101 separated from each other by a predetermined distance. The electrode 101 has a first end surface 1011 located on the front side of the substrate 10 and a second end surface 1012 located on the back side of the substrate 10. Then, a plurality of bonding pads 200 are formed for each through electrode 101 by evaporation or electroplating to cover the first end surface 1011 of the through electrode 101, and the bonding pad 200 does not cover the entire first surface 11 of the substrate 10. The material of the bonding pad 200 is preferably aluminum.

Next, as shown in FIG. 4B, the first surface 11 of the substrate 10 is coated with polyimide, and the polyimide is cured by irradiation or heating to form a first insulating layer 210 on the first surface 11 of the substrate 10. Then, etching is performed on the first insulating layer 210 to form a patterned first insulating layer 210 so that a part of the surface of each bonding pad 200 is exposed.

Next, as shown in FIG. 4C, forming front bumps 320 on each bonding pad 200 includes first forming a metal layer 300 on each bonding pad 200 using, for example, plasma enhanced chemical vapor deposition, and then using evaporation, The solder balls 310 are formed on the cylindrical metal layer 300 by means of electroplating, printing, solder migration, or ball implantation, and a reflow method is used to form the solder balls 310 into a desired ball point shape. 300 stacks of metal layers The first insulating layer 210 is stacked on each bonding pad 200 and covers a portion of the first insulating layer 210 so that the front bump 320 is electrically connected to the through electrode 101 through the bonding pad 200.

Next, as shown in FIG. 4D, the substrate 10 is turned over with the back side facing up to thin the back side of the substrate 10. It is preferable to grind the back side of the substrate 10 with a grinding roller 400 to make the second surface of the substrate 10 12 is recessed inward until the silicon through hole structure (including the liner layer 110 and the through electrode 101) protrudes from the second surface 12 of the substrate 10 by a predetermined height, and then the grinding is stopped.

Next, as shown in FIG. 4E, polyimide is coated on the back side of the substrate 10, and the polyimide is cured by irradiation or heating to form a second insulating layer 220 on the second surface 12 of the substrate 10. The second insulating layer 220 covers one end of the protruding silicon through hole structure and the recessed second surface 12 of the substrate 10.

Next, as shown in FIGS. 4F and 4G, the second insulating layer 220 is etched using a dry etching method such as plasma bombardment and an etching mask 500, which corresponds to the second insulating layer 220 above the second end surface 1012 of the through electrode 101 And the lining layer 110 is removed because it is not covered by the etching mask 500 to form a patterned second insulating layer 220, exposing part of the second end surface 1012 of the through electrode 101, and the second end surface 1012 of the through electrode 101 The second insulating layer 220 and the lining layer 110 are still covered on the other part. In detail, the patterned second insulating layer 220 covers one end of the protruding silicon through hole structure, including a liner layer 110 protruding from the second surface 12 of the substrate 10, and a second end surface 1012 provided on the portion of the through electrode 101 The lining layer 110 does not extend beyond the lining layer 110 to cover the entire second end surface 1012 of the through electrode 101.

Next, as shown in FIG. 4G, a back bump 420 is formed on the back side of the substrate 10 at a position corresponding to the second end surface 1012 of the through electrode 101 by vapor deposition, electroplating, printing, solder migration, or bumping. The back bump 420 is stacked on the second end surface 1012 of each through electrode 101 and extends to cover part of the second insulating layer 220 so that the back bump 420 is electrically connected to the through electrode 101.

The above descriptions are only preferred embodiments of the present invention, and are not used to limit the scope of rights of the present invention. At the same time, the above descriptions should be clear to those with ordinary knowledge in the relevant technical fields and based on them. Therefore, other equivalent changes or modifications completed without departing from the concept disclosed in the present invention should be included in the scope of the patent application.

10: substrate

100: Hole

101: Through electrode

110: Lining

200: pad

210: first insulating layer

220: second insulating layer

11: The first surface

12: second surface

1011: first end face

300: Metal layer

310: Solder ball

320: front bump

420: Back bump

Claims (9)

A semiconductor device with a silicon through hole structure, comprising: a substrate having a first surface and a second surface opposite to the first surface, and a plurality of holes penetrating through the first surface of the substrate and the substrate A second surface; a through electrode is provided in each hole of the substrate, the through electrode has a first end surface and a second end surface opposite to the first end surface, the first end surface is located on the first end of the substrate On one side of a surface, the second end surface is located on one side of the second surface of the substrate; a liner layer is provided on an inner wall of each hole and extends from the side of the first surface of the substrate to The side of the second surface; a plurality of solder pads, each of the solder pads corresponds to and covers the first end surface of the through electrode, and the liner layer located on the side of the first surface of the substrate; a first An insulating layer is disposed on the first surface of the substrate and exposes part of the surface of each solder pad; a plurality of first conductive elements cover each of the solder pads exposed and part of the first insulation A second insulating layer covering the second surface of the substrate and the liner layer located on the side of the second surface of the substrate; and a plurality of second conductive elements covering the through electrode The second end surface extends to a part of the second insulating layer; wherein, the first insulating layer and the second insulating layer are polyimide. The semiconductor device with a silicon through hole structure according to claim 1, wherein the liner layer covers the second end surface of the portion of the through electrode. The semiconductor device with a silicon through hole structure according to claim 1, wherein the liner layer is an oxide. The semiconductor device with a silicon through hole structure according to claim 1, wherein the through electrode is copper. The semiconductor device with a silicon through hole structure according to claim 1, wherein the first conductive element includes a metal layer and a solder ball, the metal layer is correspondingly disposed on the bonding pad, and the solder ball is disposed on the metal layer opposite to On the surface of the pad. The semiconductor device with a silicon through hole structure according to claim 5, wherein the solder ball and the metal layer are copper, nickel, tin, silver, titanium, tungsten, chromium or the above alloy. The semiconductor device with a silicon through hole structure according to claim 1, wherein the second conductive element is copper, nickel, tin, silver, gold or the above alloy. A method for manufacturing a semiconductor element with a silicon through hole structure includes: providing a substrate having a first surface and a second surface opposite to the first surface; forming a plurality of penetrating through the substrate in the substrate Holes on the first surface and the second surface; forming a liner on an inner wall of each hole in the substrate; forming a metal in each hole to form a through electrode, wherein the through electrode Having a first end surface and a second end surface opposite to the first end surface, the first end surface is located on one side of the first surface of the substrate, and the second end surface is located on one side of the second surface of the substrate; Forming a plurality of bonding pads to cover the first end surface of the through electrode; forming a first insulating layer on the first surface of the substrate and exposing part of the surface of each bonding pad; forming a first conductive element on each On the bonding pads, and each of the bonding pads is electrically connected to the first conductive element; a thinning process is performed on the side of the substrate relative to the first surface, so that the liner layer exposes the first conductive element of the substrate Two surfaces Forming a second insulating layer on the second surface of the substrate; removing part of the second insulating layer and the liner layer to expose the second end surface of the through electrode; and forming a plurality of second conductive elements, And each of the second conductive elements covers the second end surface of the through electrode and extends to a part of the second insulating layer. A method for manufacturing a semiconductor element with a silicon through hole structure includes: providing a substrate having a first surface and a second surface opposite to the first surface; forming a plurality of penetrating through the substrate in the substrate Holes on the first surface and the second surface; forming a liner on an inner wall of each hole in the substrate; forming a metal in each hole to form a through electrode, wherein the through electrode Having a first end surface and a second end surface opposite to the first end surface, the first end surface is located on one side of the first surface of the substrate, and the second end surface is located on one side of the second surface of the substrate; Forming a plurality of bonding pads to cover the first end surface of the through electrode; forming a first insulating layer on the first surface of the substrate and exposing part of the surface of each bonding pad; forming a first conductive element on each On the bonding pads, and each of the bonding pads is electrically connected to the first conductive element; a thinning process is performed on the side of the substrate relative to the first surface, so that the through electrode protrudes from the first surface of the substrate Two surfaces; forming a second insulating layer to cover the second surface of the substrate and the protruding through electrode; removing part of the second insulating layer and the liner layer to expose the second part of the through electrode And forming a plurality of second conductive elements, and each of the second conductive elements covers the second end surface of the portion of the through electrode, and extends to a portion of the second insulating layer.

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