[go: up one dir, main page]

TWI715341B - Light-emitting diode display driving circuit - Google Patents

Light-emitting diode display driving circuit Download PDF

Info

Publication number
TWI715341B
TWI715341B TW108145051A TW108145051A TWI715341B TW I715341 B TWI715341 B TW I715341B TW 108145051 A TW108145051 A TW 108145051A TW 108145051 A TW108145051 A TW 108145051A TW I715341 B TWI715341 B TW I715341B
Authority
TW
Taiwan
Prior art keywords
clock
signal
unit
clock signal
emitting diode
Prior art date
Application number
TW108145051A
Other languages
Chinese (zh)
Other versions
TW202123202A (en
Inventor
詹前煜
Original Assignee
瑞鼎科技股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 瑞鼎科技股份有限公司 filed Critical 瑞鼎科技股份有限公司
Priority to TW108145051A priority Critical patent/TWI715341B/en
Priority to CN202010078647.1A priority patent/CN112951149B/en
Application granted granted Critical
Publication of TWI715341B publication Critical patent/TWI715341B/en
Publication of TW202123202A publication Critical patent/TW202123202A/en

Links

Images

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of El Displays (AREA)

Abstract

A light-emitting diode display driving circuit is disclosed. The light-emitting diode display driving circuit includes a clock tracking unit, a frequency modulation unit and a clock generation unit. The clock generation unit is coupled to the clock tracking unit and the frequency modulation unit respectively. The clock tracking unit is configured to receive a first clock signal from outside and generate a clock tracking signal to the clock generation unit according to the first clock signal. The frequency modulation unit is configured to generate a frequency modulation signal to the clock generation unit. The clock generation unit is configured to generate a second clock signal according to the clock tracking signal and the frequency modulation signal.

Description

發光二極體顯示驅動電路LED display drive circuit

本發明係與顯示器有關，尤其是關於一種發光二極體顯示驅動電路。The present invention is related to displays, and particularly to a light-emitting diode display driving circuit.

如圖1所示，對傳統的發光二極體顯示驅動電路1而言，通常需要由系統提供兩種時脈訊號(第一時脈訊號DCLK與第二時脈訊號GCLK)給發光二極體顯示驅動電路1。其中，第一時脈訊號DCLK用以供序列傳輸界面10進行序列界面傳輸(Serial interface transmission)，而第二時脈訊號GCLK則用以供脈寬調變單元12產生脈寬調變(Pulse-Width Modulation, PWM)訊號PWM。As shown in Figure 1, for the conventional light-emitting diode display driving circuit 1, it is usually necessary to provide two clock signals (the first clock signal DCLK and the second clock signal GCLK) to the light-emitting diode by the system. Display drive circuit 1. Among them, the first clock signal DCLK is used for serial interface transmission 10 for serial interface transmission, and the second clock signal GCLK is used for pulse width modulation unit 12 to generate pulse width modulation (Pulse- Width Modulation, PWM) signal PWM.

就系統整體功耗的角度來看，雖然第一時脈訊號DCLK在序列傳輸界面10完成序列界面傳輸後即可關閉，但用以供脈寬調變單元12產生脈寬調變訊號PWM的第二時脈訊號GCLK仍需持續維持開啟狀態而無法關閉，因而導致系統整體功耗無法有效降低，同時還造成電磁干擾(Electromagnetic Interference, EMI)之問題，亟待改善。From the perspective of the overall power consumption of the system, although the first clock signal DCLK can be turned off after the sequence transmission interface 10 completes the sequence interface transmission, the first clock signal DCLK is used for the pulse width modulation unit 12 to generate the pulse width modulation signal PWM. The two clock signal GCLK still needs to be continuously turned on and cannot be turned off. As a result, the overall power consumption of the system cannot be effectively reduced. At the same time, it also causes electromagnetic interference (EMI) problems, which need to be improved.

此外，如圖2所示，傳統的發光二極體顯示驅動電路2亦可透過其電路內部設置的鎖相迴路(Phase-Locked Loop, PLL)22根據系統提供的第一時脈訊號DCLK產生第二時脈訊號GCLK至脈寬調變單元24，使得系統僅需提供一種時脈訊號(亦即第一時脈訊號DCLK)至發光二極體顯示驅動電路2即可。In addition, as shown in FIG. 2, the conventional light-emitting diode display driving circuit 2 can also generate the first clock signal DCLK according to the first clock signal DCLK provided by the system through the phase-locked loop (PLL) 22 provided in the circuit. The second clock signal GCLK is sent to the pulse width modulation unit 24, so that the system only needs to provide one clock signal (that is, the first clock signal DCLK) to the light emitting diode display driving circuit 2.

然而，就系統整體功耗的角度來看，由於鎖相迴路22仍需持續根據系統提供的第一時脈訊號DCLK產生第二時脈訊號GCLK，因此，即使序列傳輸界面20完成序列界面傳輸後，第一時脈訊號DCLK仍需維持開啟狀態而無法關閉，因而導致系統整體功耗無法有效降低，同時還造成電磁干擾的問題，亟待改善。此外，對於不同的發光二極體顯示驅動電路2而言，其各自的鎖相迴路22所產生的該些第二時脈訊號GCLK之間可能會出現彼此無法同步的問題，亦亟待改善。However, from the perspective of the overall power consumption of the system, since the phase-locked loop 22 still needs to continuously generate the second clock signal GCLK according to the first clock signal DCLK provided by the system, even after the serial interface 20 completes the serial interface transmission , The first clock signal DCLK still needs to be kept on and cannot be turned off, so that the overall power consumption of the system cannot be effectively reduced, and it also causes electromagnetic interference problems, which need to be improved. In addition, for different light-emitting diode display driving circuits 2, the second clock signals GCLK generated by their respective phase-locked loops 22 may not be synchronized with each other, which needs to be improved urgently.

由上述說明可知：先前技術所遭遇到的諸多問題仍待進一步加以解決。It can be seen from the above description that many problems encountered in the prior art still need to be further resolved.

有鑑於此，本發明提出一種發光二極體顯示驅動電路，以有效解決先前技術所遭遇到之上述問題。In view of this, the present invention provides a light-emitting diode display driving circuit to effectively solve the above-mentioned problems encountered in the prior art.

依據本發明之一具體實施例為一種發光二極體顯示驅動電路。於此實施例中，發光二極體顯示驅動電路包含一時脈追蹤單元、一頻率調變單元及一時脈產生單元。時脈產生單元分別耦接時脈追蹤單元及頻率調變單元。時脈追蹤單元接收來自外界之一第一時脈訊號並根據第一時脈訊號產生一時脈追蹤訊號至時脈產生單元。頻率調變單元用以產生一頻率調變訊號至時脈產生單元。時脈產生單元用以根據時脈追蹤訊號與頻率調變訊號產生一第二時脈訊號。A specific embodiment according to the present invention is a light emitting diode display driving circuit. In this embodiment, the light emitting diode display driving circuit includes a clock tracking unit, a frequency modulation unit, and a clock generating unit. The clock generation unit is respectively coupled to the clock tracking unit and the frequency modulation unit. The clock tracking unit receives a first clock signal from the outside and generates a clock tracking signal to the clock generating unit according to the first clock signal. The frequency modulation unit is used for generating a frequency modulation signal to the clock generating unit. The clock generating unit is used for generating a second clock signal according to the clock tracking signal and the frequency modulation signal.

於一實施例中，發光二極體顯示驅動電路還包含一序列傳輸界面，用以接收第一時脈訊號並根據第一時脈訊號進行一序列訊號傳輸。In one embodiment, the light-emitting diode display driving circuit further includes a serial transmission interface for receiving the first clock signal and performing a serial signal transmission according to the first clock signal.

於一實施例中，時脈追蹤單元耦接至序列傳輸界面之一接收端。In one embodiment, the clock tracking unit is coupled to a receiving end of the serial transmission interface.

於一實施例中，當序列傳輸界面完成序列訊號傳輸後，關閉第一時脈訊號以減少功耗。In one embodiment, after the serial transmission interface completes the serial signal transmission, the first clock signal is turned off to reduce power consumption.

於一實施例中，當第一時脈訊號關閉時，時脈產生單元仍會根據時脈追蹤訊號與頻率調變訊號產生第二時脈訊號。In one embodiment, when the first clock signal is turned off, the clock generating unit still generates the second clock signal according to the clock tracking signal and the frequency modulation signal.

於一實施例中，發光二極體顯示驅動電路還包含一脈寬調變單元。脈寬調變單元耦接時脈產生單元，並用以根據第二時脈訊號產生一脈寬調變訊號。In one embodiment, the light-emitting diode display driving circuit further includes a pulse width modulation unit. The pulse width modulation unit is coupled to the clock generation unit and used for generating a pulse width modulation signal according to the second clock signal.

於一實施例中，時脈產生單元為一振盪器(Oscillator, OSC)。In one embodiment, the clock generation unit is an oscillator (OSC).

於一實施例中，時脈產生單元所產生的第二時脈訊號具有一展頻功能，且展頻功能與頻率調變單元所產生的頻率調變訊號有關。In one embodiment, the second clock signal generated by the clock generating unit has a frequency spread function, and the frequency spread function is related to the frequency modulation signal generated by the frequency modulation unit.

於一實施例中，時脈產生單元所產生的第二時脈訊號與來自外界的第一時脈訊號之間具有一比例關係，且比例關係與時脈追蹤單元所產生的時脈追蹤訊號有關。In one embodiment, there is a proportional relationship between the second clock signal generated by the clock generating unit and the first clock signal from the outside, and the proportional relationship is related to the clock tracking signal generated by the clock tracking unit .

於一實施例中，來自外界的第一時脈訊號係由系統發出。In one embodiment, the first clock signal from the outside is sent by the system.

相較於先前技術，本發明的發光二極體顯示驅動電路具有下列優點及功效：Compared with the prior art, the LED display driving circuit of the present invention has the following advantages and effects:

(1)系統僅需提供一種時脈訊號(亦即第一時脈訊號DCLK)至發光二極體顯示驅動電路。(1) The system only needs to provide a clock signal (that is, the first clock signal DCLK) to the light-emitting diode display driving circuit.

(2)當序列訊號傳輸完成後，系統所提供的第一時脈訊號DCLK即可關閉，以減少功耗。(2) When the serial signal transmission is completed, the first clock signal DCLK provided by the system can be turned off to reduce power consumption.

(3)頻率調變單元所產生的頻率調變訊號能使得時脈產生單元所產生的第二時脈訊號GCLK具有展頻功能，有助於減少電磁干擾(EMI)。(3) The frequency modulation signal generated by the frequency modulation unit enables the second clock signal GCLK generated by the clock generation unit to have a spread spectrum function, which helps reduce electromagnetic interference (EMI).

(4)時脈追蹤單元根據第一時脈訊號DCLK所產生的時脈追蹤訊號有助於不同的發光二極體顯示驅動電路的時脈產生單元所產生的第二時脈訊號GCLK能彼此同步(Synchronization)。(4) The clock tracking signal generated by the clock tracking unit according to the first clock signal DCLK helps the second clock signal GCLK generated by the clock generating unit of different light-emitting diode display driving circuits to be synchronized with each other (Synchronization).

關於本發明之優點與精神可以藉由以下的發明詳述及所附圖式得到進一步的瞭解。The advantages and spirit of the present invention can be further understood from the following detailed description of the invention and the accompanying drawings.

現在將詳細參考本發明的示範性實施例，並在附圖中說明所述示範性實施例的實例。在圖式及實施方式中所使用相同或類似標號的元件/構件是用來代表相同或類似部分。Reference will now be made in detail to exemplary embodiments of the present invention, and examples of the exemplary embodiments are illustrated in the accompanying drawings. Elements/components with the same or similar numbers used in the drawings and embodiments are used to represent the same or similar parts.

依據本發明之一具體實施例為一種發光二極體顯示驅動電路。於此實施例中，顯示驅動電路可以是設置於發光二極體顯示裝置中之發光二極體顯示驅動IC，但不以此為限。A specific embodiment according to the present invention is a light emitting diode display driving circuit. In this embodiment, the display driving circuit may be a light emitting diode display driving IC provided in the light emitting diode display device, but it is not limited to this.

請參照圖3，圖3繪示此實施例中之發光二極體顯示驅動電路3的功能方塊圖。Please refer to FIG. 3, which shows a functional block diagram of the light emitting diode display driving circuit 3 in this embodiment.

需事先說明的是，為了簡潔起見，圖3所繪示的發光二極體顯示驅動電路3省略了與本案技術特徵較無關連之諸多單元，例如時序控制器(Timing controller)、記憶體(SRAM)、參考資料產生器(Reference data generator)、移位暫存器(Shift registers)、配置暫存器(Configuration registers)、掃描線開關(Scan line switch)等習知的單元，於此不另行贅述。It should be noted that, for the sake of brevity, the light-emitting diode display drive circuit 3 shown in FIG. SRAM), Reference data generator (Reference data generator), Shift registers (Shift registers), Configuration registers (Configuration registers), Scan line switch (Scan line switch) and other conventional units, no further Repeat.

如圖3所示，發光二極體顯示驅動電路3包含一序列傳輸界面30、一時脈追蹤單元32、一頻率調變單元34、一時脈產生單元36及一脈寬調變單元38。時脈追蹤單元32耦接至序列傳輸界面30之一接收端。時脈產生單元36分別耦接時脈追蹤單元32及頻率調變單元34。脈寬調變單元38耦接時脈產生單元36。As shown in FIG. 3, the LED display driving circuit 3 includes a serial transmission interface 30, a clock tracking unit 32, a frequency modulation unit 34, a clock generation unit 36 and a pulse width modulation unit 38. The clock tracking unit 32 is coupled to a receiving end of the serial transmission interface 30. The clock generation unit 36 is respectively coupled to the clock tracking unit 32 and the frequency modulation unit 34. The pulse width modulation unit 38 is coupled to the clock generation unit 36.

當序列傳輸界面30接收來自外界(例如系統)之一第一時脈訊號DCLK時，序列傳輸界面30根據第一時脈訊號DCLK進行一序列訊號傳輸。When the serial transmission interface 30 receives a first clock signal DCLK from the outside (such as the system), the serial transmission interface 30 performs a serial signal transmission according to the first clock signal DCLK.

在此同時，時脈追蹤單元32亦會接收第一時脈訊號DCLK並根據第一時脈訊號DCLK產生一時脈追蹤訊號CT至時脈產生單元36。At the same time, the clock tracking unit 32 also receives the first clock signal DCLK and generates a clock tracking signal CT to the clock generating unit 36 according to the first clock signal DCLK.

頻率調變單元34用以產生一頻率調變訊號FM至時脈產生單元36。時脈產生單元36用以根據時脈追蹤訊號CT與頻率調變訊號FM產生一第二時脈訊號GCLK至脈寬調變單元38。脈寬調變單元38用以根據第二時脈訊號GCLK產生一脈寬調變訊號PWM。The frequency modulation unit 34 is used to generate a frequency modulation signal FM to the clock generation unit 36. The clock generation unit 36 is used for generating a second clock signal GCLK to the pulse width modulation unit 38 according to the clock tracking signal CT and the frequency modulation signal FM. The pulse width modulation unit 38 is used for generating a pulse width modulation signal PWM according to the second clock signal GCLK.

於實際應用中，時脈產生單元可以是一振盪器(Oscillator, OSC)，例如常見的石英振盪器，但不以此為限。In practical applications, the clock generation unit can be an oscillator (Oscillator, OSC), such as a common quartz oscillator, but it is not limited to this.

需說明的是，當序列傳輸界面30完成序列訊號傳輸後，系統會關閉第一時脈訊號DCLK以減少功耗。此時，雖然第一時脈訊號DCLK已關閉，但時脈產生單元36仍可根據時脈產生單元36所提供的時脈追蹤訊號CT與頻率調變單元34所提供的頻率調變訊號FM來產生第二時脈訊號GCLK，而不會受到第一時脈訊號DCLK關閉之影響。It should be noted that after the serial transmission interface 30 completes the serial signal transmission, the system will turn off the first clock signal DCLK to reduce power consumption. At this time, although the first clock signal DCLK has been turned off, the clock generating unit 36 can still use the clock tracking signal CT provided by the clock generating unit 36 and the frequency modulation signal FM provided by the frequency modulation unit 34. The second clock signal GCLK is generated without being affected by the turning off of the first clock signal DCLK.

於實際應用中，時脈產生單元36所產生的第二時脈訊號GCLK具有展頻功能，且展頻功能與頻率調變單元34所產生的頻率調變訊號FM有關。換言之，頻率調變單元34係透過其產生的頻率調變訊號FM使得時脈產生單元36產生具有展頻功能的第二時脈訊號GCLK，但不以此為限。In practical applications, the second clock signal GCLK generated by the clock generation unit 36 has a frequency spread function, and the frequency spread function is related to the frequency modulation signal FM generated by the frequency modulation unit 34. In other words, the frequency modulation unit 34 uses the frequency modulation signal FM generated by the frequency modulation unit 34 to enable the clock generation unit 36 to generate the second clock signal GCLK with a spread spectrum function, but it is not limited to this.

此外，時脈產生單元36所產生的第二時脈訊號GCLK亦與來自外界(例如系統)的第一時脈訊號DCLK之間具有一比例關係，且此比例關係與時脈追蹤單元32所產生的時脈追蹤訊號CT有關。換言之，時脈追蹤單元32係透過其產生的時脈追蹤訊號CT使得時脈產生單元36產生與第一時脈訊號DCLK有特定比例關係的第二時脈訊號GCLK，但不以此為限。In addition, the second clock signal GCLK generated by the clock generating unit 36 also has a proportional relationship with the first clock signal DCLK from the outside (such as the system), and this proportional relationship is similar to that generated by the clock tracking unit 32 The clock tracking signal CT is related. In other words, the clock tracking unit 32 uses the generated clock tracking signal CT to make the clock generating unit 36 generate the second clock signal GCLK having a specific proportional relationship with the first clock signal DCLK, but it is not limited thereto.

藉此，不同的發光二極體顯示驅動電路3的時脈產生單元36所產生的第二時脈訊號GCLK即能藉由各發光二極體顯示驅動電路3中之時脈追蹤單元32所產生的時脈追蹤訊號CT達到彼此同步(Synchronization)，藉以有效改善先前技術中不同的發光二極體顯示驅動電路2所產生的第二時脈訊號GCLK彼此無法同步之問題。Thereby, the second clock signal GCLK generated by the clock generating unit 36 of the different light-emitting diode display driving circuits 3 can be generated by the clock tracking unit 32 in each light-emitting diode display driving circuit 3 The clock tracking signal CT achieves synchronization with each other, thereby effectively improving the problem that the second clock signal GCLK generated by the different LED display driving circuits 2 in the prior art cannot be synchronized with each other.

此外，需說明的是，發光二極體顯示驅動電路3實際上還可包含一灰階資料校正單元(圖未示)，用以對灰階資料進行校正。In addition, it should be noted that the light-emitting diode display driving circuit 3 may actually include a gray-scale data correction unit (not shown) for correcting the gray-scale data.

相較於先前技術，本發明的發光二極體顯示驅動電路具有下列優點及功效：Compared with the prior art, the LED display driving circuit of the present invention has the following advantages and effects:

(1)系統僅需提供一種時脈訊號(亦即第一時脈訊號DCLK)至發光二極體顯示驅動電路。(1) The system only needs to provide a clock signal (that is, the first clock signal DCLK) to the light-emitting diode display driving circuit.

(2)當序列訊號傳輸完成後，系統所提供的第一時脈訊號DCLK即可關閉，以減少功耗。(2) When the serial signal transmission is completed, the first clock signal DCLK provided by the system can be turned off to reduce power consumption.

(3)頻率調變單元所產生的頻率調變訊號能使得時脈產生單元所產生的第二時脈訊號GCLK具有展頻功能，有助於減少電磁干擾(EMI)。(3) The frequency modulation signal generated by the frequency modulation unit enables the second clock signal GCLK generated by the clock generation unit to have a spread spectrum function, which helps reduce electromagnetic interference (EMI).

(4)時脈追蹤單元根據第一時脈訊號DCLK所產生的時脈追蹤訊號有助於不同的發光二極體顯示驅動電路的時脈產生單元所產生的第二時脈訊號GCLK能彼此同步(Synchronization)。(4) The clock tracking signal generated by the clock tracking unit according to the first clock signal DCLK helps the second clock signal GCLK generated by the clock generating unit of different light-emitting diode display driving circuits to be synchronized with each other (Synchronization).

1:發光二極體顯示驅動電路 10:序列傳輸界面 12:脈寬調變單元 2:發光二極體顯示驅動電路 20:序列傳輸界面 22:鎖相迴路 24:脈寬調變單元 3:發光二極體顯示驅動電路 30:序列傳輸界面 32:時脈追蹤單元 34:頻率調變單元 36:時脈產生單元 38:脈寬調變單元 DCLK:第一時脈訊號 GCLK:第二時脈訊號 CT:時脈追蹤訊號 FM:頻率調變訊號 PWM:脈寬調變訊號 1: LED display drive circuit 10: Serial transmission interface 12: Pulse width modulation unit 2: LED display drive circuit 20: Serial transmission interface 22: Phase locked loop 24: Pulse width modulation unit 3: LED display drive circuit 30: Serial transmission interface 32: Clock tracking unit 34: Frequency Modulation Unit 36: Clock generation unit 38: Pulse width modulation unit DCLK: the first clock signal GCLK: second clock signal CT: Clock tracking signal FM: Frequency modulation signal PWM: Pulse width modulation signal

本發明所附圖式說明如下： 圖1及圖2分別繪示先前技術中之兩種不同的發光二極體顯示驅動電路的功能方塊圖。 圖3繪示根據本發明之一較佳具體實施例之發光二極體顯示驅動電路的功能方塊圖。 The drawings of the present invention are described as follows: FIG. 1 and FIG. 2 respectively show the functional block diagrams of two different light-emitting diode display driving circuits in the prior art. FIG. 3 shows a functional block diagram of a light emitting diode display driving circuit according to a preferred embodiment of the present invention.

3:發光二極體顯示驅動電路 3: LED display drive circuit

30:序列傳輸界面 30: Serial transmission interface

32:時脈追蹤單元 32: Clock tracking unit

34:頻率調變單元 34: Frequency Modulation Unit

36:時脈產生單元 36: Clock generation unit

38:脈寬調變單元 38: Pulse width modulation unit

DCLK:第一時脈訊號 DCLK: the first clock signal

GCLK:第二時脈訊號 GCLK: second clock signal

CT:時脈追蹤訊號 CT: Clock tracking signal

FM:頻率調變訊號 FM: Frequency modulation signal

PWM:脈寬調變訊號 PWM: Pulse width modulation signal

Claims (8)

一種發光二極體顯示驅動電路，包含：一時脈追蹤單元，用以接收來自外界之一第一時脈訊號並根據該第一時脈訊號產生一時脈追蹤訊號；一序列傳輸界面，用以接收該第一時脈訊號並根據該第一時脈訊號進行一序列訊號傳輸；一頻率調變單元，用以產生一頻率調變訊號；以及一時脈產生單元，分別耦接該時脈追蹤單元及該頻率調變單元，用以根據該時脈追蹤訊號與該頻率調變訊號產生一第二時脈訊號；其中，當該序列傳輸界面完成該序列訊號傳輸後，關閉該第一時脈訊號以減少功耗。 A light-emitting diode display driving circuit, comprising: a clock tracking unit for receiving a first clock signal from the outside and generating a clock tracking signal according to the first clock signal; and a serial transmission interface for receiving The first clock signal performs a sequence signal transmission according to the first clock signal; a frequency modulation unit for generating a frequency modulation signal; and a clock generation unit, respectively coupled to the clock tracking unit and The frequency modulation unit is used to generate a second clock signal according to the clock tracking signal and the frequency modulation signal; wherein, after the serial transmission interface completes the serial signal transmission, the first clock signal is turned off to Reduce power consumption. 如申請專利範圍第1項所述之發光二極體顯示驅動電路，其中該時脈產生單元所產生的該第二時脈訊號與來自外界的該第一時脈訊號之間具有一比例關係，且該比例關係與該時脈追蹤單元所產生的該時脈追蹤訊號有關。 For the light-emitting diode display driving circuit described in item 1 of the scope of patent application, wherein the second clock signal generated by the clock generating unit has a proportional relationship with the first clock signal from the outside, And the proportional relationship is related to the clock tracking signal generated by the clock tracking unit. 如申請專利範圍第1項所述之發光二極體顯示驅動電路，其中該時脈追蹤單元耦接至該序列傳輸界面之一接收端。 In the light-emitting diode display driving circuit described in the first item of the patent application, the clock tracking unit is coupled to a receiving end of the serial transmission interface. 如申請專利範圍第1項所述之發光二極體顯示驅動電路，其中來自外界的該第一時脈訊號係由一系統發出。 In the light-emitting diode display driving circuit described in item 1 of the scope of patent application, the first clock signal from the outside is issued by a system. 如申請專利範圍第1項所述之發光二極體顯示驅動電路，其中當該第一時脈訊號關閉時，該時脈產生單元仍會根據該時脈追蹤訊號與該頻率調變訊號產生該第二時脈訊號。 For example, in the light-emitting diode display driving circuit described in item 1 of the scope of patent application, when the first clock signal is turned off, the clock generating unit will still generate the clock according to the clock tracking signal and the frequency modulation signal The second clock signal. 如申請專利範圍第1項所述之發光二極體顯示驅動電路，還包含一脈寬調變單元，耦接該時脈產生單元並用以根據該第二時脈訊號產生一脈寬調變訊號。 The light-emitting diode display driving circuit described in item 1 of the scope of patent application further includes a pulse width modulation unit coupled to the clock generation unit and used for generating a pulse width modulation signal according to the second clock signal . 如申請專利範圍第1項所述之發光二極體顯示驅動電路，其中該時脈產生單元為一振盪器(Oscillator,OSC)。 In the light-emitting diode display driving circuit described in the first item of the patent application, the clock generating unit is an oscillator (OSC). 如申請專利範圍第1項所述之發光二極體顯示驅動電路，其中該時脈產生單元所產生的該第二時脈訊號具有一展頻功能，且該展頻功能與該頻率調變單元所產生的該頻率調變訊號有關。 In the light-emitting diode display driving circuit described in item 1 of the scope of patent application, the second clock signal generated by the clock generating unit has a frequency spread function, and the frequency spread function and the frequency modulation unit The frequency modulation signal generated is related.
TW108145051A 2019-12-10 2019-12-10 Light-emitting diode display driving circuit TWI715341B (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
TW108145051A TWI715341B (en) 2019-12-10 2019-12-10 Light-emitting diode display driving circuit
CN202010078647.1A CN112951149B (en) 2019-12-10 2020-02-03 Light emitting diode display driving circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW108145051A TWI715341B (en) 2019-12-10 2019-12-10 Light-emitting diode display driving circuit

Publications (2)

Publication Number Publication Date
TWI715341B true TWI715341B (en) 2021-01-01
TW202123202A TW202123202A (en) 2021-06-16

Family

ID=75237379

Family Applications (1)

Application Number Title Priority Date Filing Date
TW108145051A TWI715341B (en) 2019-12-10 2019-12-10 Light-emitting diode display driving circuit

Country Status (2)

Country Link
CN (1) CN112951149B (en)
TW (1) TWI715341B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI789942B (en) * 2021-10-06 2023-01-11 友達光電股份有限公司 Display panel under spread spectrum clock and driving method thereof
US12262453B2 (en) 2021-12-17 2025-03-25 Stryker Corporation Power modulation for powering one or more light sources

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120169686A1 (en) * 2011-01-03 2012-07-05 Samsung Electronics Co., Ltd. Timing controller, display apparatus including the same, and method of driving the same
CN106356021A (en) * 2015-07-14 2017-01-25 西安诺瓦电子科技有限公司 Method for reducing electromagnetic interference of LED display screen and LED display control card
CN107358910A (en) * 2017-07-01 2017-11-17 深圳市灵星雨科技开发有限公司 A kind of implementation method for reducing display screen EMC
US20190173454A1 (en) * 2017-12-06 2019-06-06 Lg Display Co., Ltd. Spread spectrum clock generation apparatus and method, and display device and touch display device

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4907068B2 (en) * 2004-07-05 2012-03-28 シャープ株式会社 Image display device
CN102457274A (en) * 2010-10-21 2012-05-16 钰宝科技股份有限公司 Digital Frequency Synthesizer with Phase Locked Loop
US20130051184A1 (en) * 2011-08-26 2013-02-28 Oren Eliezer Real-time clock integrated circuit with time code receiver, method of operation thereof and devices incorporating the same
CN110191536B (en) * 2019-05-24 2021-11-12 亿信科技发展有限公司 Drive control circuit, drive control chip, integrated packaging device, display system and sparse driving method

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120169686A1 (en) * 2011-01-03 2012-07-05 Samsung Electronics Co., Ltd. Timing controller, display apparatus including the same, and method of driving the same
US8933917B2 (en) * 2011-01-03 2015-01-13 Samsung Display Co., Ltd. Timing controller, display apparatus including the same, and method of driving the same
CN106356021A (en) * 2015-07-14 2017-01-25 西安诺瓦电子科技有限公司 Method for reducing electromagnetic interference of LED display screen and LED display control card
CN107358910A (en) * 2017-07-01 2017-11-17 深圳市灵星雨科技开发有限公司 A kind of implementation method for reducing display screen EMC
US20190173454A1 (en) * 2017-12-06 2019-06-06 Lg Display Co., Ltd. Spread spectrum clock generation apparatus and method, and display device and touch display device

Also Published As

Publication number Publication date
CN112951149B (en) 2024-03-15
TW202123202A (en) 2021-06-16
CN112951149A (en) 2021-06-11

Similar Documents

Publication Publication Date Title
JP7289991B2 (en) Signal generating device, driving chip, display system and driving method for LED display
US6687319B1 (en) Spread spectrum clocking of digital signals
TWI715341B (en) Light-emitting diode display driving circuit
JP2005050123A (en) Skew correction circuit
KR102687168B1 (en) Dispay device and driving method for the same
US20150035576A1 (en) Clock spurs reduction technique
JP2007259435A (en) Method, circuit and system for generating delayed high frequency clock signals used in spread spectrum clocking
CN111149297A (en) Clock synthesis circuit for generating clock signal to refresh display screen content and related technology
JP2004233581A (en) Display device driving circuit
CN103825608A (en) Random spread spectrum modulation
JP2007329745A (en) Delay ratio adjusting circuit, delay pulse generating circuit, and pulse-width modulated pulse signals generating device
US7312668B2 (en) High resolution PWM generator or digitally controlled oscillator
US6771136B1 (en) System and method for restoring the mark and space ratio of a clocking signal output from an oscillator
JP2003153526A (en) Switching regulator circuit
KR20140147179A (en) Circuit for adjusting clock phase and semiconductor device including the same
US12095468B2 (en) DLL circuit and distance measuring sensor
TWI745024B (en) Pulse width modulation signal generating circuit, source driver chip, and LED display device
TWI520121B (en) Phase lock loop based display driver for driving light emitting device and related display apparatus generating internal clock based on external clock
JP2004013784A (en) Clock-modulating circuit
US10205529B2 (en) Light source modulation circuit, light source modulation method, and projector apparatus
US7479941B2 (en) Display element drive apparatus and image display apparatus
KR102878861B1 (en) Display Device and Driving Method of the same
CN102047763B (en) Apparatus and method for dimming a backlight with pseudo-random phase delay
JP2006174197A (en) Clock creation circuit, and its method
CN104916253A (en) Driver and driving method for driving light-emitting element, and display