TWI713009B - Electrical optical device and electronic equipment - Google Patents

Abstract

The electrical optical device of the present invention has: a unit circuit corresponding to the intersection of a scan line and a data line; another unit circuit corresponding to the intersection of a scan line and another data line, another scan line and The above-mentioned cross of one data line, or the cross of another scan line and another data line is arranged; and the electrical optical element is driven by a unit circuit or another unit circuit.

Description

Electrical optical device and electronic equipment

The present invention relates to, for example, an electrical optical device and electronic equipment.

In recent years, various electrical optical devices using organic light emitting diodes (Organic Light Emitting Diode (hereinafter referred to as "OLED") or electrical optical elements such as liquid crystal elements have been proposed. Among the electrical optical devices, generally The unit circuit is configured to correspond to the intersection of the scan line and the data line. The unit circuit includes more than one transistor or capacitor, and is configured to maintain the voltage of the data signal supplied to the data line when the scan line is selected, and scan is not selected During the line, the current corresponding to the holding voltage continues to flow through the OLED, or the voltage corresponding to the holding voltage continues to be applied to the liquid crystal element.

In such a configuration, when a certain unit circuit has a defect or defect, the electrical optical element driven in the unit circuit becomes always on (bright spot) or always off (dark spot). , So the display quality is compromised. Therefore, the following technology is proposed: corresponding to the unit circuit for driving the electrical optical element, it has a spare (redundant) circuit that can drive and connect the electrical optical element. On the other hand, when the unit circuit has a defect, etc. The connection to the electrical optical element is switched from the unit circuit to the standby circuit to repair the defect and the like (for example, refer to Patent Document 1). [Prior Technical Literature] [Patent Literature]

[Patent Document 1] Japanese Patent Laid-Open No. 2009-3009

[The problem to be solved by the invention]

However, due to defects, etc., an abnormal current flows through the scan line or the data line corresponding to the unit circuit, so that the scan line or the data line may be disconnected. In this case, in the above-mentioned technology, there is a so-called defect that cannot be repaired even if the unit circuit for 1 row sharing the scan line or the unit circuit for 1 row sharing the data line is switched to a spare circuit. The problem. [Technical means to solve the problem]

In order to solve one of the above-mentioned problems, an electrical optical device according to an aspect of the present invention includes: a first scan line and a second scan line; a first data line and a second data line; and a first unit circuit corresponding to the first The scanning line is provided at the intersection of the first data line; the second unit circuit corresponds to the intersection of the first scan line and the second data line, the intersection of the second scan line and the first data line, or the The second scanning line is provided at any one of the intersections of the second data line; and an electrical optical element; the first unit circuit drives the electrical optical element; the second unit circuit is configured to replace the first unit Circuit to drive the electrical optical element.

Hereinafter, a mode for implementing the present invention will be described with reference to the drawings.

<The first embodiment> FIG. 1 is a perspective view showing the structure of the electrical optical device 10 of the first embodiment. The electrical optical device 10 is a microdisplay that displays color images, such as a head-mounted display (HMD). Although the details of the electrical optical device 10 will be described later, a plurality of unit circuits or electrical optical elements driven by the unit circuits are formed on a semiconductor silicon substrate, for example, and OLEDs are used as the electrical optical elements.

The display portion 100 of the electrical optical device 10 is housed in an open frame-shaped box 72 in the image display area. One end of the FPC (Flexible Printed Circuits) substrate 74 is connected to the substrate contained in the box body 72, and the other end of the FPC substrate 74 is provided with a plurality of terminals 76, and is connected to the upper-level circuit not shown in the figure . On the FPC substrate 74, the control circuit 5 of the semiconductor chip is mounted by COF (Chip On Film) technology, and the image data is supplied from the upper-level circuit through a plurality of terminals 76 in synchronization with the synchronization signal. In addition, the synchronization signal includes a vertical synchronization signal or a horizontal synchronization signal. In addition, the image data specifies the pixel gray scale of the image to be displayed in RGB, for example, 8 bits. In detail, in this embodiment, the gray scale of the pixel is specified in stages according to RGB at the darkest 0 level, that is, the display as black level, to the brightest 255 level. The control circuit 5 generates various control signals for vertical scanning and horizontal scanning of the display portion 100 according to the synchronization signal supplied from the upper-level circuit, and divides the gray scales into RGB sub-pixels, and cooperates with the vertical scanning and the display portion 100 Horizontal scanning or processing and output. In addition, the control circuit 5 also functions as a power supply circuit of the electrical optical device 10, and generates various potentials (voltages).

FIG. 2 is a diagram showing the electrical structure of the electrical optical device 10 of the embodiment. As shown in the figure, the electrical optical device 10 is roughly divided into a control circuit 5, a scanning line driving circuit 20, a plurality of Y selectors 22, a data line driving circuit 40, a plurality of X selectors 42, and a display unit 100. Among them, the sub-pixels 130 are arranged in a matrix in the display portion 100. In detail, in the present embodiment, in the display unit 100, three scan lines 12 in a group (3M) extend horizontally in the figure, and three data lines 14 in a group (3N) extend along the figure. The middle vertical extension is arranged, and the sub-pixels 130 are arranged corresponding to the intersection of the grouped 3 scan lines and 3 data lines.

M and N are each an integer of 2 or more. For convenience, when the extending direction of the scan line 12 is set as a row, and the extending direction of the data line 14 is set as a column, the sub-pixels 130 are arranged in M columns and N rows. In addition, in the present embodiment, the sub-pixels 130 correspond to any one of red (R), green (G), or blue (B), and are arranged in stripes in the display unit 100, for example. Specifically, the sub-pixels 130 of the same color are arranged in the order of straight lines in the row direction and RGB in the column direction. In addition, one sub-pixel 130 includes one OLED, and the OLED emits light in a color corresponding to the sub-pixel 130 and exhibits one of three primary colors. That is, the sub-pixel 130 is expressed by the light emission of the OLED, and the three sub-pixels 130 of RGB express one pixel of the color image to be displayed. In addition, 3 sub-pixels 130 of RGB constitute one pixel, but other sub-pixels may be included, or four or more sub-pixels 130 may constitute one pixel. In this embodiment, one OLED is driven by one of the nine unit circuits. The relationship between the OLED and the unit circuit will be described later.

The control circuit 5 outputs various signals based on image data or synchronization signals supplied from the upper-level circuit. If the main signal is described, the control circuit 5 outputs a control signal Ctry for controlling the scan line driving circuit 20, a control signal Ctrx for controlling the data line driving circuit 40, and a gray scale bit that specifies the gray scale of the sub-pixel 130 Quasi Vd. In addition, although omitted in FIG. 2 to avoid complications, the self-control circuit 5 supplies the Y selector 22 with information about which scan line 12 is set to be enabled and which scan line 12 is set to be disabled. The X selector 42 is provided with information on which data line 14 is enabled or disabled.

The scan line driving circuit 20 generates a scan signal for sequentially scanning the sub-pixels 130 arranged in M columns and N rows across a period of one frame according to the control signal Ctry. Here, the scanning signals used to scan the sub-pixels 130 in the 1, 2, 3,..., (M-1), and M-th columns are respectively denoted as G(1), G(2), G(3),... , G(M-1), G(M). In addition, in order to generally explain the column of sub-pixels 130 arranged in M columns and N rows, and the column of scanning lines 12 in a group of 3, the integer i satisfying 1≦i≦M is used as the i-th column. Also, it is used to scan the scan signal G(i) of the sub-pixel 130 in the i-th column. In addition, a frame period refers to the period required for the electrical optical device 10 to display an image of one cut (frame). For example, if the frequency of the vertical synchronization signal contained in the synchronization signal is 60 Hz, and the image is displayed vertically The equal speed of the synchronization signal is the period of 16.7 milliseconds of 1 cycle of the signal.

The Y selector 22 is set corresponding to the three scan lines 12 grouped. Therefore, there are M Y selectors 22 in this embodiment. Each of the M Y selectors 22 respectively sets one of the three scanning lines 12 to be enabled according to the instructions of the control circuit 5, and sets the other two to be disabled. Specifically, the Y selector 22 directly supplies the scanning signal from the scanning line driving circuit 20 to one scanning line 12 that is enabled, and on the other hand, supplies non-selection signals to the two scanning lines 12 that are inactive. The activation of the scanning line 12 means that during vertical scanning, when it becomes the scanning target, the scanning line 12 is supplied in the unit circuit with a selection signal for turning on the transistor to be described later connected to the gate node. When it is not the scanning target, the state of the non-selection signal for turning off the transistor is supplied. In addition, the disabling of the scanning line 12 means that during vertical scanning, whether it is the target of scanning or not, it is fixed to the state of the non-selection signal. In addition, in the initial state, each Y selector 22 sets one of the three scanning lines 12 at the top, for example, to be enabled.

The data line driving circuit 40 supplies data signals to the sub-pixels 130 of one column selected by the scanning line driving circuit 20, respectively. To generally describe the rows of sub-pixels 130 arranged in M columns and N rows and the rows of data lines 14 in a group of 3, an integer j satisfying 1≦j≦N is used. Here, when the i-th column is selected, the data line driving circuit 40 respectively outputs a data signal S(1) to the sub-pixels 130 in column i and 1 row, and outputs a data signal S(2) to the sub-pixels 130 in column i and 2 rows. The data signal S(3) is output to the sub-pixel 130 in row i and row 3, and the data signal S(j) is output to the sub-pixel 130 in row i and row j. If an example of the data line drive circuit 40 is described, in the data line drive circuit 40, for each group, that is, for every three data lines 14, a latch circuit 402, a D/A conversion circuit 404, and an amplifier circuit 406 are provided的组合。 The combination. Here, the latch circuit 402, the D/A conversion circuit 404, and the amplifying circuit 406 are described as representative of the j-th group. In the j-th group, when the latch circuit 402 selects the i-th column, it latches the gray level Vd corresponding to the sub-pixel 130 in the i-th row and the j-th row supplied from the control circuit 5. The D/A conversion circuit 404 converts the gray level Vd latched in the latch circuit 402 into an analog signal, and the amplifying circuit 406 amplifies the analog signal converted by the D/A conversion circuit 404 and outputs it as a data signal Sd(j) . Here, the latch circuit 402, the D/A conversion circuit 404, and the amplifying circuit 406 are described in the jth group, but regarding the latch circuit 402, the D/A conversion circuit 404, and the amplifying circuit 406 other than the jth group, It also works in parallel with the jth group. In addition, the potential relationship of the data signal can be obtained step by step within the range of the potential V_0 with the gray level equivalent to 0 level to the potential V_255 with the gray level equivalent to 255 level. Here, when the driving transistor that controls the current to the OLED is set to the P-channel type, the brighter the gray scale level is specified, the more the data signal potential decreases from the highest potential V_0 to the lowest potential V_255 .

The X selector 42 is set corresponding to the three data lines 14 grouped. Therefore, N X selectors 42 are provided in this embodiment. According to the instructions of the control circuit 5, each of the N X selectors 42 sets one of the three data lines 14 to enable, and sets the other two to disable. Specifically, the X selector 42 directly supplies the data signal from the data line driving circuit 40 to one data line 14 that is enabled. On the other hand, it supplies the gray level of 0 to the two data lines 14 that are not enabled. Standard, which is equivalent to the signal of the potential V_0 that displays black. In addition, in the initial state, each X selector 42 sets one of the three data lines 14 on the left, for example, to be enabled. The activation of the data line 14 means the state of the data signal supplied from the data line driving circuit 40. In addition, the disabling of the data line 14 means the state of supplying a signal of the potential V_0 to make it display black instead of the data signal from the data line driving circuit 40. In addition, the control circuit 5, the scanning line driving circuit 20, the plurality of Y selectors 22, the data line driving circuit 40, and the plurality of X selectors 42 are examples of driving circuits.

Next, the relationship between the sub-pixel 130 and the unit circuit will be described.

FIG. 3 is a diagram showing the configuration of the unit circuit 1000 in the electrical optical device 10. This figure shows the arrangement of the unit circuit 1000 corresponding to each of the sub-pixel 130 in column i and row j, the sub-pixel 130 in column i (j+1), and the sub-pixel 130 in column i (j+2). As shown in the figure, the unit circuit 1000 is provided corresponding to the intersection of one scan line 12 and one data line 14. Therefore, the sub-pixels 130 arranged at the intersection of the grouped 3 scan lines and 3 data lines correspond to 9 unit circuits 1000.

In addition, in FIG. 3, the signals supplied from the Y selector 22 to the three scanning lines 12 corresponding to the sub-pixel 130 in the i-th column are denoted as G(i)_a, G(i)_b, and G(i)_c, respectively. Similarly, the signals supplied from the X selector 42 to the three data lines 14 corresponding to the sub-pixel 130 in the j-th row are denoted as S(j)_a, S(j)_b, S(j)_c, and are supplied to and The signals of the three data lines 14 corresponding to the sub-pixel 130 in the (j+1)th row are respectively denoted as S(j+1)_a, S(j+1)_b, and S(j+1)_c, which are supplied to the The signals of the three data lines 14 corresponding to the sub-pixel 130 in the (j+2) row are denoted as S(j+2)_a, S(j+2)_b, and S(j+2)_c, respectively.

FIG. 4 is a diagram showing the electrical configuration of one sub-pixel 130. In this embodiment, one OLED 150 and nine unit circuits 1000 are provided in one sub-pixel 130. In addition, FIG. 4 is a diagram showing the equivalent circuit of the unit circuit 1000, etc., rather than reflecting the actual circuit layout.

As shown in the figure, a total of 9 unit circuits 1000 are provided corresponding to each intersection of the three scan lines 12 and the three data lines 14 corresponding to the sub-pixel 130. One unit circuit 1000 includes P-channel type transistors 121 and 122, and capacitor Cpix. The gate node of the transistor 122 is connected to the scan line 12, one of the drain or source node is connected to the data line 14, and the other is respectively connected to the gate node of the transistor 121 and one end of the capacitor Cpix. An example of the driving transistor, the transistor 121, connects the source node to the power supply line 116. The power supply to the power supply line 116 becomes the potential Vel of the high side of the power supply of the OLED 150. In addition, the other end of the capacitor Cpix is connected to the power supply line 116 in this embodiment, but as long as it is maintained at a fixed potential, it can be connected to a power supply line of another potential.

In addition, the nine unit circuits 1000 have the same configuration in electrical terms. The drain nodes of the transistor 121 in the nine unit circuits 1000 are connected to the anode of the OLED 150 in common with each other. The cathode of the OLED 150 is connected to the power supply line 118. The power supply to the power supply line 118 becomes the potential Vct on the low side of the power supply of the OLED 150.

The operation of the electrical optical device 10 will be described with reference to the timing chart of FIG. 5. As shown in the figure, the scanning signals G(1)～G(M) are switched to the L level in sequence across the 1 frame (F) period, and the 1st to the first scanning signals are sequentially scanned for each horizontal scanning period (H). Sub-pixels 130 in M columns. In the initial state, the M Y selectors 22 enable only the top one scanning line 12 among the three. Therefore, in the case of the i-th column, the Y selector 22 will supply the signals G(i)_a, G(i)_b, G(i)_c of the three scanning lines 12 corresponding to the i-th column The signal G(i)_a is set as the scanning signal G(i) output from the scanning line driving circuit 20, and the signal G(i)_b and G(i)_c are set to the H level of the non-selection signal. In addition, the i-th column is described here, but the same applies to other columns.

In addition, in the initial state, the N X selectors 42 enable only the leftmost data line 14 among the three. Therefore, in the case of the jth row, the X selector 42 will supply the signals S(j)_a, S(j)_b, S(j)_c of the three data lines 14 corresponding to the jth row The signal S(j)_a is set as the scanning signal S(j) output from the data line driving circuit 40, and the signals S(j)_b and S(j)_c are set to the potential V_0. Note that the j-th row is explained here, but the same applies to other rows.

Here, according to the selection of the i-th row, when the scanning signal G(i) becomes the L level, the j-th row data signal S(j) becomes the gray level (i, j) corresponding to the i-th row and j-th row Voltage. When the scan signal G(i) becomes the L level, the transistor 122 is turned on in the three unit circuits 1000 corresponding to the scan line 12 at the top among the nine unit circuits of the sub-pixel 130 corresponding to column i and row j; And in the 6 unit circuits 1000 corresponding to the scan line 12 at the bottom, the transistor 122 is turned off.

Therefore, among the three unit circuits 1000 corresponding to the scan line 12 at the top of the nine unit circuits 1000 corresponding to the sub-pixel 130 in column i and row j, the capacitance Cpix of the unit circuit 1000 on the left holds the signal S(j) On the other hand, the capacitors Cpix of the unit circuit 1000 located in the center and the rightmost maintain the potential V_0, respectively. In the leftmost unit circuit 1000 among the three unit circuits, even if the signal G(i)_a changes from the L level to the H level, the gate node of the transistor 121 remains as the signal S due to the capacitance Cpix (j), the transistor 121 continues to flow the current corresponding to the voltage to the OLED 150. In the unit circuit 1000 located at the center and the rightmost among the three unit circuits, even if the signal G(i)_a changes from the L level to the H level, the gate node of the transistor 121 is maintained by the capacitor Cpix It is the voltage V_0, so the transistor 121 does not allow current to flow to the OLED 150.

In addition, since the transistor 121 is not turned on in the 9 unit circuits corresponding to the 9 unit circuits of the OLED 150 in column i and row j, and in the 6 unit circuits 1000 corresponding to the scan line 12 in the center and the bottom, the capacitor Cpix does not keep passing through the data line. 14 of the signal. In detail, one end of the capacitor Cpix, that is, the gate node of the transistor 121 almost becomes the potential Vel due to leakage. Therefore, in the six unit circuits 1000, the transistor 121 does not cause current to flow to the OLED 150.

Therefore, among the 9 unit circuits 1000 corresponding to the sub-pixels 130 in row i and row j, the current flowing to the OLED 150 is only the uppermost scan line 12 that is activated among the three scan lines 12, and the three data lines 14 are activated. For the unit circuit 1000 corresponding to the data line 14 on the leftmost side, the OLED 150 in the sub-pixel 130 in row i and row j emits light by the current. In addition, here, the sub-pixel 130 in row i and row j is described, but the other sub-pixels 130 are the same. Only the uppermost scan line 12 among the three scan lines and the leftmost data line among the three data lines 14 The unit circuit 1000 corresponding to 14 causes a current corresponding to the holding voltage of the capacitor Cpix to flow through the corresponding OLED 150.

However, in the initial state, if the scan line 12 activated by each Y selector 22 and the unit circuit 1000 corresponding to the data line 14 activated by each X selector 42 are all normal, the display quality will not decrease. However, as described above, there are cases in which the unit circuit 1000 for one column with the scan line 12 as the unit or the unit circuit 1000 for one row with the data line 14 as the unit has a defect after the initial state.

After the initial state, for example, when a display defect occurs in the i-th row, among the three scan lines 12 corresponding to the sub-pixel 130 in the i-th row, the enabled uppermost scan line 12 or the scan line 12 corresponds to The unit circuit 1000 has a high possibility of failure. Therefore, in this embodiment, in this case, the control circuit 5 instructs the Y selector 22 in the i-th column to switch the enabled scan line 12 among the three scan lines 12 corresponding to the sub-pixel 130 in the i-th column to the most For example, the scan line 12 in the center other than the top.

According to the instruction, the Y selector 22 corresponding to the i-th column supplies the scanning signal G(i) from the scanning line driving circuit 20 to the central scanning line 12 to be activated among the three scanning lines 12 of the sub-pixel 130 corresponding to the i-th column , And supply non-selection signals to the scan lines 12 at the top and bottom.

Here, as shown in FIG. 6, when the scanning signal G(i) becomes the L level, the signal G(i)_b also becomes the L level, but the signals G(i)_a and G(i)_c become non- Select the H level of the signal. Therefore, if viewed from column i and row j, among the 9 unit circuits corresponding to the sub-pixel 130, the transistor 122 in the 3 unit circuits 1000 corresponding to the central scan line 12 is turned on, but corresponding to the top and bottom The transistor 122 in the six unit circuits 1000 of the scan line 12 is disconnected. On the other hand, when the signal G(i)_b becomes the L level, the following points are the same as the initial state: the leftmost data line 14 of the three data lines 14 corresponding to row j is supplied to row i and row j The signal S(j) of the gray level of the OLED150, on the other hand, supplies the potential V_0 to the other two data lines 4.

Therefore, among the nine unit circuits 1000 corresponding to the sub-pixels 130 in row i and row j, the current flowing to the OLED 150 is only the activated center scan line 12 among the three scan lines 12 and the most activated among the three data lines 14 In the unit circuit 1000 corresponding to the data line 14 on the left, the OLED 150 in row i and row j emits light according to the current. In addition, here, the sub-pixel 130 in row i and row j is described, but the same is true for the sub-pixel 130 in row i and other rows. Only the center scan line 12 among the three scan lines and the three data lines 14 are The unit circuit 1000 corresponding to the leftmost data line 14 causes the current corresponding to the holding voltage of the capacitor Cpix to flow through the OLED 150 in the corresponding sub-pixel 130. Therefore, even if the top scan line 12 of the three scan lines 12 corresponding to column i, or the unit circuit 1000 corresponding to the top scan line 12 is defective, when a display defect occurs in the i-th column, it can be repaired Show defects.

In addition, if the display defect still occurs after the scan line 12 at the top or the center of the three scan lines 12 corresponding to the i-th row is activated, the bottom scan line 12 can be activated.

On the other hand, after the initial state, when the display defect occurs along the row direction instead of the column direction, for example, when the display defect occurs in the jth row, the control circuit 5 instructs the X selector 42 in the jth row to The enabled data line 14 among the three data lines 14 of the sub-pixel 130 in the j-th row should be switched to the data line 14 other than the leftmost, such as the center.

According to this instruction, the X selector 42 corresponding to the jth row is shown in FIG. 7 and uses the data signal S(j) from the data line driving circuit 40 as the signal S(j)_b to be supplied to the OLED 150 corresponding to the jth row The active center data line 14 of the three data lines 14 respectively supplies the signal of potential V_0 to the leftmost data line 14 as signal S(j)_a, and supplies the signal of potential V_0 to the rightmost data line 14 as signal S (j)_c. Therefore, among the 9 unit circuits 1000 corresponding to the sub-pixel 130 in row i and row j, the current flowing to the OLED 150 is only the activated uppermost scan line 12 of the 3 scan lines 12 and the activated center of the 3 data lines 14 In the unit circuit 1000 corresponding to the data line 14, the OLED 150 in row i and row j emits light according to the current. In addition, here, the sub-pixel 130 in row i and row j is described, but the same is true for the sub-pixel 130 in row j, which is the uppermost scan line 12 among the three scan lines 12 and the three data lines 14 The unit circuit 1000 corresponding to the data line 14 in the center, and the OLED 150 in row i and row j emits light according to the current. Therefore, even if the leftmost data line 14 of the three data lines 14 corresponding to the j-th row, or the unit circuit 1000 corresponding to the leftmost data line 14 is defective, when a display defect occurs in the j-th row, it can be Fix the display defect. In addition, assuming that the display defect still occurs after the leftmost and central data lines 14 of the three data lines 14 corresponding to the j-th row are activated, only the rightmost data line 14 can be activated.

In this way, according to the present embodiment, display defects that occur afterwards can be easily repaired in the column direction or the row direction.

In the first embodiment, by enabling any one of the three scanning lines 12 corresponding to one sub-pixel 130, and setting the other two to be disabled, any one of the three rows is used. Furthermore, by enabling any one of the three data lines 14 corresponding to one sub-pixel 130, and setting the other two to be disabled, any one of the three data lines is used. In addition, it is configured to use one unit circuit 1000 corresponding to the intersection of the enabled scan line 12 and the enabled data line 14 so that current flows through the OLED 150, and the other 8 unit circuits 1000 are not used. That is, it is configured to enable only one scan line 12 among the three rows, and only one data line 14 among the three rows is enabled, thereby determining that one current flows through the unit circuit 1000 of the OLED 150. Then, the determined one unit circuit 1000 drives the OLED 150, and any one of the other eight unit circuits 1000 can replace one unit circuit 1000 to drive the OLED 150 by changing the enabled scan line 12 or the data line 14. In addition, the unit circuit 1000 in which current flows through the OLED 150 can also be configured as follows. For example, as shown in FIG. 8, in each unit circuit 1000, an example of a light-emitting control transistor, that is, a transistor 123, is provided between the transistor 121 and the OLED 150, respectively. In the unit circuit 1000 of this configuration, if the transistor 123 is turned off, regardless of the holding voltage of the capacitor Cpix, the transistor 121 does not cause current to flow to the OLED 150. Therefore, by supplying the same control signal in the column or row direction to the gate node of the transistor 123, the column or row of the unit circuit 1000 for driving the OLED 150 can be selected. In addition, the control signal of the transistor 123 can be configured as follows: For example, if the column directions are consistent, the Y selector 22 supplies one of the three columns to the transistor according to the instruction of the control circuit 5. If the signal for turning on 123 is consistent in the row direction, according to the instruction of the control circuit 5, the X selector 42 supplies a signal for turning on the transistor 123 to one of the three rows. In addition, when the row direction coincides, the X selector 42 can be discarded, and the data line drive circuit 40 directly supplies signals to each of the data lines 14. In this configuration, the data line driving circuit 140 can receive the information of the enabled or disabled data line 14 from the control circuit 5, and enable or disable each of the data lines 14 according to the information. That is, in this configuration, the data line driving circuit 140 supplies the data line 14 set to be enabled with a data signal corresponding to the gray level, and supplies the data line 14 set to be inactive with a potential V_0 equivalent to displaying black. signal. Regarding the transistor 123, since each unit circuit 1000 only needs to connect the transistor 121 and the OLED 150 in series, as shown in FIG. 8, it is not limited to between the transistor 121 and the OLED 150, and can also be provided between the power supply line 116 and the transistor. 121 between.

In the unit circuit 1000, due to the change of the channel type of the transistors 121 and 122, the potential relationship may be replaced. When the potential relationship changes, the node described as the drain node becomes the source node, and the node described as the source node can also become the drain node. For example, any one of the source node and the drain node of the transistor 121 can be electrically connected to the power supply line 116, and any other one can be electrically connected to the anode of the OLED 150 through the transistor 121. In addition, the unit circuit 1000 is simply shown in FIG. 4 or FIG. 8, and it may have a structure other than that shown in FIG. 4 or FIG. For example, in order to compensate the threshold characteristics of the transistor 121, a transistor for connecting the diode of the transistor 121, or a transistor for setting the anode of the OLED 150 to a specific potential can be provided.

Furthermore, in the first embodiment, one OLED 150 is driven by any one of the nine unit circuits 1000, but any one of the two or more unit circuits 1000 may be driven. In this case, in two or more unit circuits 1000, only one of the scan line 12 or the data line 14 may be set to be non-shared. Specifically, it is only necessary to provide a unit circuit corresponding to the intersection of a scan line and a data line, and replace the unit circuit, and correspond to the intersection of a scan line and other data lines, and other scan lines and the aforementioned one data line. It is sufficient to drive one OLED by crossing or any of the other unit circuits provided by crossing the other scanning lines and the other data lines. In more detail, as long as the OLED 150 is arranged in M columns and N rows, the unit circuit 1000 may be arranged in m columns more than M columns and n rows more than N rows. In addition, when the unit circuit 1000 is arranged in m columns and n rows, the number of scanning lines 12 is m, and the number of data lines 14 is n.

In the above-mentioned first embodiment, it is configured that any one of the two or more unit circuits 1000 drives one OLED 150, and can replace the one unit circuit 1000, and another unit circuit 1000 drives the OLED 150, However, this structure may be a part of the display unit 100 instead of the entire structure. Therefore, an embodiment of a configuration in which one OLED 150 is driven by any one of two or more unit circuits 1000 in a part of the display unit 100 will be described next.

<The second embodiment> 9 is a diagram showing the display part 100 of the electrical optical device 10 of the second embodiment, and FIG. 10 is a diagram simply showing the arrangement of the unit circuit 1000 and the sub-pixels 130 of the electrical optical device 10. As shown in FIG. 10, in the second embodiment, the size of the sub-pixel 130 in the left half of the display portion 100 is 1.5 times larger than the size of the sub-pixel 130 in the right half of the area, spanning the column and row directions. Therefore, since the density of the sub-pixel 130 in the left area is sparser than the density of the sub-pixel 130 in the right area, in Figure 9, the left area is denoted as (1) a low-resolution area, and the right area is denoted as (2) a high-resolution area. . In addition, the low-resolution area in the left area is an example of the first area, and the high-resolution area in the right area is an example of the second area. On the other hand, the density of arrangement of the unit circuits 1000 is the same in the right area and the left area. Therefore, when the unit circuit 1000 in the right area of the display portion 100 corresponds to the sub-pixel 130 one-to-one, the unit circuit 1000 in the left area is excessive relative to the sub-pixel 130. Therefore, in the second embodiment, the excess unit circuit 1000 in the left area is configured to be used when a defect occurs. Specifically, the correspondence relationship with the sub-pixel 130 in the left area will be described with reference to FIG. 10.

In FIG. 10, the expression "→" in the left side of the display part 100 shows the position of the scanning line 12, and the expression "↑" in the lower side of the display part 100 shows the position of the data line 14. Therefore, the unit circuit 1000 is arranged corresponding to the expression of "→" and the expression of "↑".

In the left area, the first row of the sub-pixel 130 uses the unit circuit 1000 corresponding to the first row of the data line 14 of "R" and "↑". In the left area, the second row of sub-pixel 130 sets the second row unit circuit 1000 corresponding to the data line 14 with no arrow (blank) "↑" as a spare, and uses the data lines corresponding to "G" and "↑" Unit circuit 1000 in line 3 of 14 In the left area, the third row of the sub-pixel 130 uses the unit circuit 1000 corresponding to the fourth row of the data line 14 "B" and "↑", and the fifth row corresponding to the data line 14 without the arrow "↑" The unit circuit 1000 is set as a spare. In addition, in the left area, the first column of the sub-pixel 130 uses the unit circuit 1000 of the first column. Since the unit circuit 1000 in the first column is used in (1) the low-definition area in the left area, it is also used in the (2) high-definition area in the right area, so it displays the position of the scan line 12 in the first column "→" (1) and (2) are appended to the expression. In addition, the unit circuit 1000 in the second column is not used in the (1) low-definition area in the left area, but only in the (2) high-definition area in the right area, so it displays the position of the scan line 12 in the second column "→ Only (2) is attached to the statement.

FIG. 11 is a diagram showing the electrical configuration of the five unit circuits 1000 and three sub-pixels 130 marked with black circles in FIG. 10. In addition, FIG. 11 is only a diagram illustrating the electrical configuration, and the distance between the sub-pixels 130 is different from the display arrangement in FIG. 10. As shown in FIG. 11, in this column, the R sub-pixel 130 in the first row (left end) only corresponds to the unit circuit 1000 in the first row, and the unit circuit 1000 allows current to flow through the OLED 150 in R. The G sub-pixel 130 in the second row corresponds to the unit circuit 1000 in the second and third rows, and any unit circuit 1000 allows current to flow through the G OLED 150. The sub-pixel 130 of B in the third row corresponds to the unit circuit 1000 in the fourth and fifth rows, and any unit circuit 1000 allows current to flow through the OLED 150 of B. Among them, since the unit circuit 1000 in the 2nd and 5th rows is standby, in the initial state, the data line 14 in the 2nd and 5th rows is set to be disabled, and the 1st, 3rd and 4th rows Data line 14 of the line is set to enable. In the initial state, if a display defect occurs in the third or fourth row, the display defect can be repaired by setting the data line 14 in the second or fifth row to be enabled. In addition, it is omitted in FIG. 11, but as shown in FIG. 10, the unit circuit 1000 in the 8th row is also a spare. Therefore, in the initial state, if a display defect occurs in the seventh row, the display defect can be repaired by setting the data line 14 in the eighth row to be enabled.

In addition, in the second embodiment, the left area of the display unit 100 is set as a low-resolution area and the right area is set as a high-resolution area, but the reverse is also possible. In addition, the display unit 100 is equally divided on the left and right, but it may be divided at different ratios.

<The third embodiment> 12 is a diagram showing the display part 100 of the electrical optical device 10 of the third embodiment, and FIG. 13 is a diagram simply showing the arrangement of the unit circuit 1000 and the sub-pixels 130 of the electrical optical device 10. As shown in FIG. 13, in the third embodiment, the size of the sub-pixel 130 in the upper half of the display portion 100 is 1.5 times in the column and row directions compared to the size of the sub-pixel 130 in the lower half. Therefore, since the density of the sub-pixels 130 in the upper area is sparser than the density of the sub-pixels 130 in the lower area, in FIG. 12, the upper area is denoted as (1) the low-resolution area, and the lower area is denoted as (2) the high-resolution area. . In addition, the low-resolution area in the upper area is an example of the first area, and the high-resolution area in the lower area is an example of the second area. On the other hand, the arrangement density of the unit circuits 1000 is the same in the upper area and the lower area. Therefore, when the unit circuit 1000 and the sub-pixel 130 are in a one-to-one correspondence in the lower region of the display portion 100, the unit circuit 1000 is excessive relative to the sub-pixel 130 in the upper region. Therefore, in the third embodiment, the unit circuit 1000 that is excessive in the upper area is used in the case of a defect. Specifically, the correspondence between the upper region and the sub-pixel 130 will be described with reference to FIG. 13.

Specifically, the sub-pixel 130 in the first column uses the unit circuit 1000 in the first column, and the unit circuit 1000 in the second column is used as a backup. Therefore, in the expression "→" indicating the position of the scan line 12 in the first row, add (1) based on the meaning that the unit circuit 1000 in the first row is used in the low-resolution area, and in the scan in the second row In the description of the position of line 12 "→", no arrow (blank) is added based on the meaning of using the unit circuit 1000 in the second column as a spare. In addition, the sub-pixel 130 in the second column uses the unit circuit 1000 in the third column. Therefore, (1) is added to the expression "→" indicating the position of the scan line 12 in the third column.

The sub-pixel 130 (R) in the first row in the upper area and the sub-pixel 130 (R) in the first row in the lower area use the unit circuit 1000 in the first row. Therefore, “R” is added to the expression of “↑” which indicates the position of the data line 14 in the first row. In addition, the “R” at the beginning, that is, the “R” on the upper side in FIG. 13 means the sub-pixel 130 (R) used in the upper area of the display part 100, and the “R” at the end, which is shown in FIG. 13 The “R” in the lower middle side means the sub-pixel 130 (R) used in the lower area of the display part 100. In the upper area, the sub-pixel 130 (G) in the second row uses the unit circuit 1000 in the second row as a spare, and uses the unit circuit 1000 in the third row. On the other hand, in the lower area, the sub-pixel 130 (G) in the second row uses the unit circuit 1000 in the second row. Therefore, "No arrow (blank)" and "G" are added to the description of "↑" that indicates the position of the data line 14 in the second row. In the upper area, the sub-pixel 130 (G) in the second row uses the unit circuit 1000 in the third row, and in the lower area, the sub-pixel 130 (B) in the third row uses the unit circuit 1000 in the third row. Therefore, "G" and "B" are added to the expression of "↑" which indicates the position of the data line 14 in the third row. In the upper area, the sub-pixel 130 (B) in the third row uses the unit circuit 1000 in the third row, and the unit circuit 1000 in the fourth row is used as a spare. On the other hand, in the lower area, the sub-pixel 130 (R) in the fourth row uses the unit circuit 1000 in the fourth row. Therefore, add "B" and "R" to the expression "↑" indicating the position of the data line 14 in the fourth row. In addition, in the upper region, the sub-pixel 130 (B) in the fourth row uses the unit circuit 1000 in the fifth row as a spare, and uses the unit circuit 1000 in the sixth row. On the other hand, in the lower area, the sub-pixel 130 (G) in the fifth row uses the unit circuit 1000 in the fifth row. Therefore, "No arrow (blank)" and "G" are added to the expression of "↑" that indicates the position of the data line 14 in the fifth row.

In the initial state, if a display defect occurs in the first row, the display defect can be repaired by enabling the scan line 12 in the second row.

In addition, in the third embodiment, the upper area of the display unit 100 is a low-definition area, and the lower area is a high-definition area, and the opposite is also possible. In addition, the display unit 100 is equally divided up and down, or may be divided up and down at different ratios.

<The fourth embodiment> 14 is a diagram showing the display portion 100 of the electrical optical device 10 of the fourth embodiment, and FIG. 15 is a diagram simply showing the arrangement of the unit circuit 1000 and sub-pixels 130 of the electrical optical device 10. In addition, in this example, the display unit 100 is divided into an upper area, a middle area, and a lower area, and the upper area is set to (1) a low-resolution area, the middle area is set to (2) a high-resolution area, and the lower area is set to Same as the upper area (3) Low-resolution area. Since the fourth embodiment is located on the extension of the third embodiment, no special explanation is required.

In the fourth embodiment, in the initial state, if a display defect occurs in the first row or the sixth row, the display defect can be repaired by enabling the scan line 12 in the second row or the seventh row.

In addition, in the fourth embodiment, the display unit 100 has been described as being divided into three parts: the upper area, the middle area, and the lower area in the vertical direction. However, it may be divided into the left area, the middle area, and the right area in the left-right direction. The three-part structure of the area. Regarding the three-part structure in the left-right direction, since it is located on the extension line of the second embodiment, no special explanation is required. The number of divisions is not limited to "3". Regardless of the number, it is desirable that the arrangement density of the sub-pixels 130 becomes sparser from the middle area toward the peripheral area. The reason is that people's visual perception is more sensitive toward the center, and duller toward the periphery. In addition, according to the second to fourth embodiments, the image data supplied to the electrical optical device 10 can be reduced to the amount of low-resolution regions.

In addition, in the first to fourth embodiments, as an example of an electrical optical element, OLED150 is used for description, but it may be an inorganic light emitting diode or an LED (Light Emitting Diode), or it may be a liquid crystal element. In short, an element whose optical characteristics change according to the supply of electric energy (application of an electric field or supply of current) can be applied as an electrical optical element. Each aspect/embodiment described in this specification can be used alone or in combination. In addition, the term "connected" or all variations of the term means all direct or indirect connections or combinations between two or more elements, and includes the existence of two elements that are "connected" with each other One or more intermediate elements. The combination or connection between the elements can be physical, logical, or a combination of these.

＜Electronic Equipment＞ Next, an electronic device to which the electrical optical device 10 of the embodiment and the like is applied will be described. The electrical optical device 10 faces the application of small size and high-definition display of pixels. Therefore, as an electronic device, a head-mounted display will be described as an example.

FIG. 16 is a diagram showing the appearance of the head-mounted display, and FIG. 17 is a diagram showing the optical structure thereof. First, as shown in FIG. 16, the head-mounted display 300 has temples 310, bridges 320, and lenses 301L and 301R in the same appearance as general glasses. Furthermore, as shown in FIG. 17, the head-mounted display 300 is provided with an electrical optical device 10L for the left eye and an electrical optical device for the right eye 10L near the bridge 320 and the inner side of the lenses 301L and 301R (the lower side in the figure)装置10R. The image display surface of the electrical optical device 10L is arranged so as to become the left side of FIG. 17. Thereby, the display image of the electrical optical device 10L is emitted to the direction of 9 o'clock in the figure through the optical lens 302L. The half mirror 303L reflects the display image of the electrical optical device 10L to the direction of 6 o'clock, and on the other hand, transmits the light incident from the direction of 12 o'clock. The image display surface of the electrical optical device 10R is arranged to be on the opposite right side of the electrical optical device 10L. Thereby, the display image of the electrical optical device 10R is emitted to the direction of 3 points in the figure through the optical lens 302R. The half mirror 303R reflects the display image of the electrical optical device 10R in the direction of 6 o'clock, and on the other hand, transmits the light incident from the direction of 12 o'clock.

In this configuration, the wearer of the head mounted display 300 can observe the display images of the electrical optical devices 10L and 10R in a see-through state overlapping with the external conditions. In addition, in the head-mounted display 300, if the left-eye image of the binocular images with parallax is displayed on the electrical optical device 10L, and the right-eye image is displayed on the electrical optical device 10R, then As far as the wearer is concerned, the displayed image seems to have depth or three-dimensionality.

In addition, regarding the electrical optical device 10, in addition to the head-mounted display 300, it can also be applied to an electronic viewfinder in a video camera or a digital camera with an interchangeable lens.

5‧‧‧Control circuit 10‧‧‧Electrical optical device 10L‧‧‧Electrical optical device 10R‧‧‧Electrical optical device 12‧‧‧Scan line 14‧‧‧Data line 20‧‧‧Scan line drive circuit 22‧‧‧Y selector 40‧‧‧Data line drive circuit 42‧‧‧X selector 72‧‧‧Box body 74‧‧‧FPC substrate 76‧‧‧Terminal 100‧‧‧Display 116‧‧‧Power line 118‧‧‧Power line 121‧‧‧Transistor 122‧‧‧Transistor 123‧‧‧Transistor 130‧‧‧sub pixel 150‧‧‧OLED 300‧‧‧Head-mounted display 301L‧‧‧lens 301R‧‧‧lens 302L‧‧‧Optical lens 302R‧‧‧Optical lens 303L‧‧‧Half mirror 303R‧‧‧Half mirror 310‧‧‧Temples 320‧‧‧Bridge 402‧‧‧Latch circuit 404‧‧‧D/A conversion circuit 406‧‧‧Amplifying circuit 1000‧‧‧Unit circuit B‧‧‧Blue Cpix‧‧‧Capacitor Ctrx‧‧‧Control signal Ctry‧‧‧Control signal F‧‧‧Frame G‧‧‧Green G(1)～G(M)‧‧‧Scan signal G(i)_a～G(i)_c‧‧‧signal H‧‧‧1 During horizontal scanning R‧‧‧Red S(1)～S(N)‧‧‧Data signal S(j)_a～S(j)_c‧‧‧signal S(j+1)_a～S(j+1)_c‧‧‧signal S(j+2)_a～S(j+2)_c‧‧‧signal Sd(j)‧‧‧Data signal Vct‧‧‧Potential Vd‧‧‧Gray level Vel‧‧‧Potential V_0～V_255‧‧‧Potential

FIG. 1 is a perspective view showing the structure of the electrical optical device of the first embodiment. Figure 2 is a diagram showing the electrical configuration of the electrical optical device. Fig. 3 is a diagram showing the configuration of the unit circuit in the electrical optical device. Figure 4 is a diagram showing the configuration of the unit circuit and the equivalent circuit of the OLED. Figure 5 is a timing diagram showing the action of the electrical optical device. Figure 6 is a timing diagram showing the action of the electrical optical device. Figure 7 is a timing diagram showing the action of the electrical optical device. Fig. 8 is a diagram showing the configuration of other unit circuits of the electrical optical device of the first embodiment. Fig. 9 is a diagram showing the display portion of the electrical optical device of the second embodiment. FIG. 10 is a diagram showing the unit circuit of the electrical optical device and the configuration of the OLED. Figure 11 is a diagram showing the configuration of the unit circuit and the equivalent circuit of the OLED. FIG. 12 is a diagram showing the display part of the electrical optical device of the third embodiment. FIG. 13 is a diagram showing the unit circuit of the electrical optical device and the configuration of the OLED. FIG. 14 is a diagram showing the display part of the electrical optical device of the fourth embodiment. FIG. 15 is a diagram showing the unit circuit of the electrical optical device and the configuration of the OLED. FIG. 16 is a perspective view showing an HMD (Head Mount Display) using the electrical optical device of the embodiment and the like. Figure 17 is a diagram showing the optical structure of the HMD.

5‧‧‧Control circuit

10‧‧‧Electrical optical device

12‧‧‧Scan line

14‧‧‧Data line

20‧‧‧Scan line drive circuit

22‧‧‧Y selector

40‧‧‧Data line drive circuit

42‧‧‧X selector

100‧‧‧Display

130‧‧‧sub pixel

402‧‧‧Latch circuit

404‧‧‧D/A conversion circuit

406‧‧‧Amplifying circuit

B‧‧‧Blue

Ctrx‧‧‧Control signal

Ctry‧‧‧Control signal

G‧‧‧Green

G(1)~G(M)‧‧‧Scan signal

R‧‧‧Red

S(1)~S(N)‧‧‧Data signal

Vd‧‧‧Gray level

Claims (3)

An electrical optical device, comprising: a plurality of scanning lines; a plurality of data lines; a plurality of unit circuits, which are arranged corresponding to the intersection of the plurality of scan lines and the plurality of data lines; and a plurality of sub-pixels; and The plurality of unit circuits include a plurality of first unit circuits arranged in the first area and a plurality of second unit circuits arranged in the second area; the plurality of sub-pixels include a plurality of first sub-pixels arranged in the first area and A plurality of second sub-pixels arranged in the second region; the density of the plurality of first unit circuits is the same as the density of the plurality of second unit circuits; the density of the plurality of second sub-pixels is higher than the density of the plurality of second unit circuits The first sub-pixels are sparse; the size of the first sub-pixels is greater than the size of the second sub-pixels; one of the first sub-pixels is the same as the first One of the first unit circuits in the unit circuit corresponds to one-to-one; one of the second sub-pixels in the plurality of second sub-pixels corresponds to the second unit circuit of more than two of the second unit circuits in the plurality of second sub-pixels Corresponding; in the first region, the first sub-pixel is driven by the first unit circuit; in the second region, one of the two or more second unit circuits is a second unit Circuit The second sub-pixel can be driven in place of other second unit circuits. Such as the electrical optical device of claim 1, wherein the plurality of scanning lines are m (m is an integer greater than 3); the plurality of data lines are n (n is an integer greater than 3); the plurality of unit circuits Corresponding to the intersection of the m scan lines and the n scan lines, they are arranged in m columns and n rows; the plurality of sub-pixels are arranged in M (M is an integer that satisfies M<m or more) in column N (N is N<n Integer above 2) arranged in rows. An electronic machine having the electrical optical device of claim 1 or 2.

Images