TWI705367B - Charge-pump circuit adaptable to tddi - Google Patents

Abstract

A charge-pump circuit includes a clock generator that generates a clock signal; a sensing waveform generator that generates a sensing signal; a first diode having a cathode electrically connected to a predetermined low voltage; a first capacitor having a first plate electrically coupled to receive the clock signal, and a second plate electrically connected to an anode of the first diode; a second diode having a cathode electrically connected to the second plate of the first capacitor; and a second capacitor having a first plate electrically coupled to receive the sensing signal, and a second plate electrically connected to an anode of the second diode at an output node. The clock signal being generated in a charge-pump period alternates in time with the sensing signal being generated in a touch-sensing period.

Description

Charge pump circuit suitable for touch display integrated driver

The present invention relates to a DC converter, in particular to a charge pump circuit suitable for a touch display integrated driver (TDDI).

A DC-to-DC converter is an electronic circuit that converts a DC power supply from one voltage level to another voltage level. A DC converter is a type of power converter, and its power range can be from a low power level to a high power level.

A charge-pump circuit is a type of DC converter that uses a capacitor to store charge to increase or decrease the voltage. The charge pump circuit generally has a simple circuit structure but high efficiency, usually up to 90-95%.

The touch and display driver integration is an integrated driver that can drive the touch panel and the display panel. However, the voltage range of the integrated touch display driver is usually 32 volts. When a charge pump circuit is used, the voltage range of the touch/display panel being driven is usually greater than 40 volts, so special mechanisms are needed to achieve this. Therefore, there is an urgent need to provide a novel charge pump circuit that can be applied to a touch display integrated driver without sacrificing the high efficiency of the charge pump circuit.

In view of the foregoing, one of the objectives of the embodiments of the present invention is to provide a charge pump circuit suitable for a touch display integrated driver (TDDI) for driving a touch/display panel with a high voltage range.

According to an embodiment of the present invention, the charge pump circuit includes a clock generator, a sensing waveform generator, a first diode, a first capacitor, a second diode, and a second capacitor. The clock generator generates a clock signal that oscillates between a high state and a low state, wherein the high state has a related preset high voltage and the low state has a related preset low voltage. The sensing waveform generator generates sensing signals for touch sensing. The cathode of the first diode is electrically connected to a predetermined low voltage. The first plate of the first capacitor is electrically coupled to the clock signal, and the second plate of the first capacitor is electrically connected to the anode of the first diode at the intermediate node. The cathode of the second diode is electrically connected to the second plate of the first capacitor at the intermediate node. The first plate of the second capacitor is electrically coupled to the sensing signal, and the second plate of the second capacitor is electrically connected to the anode of the second diode at the output node. The clock signal generated during the charge pump period and the sensing signal generated during the touch sensing period are alternately generated.

The first figure shows a circuit diagram of a charge pump circuit 100 suitable for a display driver. The charge pump circuit 100 may include a clock generator 11, which is arranged in the display driver to generate a clock signal (such as a square wave as shown), which oscillates in a high state (with a related preset high voltage VSP) and a low state (With associated preset low voltage VSN).

The charge pump circuit 100 may include (externally attached) a first diode D1, which is arranged outside the display driver. The first diode D1 has a cathode (for example, the N side of the p-n interface diode), which is electrically connected to a predetermined low voltage VSN. The charge pump circuit 100 may include (externally attached) a first capacitor C1, with a first board 12, electrically coupled to the clock signal (of the clock generator 11); and a second board 13, electrically connected at the intermediate node M To the anode of the first diode D1 (for example, the P side of the pn interface diode).

The charge pump circuit 100 may include (externally attached) a second diode D2, which has a cathode, and is electrically connected to the second plate 13 of the first capacitor C1 at the intermediate node M. The charge pump circuit 100 may include (externally attached) a second capacitor C2, which has a first plate 14 electrically connected to ground (for example, 0 volts); and a second plate 15 electrically connected to the second capacitor at the output node VGL The anode of pole body D2.

During the first stage of operation, the clock signal is in the high state (that is, the high voltage VSP), the first diode D1 is forward-biased (or turned on), and the intermediate node M is charged to VSN +Vt, where Vt represents the critical voltage of the diode. In the first stage, the second diode D2 is reverse-biased (or turned off), so the second capacitor C2 is separated from other circuits of the charge pump circuit 100.

During the second stage of operation, the clock signal is in the low state (ie low voltage VSN), the second diode D2 is forward biased (or on), but the first diode D1 is reverse biased (Or close). Therefore, the second diode D2 is connected in series with the first capacitor C1 and the clock signal. In this way, the output node VGL is charged to 2VSN-VSP+Vt, while the intermediate node M is charged to 2VSN-VSP. In an example, if the preset high voltage VSP is 6 volts, the preset low voltage VSN is -6 volts, and the diode threshold voltage Vt is 0.7 volts, the output node VGL is charged to -17.3 volts. According to the above, the charge pump circuit 100 can provide a larger voltage range than the display driver.

The second figure shows a circuit diagram of a charge pump circuit 200 suitable for a touch display integrated driver (TDDI) according to an embodiment of the present invention. The charge pump circuit 200 has a structure similar to the charge pump circuit 100 in the first figure, and may include a clock generator 11 (installed in the integrated touch display driver), (external) first diode D1, (external) second The details of the diode D2, (externally attached) first capacitor C1 and (externally attached) second capacitor C2 will not be repeated.

According to one of the features of this embodiment, the charge pump circuit 200 may further include a sensing waveform generator 21, which is provided in the integrated touch display driver to generate a sensing (driving) signal for touch sensing (for example, as shown in FIG. The triangular wave shown), which oscillates between ground (for example, 0 volts) and a predetermined negative voltage (for example, -5 volts). According to another feature of this embodiment, the first plate 14 of the second capacitor C2 is electrically coupled to the sensing signal instead of being coupled to the ground as in the first figure.

According to another feature of this embodiment, the clock signal (of the clock generator 11) and the sensing signal (of the sensing waveform generator 21) are generated by time-sharing. Among them, the clock signal is generated during the charge pump (or display) period, and then the sensing signal is generated during the touch sensing period. In other words, the sensing signal and the clock signal are generated alternately.

During the operation of the first stage of the charge pump period, the clock signal is in the high state (that is, the high voltage VSP), the first diode D1 is forward biased (or turned on), and the intermediate node M is charged to VSN+ Vt, where Vt represents the critical voltage of the diode. In the first stage, the second diode D2 is reverse biased (or turned off), thus separating the second capacitor C2 from other circuits of the charge pump circuit 100.

During the second stage of the charge pump operation, the clock signal is in the low state (that is, the low voltage VSN), the second diode D2 is forward biased (or on), but the first diode D1 For reverse bias (or off). Therefore, the second diode D2 is connected in series with the first capacitor C1 and the clock signal. In this way, the output node VGL is charged to 2VSN-VSP+Vt, while the intermediate node M is charged to 2VSN-VSP.

During the touch sensing period, the second diode D2 is forward biased (or turned on), while the first diode D1 is reverse biased (or turned off). The output node VGL is charged downward from the output voltage 2VSN-VSP+Vt during the charge pump period according to the sensing signal (such as the triangular wave shown in the figure) (to make it have a more negative voltage), thus generating more negative The voltage. According to the above, the voltage range (for example, greater than 40 volts) provided by the charge pump circuit 200 is much larger than the voltage range of the touch display integrated driver (TDDI) (for example, less than 32 volts).

The above descriptions are only preferred embodiments of the present invention, and are not intended to limit the scope of the present invention; all other equivalent changes or modifications made without departing from the spirit of the invention should be included in the following Within the scope of patent application.

100: charge pump circuit

11: Clock generator

12: First board

13: second board

14: First board

15: second board

200: charge pump circuit

21: Sensing waveform generator

C1: The first capacitor

C2: second capacitor

D1: The first diode

D2: The second diode

M: intermediate node

VGL: output node

VSP: preset high voltage

VSN: preset low voltage

Vt: Diode critical voltage

The first figure shows a circuit diagram of a charge pump circuit suitable for a display driver. The second figure shows a circuit diagram of a charge pump circuit suitable for a touch display integrated driver (TDDI) according to an embodiment of the present invention.

200: charge pump circuit

11: Clock generator

12: First board

13: second board

14: First board

15: second board

21: Sensing waveform generator

C1: The first capacitor

C2: second capacitor

D1: The first diode

D2: The second diode

M: intermediate node

VGL: output node

VSP: preset high voltage

VSN: preset low voltage

Vt: Diode critical voltage

Claims (13)

A charge pump circuit includes: a clock generator that generates a clock signal that oscillates between a high state and a low state, wherein the high state has a related preset high voltage and the low state has a related preset low voltage; a A sensing waveform generator, which generates a sensing signal for touch sensing; a first diode, the cathode of which is electrically connected to the preset low voltage; a first capacitor, which is electrically coupled to the first plate For the clock signal, the second plate is electrically connected to the anode of the first diode at the intermediate node; a second diode, the cathode of which is electrically connected to the first capacitor at the intermediate node Two plates; and a second capacitor, the first plate of which is electrically coupled to the sensing signal, and the second plate of which is electrically connected to the anode of the second diode at the output node; which is generated during the charge pump The clock signal and the sensing signal generated during the touch sensing period are alternately generated; wherein during the first phase of the charge pump period, when the clock signal is in the high state, the first diode It is forward biased but the second diode is reverse biased, so the intermediate node is charged to VSN+Vt, where VSN represents the predetermined low voltage and Vt represents the threshold voltage of the diode. According to the charge pump circuit described in claim 1, wherein the sensing signal oscillates between ground and a predetermined negative voltage. According to the charge pump circuit described in claim 1, wherein during the second stage of the charge pump operation, when the clock signal is in a low state, the second diode is forward biased but the The first diode is reverse biased, so the output node is charged to 2VSN-VSP+Vt, and the intermediate node is charged to 2VSN-VSP, where VSP represents the preset high voltage. According to the charge pump circuit described in claim 3, during the touch sensing period, the second diode is forward biased while the first diode is reverse biased, so according to the sensing The signal charges the output node from 2VSN-VSP+Vt further down. According to the charge pump circuit described in claim 1, wherein the clock generator and the sensing waveform generator are arranged in a touch display integrated driver, and the voltage range provided by the charge pump circuit is larger than the touch Control and display the voltage range of the integrated driver. A charge pump circuit suitable for a touch display integrated driver, comprising: a first diode whose cathode is electrically connected to a predetermined low voltage; a first capacitor whose first plate is electrically coupled to a clock signal, Oscillates between a high state and a low state, wherein the high state has an associated preset high voltage and the low state has an associated preset low voltage, and the second plate of the first capacitor is electrically connected to the first at an intermediate node The anode of the diode; a second diode, the cathode of which is electrically connected to the second plate of the first capacitor at the intermediate node; and a second capacitor, the first plate of which is electrically coupled to contact control sensing For a sensing signal, the second board is electrically connected to the anode of the second diode at the output node; wherein the clock signal generated in the charge pump period and the sensing signal generated in the touch sensing period The measurement signal is generated alternately; during the first stage of the charge pump operation, when the clock signal is in the high state, the first diode is forward biased but the second diode is reverse biased Therefore, the intermediate node is charged to VSN+Vt, where VSN represents the preset low voltage and Vt represents the diode threshold voltage. According to item 6 of the scope of patent application, the charge pump circuit suitable for a touch display integrated driver, wherein the sensing signal oscillates between ground and a predetermined negative voltage. According to item 6 of the scope of patent application, the charge pump circuit suitable for a touch display integrated driver, wherein during the second stage of the charge pump operation, when the clock signal is in a low state, the second diode It is forward biased but the first diode is reverse biased, so the output node is charged to 2VSN-VSP+Vt, and the intermediate node is charged to 2VSN-VSP, where VSP represents the preset high voltage. According to item 8 of the scope of patent application, the charge pump circuit suitable for a touch display integrated driver, wherein during touch sensing, the second diode is forward biased while the first diode is reverse biased Therefore, the output node is charged further down from 2VSN-VSP+Vt according to the sensing signal. According to item 6 of the scope of patent application, the charge pump circuit suitable for a touch display integrated driver, wherein the clock signal is generated by a clock generator provided in the touch display integrated driver, and the sensing signal is The sensing waveform generator set in the integrated touch display driver is generated, and the voltage range provided by the charge pump circuit is greater than the voltage range of the integrated touch display driver. A charge pump circuit includes: a clock generator that generates a clock signal that oscillates between a high state and a low state, wherein the high state has a related preset high voltage and the low state has a related preset low voltage; a The cathode of the first diode is electrically connected to the preset low voltage; a first capacitor, the first plate of which is electrically coupled to the clock signal, and the second plate of which is electrically connected to the first capacitor at the intermediate node The anode of a diode; a second diode, the cathode of which is electrically connected to the second plate of the first capacitor at the intermediate node; and a second capacitor, the first plate of which is electrically connected to ground, The second plate is electrically connected to the anode of the second diode at the output node; In the first stage of operation, when the clock signal is in the high state, the first diode is forward biased but the second diode is reverse biased, so the intermediate node is charged to VSN+ Vt, where VSN represents the preset low voltage and Vt represents the threshold voltage of the diode. According to the charge pump circuit described in claim 11, in the second stage of operation, when the clock signal is in a low state, the second diode is forward biased but the first diode The body is reverse biased, so the output node is charged to 2VSN-VSP+Vt, and the intermediate node is charged to 2VSN-VSP, where VSP represents the preset high voltage. According to the charge pump circuit described in claim 11, the clock generator is provided in a display driver, and the voltage range provided by the charge pump circuit is greater than the voltage range of the display driver.

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