TWI704651B - Method for forming surrounding wall on ceramic substrate with circuit layout and the substrate - Google Patents
Method for forming surrounding wall on ceramic substrate with circuit layout and the substrate Download PDFInfo
- Publication number
- TWI704651B TWI704651B TW108116246A TW108116246A TWI704651B TW I704651 B TWI704651 B TW I704651B TW 108116246 A TW108116246 A TW 108116246A TW 108116246 A TW108116246 A TW 108116246A TW I704651 B TWI704651 B TW I704651B
- Authority
- TW
- Taiwan
- Prior art keywords
- surrounding wall
- ceramic substrate
- metal
- circuit layer
- metal circuit
- Prior art date
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 130
- 239000000919 ceramic Substances 0.000 title claims abstract description 99
- 238000000034 method Methods 0.000 title claims abstract description 36
- 229910052751 metal Inorganic materials 0.000 claims abstract description 110
- 239000002184 metal Substances 0.000 claims abstract description 110
- 239000000463 material Substances 0.000 claims abstract description 20
- 239000000853 adhesive Substances 0.000 claims abstract description 16
- 230000001070 adhesive effect Effects 0.000 claims abstract description 16
- 239000003292 glue Substances 0.000 claims description 12
- 239000004020 conductor Substances 0.000 claims description 2
- FGUUSXIOTUKUDN-IBGZPJMESA-N C1(=CC=CC=C1)N1C2=C(NC([C@H](C1)NC=1OC(=NN=1)C1=CC=CC=C1)=O)C=CC=C2 Chemical compound C1(=CC=CC=C1)N1C2=C(NC([C@H](C1)NC=1OC(=NN=1)C1=CC=CC=C1)=O)C=CC=C2 FGUUSXIOTUKUDN-IBGZPJMESA-N 0.000 claims 1
- 238000010438 heat treatment Methods 0.000 abstract description 2
- 238000003825 pressing Methods 0.000 abstract description 2
- 230000008569 process Effects 0.000 description 13
- 238000004519 manufacturing process Methods 0.000 description 8
- 238000005516 engineering process Methods 0.000 description 6
- 230000003287 optical effect Effects 0.000 description 5
- 238000004806 packaging method and process Methods 0.000 description 5
- 239000013078 crystal Substances 0.000 description 4
- 238000005520 cutting process Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 238000003466 welding Methods 0.000 description 4
- 238000009413 insulation Methods 0.000 description 3
- 239000007788 liquid Substances 0.000 description 3
- 239000011521 glass Substances 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 238000009877 rendering Methods 0.000 description 2
- 230000008646 thermal stress Effects 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 238000003848 UV Light-Curing Methods 0.000 description 1
- 239000011358 absorbing material Substances 0.000 description 1
- 230000004308 accommodation Effects 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 239000000084 colloidal system Substances 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 238000000748 compression moulding Methods 0.000 description 1
- 230000008602 contraction Effects 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000001125 extrusion Methods 0.000 description 1
- 230000002452 interceptive effect Effects 0.000 description 1
- 239000008204 material by function Substances 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 239000002985 plastic film Substances 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 229920002379 silicone rubber Polymers 0.000 description 1
- 239000004945 silicone rubber Substances 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
Images
Landscapes
- Led Device Packages (AREA)
- Manufacturing Of Printed Wiring (AREA)
Abstract
一種在佈局有電路的陶瓷基板上成形環繞壁的方法及該基板,該方法使至少一絕緣環繞壁成形於一陶瓷基板,該陶瓷基板具有一陶瓷基板本體及一金屬電路層,該陶瓷基板本體包含一上表面和一下表面,該金屬電路層佈局在至少該上表面,供設置至少一電子元件,其中該金屬電路層包括至少複數彼此獨立的金屬接墊/導線,且前述彼此獨立的接墊/導線間存有間隔;透過上下模具加熱壓合,使上述膠性基材至少部分填入上述間隔,使得夾制形成上述間隔的上述接墊/導線間彼此絕緣,該膠性基材固化後形成至少一環繞至少部分該金屬電路層的絕緣環繞壁。 A method for forming a surrounding wall on a ceramic substrate on which a circuit is arranged and the substrate. The method forms at least one insulating surrounding wall on a ceramic substrate, the ceramic substrate having a ceramic substrate body and a metal circuit layer, and the ceramic substrate body Comprising an upper surface and a lower surface, the metal circuit layer is arranged on at least the upper surface for arranging at least one electronic component, wherein the metal circuit layer includes at least a plurality of mutually independent metal pads/wires, and the aforementioned mutually independent pads /There is a gap between the wires; through the heating and pressing of the upper and lower molds, the above-mentioned adhesive base material is at least partially filled into the above-mentioned gap, so that the pads/wires that are sandwiched to form the above-mentioned gap are insulated from each other. After the adhesive base material is cured At least one insulating surrounding wall surrounding at least part of the metal circuit layer is formed.
Description
本發明是有關於一種陶瓷基板及製法,特別是關於一種在佈局有電路的陶瓷基板上成形環繞壁的方法及該基板。 The invention relates to a ceramic substrate and a manufacturing method, and more particularly to a method for forming a surrounding wall on a ceramic substrate on which circuits are laid out and the substrate.
隨著科技不斷地快速演進,目前手機閃光燈、辨識系統、汽車頭燈、集漁燈、工程照明或景觀照明等光學產品皆以高效能與微型化為發展的方向,其中最常應用於光學產品的技術為LED(發光二極體)與VCSEL(垂直共振腔面射型雷射),但目前因受限於製程技術限制,元件尺寸的小型化已達瓶頸,且擋牆與陶瓷基板之間的附著力極差,導致產品良率大幅下降。 With the continuous and rapid evolution of technology, optical products such as mobile phone flashes, identification systems, car headlights, fishing lights, engineering lighting or landscape lighting are all developing in the direction of high efficiency and miniaturization, of which optical products are most commonly used The technology of LED (Light Emitting Diode) and VCSEL (Vertical Resonance Cavity Surface-emitting Laser), but currently due to the limitation of the process technology, the miniaturization of the component size has reached the bottleneck, and the barrier between the wall and the ceramic substrate The adhesion is extremely poor, resulting in a significant drop in product yield.
一般光學元件的封裝結構包含基板以及連結基板的環繞壁,而晶粒則是設置於基板和環繞壁形成的容置空間,最後再以膠體、塑膠片或玻璃片等完成封裝,其中環繞壁對於光學產品的發光效能及色溫均勻性有極大的影響。現今最普遍的製程是以焊接、電鍍或鋁板貼合的方式連接金屬環繞壁於基板,但因金屬環繞壁具有導電特性,使得線路的規劃受到了限制,再加上製程技術的關係,使用金屬環繞壁的基板至多僅能縮小至35mm見方的尺寸,難以達成小型化的目標;另方面,若使用高精度的光阻膜曝光顯影技術形成環繞壁於基板上,則因過程繁雜且作業費時,使生產的成本大幅提升。此外,上述方式皆具有製程溫度高的問題,進而產 生膨脹係數相異的材質受熱應力變形的現象,使製程的良率大幅下降。 Generally, the packaging structure of optical components includes a substrate and a surrounding wall connecting the substrates. The die is arranged in the accommodating space formed by the substrate and the surrounding wall. Finally, the packaging is completed by colloid, plastic sheet, or glass sheet. The luminous efficacy and color temperature uniformity of optical products have a great influence. The most common manufacturing process nowadays is to connect the metal surrounding wall to the substrate by welding, electroplating or aluminum plate bonding. However, due to the conductive property of the metal surrounding wall, the circuit planning is restricted. In addition to the process technology, the use of metal The substrate surrounding the wall can only be reduced to a size of 35mm square at most, which is difficult to achieve the goal of miniaturization; on the other hand, if the surrounding wall is formed on the substrate using high-precision photoresist film exposure and development technology, the process is complicated and time-consuming. So that the cost of production is greatly increased. In addition, all of the above methods have the problem of high process temperature, which leads to The phenomenon that materials with different growth coefficients are deformed under thermal stress, which greatly reduces the yield of the process.
因此,如何提出一種在陶瓷基板以及在陶瓷基板成形環繞壁的方法,使製程溫度能夠降低,提升整體製造良率,同時改善發光效能及色溫均勻性,以及避免電路配置受到侷限,為現今亟需努力的議題。 Therefore, how to propose a method of forming a surrounding wall on a ceramic substrate and on a ceramic substrate, so that the process temperature can be reduced, the overall manufacturing yield can be improved, and the luminous efficiency and color temperature uniformity can be improved, and the circuit configuration should be avoided. The subject of effort.
有鑑於上述缺點,本發明的主要目的,在於提供一種在佈局有電路的陶瓷基板上成形環繞壁的方法,能夠大幅降低製程溫度,降低結構受熱變形,藉此提升陶瓷基板的製造良率。 In view of the above shortcomings, the main purpose of the present invention is to provide a method for forming a surrounding wall on a ceramic substrate with circuit layout, which can greatly reduce the process temperature and reduce the thermal deformation of the structure, thereby improving the manufacturing yield of the ceramic substrate.
本發明的另一目的,在於提供一種具環繞壁的佈局有電路的陶瓷基板,有效改善設置於陶瓷基板上晶粒的發光效能及色溫均勻性。 Another object of the present invention is to provide a ceramic substrate with surrounding walls and circuit layout, which can effectively improve the luminous efficiency and color temperature uniformity of the crystal grains disposed on the ceramic substrate.
本發明的再一目的,在於提供一種具環繞壁的佈局有電路的陶瓷基板,能額外確保金屬電路層的金屬接墊/導線間彼此絕緣。 Another object of the present invention is to provide a ceramic substrate with surrounding walls on which circuits are laid out, which can additionally ensure that the metal pads/wires of the metal circuit layer are insulated from each other.
本發明的又一目的,在於提供一種具環繞壁的佈局有電路的陶瓷基板,可以進一步在環繞壁中形成貫穿導接埠,更增加產品的電路布局使用彈性。 Another object of the present invention is to provide a ceramic substrate with a surrounding wall and circuit layout, which can further form a through port in the surrounding wall, thereby increasing the flexibility of the circuit layout of the product.
為達上述目的,本發明提供一種具環繞壁的佈局有電路的陶瓷基板,該基板包括:一陶瓷基板本體,包含一上表面和相反於該上表面的一下表面;一個佈局在至少該上表面的金屬電路層,供設置至少一電子元件,其中該金屬電路層包括至少複數彼此獨立的金屬接墊/導線,且前述彼此獨立的接墊/導線間存有間隔;至少一環繞至少部分該金屬電路層的絕緣環繞壁,上述絕緣環繞壁是以一膠性基材製成,以及上述絕緣環繞壁從該上表面朝該金屬電路層方向延伸且高度高於上述金屬電路層,使上述絕 緣環繞壁與該陶瓷基板本體共同形成一個部分環繞上述電子元件的容置空間;以及上述膠性基材至少部分填入上述間隔,使得夾制形成上述間隔的上述接墊/導線間彼此絕緣。 To achieve the above objective, the present invention provides a ceramic substrate with a surrounding wall and a circuit layout. The substrate includes: a ceramic substrate body including an upper surface and a lower surface opposite to the upper surface; a layout on at least the upper surface The metal circuit layer is provided with at least one electronic component, wherein the metal circuit layer includes at least a plurality of mutually independent metal pads/wires, and there is a space between the aforementioned mutually independent pads/wires; at least one surrounds at least part of the metal The insulating surrounding wall of the circuit layer, the insulating surrounding wall is made of a glue base material, and the insulating surrounding wall extends from the upper surface toward the metal circuit layer and is higher than the metal circuit layer, so that the insulating The rim surrounding wall and the ceramic substrate body together form an accommodating space that partially surrounds the electronic components; and the glue base material is at least partially filled with the gap, so that the pads/wires sandwiched to form the gap are insulated from each other.
為達上述目的,本發明同時提供一種在佈局有電路的陶瓷基板上成形環繞壁的方法,使至少一絕緣環繞壁成形於一陶瓷基板,該陶瓷基板具有一陶瓷基板本體及一金屬電路層,該陶瓷基板本體包含一上表面和相反於該上表面的一下表面,該金屬電路層佈局在至少該上表面,供設置至少一電子元件,其中該金屬電路層包括至少複數彼此獨立的金屬接墊/導線,且前述彼此獨立的接墊/導線間存有間隔,該方法包括下列步驟:a)步驟1:將該陶瓷基板本體設置於一上模具,以及將一離型模設置於一下模具,其中該金屬電路層朝該下模具方向設置;b)步驟2:將液態狀的一膠性基材注入於該離型模接近該上模具的一側;c)步驟3:該上模具與該下模具互相貼近,對該陶瓷基板本體及該膠性基材加熱壓合,使上述膠性基材至少部分填入上述間隔,使得夾制形成上述間隔的上述接墊/導線間彼此絕緣,以及該膠性基材固化後形成至少一環繞至少部分該金屬電路層的絕緣環繞壁;d)步驟4:該上模具與該下模具互相遠離,使該陶瓷基板本體脫離該離型模,其中上述絕緣環繞壁從該上表面朝該金屬電路層方向延伸且高度高於上述金屬電路層,使上述絕緣環繞壁與該陶瓷基板本體共同形成一個部分環繞上述電子元件的容置空間。 To achieve the above objective, the present invention also provides a method for forming a surrounding wall on a ceramic substrate on which circuits are laid out, so that at least one insulating surrounding wall is formed on a ceramic substrate having a ceramic substrate body and a metal circuit layer, The ceramic substrate body includes an upper surface and a lower surface opposite to the upper surface. The metal circuit layer is arranged on at least the upper surface for arranging at least one electronic component, wherein the metal circuit layer includes at least a plurality of mutually independent metal pads /Wire, and the aforementioned independent pads/wires are separated from each other. The method includes the following steps: a) Step 1: Set the ceramic substrate body on an upper mold, and set a release mold on the lower mold, Wherein the metal circuit layer is set toward the lower mold; b) Step 2: Inject a liquid-like adhesive substrate into the release mold on the side close to the upper mold; c) Step 3: The upper mold and the upper mold The lower molds are close to each other, the ceramic substrate body and the colloidal base material are heated and pressed together, so that the colloidal base material at least partially fills the gap, so that the pads/wires that are sandwiched to form the gap are insulated from each other, and The adhesive substrate is cured to form at least one insulating surrounding wall surrounding at least part of the metal circuit layer; d) Step 4: The upper mold and the lower mold are separated from each other, so that the ceramic substrate body is separated from the release mold, wherein The insulating surrounding wall extends from the upper surface toward the metal circuit layer and is higher than the metal circuit layer, so that the insulating surrounding wall and the ceramic substrate body together form an accommodating space that partially surrounds the electronic component.
相較於習知技術,本發明揭露的一種在佈局有電路的陶瓷基板上成形環繞壁的方法及該基板,是以膠性基材做為絕緣環繞壁,並透過 低溫加熱壓合的方式成形絕緣環繞壁於陶瓷基板上,大幅降低製程溫度,減少結構受熱變形,同時有部分膠性基材會被填入金屬電路層彼此獨立的接墊/導線的間隔,確保金屬接墊/導線彼此絕緣;此外,藉由不同特性的膠性基材,可選擇將安裝其中的晶粒發光盡量反射而提升發光效能,或吸收廣角度發光而避免不同晶粒間的發光源相互干擾,使得作為人臉辨識或車用辨識系統的光源時,每一環繞壁可以更微型化,而使整體的體積縮小或獲得更高解析度。並且當環繞壁中額外設置導電埠時,還可以配合導通其他元件裝置,進一步提供更佳的電路佈局使用彈性。 Compared with the prior art, the present invention discloses a method for forming a surrounding wall on a ceramic substrate with circuit layout and the substrate uses a colloidal base material as the insulating surrounding wall and transmits The low-temperature heating and pressing method forms the insulating surrounding wall on the ceramic substrate, which greatly reduces the process temperature and reduces the thermal deformation of the structure. At the same time, part of the colloidal substrate will be filled in the metal circuit layer with independent pad/wire spacing to ensure The metal pads/wires are insulated from each other; in addition, with different characteristics of the adhesive substrate, you can choose to reflect the light of the mounted die as much as possible to improve the luminous efficiency, or absorb the wide-angle light to avoid the light source between different die Mutual interference makes each surrounding wall more miniaturized when used as the light source of face recognition or vehicle recognition system, which reduces the overall volume or obtains higher resolution. Moreover, when additional conductive ports are provided in the surrounding wall, it can also be used to conduct other components and devices, which further provides better circuit layout flexibility.
1~4‧‧‧步驟 1~4‧‧‧step
10、10’、10”‧‧‧陶瓷基板 10, 10’, 10”‧‧‧ceramic substrate
11、11’、51‧‧‧陶瓷基板本體 11, 11’, 51‧‧‧ceramic substrate body
12、12’、52‧‧‧金屬電路層 12, 12’, 52‧‧‧Metal circuit layer
13、13’‧‧‧間隔 13, 13’‧‧‧ interval
14、14’、14”、54、74‧‧‧絕緣環繞壁 14,14’,14”,54,74‧‧‧Insulation surrounding wall
15、15’‧‧‧容置空間 15, 15’‧‧‧accommodating space
21‧‧‧上模具 21‧‧‧Upper mold
22‧‧‧下模具 22‧‧‧Lower mold
23‧‧‧離型模 23‧‧‧Release mold
24‧‧‧膠性基材 24‧‧‧Adhesive substrate
111、111’‧‧‧上表面 111、111’‧‧‧Upper surface
112、112’‧‧‧下表面 112, 112’‧‧‧ lower surface
121、121’、521、721‧‧‧金屬接墊 121, 121’, 521, 721‧‧‧Metal pad
122、122’、522、722‧‧‧金屬接點 122, 122’, 522, 722‧‧‧Metal contacts
123、123’、523、723‧‧‧金屬導線 123, 123’, 523, 723‧‧‧metal wire
221‧‧‧凹槽 221‧‧‧Groove
222‧‧‧突起部 222‧‧‧Protrusion
141‧‧‧分割槽 141‧‧‧Dividing groove
30、40‧‧‧發光二極體 30、40‧‧‧Light-emitting diode
31、41‧‧‧晶粒 31, 41‧‧‧grain
32、42、73‧‧‧導線 32, 42, 73‧‧‧Wire
33‧‧‧鏡片 33‧‧‧Lens
43‧‧‧透鏡 43‧‧‧Lens
A、B‧‧‧虛線 A, B‧‧‧dotted line
520、720‧‧‧金屬導接埠 520, 720‧‧‧Metal port
55、75‧‧‧貫穿孔 55、75‧‧‧through hole
71‧‧‧電子元件 71‧‧‧Electronic components
圖1為本發明在佈局有電路的陶瓷基板上成形環繞壁方法的第一較佳實施例的流程圖。 FIG. 1 is a flowchart of a first preferred embodiment of a method for forming a surrounding wall on a ceramic substrate on which circuits are laid out according to the present invention.
圖2為圖1第一較佳實施例的步驟示意圖。 FIG. 2 is a schematic diagram of the steps of the first preferred embodiment of FIG. 1. FIG.
圖3為圖1第一較佳實施例的另一步驟示意圖。 3 is a schematic diagram of another step of the first preferred embodiment in FIG. 1.
圖4為圖3絕緣環繞壁成形於陶瓷基板的局部放大圖。 4 is a partial enlarged view of the insulating surrounding wall of FIG. 3 formed on the ceramic substrate.
圖5為圖4中切割前的陶瓷基板。 Fig. 5 is the ceramic substrate before cutting in Fig. 4.
圖6為本發明具環繞壁的佈局有電路的陶瓷基板第一較佳實施例的立體結構圖。 FIG. 6 is a three-dimensional structural view of the first preferred embodiment of the ceramic substrate with circuit layout with surrounding walls according to the present invention.
圖7為圖6實施例作為發光二極體的立體結構圖。 FIG. 7 is a three-dimensional structure diagram of the embodiment of FIG. 6 as a light-emitting diode.
圖8為圖7中發光二極體的剖面圖。 FIG. 8 is a cross-sectional view of the light-emitting diode in FIG. 7.
圖9為本發明具環繞壁的佈局有電路的陶瓷基板第二較佳實施例的剖面圖。 9 is a cross-sectional view of a second preferred embodiment of a ceramic substrate with a surrounding wall and a circuit layout of the present invention.
圖10為圖7中實施例作為發光二極體時的剖面圖。 Fig. 10 is a cross-sectional view of the embodiment in Fig. 7 as a light emitting diode.
圖11為本發明具環繞壁的佈局有電路的陶瓷基板第三較佳實施例的立體結構圖。 11 is a three-dimensional structural view of a third preferred embodiment of a ceramic substrate with a surrounding wall and a circuit layout of the present invention.
圖12為圖11中實施例的剖面圖。 Fig. 12 is a cross-sectional view of the embodiment in Fig. 11.
圖13為本發明具環繞壁的佈局有電路的陶瓷基板第四較佳實施例的立體結構圖。 FIG. 13 is a three-dimensional structural view of a fourth preferred embodiment of the ceramic substrate with circuit layout with surrounding walls according to the present invention.
圖14為本發明具環繞壁的佈局有電路的陶瓷基板第四較佳實施例的剖面圖。 FIG. 14 is a cross-sectional view of a fourth preferred embodiment of a ceramic substrate with a circuit layout with surrounding walls according to the present invention.
以下藉由特定的具體實施例說明本發明之實施方式,熟悉此技藝之人士可由本說明書所揭示之內容輕易地瞭解本發明之優點與功效。 The following specific examples illustrate the implementation of the present invention. Those familiar with the art can easily understand the advantages and effects of the present invention from the content disclosed in this specification.
本說明書所附圖式所繪示之結構、比例、大小等,均僅用以配合說明書之揭示內容,以供熟悉此技藝之人士瞭解與閱讀,並非用以限定本發明可實施之限定條件,任何結構之修飾、大小之調整或比例關係之改變,在無實質變更技術內容下,當亦視為本發明可實施之範疇。 The structure, ratio, size, etc. shown in the drawings in this specification are only used to match the disclosure content of the specification for the understanding and reading of those familiar with the art, and are not used to limit the implementation of the present invention. Any structural modification, size adjustment, or change in the proportional relationship, without substantial changes to the technical content, shall be regarded as the scope of the present invention.
本發明在佈局有電路的陶瓷基板上成形環繞壁方法的第一較佳實施例如圖1所示,首先在步驟1時,如圖2將陶瓷基板本體11以例如負壓吸取而結合至上模具21下方,使要成形環繞壁的一面朝向下模具22,再將離型模23設置於下模具22上;接著如步驟2所示,將膠性基材24注入於離型模23接近上模具21的一側。本例中膠性基材24為液態狀且具熱固性的矽膠,當然,本發明技術領域具有通常知識者也可以任意選擇例如環氧樹脂、或其他樹脂等具有冷卻固化或紫外光照射固化特性的膠性基材,或使用加入螢光粉、吸光材質、反光材質等功能性原料而成的複合性膠性基材,均
無礙於本案實施。
The first preferred embodiment of the method of forming a surrounding wall on a ceramic substrate with circuits of the present invention is shown in FIG. 1. First, in
透過本例中的方法可使絕緣環繞壁成形於陶瓷基板,一併參考圖4的放大示意圖,本例中的陶瓷基板10主要包括陶瓷基板本體11及已經佈設於陶瓷基板本體11上的金屬電路層12,陶瓷基板本體11包含上表面111和相反於上表面111的下表面112,金屬電路層12則包括佈局在上表面111的金屬接墊121、線路(圖未示)、貫穿陶瓷基板本體11的金屬導線123、以及佈局在下表面112處的金屬接點122,由於金屬導線123導接金屬接墊121與金屬接點122,使得將來要安裝於金屬接墊121上的例如LED晶粒的電子元件,可以經由金屬接點122而獲得致能電流或電訊號。
Through the method in this example, the insulating surrounding wall can be formed on the ceramic substrate. Referring to the enlarged schematic diagram of FIG. 4, the
接下來如步驟3所述,上模具21與下模具22互相貼近,對陶瓷基板本體11及膠性基材24以低於300度的溫度加熱壓合,此時,膠性基材24主要被擠壓填滿下模具22的模穴,並且在加壓過程中逐漸結合至陶瓷基板本體11,尤其在合模後,由於壓力與溫度的影響,膠性基材會如圖4所示,不僅填滿模穴,還會被擠壓進入金屬接墊121之間數十至數百微米(μm)的間隔13中,使得金屬接墊121間彼此絕緣。同時填入下模具22的凹槽221中的膠性基材24,會在陶瓷基板本體11上逐漸固化,形成環繞部分金屬電路層12的絕緣環繞壁14。
Next, as described in
再如圖3、圖4和步驟4所示,當脫模時,上模具21與下模具22逐漸互相遠離,由於離型模23的作用,成形的絕緣環繞壁14完全不會沾黏在下模具22上,而穩固地結合在陶瓷基板本體11處,從上表面111朝金屬電路層12方向延伸且高度高於金屬電路層12,使絕緣環繞壁14與陶瓷基板本體11共同形成供設置電子元件的容置空間15。此處容置空間15的大小以
及絕緣環繞壁14的高度和尺寸,都是由下模具22的凹槽221的間距和形狀所決定。凹槽221內亦可形成有突起部222,使絕緣環繞壁14成形有對應突起部222的分割槽141,讓陶瓷基板10可易於被分割為較小單位;當然,亦可根據切割儀器的條件決定凹槽221內是否形成有突起部222,或相異形狀的突起部222。
As shown in Figure 3, Figure 4 and
圖5為圖4中切割前的陶瓷基板10,圖5中的虛線為陶瓷基板10的切割路徑,陶瓷基板10可被切割為25個較小的單體,每一個單體的絕緣環繞壁14和其包圍形成的容置空間15將可作為設置LED晶粒的空間;當然,如熟悉本技術領域人士所能輕易理解,若陶瓷基板要用來製造多晶胞的VCSEL,也可以不進行分割而直接使用。本發明具環繞壁的佈局有電路的陶瓷基板之第一較佳實施例如圖6所示,本例中陶瓷基板10’是經由前例中的整片陶瓷基板10分割而成為單體,陶瓷基板10’包括陶瓷基板本體11’、金屬電路層12’、絕緣環繞壁14’,其中金屬電路層12’包括佈局在上表面111’的金屬接墊121’、在下表面112’的金屬接點122’及電性導通兩者的金屬導線123’。
Fig. 5 is the
圖7和圖8是利用圖6的陶瓷基板10’,在金屬接墊121’上焊接設置一個發光二極體晶粒31,從發光二極體晶粒31的上表面電擊打線而使導線32導接至另一金屬接墊121’,隨後在容置空間中填入透光膠進行封裝,最後在透光膠的上方安裝鏡片33,最後構成一個完整的發光二極體30,其中圖8為圖7中的發光二極體30沿虛線A切割的剖面圖。晶粒31是以安裝或點焊的方式設置於上表面111’的金屬接墊121’,再由導線32電性導通連接至上表面111’的另一金屬接墊121’,藉此,晶粒31可透過下表面112’的兩個金屬
接點122’與外部電源導通並且發光。在上表面111’的兩個金屬接墊121’之間的間隔13’具有固化的膠性基材,因此可以避免兩個金屬接墊121’因為高溫變形或焊接時發生短路,造成電子零件損壞。尤其是在電子元件不斷微型化的過程中,提供更佳的絕緣保護,藉此提升產品的產出良率。
7 and 8 are the use of the ceramic substrate 10' of FIG. 6, a light-emitting diode die 31 is welded on the metal pad 121', and the
在製程中填入封裝膠至容置空間15’時,絕緣環繞壁14’除了可避免封裝膠溢出,也可藉由加入不同特性的材料於膠性基材中或使用不同材質的膠性基材,讓成形的絕緣環繞壁14’能有不同的功效。例如使用透光性高的膠性基材時,可增加發光二極體發光角度;加入高反射的材料時,可使光線集中照射,避免光線干擾鄰近發光元件;若加入螢光粉則可以配色、改善色溫均勻性或調整顯色性。當然,即使在一個容置空間中,成型有例如三對或更多對金屬接墊,讓一個環繞壁中設置至少紅綠藍三色晶粒各一,即可製成一個演色性佳的白光LED。 When the packaging glue is filled into the accommodating space 15' during the manufacturing process, the insulating surrounding wall 14' can not only prevent the packaging glue from overflowing, but also by adding materials with different characteristics to the glue base material or using different materials of the glue base Material, so that the formed insulating surrounding wall 14' can have different functions. For example, when using a colloidal substrate with high light transmittance, the light-emitting angle of the light-emitting diode can be increased; when a highly reflective material is added, the light can be concentrated to prevent the light from interfering with adjacent light-emitting elements; if the phosphor is added, the color can be matched , Improve color temperature uniformity or adjust color rendering. Of course, even in an accommodating space, for example, three or more pairs of metal pads are formed, and at least one red, green, and blue crystal grain is arranged in a surrounding wall, and a white light with good color rendering can be made. LED.
當然,本發明技術領域具有通常知識者也可以將本例中具環繞壁的佈局有電路的陶瓷基板應用於3D感測、手勢辨識或人臉辨識等VCSEL領域,透過將VCSEL用紅外線晶粒設置於其中一個金屬接墊,另一金屬接墊選擇性設置感測用晶粒,再於設置擴散片於環繞壁,完成環繞壁和陶瓷基板附著力極佳的VCSEL裝置。在此必須說明,上述鏡片33並不侷限於玻璃材質,當安裝於環繞壁中的是光學元件,無論是廣義的發光或接收光,只要能夠容許所需要的波長通透,無論是紅外線或紫外線,此處的鏡片未必需要容許可見光透射。
Of course, those with ordinary knowledge in the technical field of the present invention can also apply the ceramic substrate with surrounding walls and circuit layout in this example to VCSEL fields such as 3D sensing, gesture recognition, or face recognition, by setting the VCSEL with infrared crystal grains. One of the metal pads and the other metal pad are selectively provided with sensing die, and then a diffuser is placed on the surrounding wall to complete a VCSEL device with excellent adhesion between the surrounding wall and the ceramic substrate. It must be noted here that the above-mentioned
本案具環繞壁的佈局有電路的陶瓷基板之第二較佳實施例如圖9和圖10所示,與前例相同部分於此例不再贅述,僅就差異部分提出說
明。環繞壁的結構不限定於前述實施例中的矩形結構,也可以使用不同的結構成形絕緣環繞壁於陶瓷基板。圖10為圖9中的陶瓷基板10”設置一個發光二極體用晶粒41、導線42以及透鏡43所構成的發光二極體40,其中圖10為圖9中的陶瓷基板10”製作成發光二極體40後沿虛線B切割的剖面圖。本例中絕緣環繞壁14”形成在陶瓷基板10”上為圓形環狀的結構,使絕緣環繞壁14”上方能夠設置圓形的透鏡43,意味著依照本發明所揭露的技術,在製造上具有極大彈性,完全可以因應不同市場需求,製造不同形狀產品。
The second preferred embodiment of the ceramic substrate with circuit layout around the wall of this case is shown in Figure 9 and Figure 10. The same parts as the previous example will not be repeated in this example, and only the differences will be mentioned.
Bright. The structure of the surrounding wall is not limited to the rectangular structure in the foregoing embodiment, and different structures can also be used to form the insulating surrounding wall on the ceramic substrate. FIG. 10 is a light-emitting
本案具環繞壁的佈局有電路的陶瓷基板之第三較佳實施例如圖11和圖12所示,本例除了具有與圖6第一實施例相同的結構外,陶瓷基板更包含有兩個牆狀的金屬導接埠520。金屬導接埠520是在絕緣環繞壁54成形前,以模壓的方式形成於陶瓷基板本體51上。陶瓷基板本體51在預定形成絕緣環繞壁54的範圍中形成有至少一個貫穿孔55,金屬導接埠520導電貫穿設置於貫穿孔55處,並且金屬導接埠520與金屬電路層52形成有由絕緣環繞壁所構成的一間隔,且可以選擇與金屬電路層52電性絕緣或藉由在金屬電路層中形成穿經上述絕緣環繞壁的線路而導通,藉此增加電路佈局的彈性。金屬導接埠520可一次形成所需要的高度,或者先形成部分高度,再以電鍍的方式加厚至所需要的高度。舉例來說,電子元件除了可以安裝在金屬接墊521之外,也可以導接至金屬導接埠520上,透過金屬導線523與金屬接點522電性導通。
The third preferred embodiment of the ceramic substrate with circuit layout around the wall of this case is shown in Figures 11 and 12. This example has the same structure as the first embodiment in Figure 6, and the ceramic substrate further includes two walls. Shaped
除了前述實施例中牆狀的金屬導接埠,也可以如圖13以及圖14中實施例所示,金屬導接埠720為柱狀;當然,金屬導接埠720也可設置於絕緣環繞壁74中的任何位置,例如絕緣環繞壁74的四個角、四個邊上的
任一位置,且可以暴露部分於絕緣環繞壁74上方或側邊,作為連接導線或電子元件的接點。金屬導接埠720的形成方式是在預定形成絕緣環繞壁74的範圍中形成有至少一個貫穿孔75,且在形成絕緣環繞壁74時,藉由模具而在絕緣環繞壁74處保留有至少一個對應貫穿孔75的插塞孔,並且在絕緣環繞壁74形成後,以金屬導電材料填滿插塞孔。電子元件71可安裝於金屬接墊721上,透過金屬導線723與下方金屬接點722電性導通連接,同時以導線73連接至絕緣環繞壁74中的金屬導接埠720,使電路佈局的彈性能夠大幅提高。當然,如熟悉本技術領域人士所能輕易理解,此處的貫穿孔75和插塞孔,也可以是在絕緣環繞壁完整成型後,以例如雷射光束貫穿切割而成,都無礙於本案的實施。
In addition to the wall-shaped metal conductive port in the foregoing embodiment, the metal
本發明之在佈局有電路的陶瓷基板上成形環繞壁的方法及該基板,透過壓模的方式使液態狀的膠性基材在陶瓷基板上成形為固化的絕緣環繞壁,一方面大幅降低既有製程中的高溫環境,防止陶瓷基板因高溫產生熱應力及膨脹收縮而導致產品良率下降;此外,亦可提高絕緣環繞壁成形於陶瓷基板的位置精準度,避免電銲過程產生的誤差或錯位,也可以同時簡化作業流程。另一方面,液態狀的膠性基材也會填入金屬電路層中金屬接墊或導線中的間隙,在膠性基材固化後可以確保原本應彼此獨立的金屬接墊或導線相互絕緣。此外,本發明提出的方法更可適用於成形各式形狀的絕緣環繞壁於陶瓷基板,符合各種市場需求。 In the method of forming a surrounding wall on a ceramic substrate with circuits and the substrate of the present invention, a liquid gel base material is formed on the ceramic substrate into a solidified insulating surrounding wall through a compression molding method. There is a high-temperature environment in the process to prevent the ceramic substrate from causing thermal stress and expansion and contraction due to high temperature to reduce the product yield; in addition, it can also improve the position accuracy of the insulating surrounding wall forming on the ceramic substrate to avoid errors or misalignment during the electric welding process , You can also simplify the work process at the same time. On the other hand, the liquid adhesive substrate will also fill the gaps in the metal pads or wires in the metal circuit layer. After the adhesive substrate is cured, it can ensure that the metal pads or wires that should be independent of each other are insulated from each other. In addition, the method proposed by the present invention is more suitable for forming various shapes of insulating surrounding walls on the ceramic substrate, which meets various market demands.
惟以上所述者,僅為本發明之較佳實施例而已,不能以此限定本發明實施之範圍,凡是依本發明申請專利範圍及說明書內容所作之簡單的等效變化與修飾,皆應仍屬本發明涵蓋之範圍內。經過本發明較佳實 施例之描述後,熟悉此一技術領域人員應可瞭解到,本案實為一新穎、進步且具產業實用性之發明,深具發展價值。 However, the above are only the preferred embodiments of the present invention, and cannot be used to limit the scope of implementation of the present invention. All simple equivalent changes and modifications made in accordance with the scope of the patent application of the present invention and the contents of the specification should remain It falls within the scope of the present invention. After the present invention is better After the description of the examples, those familiar with this technical field should be able to understand that this case is indeed a novel, progressive and industrially applicable invention, which has deep development value.
11’‧‧‧陶瓷基板本體 11’‧‧‧Ceramic substrate body
12’‧‧‧金屬電路層 12’‧‧‧Metal circuit layer
13’‧‧‧間隔 13’‧‧‧ interval
14’‧‧‧絕緣環繞壁 14’‧‧‧Insulation surrounding wall
15’‧‧‧容置空間 15’‧‧‧accommodating space
30‧‧‧發光二極體 30‧‧‧Light Emitting Diode
31‧‧‧晶粒 31‧‧‧grain
32‧‧‧導線 32‧‧‧Wire
33‧‧‧鏡片 33‧‧‧Lens
111’‧‧‧上表面 111’‧‧‧Upper surface
112’‧‧‧下表面 112’‧‧‧Lower surface
121’‧‧‧金屬接墊 121’‧‧‧Metal pad
122’‧‧‧金屬接點 122’‧‧‧Metal contact
123’‧‧‧金屬導線 123’‧‧‧Metal wire
Claims (5)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911060820.9A CN111148338A (en) | 2018-11-01 | 2019-11-01 | Method for forming surrounding wall on ceramic substrate with circuit and substrate |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW107138794 | 2018-11-01 | ||
| TW107138794 | 2018-11-01 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW202018873A TW202018873A (en) | 2020-05-16 |
| TWI704651B true TWI704651B (en) | 2020-09-11 |
Family
ID=71895482
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW108116246A TWI704651B (en) | 2018-11-01 | 2019-05-10 | Method for forming surrounding wall on ceramic substrate with circuit layout and the substrate |
| TW109115273A TWI775074B (en) | 2018-11-01 | 2019-05-10 | Method for forming surrounding walls on a circuit-laid ceramic substrate and the substrate |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW109115273A TWI775074B (en) | 2018-11-01 | 2019-05-10 | Method for forming surrounding walls on a circuit-laid ceramic substrate and the substrate |
Country Status (1)
| Country | Link |
|---|---|
| TW (2) | TWI704651B (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114825861B (en) * | 2021-01-21 | 2025-12-16 | 瑷司柏电子股份有限公司 | Power module with lead angle metal spacing unit |
| TWI870834B (en) * | 2023-04-25 | 2025-01-21 | 財團法人工業技術研究院 | Breathable lid of chip package structure and manufacturing method and interface structure thereof |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090267090A1 (en) * | 2008-04-25 | 2009-10-29 | Advanced Optoelectronic Technology, Inc. | Color mixing light emitting diode device |
| US20100295078A1 (en) * | 2009-05-19 | 2010-11-25 | Intematix Corporation | Manufacture of light emitting devices with phosphor wavelength conversion |
| US20160329474A1 (en) * | 2014-02-03 | 2016-11-10 | Lumens Co., Ltd. | Light emitting device package, backlight unit, and method of manufacturing light emitting device package |
-
2019
- 2019-05-10 TW TW108116246A patent/TWI704651B/en active
- 2019-05-10 TW TW109115273A patent/TWI775074B/en active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090267090A1 (en) * | 2008-04-25 | 2009-10-29 | Advanced Optoelectronic Technology, Inc. | Color mixing light emitting diode device |
| US20100295078A1 (en) * | 2009-05-19 | 2010-11-25 | Intematix Corporation | Manufacture of light emitting devices with phosphor wavelength conversion |
| US20160329474A1 (en) * | 2014-02-03 | 2016-11-10 | Lumens Co., Ltd. | Light emitting device package, backlight unit, and method of manufacturing light emitting device package |
Also Published As
| Publication number | Publication date |
|---|---|
| TWI775074B (en) | 2022-08-21 |
| TW202018873A (en) | 2020-05-16 |
| TW202033336A (en) | 2020-09-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US8471287B2 (en) | LED package and method for making the same | |
| CN102272924B (en) | Radiation substrate for power LED and power LED product and manufacturing method thereof | |
| US8735190B2 (en) | Batwing LED with remote phosphor configuration | |
| TWI441350B (en) | Resin-filled illuminator and method of manufacturing same | |
| US20090273005A1 (en) | Opto-electronic package structure having silicon-substrate and method of forming the same | |
| US20170288108A1 (en) | Light-emitting diode device | |
| US8860047B2 (en) | Semiconductor light-emitting device | |
| US9041046B2 (en) | Method and apparatus for a light source | |
| KR20120084554A (en) | Light emitting device package and method of manufacturing the light emitting device package | |
| JP2012124453A (en) | Led module device and method of manufacturing the same | |
| US20200335482A1 (en) | System and method for chip-on-board light emitting diode | |
| CN113054059A (en) | Display device, LED package and manufacturing method thereof | |
| JP2016127253A (en) | Package structure of light-emitting element | |
| US8610159B2 (en) | Optical device with through-hole cavity | |
| TWI704651B (en) | Method for forming surrounding wall on ceramic substrate with circuit layout and the substrate | |
| US8569080B2 (en) | Method for packaging light emitting diode | |
| CN102419936B (en) | Light emitting diode (LED) dot matrix block with small dot space and preparation method for LED dot matrix block | |
| WO2013145071A1 (en) | Led package and manufacturing method for same | |
| CN201741711U (en) | Injection mold for forming the positioning of LED integrated structure or plastic parts for forming lens | |
| US11709310B2 (en) | Surface-emitting light source and method of manufacturing the same | |
| JP5936885B2 (en) | Semiconductor light emitting device | |
| CN111739844B (en) | Chip, chip packaging method and electronic equipment | |
| TWI469392B (en) | Carrier and optical semiconductor device based on the carrier | |
| TWI720338B (en) | Light emitting module and manufacturing method therefor | |
| EP3021036B1 (en) | Planar light source and method for manufacturing the same |