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TWI700757B - Encryption and decryption secret key generation method - Google Patents

Encryption and decryption secret key generation method Download PDF

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Publication number
TWI700757B
TWI700757B TW107135301A TW107135301A TWI700757B TW I700757 B TWI700757 B TW I700757B TW 107135301 A TW107135301 A TW 107135301A TW 107135301 A TW107135301 A TW 107135301A TW I700757 B TWI700757 B TW I700757B
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encryption
difference
block
flash memory
memory
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TW107135301A
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TW202015141A (en
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陳政宇
黃識夫
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大陸商合肥沛睿微電子股份有限公司
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Priority to TW107135301A priority Critical patent/TWI700757B/en
Priority to US16/546,459 priority patent/US11449310B2/en
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Abstract

An encryption and decryption secret key generation method which includes steps of: choosing a block of a NAND flash memory; initiating the block of the NAND flash memory; programing the block of the NAND flash memory so as to obtain first electric levels of memory units in the block; re-initiating the block of the NAND flash memory; re-programing the block of the NAND flash memory so as to obtain second electric levels of memory units in the block; subtracting the first electric levels from the second electric levels of the memory units correspondingly so as to obtain a difference form; and reading difference values of the difference form according to a setting sequence to be a encryption and decryption secret key.

Description

加解密金鑰產生方法 Encryption and decryption key generation method

本案係有關於一種加解密金鑰產生方法,且特別是有關於一種採用反及閘快閃記憶體來產生金鑰之加解密金鑰產生方法。 This case relates to a method for generating encryption and decryption keys, and in particular, it relates to a method for generating encryption and decryption keys using reverse and gate flash memory to generate keys.

資料數位化是目前趨勢,數位化資料可被永久性保存。一旦數位化後,衍生出的一重要課題則是「資料安全性」。習知的資料加密方式,諸如HASH、SHA(Secure Hash Algorithm)、SSL(Secure Socket Layer)、WPA(Wi-Fi Protected Access)…等,廣泛被應用於不同的領域上。在標準的加密程序中,使用加解密方式較容易被破解,因此,需再配合亂數(Random number)以增加其複雜程度,進而提高資料的安全性。 Data digitization is the current trend, and digitized data can be stored permanently. Once digitized, an important topic derived is "data security." Known data encryption methods, such as HASH, SHA (Secure Hash Algorithm), SSL (Secure Socket Layer), WPA (Wi-Fi Protected Access)... etc., are widely used in different fields. In standard encryption procedures, encryption and decryption methods are easier to crack. Therefore, random numbers need to be added to increase the complexity and improve data security.

如上所述,為提供亂數以提升資料安全性,需要真實亂數產生器(True Random Number Generator),此電路是利用隨時變化的環境,來產生出不同的環境變數亂數。然而,現有的真實亂數產生器所產生之亂數的複雜度不足,即便採用上述亂數,數位化資料依舊有被破解之虞。 As mentioned above, in order to provide random numbers to improve data security, a True Random Number Generator is needed. This circuit uses the changing environment to generate random numbers of different environmental variables. However, the complexity of the random number generated by the existing real random number generator is insufficient, and even if the above random number is used, the digitized data is still in danger of being cracked.

發明內容旨在提供本揭示內容的簡化摘要,以使閱讀者對本掲示內容具備基本的理解。此發明內容並非本揭示內容的完整概述,且其用意並非在指出本案實施例的重要/關鍵元件或界定本案的範圍。 The content of the invention aims to provide a simplified summary of the content of this disclosure so that readers have a basic understanding of the content of this disclosure. This content of the invention is not a complete summary of the content of the present disclosure, and its intention is not to point out the important/key elements of the embodiments of this case or to define the scope of this case.

本案內容之一目的是在提供一種加解密金鑰產生方法,藉以解決先前技術存在的問題,解決之手段如後所述。 One purpose of the content of this case is to provide a method for generating encryption and decryption keys, so as to solve the problems in the prior art.

為達上述目的,本案內容之一技術態樣係關於一種加解密金鑰產生方法,其包含以下步驟:選擇一反及閘快閃記憶體的一區塊;初始化反及閘快閃記憶體的區塊;程式化反及閘快閃記憶體的區塊,以取得並儲存區塊中的複數個記憶體單元之複數個第一電位;重新初始化反及閘快閃記憶體的區塊;重新程式化反及閘快閃記憶體的區塊,以取得區塊中的該些記憶體單元之複數個第二電位;將該些記憶體單元之該些第一電位與該些第二電位對應相減,以取得一差異表;以及依一設定順序讀取差異表中的複數個差異值,以作為一加解密金鑰。 In order to achieve the above purpose, one of the technical aspects of the content of this case relates to a method for generating encryption and decryption keys, which includes the following steps: selecting a block of the flash memory; initializing the flash memory. Block; Programmable anti-and-gate flash memory block to obtain and store the plural first potentials of a plurality of memory cells in the block; re-initialize the anti-and-gate flash memory block; Programmable and gate flash memory blocks to obtain a plurality of second potentials of the memory cells in the block; the first potentials of the memory cells correspond to the second potentials Subtract to obtain a difference table; and read a plurality of difference values in the difference table according to a set sequence to serve as an encryption and decryption key.

因此,根據本案之技術內容,本案實施例所示之加解密金鑰產生方法,係藉由反及閘快閃記憶體的物理特性以產生差異值,來做為加解密金鑰,從而提升加解密金鑰的複雜度。此外,本案更採用不同的差異值讀取順序,抑或採用差異值範圍之限定以濾除部分差異值,進一步增加本案產生之加密金鑰的複雜度。 Therefore, according to the technical content of this case, the encryption and decryption key generation method shown in the embodiment of this case uses the physical characteristics of flash memory to generate the difference value, which is used as the encryption and decryption key, thereby improving the encryption and decryption key. The complexity of the decryption key. In addition, this case uses a different reading order of the difference value, or uses the limitation of the difference value range to filter out some of the difference values, which further increases the complexity of the encryption key generated in this case.

在參閱下文實施方式後,本案所屬技術領域中具有通常知識者當可輕易瞭解本案之基本精神及其他發明目的,以及本案所採用之技術手段與實施態樣。 After referring to the following embodiments, those with ordinary knowledge in the technical field of the case can easily understand the basic spirit of the case and other purposes of the invention, as well as the technical means and implementation aspects of the case.

100:反及閘快閃記憶體 100: reverse and gate flash memory

11 0:區塊 11 0: block

200:方法 200: method

210~270:步驟 210~270: Step

300:差異表 300: Difference table

D11~Dnm:差異值 D11~Dnm: difference value

M11~Mxy:記憶體單元 M11~Mxy: memory unit

為讓本案之上述和其他目的、特徵、優點與實施例能更明顯易懂,所附圖式之說明如下:第1圖係依照本案一實施例繪示一種反及閘快閃記憶體的陣列方塊示意圖。 In order to make the above and other objectives, features, advantages and embodiments of this case more obvious and understandable, the description of the accompanying drawings is as follows: Figure 1 shows an array of NAND flash memory according to an embodiment of this case Schematic block diagram.

第2圖係依照本案一實施例繪示一種加解密金鑰產生方法的流程示意圖。 FIG. 2 is a schematic flowchart of a method for generating encryption and decryption keys according to an embodiment of this case.

第3圖係繪示依照本案一實施例的一種如第1圖所示之反及閘快閃記憶體的區塊之示意圖。 FIG. 3 is a schematic diagram of a block of the NAND flash memory shown in FIG. 1 according to an embodiment of the present application.

第4圖係繪示依照本案一實施例的一種如第1圖所示之反及閘快閃記憶體的區塊之程式化操作示意圖。 FIG. 4 is a schematic diagram of the programming operation of the NAND flash memory block shown in FIG. 1 according to an embodiment of the present invention.

第5圖係繪示依照本案一實施例的一種如第1圖所示之反及閘快閃記憶體的區塊之程式化操作示意圖。 FIG. 5 is a schematic diagram of the programming operation of the NAND flash memory block shown in FIG. 1 according to an embodiment of the present invention.

第6圖係繪示依照本案一實施例的一種如第1圖所示之反及閘快閃記憶體的差異值示意圖。 FIG. 6 is a schematic diagram showing the difference value of a NAND flash memory as shown in FIG. 1 according to an embodiment of the present application.

根據慣常的作業方式,圖中各種特徵與元件並未依比例繪製,其繪製方式是為了以最佳的方式呈現與本案相關的具體特徵與元件。此外,在不同圖式間,以相同或相似的元件符號來指稱相似的元件/部件。 According to the usual working method, the various features and components in the figure are not drawn to scale. The drawing method is to present the specific features and components related to the case in the best way. In addition, between different drawings, the same or similar element symbols are used to refer to similar elements/components.

為了使本掲示內容的敘述更加詳盡與完備,下文針對了本案的實施態樣與具體實施例提出了說明性的描述;但這並非實施或運用本案具體實施例的唯一形式。實施方式中涵蓋了多個具體實施例的特徵以及用以建構與操作這些具體實施例的方法步驟與其順序。然而,亦可利用其他具體實施例來達成相同或均等的功能與步驟順序。 In order to make the narrative of the contents of this disclosure more detailed and complete, the following provides an illustrative description for the implementation of this case and specific embodiments; but this is not the only way to implement or use the specific embodiments of this case. The implementation manners cover the characteristics of a number of specific embodiments and the method steps and sequences used to construct and operate these specific embodiments. However, other specific embodiments can also be used to achieve the same or equal functions and sequence of steps.

除非本說明書另有定義,此處所用的科學與技術詞彙之含義與本案所屬技術領域中具有通常知識者所理解與慣用的意義相同。此外,在不和上下文衝突的情形下,本說明書所用的單數名詞涵蓋該名詞的複數型;而所用的複數名詞時亦涵蓋該名詞的單數型。 Unless otherwise defined in this specification, the scientific and technical terms used here have the same meaning as understood and used by those with ordinary knowledge in the technical field to which this case belongs. In addition, without conflict with context, the singular nouns used in this specification cover the plural nouns; and the plural nouns also cover the singular nouns.

第1圖係依照本案一實施例繪示一種反及閘快閃記憶體100的陣列方塊示意圖。如圖所示,反及閘快閃記憶體100包含複數個記憶體單元M11~Mxy,x與y皆為正整數。為說明如何採用反及閘快閃記憶體100的物理特性以產加解密金鑰,請一併參閱第2圖,其係依照本案一實施例繪示一種加解密金鑰產生方法200的流程示意圖。 FIG. 1 is a schematic block diagram of a NAND flash memory 100 array according to an embodiment of the present invention. As shown in the figure, the NAND flash memory 100 includes a plurality of memory cells M11~Mxy, and both x and y are positive integers. To illustrate how to use the physical characteristics of the NAND flash memory 100 to produce encryption and decryption keys, please also refer to Figure 2, which is a schematic flow diagram of an encryption and decryption key generation method 200 according to an embodiment of this case .

請先參閱第2圖,加解密金鑰產生方法200包含以下步驟:步驟210:選擇反及閘快閃記憶體的區塊;步驟220:初始化反及閘快閃記憶體的區塊;步驟230:程式化反及閘快閃記憶體的區塊,以取得並儲存區塊中的複數個記憶體單元之複數個第一電位;步驟240:重新初始化反及閘快閃記憶體的區塊; 步驟250:重新程式化反及閘快閃記憶體的區塊,以取得區塊中的該些記憶體單元之複數個第二電位;步驟260:將該些記憶體單元之該些第一電位與該些第二電位對應相減,以取得一差異表;以及步驟270:依設定順序讀取該差異表中的複數個差異值,以作為加解密金鑰。 Please refer to Figure 2 first, the encryption and decryption key generation method 200 includes the following steps: Step 210: Select a block of NAND flash memory; Step 220: Initialize a block of NAND flash memory; Step 230 : Programmatically reverse and gate the flash memory block to obtain and store a plurality of first potentials of a plurality of memory cells in the block; Step 240: reinitialize the reverse and gate flash memory block; Step 250: Reprogram the blocks of the flash memory to get the second potentials of the memory cells in the block; Step 260: The first potentials of the memory cells Subtract corresponding to the second potentials to obtain a difference table; and step 270: read a plurality of difference values in the difference table according to the set sequence, and use them as encryption and decryption keys.

請一併參閱第1圖與第2圖以進行解說。於步驟210中,選擇反及閘快閃記憶體100的區塊110。然本案不以第1圖所示為限,其僅用以例示性地說明本案的實現方式之一。在其餘實施方式中,亦可選擇反及閘快閃記憶體100的其它部分作為區塊,例如選擇反及閘快閃記憶體100的左下角部分、右上角部分、右下角部分、中間部分或其餘適當之部分,如此一來,當選擇反及閘快閃記憶體100的不同部分作為區塊時,更能增進後續加解密金鑰的複雜度。 Please refer to Figure 1 and Figure 2 together for explanation. In step 210, the block 110 of the NAND flash memory 100 is selected. However, this case is not limited to what is shown in Figure 1, and it is only used to illustrate one of the implementation methods of this case. In other embodiments, other parts of the NAND flash memory 100 can also be selected as blocks, for example, the lower left corner part, the upper right corner part, the lower right corner part, the middle part or the NAND flash memory 100 The remaining appropriate parts, in this way, when different parts of the NAND flash memory 100 are selected as blocks, the complexity of the subsequent encryption and decryption keys can be further increased.

在步驟220中,請一併參閱第3圖以進行說明,第3圖係繪示依照本案一實施例的一種如第1圖所示之反及閘快閃記憶體100的區塊110之示意圖。如圖所示,此反及閘快閃記憶體100的區塊110包含複數個記憶體單元M11~Mnm,n與m皆為正整數。如步驟220所示,初始化反及閘快閃記憶體100的區塊110。舉例而言,上述初始化之方式,可為抹除反及閘快閃記憶體100的區塊110中的記憶體單元M11~Mnm之資料。 In step 220, please also refer to FIG. 3 for description. FIG. 3 shows a schematic diagram of the block 110 of the reverse and gate flash memory 100 shown in FIG. 1 according to an embodiment of the present invention. . As shown in the figure, the block 110 of the NAND flash memory 100 includes a plurality of memory cells M11~Mnm, and both n and m are positive integers. As shown in step 220, the block 110 of the NAND flash memory 100 is initialized. For example, the above-mentioned initialization method may be to erase the data of the memory cells M11~Mnm in the block 110 of the flash memory 100.

接著,執行步驟230,請一併參閱第4圖以進行說明,第4圖係繪示依照本案一實施例的一種如第1圖所示之 反及閘快閃記憶體100的區塊110之程式化操作示意圖。如步驟230所示,對反及閘快閃記憶體100的區塊110進行程式化操作,以取得並儲存區塊110中的記憶體單元M11~Mnm之複數個第一電位。舉例而言,上述程式化之操作,可為將高電位寫入反及閘快閃記憶體100的區塊110中的記憶體單元M11~Mnm。請參閱第4圖,圖中以點陣圖表示記憶體單元M11~Mnm之電位,點陣越密集表示電位越高。需說明的是,由於材料、製程…等等些微的差異,一般而言,每個記憶體單元M11~Mnm的特性會有所不同,因此,即便給予相同之高電位,記憶體單元M11~Mnm之電位依舊有所不同。本案便是藉由此種物理特性,而產生複雜度高的加解密金鑰,後文將進一步詳述。 Next, perform step 230. Please also refer to FIG. 4 for description. FIG. 4 shows an example shown in FIG. 1 according to an embodiment of the present invention. A schematic diagram of the programming operation of the block 110 of the flash memory 100 in reverse. As shown in step 230, the block 110 of the NAND flash memory 100 is programmed to obtain and store a plurality of first potentials of the memory cells M11~Mnm in the block 110. For example, the above-mentioned programmed operation can be to write a high potential into the memory cells M11~Mnm in the block 110 of the NAND flash memory 100. Please refer to Figure 4, in the figure, the potential of the memory cell M11~Mnm is represented by a dot matrix. The denser the dot matrix, the higher the potential. It should be noted that due to slight differences in materials, manufacturing processes, etc., generally speaking, the characteristics of each memory cell M11~Mnm will be different. Therefore, even if the same high potential is given, the memory cell M11~Mnm The potential is still different. This case uses such physical characteristics to generate a highly complex encryption and decryption key, which will be described in further detail later.

請參閱步驟240,重新初始化反及閘快閃記憶體100的區塊110,例如重新/再次抹除反及閘快閃記憶體100的區塊110中的記憶體單元M11~Mnm之資料。然後,執行步驟250,請一併參閱第5圖以進行說明,第5圖係繪示依照本案一實施例的一種如第1圖所示之反及閘快閃記憶體100的區塊110之程式化操作示意圖。如步驟250所示,重新/再次對反及閘快閃記憶體100的區塊110進行程式化操作,以取得區塊110中的記憶體單元M11~Mnm之複數個第二電位。舉例而言,上述程式化之操作,可為將高電位寫入反及閘快閃記憶體100的區塊110中的記憶體單元M11~Mnm。如第5圖所示,在寫入高電位後,記憶體單元M11~Mnm之電 位依舊有所不同,且與第4圖寫人高電位後,記憶體單元M11~Mnm呈現之電位不同。 Please refer to step 240 to reinitialize the block 110 of the NAND flash memory 100, for example, re-erase the data of the memory cells M11~Mnm in the block 110 of the NAND flash memory 100. Then, perform step 250. Please also refer to FIG. 5 for description. FIG. 5 shows a block 110 of the gate flash memory 100 as shown in FIG. 1 according to an embodiment of the present invention. Sketch map of stylized operation. As shown in step 250, the block 110 of the NAND flash memory 100 is re-programmed to obtain a plurality of second potentials of the memory cells M11~Mnm in the block 110. For example, the above-mentioned programmed operation can be to write a high potential into the memory cells M11~Mnm in the block 110 of the NAND flash memory 100. As shown in Figure 5, after writing a high potential, the power of the memory cell M11~Mnm The potential is still different, and after the high potential is written in Figure 4, the potentials of the memory cells M11~Mnm are different.

於步驟260中,將記憶體單元M11~Mnm之該些第一電位與該些第二電位對應相減,以取得差異表。舉例而言,將第4圖所示之記憶體單元M11~Mnm所呈現的電位,與第5圖中之相應的記憶體單元M11~Mnm所呈現之電位相減,以得到第6圖所示之差異表300。詳細而言,將第4圖之記憶體單元M11的電位減去第5圖之相應的記憶體單元M11之電位,則會得到第6圖之差異值D11,其餘記憶體單元亦可採用上述方式以得到差異值。若將所有差異值集合起來,則可得到第6圖所示之差異表300。需說明的是,並非所有記憶體單元於兩次程式化時,均會呈現不同電位,如記憶體單元M12,其於兩次程式化後之電位相同,因此,其並無差異值D12(無差異值者,在此處以白色標示,然第6圖之實施例僅用以進行說明,非限制本案)。 In step 260, the first potentials and the second potentials of the memory cells M11~Mnm are correspondingly subtracted to obtain a difference table. For example, subtract the potential exhibited by the memory cells M11~Mnm shown in Figure 4 from the potential exhibited by the corresponding memory cells M11~Mnm in Figure 5 to obtain the potential shown in Figure 6.的 Difference Table 300. In detail, by subtracting the potential of the memory cell M11 in Figure 4 from the potential of the memory cell M11 in Figure 5, the difference value D11 in Figure 6 will be obtained. The other memory cells can also use the above method To get the difference value. If all the difference values are collected, the difference table 300 shown in Fig. 6 can be obtained. It should be noted that not all memory cells exhibit different potentials during two programming. For example, memory cell M12 has the same potential after two programming. Therefore, there is no difference value D12 (without The difference value is marked in white here, but the embodiment in Fig. 6 is only for illustration and does not limit this case).

隨後,執行步驟210,依設定順序讀取差異表300中的複數個差異值,以作為加解密金鑰。舉例而言,差異值D11為255,差異值D14為127,則可得加解密金鑰為255127。然本案不以此為限,其僅例示性地說明本案的實現方式之一而利於理解,差異表300後續尚有諸多差異值,若將這些差異值組成上述加解密金鑰,則加解密金鑰的複雜度十分高,對於加解密之安全性佳。 Subsequently, step 210 is performed to read the plurality of difference values in the difference table 300 according to the set sequence, and use them as encryption and decryption keys. For example, if the difference value D11 is 255 and the difference value D14 is 127, the encryption and decryption key can be 255127. However, this case is not limited to this. It only exemplarily illustrates one of the implementation methods of this case to facilitate understanding. There are still many difference values in the follow-up difference table 300. If these difference values are composed of the above encryption and decryption keys, the encryption and decryption keys The complexity of the key is very high, and the security for encryption and decryption is good.

在一實施例中,可以第3圖至第5圖的區塊110所形成之矩陣,或者以第6圖的差異值所形成之矩陣的一行及 一列形成之矩陣單元作為一個基本單位。以第6圖而言,差異值D12為一矩陣單元,其佔此矩陣的一個基本單位,差異值D13亦為一矩陣單元,其佔此矩陣的一個基本單位。本案之加解密金鑰可依上述狀況進一步增加複雜度,例如除了差異值D11為255及差異值D14為127之外,由於差異值Dl1與差異值D14隔了兩個基本單位(如D12、D13),因此,加解密金鑰可以上述差異值與基本單位之組合來形成,詳細而言,此加解密金鑰可為「差異值D11、差異值間所間隔的基本單位2(如D12、D13)及差異值D14」之組合,亦即加解密金鑰可為2552127。然本案同樣不以此為限,差異表300後續尚有諸多差異值以及差異值之間所間隔的基本單位,若將這些差異值與基本單位之組合作為上述加解密金鑰,則加解密金鑰的複雜度將會進一步提高,對於加解密之安全性更加有保障。 In an embodiment, the matrix formed by the block 110 in Fig. 3 to Fig. 5, or a row of the matrix formed by the difference value in Fig. 6 and The matrix unit formed by a column serves as a basic unit. In Fig. 6, the difference value D12 is a matrix unit, which occupies a basic unit of the matrix, and the difference value D13 is also a matrix unit, which occupies a basic unit of the matrix. The encryption and decryption key in this case can further increase the complexity according to the above situation. For example, in addition to the difference value D11 being 255 and the difference value D14 being 127, because the difference value Dl1 and the difference value D14 are separated by two basic units (such as D12, D13) ), therefore, the encryption and decryption key can be formed by the combination of the above difference value and the basic unit. In detail, the encryption and decryption key can be "difference value D11, basic unit 2 (such as D12, D13) ) And the difference value D14", that is, the encryption and decryption key can be 2552127. However, this case is not limited to this. The difference table 300 has many difference values and the basic unit of the interval between the difference values. If the combination of these difference values and the basic unit is used as the encryption and decryption key, the encryption and decryption key The complexity of the key will be further improved, and the security of encryption and decryption will be more guaranteed.

在另一實施例中,步驟270所述之讀取差異表中的差異值之設定順序可為:選擇性地讀取差異表300中相對應於矩陣之同一行的該些個差異值、選擇性地讀取差異表300中相對應於矩陣之同一列的該些個差異值或選擇性地讀取該差異表300中相對應於該矩陣之任一行及任一列的該些個差異值,並將讀取到的該些個差異值與該些基本單位的數值進行組合以作為加解密金鑰。請參閱第6圖,以讀取順序為矩陣之同一列為例,其可讀取差異值D11、基本單位2(Dl2、D13)及差異值D14,因此,可得加解密金鑰為2552127。以讀取順序為矩陣之同一行為例,其可讀取差異值D11、基本單位1(D21)及差異值D31,若差異值D31為268,此時,可得加解密金鑰 為2551268。以讀取順序為矩陣之任一行及任一列為例,其可讀取差異表之斜線上的資料,如讀取差異值D11、基本單位l(D22)及差異值D33,若差異值D33為525,此時,可得加解密金鑰為2551525。同樣地,本案不以此為限,差異表300後續尚有諸多差異值以及差異值之間所間隔的基本單位,若將這些差異值與基本單位之組合作為上述加解密金鑰,則加解密金鑰的複雜度可進一步提高,對於加解密之安全性更加有保障。此外,步驟270所述之讀取差異表中的差異值之設定順序不以上述實施例為限,於讀取時,亦可在具有差異的差異值間間隔讀取,例如具有差異的差異值為Dl1、D14、D16、D18、Dl9,本案可間隔讀取差異值Dl1、D16、Dl9,跳過差異值D14、D18,或者本案亦可讀取偶數差異值D14、D18,抑或設定任何所需之讀取順序。 In another embodiment, the setting sequence of reading the difference values in the difference table in step 270 may be: selectively reading the difference values corresponding to the same row of the matrix in the difference table 300, selecting Read the difference values in the difference table 300 corresponding to the same column of the matrix or selectively read the difference values in the difference table 300 corresponding to any row and any column of the matrix, And combine the read difference values with the basic unit values to serve as encryption and decryption keys. Please refer to Figure 6. Taking the same column of the matrix as an example in the reading order, the difference value D11, the basic unit 2 (D12, D13), and the difference value D14 can be read. Therefore, the encryption and decryption key is 2552127. Taking the reading sequence as an example of the same behavior of the matrix, it can read the difference value D11, the basic unit 1 (D21), and the difference value D31. If the difference value D31 is 268, then the encryption key can be obtained. It is 2551268. Taking the reading order as any row and any column of the matrix as an example, it can read the data on the diagonal line of the difference table, such as reading the difference value D11, the basic unit l (D22) and the difference value D33, if the difference value D33 is 525, at this time, the available encryption and decryption key is 2551525. Similarly, this case is not limited to this. The difference table 300 has many difference values and the basic units of the interval between the difference values. If the combination of these difference values and the basic unit is used as the encryption and decryption key, the encryption and decryption will be performed. The complexity of the key can be further improved, and the security of encryption and decryption can be more guaranteed. In addition, the setting sequence of reading the difference values in the difference table described in step 270 is not limited to the above embodiment. When reading, it can also be read at intervals between difference values with differences, for example, difference values with differences. Dl1, D14, D16, D18, Dl9, this case can read the difference values Dl1, D16, Dl9 at intervals, skip the difference values D14, D18, or this case can also read the even difference values D14, D18, or set any required The reading order.

於再一實施例中,尚可對差異值設定一範圍,例如設定差異值範圍為128~256,若不在此範圍內的差異值將會被濾除,進一步增進加解密金鑰的複雜。舉例而言,以讀取順序為矩陣之同一列為例,其原本可讀取差異值Dl1、基本單位2(D12、Dl3)及差異值D14,然而,差異值D14為127,超過差異值範圍128~256,因此,實際上差異值D14不會被讀取,而會繼續往同一列找尋其餘位在差異值範圍內的差異值,假設過了500個基本單位後,差異值D1502為152(上述D1502為第1列第502行),隨後,又過了50個基本單位後才又找到差異值D1553為198(上述D1553為第1列第553行),則實際上加解密 金鑰將為上述差異值及基本單位之組合25550015250198,詳細表列如下:255/500/152/50/198 In yet another embodiment, a range of the difference value can be set, for example, the range of the difference value is set to 128-256. If the difference value is not within this range, the difference value will be filtered out, further increasing the complexity of the encryption and decryption keys. For example, taking the same column of the matrix in the reading order as an example, the difference value D11, the basic unit 2 (D12, D13), and the difference value D14 can be read originally. However, the difference value D14 is 127, which exceeds the difference value range 128~256, so in fact, the difference value D14 will not be read, but will continue to look for the difference value of the remaining bits within the difference value range in the same column. Assuming that after 500 basic units, the difference value D1502 is 152( The above D1502 is the first column, row 502), and then, after 50 basic units, the difference value D1553 is 198 (the above D1553 is the first column, row 553), then actually encrypt and decrypt The key will be the combination of the above difference value and the basic unit 25550015250198. The detailed table is as follows: 255/500/152/50/198

D11/間隔值/D1502/間隔值/D1553 D11/interval value/D1502/interval value/D1553

如此,當可又再度提高加解密金鑰的複雜度,進而提升加解密之安全性。需說明的是,第3圖之初始化步驟、第4圖及第5圖之程式化步驟及第6圖之相減產生差異值之步驟可由電子裝置或其餘適當之裝置來加以進行,舉例而言,可藉由電子裝置之中央處理器(CPU)、微處理器(MCU)或其餘適當之元件來加以執行。 In this way, Dangke once again increases the complexity of the encryption and decryption keys, thereby improving the security of encryption and decryption. It should be noted that the initialization step in Figure 3, the programming step in Figures 4 and 5, and the step of subtracting in Figure 6 to generate a difference value can be performed by electronic devices or other appropriate devices, for example It can be executed by the central processing unit (CPU), microprocessor (MCU) or other appropriate components of the electronic device.

由上述本案實施方式可知,應用本案具有下列優點。本案實施例所示之加解密金鑰產生方法,係藉由反及閘快閃記憶體的物理特性以產生差異值,來做為加解密金鑰,從而提升加解密金鑰的複雜度。此外,本案更採用不同的差異值讀取順序,抑或採用差異值範圍之限定以濾除部分差異值,進一步增加本案產生之加解密金鑰的複雜度。 It can be seen from the above implementation of this case that the application of this case has the following advantages. The encryption and decryption key generation method shown in the embodiment of this case uses the physical characteristics of flash memory to generate a difference value as the encryption and decryption key, thereby increasing the complexity of the encryption and decryption key. In addition, this case uses a different reading order of the difference value, or uses the limitation of the difference value range to filter out some of the difference values, which further increases the complexity of the encryption and decryption keys generated in this case.

雖然上文實施方式中掲露了本案的具體實施例,然其並非用以限定本案,本案所屬技術領域中具有通常知識者,在不悖離本案之原理與精神的情形下,當可對其進行各種更動與修飾,因此本案之保護範圍當以附隨申請專利範圍所界定者為準。 Although the specific examples of this case are disclosed in the above embodiments, they are not intended to limit the case. Those with ordinary knowledge in the technical field to which this case belongs should not deviate from the principles and spirit of this case. Various changes and modifications have been made. Therefore, the scope of protection in this case shall be subject to the scope of the accompanying patent application.

200‧‧‧方法 200‧‧‧Method

210~270‧‧‧步驟 210~270‧‧‧Step

Claims (10)

一種加解密金鑰產生方法,包含:選擇一反及閘快閃記憶體的一區塊;初始化該反及閘快閃記憶體的該區塊;程式化該反及閘快閃記憶體的該區塊,以取得並儲存該區塊中的複數個記憶體單元之複數個第一電位;重新初始化該反及閘快閃記憶體的該區塊;重新程式化該反及閘快閃記憶體的該區塊,以取得該區塊中的該些記憶體單元之複數個第二電位;將該些記憶體單元之該些第一電位與該些第二電位對應相減,以取得一差異表;以及依一設定順序讀取該差異表中的複數個差異值,以作為一加解密金鑰。 An encryption and decryption key generation method, comprising: selecting a block of a flip and gate flash memory; initializing the block of the flip and gate flash memory; programming the flip and gate flash memory Block to obtain and store the plurality of first potentials of the plurality of memory cells in the block; reinitialize the block of the inverter flash memory; reprogram the inverter flash memory To obtain a plurality of second potentials of the memory cells in the block; correspondingly subtract the first potentials and the second potentials of the memory cells to obtain a difference Table; and read the plurality of difference values in the difference table according to a set sequence to serve as an encryption and decryption key. 如請求項1所述之加解密金鑰產生方法,其中初始化該反及閘快閃記憶體的該區塊之步驟包含:抹除該反及閘快閃記憶體的該區塊中的該些記憶體單元之資料。 The encryption and decryption key generation method according to claim 1, wherein the step of initializing the block of the flash memory includes: erasing the blocks of the flash memory Data of the memory unit. 如請求項1所述之加解密金鑰產生方法,其中程式化該反及閘快閃記憶體的該區塊之步驟包含:將高電位寫入該反及閘快閃記憶體的該區塊中的該些記憶體單元。 The method for generating encryption and decryption keys according to claim 1, wherein the step of programming the block of the NAND flash memory includes: writing a high potential to the block of the NAND flash memory These memory units in the. 如請求項3所述之加解密金鑰產生方法,其中該區塊中的該些記憶體單元對應之該些第一電位部分不相同。 The method for generating encryption and decryption keys as described in claim 3, wherein the first potential portions corresponding to the memory cells in the block are different. 如請求項4所述之加解密金鑰產生方法,其中重新程式化該反及閘快閃記憶體的該區塊之步驟包含:重新將高電位寫人該反及閘快閃記憶體的該區塊中的該些記憶體單元。 The method for generating encryption and decryption keys according to claim 4, wherein the step of reprogramming the block of the NAND flash memory includes: rewriting the high potential to the NAND flash memory The memory cells in the block. 如請求項5所述之加解密金鑰產生方法,其中該區塊中的該些記憶體單元對應之該些第二電位部分不相同。 According to the method for generating encryption and decryption keys according to claim 5, the second potential portions corresponding to the memory cells in the block are different. 如請求項6所述之加解密金鑰產生方法,其中將該些記憶體單元之該些第一電位與該些第二電位對應相減,以取得該差異表之步驟包含:將該些記憶體單元之一第一記憶體單元的該第一電位與該第一記憶體單元的該第二電位對應相減,以取得一第一差異值;將該些記憶體單元之一第二記憶體單元的該第一電位與該第二記憶體單元的該第二電位對應相減,以取得一第二差異值;以及依據該第一差異值及該第二差異值以取得該差異表。 The method for generating encryption and decryption keys according to claim 6, wherein the corresponding subtraction of the first potentials and the second potentials of the memory cells to obtain the difference table includes: the memories The first potential of a first memory cell of one of the memory cells is correspondingly subtracted from the second potential of the first memory cell to obtain a first difference value; one of the memory cells is a second memory The first potential of the cell and the second potential of the second memory cell are correspondingly subtracted to obtain a second difference value; and the difference table is obtained according to the first difference value and the second difference value. 如請求項7所述之加解密金鑰產生方法,其中該區塊中的該些記憶體單元排列為一矩陣,其中以該矩陣的一行及一列形成之矩陣單元作為一個基本單位,該差異值隔複數個基本單位出現一次,其中依該設定順序讀取該差異表中的該些個差異值,以作為該加解密金鑰之步驟包含:依該設定順序讀取該差異表中的該些差異值,並以該些差異值與該些基本單位的數值之組合以作為該加解密金鑰。 The method for generating encryption and decryption keys according to claim 7, wherein the memory cells in the block are arranged in a matrix, wherein a matrix unit formed by one row and one column of the matrix is used as a basic unit, and the difference value Appear once every several basic units, and read the difference values in the difference table according to the setting sequence as the encryption and decryption key. The steps include: reading the difference values in the difference table according to the setting sequence The difference value, and the combination of the difference value and the numerical value of the basic unit is used as the encryption and decryption key. 如請求項8所述之加解密金鑰產生方法,其中依該設定順序讀取該差異表中的該些個差異值,以作為該加解密金鑰之步驟包含:選擇性地讀取該差異表中相對應於該矩陣之同一行的該些個差異值、選擇性地讀取該差異表中相對應於該矩陣之同一列的該些個差異值或選擇性地讀取該差異表中相對應於該矩陣之任一行及任一列的該些個差異值,並將讀取到的該些個差異值與該些基本單位的數值進行組合以作為該加解密金鑰。 The method for generating encryption and decryption keys according to claim 8, wherein the step of reading the difference values in the difference table as the encryption and decryption keys according to the setting sequence includes: selectively reading the difference The difference values in the table corresponding to the same row of the matrix, selectively reading the difference values corresponding to the same column of the matrix in the difference table, or selectively reading the difference table The difference values corresponding to any row and any column of the matrix are combined, and the read difference values are combined with the numerical values of the basic units to serve as the encryption and decryption key. 如請求項7所述之加解密金鑰產生方法,其中依該設定順序讀取該差異表中的該些個差異值,以作為該加解密金鑰之步驟包含:設定一差異值範圍;以及依該設定順序讀取該差異表中位於該差異值範圍內的該些差異值,以作為該加解密金鑰。 The encryption and decryption key generation method according to claim 7, wherein the steps of reading the difference values in the difference table as the encryption and decryption key according to the setting sequence include: setting a difference value range; and The difference values within the difference value range in the difference table are read according to the setting sequence to serve as the encryption and decryption keys.
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