TWI778409B - Superconducting Composite Quantum Computing Circuit - Google Patents

Abstract

The superconducting composite quantum computing circuit has: a circuit substrate, a wiring pattern of a circuit element including a qubit and an observation electrode for observing the state of the qubit is formed on the surface of the substrate, and a ground pattern serving as a ground potential, which has a The ground pattern formed on the first surface of the substrate surface, and the ground pattern formed on the second surface, which is the opposite surface of the first surface, are connected inside the substrate through electrodes; the first ground electrode has a The ground pattern formed on the first surface is in contact with a first contact portion, and the first non-contact portion has a shape corresponding to the shape of the wiring pattern formed on the first surface. The second ground electrode has a second contact portion on the circuit board. The ground pattern formed on the surface contacts the second contact part; the front end is provided with a control signal line that contacts the spring pin, the contact spring pin is in contact with the position corresponding to the qubit, and pushes the first surface of the circuit substrate on the first surface of the circuit board. 1 ground electrode, or, push the second surface of the circuit board against the second ground electrode; impart potential energy to the member, push the first ground electrode against the first surface of the circuit board, or push the second ground electrode on the The second surface of the circuit board; the first ground electrode is in contact with the ground pattern through the first extension portion, and the first extension portion is formed by a superconductor having a ductility higher than that of the ground pattern; the second The ground electrode is in contact with the ground pattern through a second extending portion formed of a superconductor having a ductility higher than that of the ground pattern.

Description

Superconducting Composite Quantum Computing Circuit

Field of Invention The present invention relates to a superconducting composite quantum computing circuit.

Background of the Invention Technologies related to quantum computers are being researched and developed. As a technique related to a quantum computer, a method of performing a 2-qubit gate operation in a quantum computer using a superconducting qubit is known (refer to Patent Documents 1 and 2). prior art literature

Patent Literature Patent Document 1: Specification of US Patent No. 7613765 Patent Document 2: US Patent Application Publication No. 2016/0380636 Specification

Summary of Invention The problem to be solved by the invention A conventional quantum circuit developed to realize a quantum computer using a superconducting circuit is a circuit configuration in which it is difficult to completely shut off unnecessary interactions between qubits that are computationally necessary. If there is residual interaction when it is turned off, the residual interaction will not only become the cause of the control error of the qubit itself, but also become the factor that propagates and diffuses the error that occurs in the qubit to the surrounding. The residual interaction itself becomes the cause of the control error of the qubit, or the error that occurs in the qubit is propagated and diffused around, which is a big problem for installing a quantum computer with error tolerance, and it is a problem that does not have the The big problem is that the calculation accuracy of the approximate calculation of error tolerance is reduced.

The present invention is an invention constructed in view of the above circumstances, and provides a superconducting composite quantum computing circuit capable of suppressing interaction or crosstalk between qubits. means of solving problems

The present invention is an invention constructed to solve the above-mentioned problems, and one aspect of the present invention is a superconducting composite quantum computing circuit comprising: a circuit substrate, a surface of the substrate having qubits formed on the substrate and observing the state of the qubits The wiring pattern of the circuit element of the observation electrode, and the ground potential, that is, the ground pattern, and the through electrode is provided with the ground pattern formed on the first surface of the substrate surface and the ground pattern formed on the first surface of the substrate surface. The ground pattern formed on the second surface of the reverse side is connected inside the substrate; the first ground electrode includes a first contact portion that is in contact with the ground pattern formed on the first surface of the circuit board, and a first contact portion that is in contact with the ground pattern formed on the first surface of the circuit board. a first non-contact portion having a shape corresponding to the shape of the wiring pattern formed on one side; a second ground electrode having a second contact portion that contacts the ground pattern formed on the second side of the circuit board; a control signal line , a contact spring pin is arranged at the front end, and the contact spring pin is in contact with the position corresponding to the qubit, and pushes the circuit substrate up or down the circuit substrate; and gives the potential energy member, grounding the first The electrode is pushed against the first surface of the circuit board, or the second ground electrode is pushed against the second surface of the circuit board, and the first ground electrode is in contact with the ground pattern through the first extension portion, The first extension portion is formed of a superconductor having a ductility higher than that of the ground pattern, the second ground electrode is in contact with the ground pattern through the second extension portion, and the second extension portion is It is formed by a superconductor having a ductility higher than that of the aforementioned ground pattern.

Furthermore, in one aspect of the present invention, in the above-mentioned superconducting composite quantum computing circuit, the above-mentioned superconducting composite quantum computing circuit further includes: a potential energy imparting member that pushes the first ground electrode against the first surface of the circuit substrate, or pushes the second ground electrode Pushed on the second surface of the circuit board, the first ground electrode is in contact with the ground pattern through a first extension portion, and the first extension portion is extended by having a higher ductility than the ground pattern. The second ground electrode is in contact with the ground pattern through a second extension portion, and the second extension portion is formed of a superconductor having a ductility higher than that of the ground pattern.

Another aspect of the present invention is that in the above-mentioned superconducting composite quantum computing circuit, the qubit includes: a first electrode having a first coupling capacitance with the ground portion; A second coupling capacitor having a larger first coupling capacitance is connected to the first electrode by a Josephson junction.

Another aspect of the present invention is that in the above-mentioned superconducting composite quantum computing circuit, the circuit substrate has a center electrode at a position corresponding to a qubit, a peripheral electrode surrounding the center electrode, and the In the connection electrode connecting the central electrode and the peripheral electrode, the position corresponding to the qubit is a position in the second surface corresponding to the position of the qubit included in the wiring pattern formed on the first surface.

Furthermore, in one aspect of the present invention, in the above-mentioned superconducting composite quantum computing circuit, the control signal line is at a position corresponding to the position of the qubit included in the wiring pattern formed on the first surface, It is arranged inside the first non-contact part of the first ground electrode, or is arranged inside the second non-contact part of the second ground electrode at a position corresponding to the position corresponding to the qubit, and the A control signal is supplied to the qubit, and the position corresponding to the qubit is a position in the second surface corresponding to the position of the qubit included in the wiring pattern formed on the first surface.

Another aspect of the present invention is that in the above-mentioned superconducting composite quantum computing circuit, the width and height of the first non-contact portion and the second non-contact portion are smaller than the wavelength of the control signal.

Furthermore, in one aspect of the present invention, in the above-mentioned superconducting composite quantum computing circuit, the frequency band of the control signal is a microwave frequency band. Invention effect

According to the present invention, interaction or crosstalk between qubits can be suppressed.

Form for carrying out the invention (Embodiment) Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. FIG. 1 is a diagram showing an example of the configuration of a superconducting composite quantum computing circuit QC according to the present embodiment. The superconducting composite quantum computing circuit QC includes a circuit board 1 , a first ground electrode 2 , and a second ground electrode 3 . The circuit board 1 is sandwiched by the first ground electrode 2 and the second ground electrode 3 . The side having the first base electrode 2 when viewed from the circuit board 1 is referred to as the upper side, and the side having the second base electrode 3 as viewed from the circuit substrate 1 is referred to as the lower side.

An example of the circuit substrate 1 is a dielectric substrate such as silicon. In the circuit substrate 1, the wiring pattern CP and the ground pattern GP of the circuit element are formed on the substrate surface S of a dielectric substrate such as silicon through a superconducting film. In addition, when the material of the circuit substrate 1 is silicon, the circuit substrate 1 is located at a temperature lower than a predetermined temperature, and the silicon becomes a dielectric.

The wiring pattern CP includes a qubit 4 , an observation electrode 8 for observing the state of the qubit 4 , a superconducting resonator 7 , and a capacitor 9 . In FIG. 1, qubits 4-1 to 4-6 are shown as an example of qubit 4. FIG. 1 shows superconducting resonators 7-1 to 7-4 as an example of the superconducting resonator 7. As shown in FIG. In FIG. 1 , capacitors 9 - 1 to 9 - 4 are shown as an example of the capacitor 9 .

The ground pattern GP is a ground potential. The ground pattern GP includes a first ground pattern GP1 and a second ground pattern GP2. The first ground pattern GP1 is formed on the first surface S1 on the upper side of the substrate surface S. As shown in FIG. The second ground pattern GP2 is formed on the second surface S2 which is the opposite surface of the first surface S1. The first ground pattern GP1 includes the ground electrode 11 on the upper surface of the substrate. In FIG. 1 , the substrate upper surface ground electrodes 11 - 1 to 11 - 4 are displayed as an example of the substrate upper surface ground electrode 11 .

The through electrode 10 connects the first ground pattern GP1 formed on the first surface S1 of the circuit board 1 and the second ground pattern GP2 formed on the second surface S2 which is the opposite surface of the first surface S1 inside the substrate. . The first ground pattern GP1 and the second ground pattern GP2 are in electrical contact with each other by the through electrode 10 . In FIG. 1 , a through electrode 10 - 1 and a through electrode 10 - 2 are shown as an example of the through electrode 10 .

In addition, a quadrangular area with four qubits 4 adjacent to each other as qubits 4-1 to 4-4 on the substrate surface S of the circuit substrate 1 as vertices is referred to as an observation area X. In FIG. 1, the observation area X1 and the observation area X2 are shown as an example of the observation area X. On the dielectric substrate of the circuit substrate 1, four qubits adjacent to each other such as qubits 4-4, qubits 4-3, qubits 4-5, and qubits 4-6 will be adjacent to each other. The quadrangular area with bit 4 as the vertex is called the gap ground area Y. In FIG. 1 , the first gap contact region Y1 and the first gap contact region Y2 are shown as an example of the gap contact region Y. As shown in FIG. The substrate surface S is a pattern in which the observation area X and the gap ground area Y surrounding the observation area X are repeated. Figure 1 shows a part of this pattern.

As described above, in the circuit substrate 1, the wiring pattern CP of the circuit element including the qubit 4 and the observation electrode 8 for observing the state of the qubit 4, and the ground pattern GP of the ground potential are formed on the substrate surface S. The circuit board 1 has a first ground pattern GP1 formed on the first surface S1 of the substrate surface S, and a second ground pattern GP2 formed on the second surface S2, which is the opposite surface of the first surface S1, inside the substrate. The through electrodes 10 are connected.

On the surface of the first ground electrode 2 facing the substrate surface S, a superconducting film is formed after an etching process is performed in accordance with the wiring pattern CP on the substrate surface S. In the first ground electrode 2, the first non-contact portion 20 is formed by this etching process. The first non-contact portion 20 is not in contact with the first surface S1 of the substrate surfaces S. An example of the distance between the first non-contact portion 20 and the first surface S1 is as follows: when the frequency of the control signal is about 10 GHz, the distance is tens to hundreds of micrometers. The width and height of the first non-contact portion 20 (similar to the second non-contact portion 30 ) are smaller than the wavelength of the control signal. The first non-contact portion 20 has a shape corresponding to the shape of the wiring pattern CP formed on the first surface S1 of the substrate surface S. As shown in FIG.

On the other hand, in the 1st ground electrode 2, the 1st contact part 21 is provided in the part other than the 1st non-contact part 20 in the surface which opposes the board|substrate surface S of the 1st ground electrode 2. As shown in FIG. The first contact portion 21 is in contact with the first ground pattern GP1 formed on the first surface S1 of the circuit board 1 through the upper surface superconducting microbumps 12-1. An example of the upper surface superconducting microbump 12-1 is a superconductor having a ductility higher than that of the ground pattern GP. The upper surface superconducting microbump 12 - 1 is an example of the first extension 12 .

In the present embodiment, ductility refers to ductility or ductility, or a property of both ductility and ductility. In FIG. 1 , the first contact portion 21 - 1 , the first contact portion 21 - 2 , and the first contact portion 21 - 3 are shown as an example of the first contact portion 21 .

As described above, the first ground electrode 2 contacts the ground pattern GP through the first extension 12 formed by using a superconductor having a ductility higher than that of the ground pattern GP.

Here, the first non-contact portion 20 and the first contact portion 21 will be described with reference to FIGS. 2 and 3 . FIG. 2 is a top view of the observation area X1 in the substrate surface S according to the present embodiment. 2 shows the first non-contact portion 20-3, the first non-contact portion 20-4, the first non-contact portion 20-5, and the first non-contact portion 20-6 as the first non-contact portion 20. An example.

FIG. 3 is a diagram showing an example of the first non-contact portion 20 and the first contact portion 21 according to the present embodiment. FIG. 3 shows the first contact portions 21 - 1 to 21 - 12 as an example of the first contact portion 21 . The first non-contact portion 20 is a portion other than the first contact portion 21, and is formed by etching as described above. FIG. 3 shows the first non-contact portion 20 - 1 and the first non-contact portion 20 - 2 as an example of the first non-contact portion 20 .

As described above, the first ground electrode 2 has the first contact portion 21 that is in contact with the first ground pattern GP1 formed on the first surface S1 of the circuit board 1, and the shape of the wiring pattern CP formed on the first surface S1. The first non-contact portion 20 of the shape.

Returning to FIG. 1, the superconducting composite quantum computing circuit QC will be described next. Qubit 4 is a superconducting qubit formed on a superconducting thin film. Here, the qubit 4 will be described with reference to FIGS. 4 and 5 . FIG. 4 is a diagram showing an example of the qubit 4 according to the present embodiment. Qubit 4 has an inner disk 40, an outer ring 41, a Josephson junction 42, a qubit hand 43-1, and a qubit hand 43-2. The inner disk 40, the outer ring 41, the qubit hand 43-1, and the qubit hand 43-2 are metal electrodes, respectively.

The inner disk 40 and the outer ring 41 form concentric metal electrodes. The inner disc 40 and the outer ring 41 are joined by a Josephson joint 42 . The outer ring 41 is connected with the qubit hand 43-1, the qubit hand 43-2, the qubit hand 43-3, and the qubit hand 43-4. The qubit hand 43-3 and the qubit hand 43-4 are not shown in FIG. 4 . The outer ring 41 is surrounded by the ground electrode 11 on the upper surface of the substrate. The substrate upper surface ground electrode 11 - 1 and the substrate upper surface ground electrode 11 - 2 are examples of the substrate upper surface ground electrode 11 .

Here, the first equivalent circuit 4C which is the equivalent circuit of the qubit 4 will be described with reference to FIG. 5 . FIG. 5 is a diagram showing an example of the first equivalent circuit 4C according to the present embodiment. A capacitor Cdq is formed between the inner disk 40 and the outer ring 41 which are metal electrodes which are concentric circles. The first equivalent circuit 4C uses the capacitor Cdq and the inductor derived from the Josephson junction 42 to form a nonlinear LC resonator LCR. Capacitor Cdq has capacitance Cq.

The first ground electrode 2 , the second ground electrode 3 , the substrate upper surface ground electrode 11 , and the substrate lower surface ground electrode 13 are collectively referred to as a ground portion GE. The first capacitor Cd1 is formed between the inner disk 40 and the ground portion GE. The first capacitor Cd1 has a first capacitance C1. The first capacitance C1 is mainly determined by the distance between the inner disk 40 and the ground electrode 11 on the upper surface of the substrate. In the example of FIG. 4 , the distance between the inner disk 40 and the ground electrode 11 on the upper surface of the substrate is determined by the radius of the inner disk 40 . A second capacitor Cd2 is formed between the outer ring 41 and the ground portion GE. The second capacitor Cd2 has a second capacitance C2. The second capacitance is mainly determined by the distance between the outer ring 41 and the ground electrode 11 on the upper surface of the substrate. The distance between the outer ring 41 and the ground electrode 11 on the upper surface of the substrate is determined by the radius of the outer ring 41 .

Unwanted radiation electric field E may occur between the qubit 4 and the first ground electrode 2 and between the qubit 4 and the ground portion GE. The unnecessary radiation electric field E1 is an example of the unnecessary radiation electric field E between the qubit 4 and the ground portion GE. The unwanted radiation electric field E2 is an example of the unwanted radiation electric field E between the qubit 4 and the ground portion GE.

In the qubit 4, the radius of the inner disk 40 and the radius of the outer ring 41 are determined based on the condition that the second capacitor C2 is larger than the first capacitor C1. In the qubit 4, the radius of the outer ring 41 is increased so that the second capacitance C2 is larger than the first capacitance C1. In the qubit 4, since the second capacitor C2 is larger than the first capacitor C1, the potential fluctuation caused by the unnecessary radiation electric field E propagates through the outer ring 41 to the ground portion GE. That is, the second capacitor Cd2 functions as a so-called decoupling capacitor.

Since the fluctuation of the potential caused by the unnecessary radiated electric field E propagates to the ground portion GE through the outer ring 41 , the inner disk 40 and the outer ring 41 can be compared with the case where the second capacitor C2 is not larger than the first capacitor C1. The potential difference between is less susceptible to changes in potential caused by the unwanted radiated electric field E. Here, the potential difference between the inner disk 40 and the outer ring 41 functions as an element for the qubit 4 to record bit information, so it must be stable against the unwanted radiated electric field E.

As described above, the qubit 4 includes: an inner disk 40 having a first capacitance C1 with the ground portion GE; an outer ring 41 having a second capacitance C2 with the ground portion GE that is larger than the first capacitance C1, by Josephson The joint 42 is connected to the inner disk 40 .

Returning to FIG. 1, the configuration of the superconducting composite quantum computing circuit QC will be described next. An example of the second ground electrode 3 is an aluminum electrode. The second ground electrode 3 has a second non-contact portion 30 and a second contact portion 31 .

The second non-contact portion 30 is not in contact with the second surface S2 , which is the lower surface of the substrate surface S of the circuit board 1 . The second ground electrode 3 has a second non-contact portion 30 at a position corresponding to the position corresponding to the qubit. Here, the position corresponding to the qubit refers to the qubit 4 included in the second surface S2 and the upper surface of the substrate surface S of the circuit board 1, that is, the qubit 4 included in the wiring pattern CP formed on the first surface S1 The location corresponds to the location. In FIG. 1 , the second non-contact portion 30 - 1 and the second non-contact portion 30 - 2 are shown as an example of the second non-contact portion 30 .

The second contact portion 31 is in contact with the second ground pattern GP2 formed on the second surface S2 through the second extension portion 14 . Here, the second extended portion 14 is a superconductor such as indium having a ductility higher than that of the ground pattern GP. The second extension portion 14 has a conductive contact portion 14-1 and a conductive contact portion 14-2, which will be described later. That is, the second ground electrode 3 contacts the ground pattern GP through the second extension 14 formed by using a superconductor having a ductility higher than that of the ground pattern GP.

Inside the second non-contact portion 30, the control signal line 5 is arranged to extend in the vertical direction from the lower side with respect to the second surface S2. The control signal line 5 has two types: the control signal line 5A and the observation signal line 5B. The control signal line 5A is a control signal line 5 for transmitting a control signal to the qubit 4 . The observation signal line 5B is a control signal line 5 for taking out the observation result of the state of the qubit 4 as a signal (referred to as an observation signal). The observation signal is generated as follows: the probe signal is transmitted through the observation signal line 5B, and the probe signal is reflected on the second surface S2 of the observation electrode 8 , thereby reflecting the observation result of the state of the qubit 4 .

As for the control signal and the observation signal, as an example, microwaves in the 4 to 12 GHz band are usually used. That is, in the superconducting composite quantum computing circuit QC, the frequency band of the control signal is the microwave frequency band.

The control signal of the qubit, that is, the control current, propagates through the control signal line 5A, and flows into the filter pattern 6 formed by the ground electrode 13 on the lower surface of the substrate through the contact spring pin 50A provided at the front end of the control signal line 5A. . The control current flowing into the filter pattern 6 formed on the second surface S2, which is the lower surface of the circuit board 1, passes from the filter pattern 6 formed on the second surface S2 through thin lines in several places to the lower surface of the board. The ground electrode 13 returns.

As described above, the second ground electrode 3 has the second contact portion 31 that is in contact with the second ground pattern GP2 formed on the second surface S2 of the circuit board 1 . In addition, the control signal line 5 is arranged inside the second non-contact portion 30 of the second ground electrode 3 at a position corresponding to the position corresponding to the qubit, and supplies the control signal to the qubit 4, which is the qubit. The corresponding position is a position in the second surface S2 corresponding to the position of the qubit 4 included in the wiring pattern CP formed on the first surface S1. The control signal lines 5 are arranged in a vertical direction with respect to the substrate surface S of the circuit substrate 1 on which the qubits 4 are arranged. That is, the control signal line 5 is arranged based on the 3-dimensional structure.

Here, the filter pattern 6 will be described with reference to FIGS. 6 and 7 . FIG. 6 is a diagram showing an example of the filter pattern 6 according to the present embodiment. The filter pattern 6 is located at the position of the second surface S2 corresponding to the position of the qubit 4, that is, the position corresponding to the qubit.

The filter pattern 6 has a center electrode 60 and a connection electrode 62 . The center electrode 60 is a circular electrode. The center portion electrode 60 is surrounded by the ground electrode 13 on the lower surface of the substrate with the gap portion 61 interposed therebetween. The center electrode 60 and the ground electrode 13 on the lower surface of the substrate are connected through the connection electrode 62 . Here, the connection electrode 62 is a thin wire-shaped metal electrode with a width of several tens of micrometers. In FIG. 6 , gap portions 61 - 1 to 61 - 4 are examples of the gap portion 61 . In FIG. 6 , the connection electrodes 62 - 1 to 62 - 4 are examples of the connection electrodes 62 .

Here, the equivalent circuit of the qubit 4 when the filter pattern 6 is provided, that is, the second equivalent circuit 4Ca will be described with reference to FIG. 7 . FIG. 7 is a diagram showing an example of the second equivalent circuit 4Ca related to the present embodiment. Comparing the second equivalent circuit 4Ca ( FIG. 7 ) with the first equivalent circuit 4C ( FIG. 5 ), the configuration is different except for the control signal line 5A, the inductor Ids, and the third capacitor Cdc The elements (first capacitor Cd1, second capacitor Cd2, LC resonator LCR, inner disk 40, outer ring 41, qubit hand 43-1, qubit hand 43-2, and ground GE) have The function is the same. In FIG. 7, the part different from the 1st equivalent circuit 4C of FIG. 5 is demonstrated mainly.

A third capacitor Cdc is formed between the control signal line 5A and the inner disk 40 . The third capacitor Cdc has a third capacitance Cc. The connection electrode 62 forms an inductor Ids in parallel with the third capacitor Cdc. The inductor Ids is connected to the control signal line 5A and the ground portion GE. The inductor Ids has an inductance Ls. The driving electric field ED is an electric field caused by the control current flowing through the control signal line 5A.

The inductor Ids, the third capacitor Cc, the first capacitor Cd1, and the second capacitor Cd2 form a high-pass filter. Here, since the second capacitance C2 of the second capacitor Cd2 is sufficiently larger than the first capacitance C1 of the first capacitor Cd1, in this high-pass filter, the first capacitor Cd1 and the second capacitor Cd2 are , compared with the effect of the first capacitor Cd1, the effect of the second capacitor Cd2 accounts for most of the effect. The high-pass filter allows signals with frequencies sufficiently higher than the microwave band to pass to the outside of the control signal line 5A and the like. As mentioned above, the control signal of qubit 4 uses microwaves. The inductor Ids suppresses the leakage of the energy of the qubit 4 to the outside.

Here, the effect of the connection electrode 62 serving as the inductor Ids will be described. The control current supplied from the control signal line 5A is used as the control current I, the current component of the control current I flowing toward the third capacitor Cdc side is used as the current Ic, and the current flowing toward the inductor Ids side among the control current I is used as the current Ic. composition as the current IL. The magnitude of the control current I is taken as the magnitude i, the magnitude of the current Ic is taken as the magnitude iC, and the magnitude of the current IL is taken as the magnitude iL.

When the inductance Ls of the inductor Ids is infinite, the magnitude iL of the current IL becomes zero, and the magnitude iC of the current Ic becomes equal to the magnitude i of the control current I. When the LC resonator LCR is in resonance, the magnitude of the parallel impedance becomes zero. The current flowing in the LC resonator LCR is the current component flowing to the second capacitor Cd2 side among the current component flowing to the first capacitor Cd1 side and the current component flowing to the second capacitor Cd2 side of the current Ic. The magnitude of the current flowing in the LC resonator LCR is expressed as Equation (1).

[Mathematical formula 1]

When the inductance Ls becomes smaller, the magnitude iL of the current IL increases, and the magnitude iC of the current Ic decreases. Therefore, according to the above-mentioned equation (1), when the inductance Ls becomes small, the magnitude of the current flowing in the LC resonator LCR decreases. Here, the magnitude of the current I is to be controlled, and the magnitude i is expressed as in Equation (2).

[Mathematical formula 2]

When the second capacitance C2 is sufficiently larger than the third capacitance Cc, the magnitude of the current I is controlled by the equation (2), and the magnitude i is expressed as in the equation (3).

[Mathematical formula 3]

When the second capacitance C2 is sufficiently larger than the third capacitance Cc, the magnitude iC of the current Ic is represented by the equation (3) as in the equation (4).

[Mathematical formula 4]

Here, the relationship between the current Ic flowing in the third capacitor Cdc and the frequency ω of the control current I will be described with reference to FIG. 8 . FIG. 8 is a diagram showing an example of the relationship between the current Ic flowing in the third capacitor Cdc and the frequency ω of the control current I according to the present embodiment. The curve G1 shows the logarithm of the magnitude iC of the current Ic with respect to the logarithm of the frequency ω of the control current I. Here, the horizontal axis of the curve G1 is that the frequency ω of the control current I is normalized by the resonance frequency of the LC resonator of the inductor Ids and the third capacitor Cdc.

Here, the resonance frequency of the LC resonator LCR is represented by the formula (5).

[Mathematical formula 5]

The resonance frequency of the LC resonator LCR in the microwave band corresponds to the value included in the range X in the vicinity of the value of the coordinate of the horizontal axis of 0.1. Since the frequency ω of the control current I is in the microwave band, the inductor Ids functions as a high-pass filter that does not pass frequencies lower than the range X.

As described above, the circuit substrate 1 has a center at the position corresponding to the qubit, that is, the position in the second surface S2 corresponding to the position of the qubit 4 included in the first ground pattern GP1 formed on the first surface S1. The bottom electrode 60 , the ground electrode 13 on the lower surface of the substrate surrounding the center electrode 60 , and the connection electrode 62 connecting the center electrode 60 and the ground electrode 13 on the bottom surface of the substrate.

Here, a cross section of a portion of the qubit 4 of the superconducting composite quantum computing circuit QC will be described with reference to FIG. 9 . FIG. 9 is a diagram showing an example of a cross section of a portion of the qubit 4 of the superconducting composite quantum computing circuit QC according to the present embodiment. The control signal line 5A includes a contact spring pin 50A and a coaxial line dielectric portion 52A. The contact spring pin 50A includes a spring 51A inside, and pushes the circuit board 1 against the first ground electrode 2 by the elastic force of the spring 51A. The coaxial line dielectric portion 52A insulates the contact spring pin 50A from the second ground electrode 3 . The shape of the coaxial line dielectric body portion 52A is a cylindrical shape, and FIG. 9 shows the coaxial line line dielectric body portion 52A-1 and the coaxial line line dielectric body portion 52A-2 as the cross section of the coaxial line line dielectric body portion 52A. An example.

A conductive contact portion 14-1 is provided between the ground electrode 13-1 on the lower surface of the substrate and the second contact portion 31-1. A conductive contact portion 14-2 is provided between the ground electrode 13-2 on the lower surface of the substrate and the second contact portion 31-2. As described above, the conductive contact portion 14 - 1 and the conductive contact portion 14 - 2 are examples of the second extension portion 14 . In addition, superconducting micro-bumps may be provided instead of the conductive contact portion 14-1 and the conductive contact portion 14-2.

Here, the superconducting composite quantum computing circuit QC has a potential energy imparting member P (not shown) on the upper side of the first ground electrode 2 for pressing the first ground electrode 2 against the first surface S1 of the circuit board 1 . Here, the potential energy imparting member P pushes the first ground electrode 2 against the first surface S1 of the circuit board 1 in the opposite direction to the elastic force of the spring 51A. The potential energy imparting member P pushes the first ground electrode 2 against the first surface S1 of the circuit board 1 so that the first ground electrode 2 is in close contact with the circuit board 1 and the circuit board 1 is in close contact with the second ground electrode 3 . An example of the potential energy imparting member P is a leaf spring or a contact spring pin. With this configuration, the substrate lower surface ground electrode 13-1 and the substrate lower surface ground electrode 13-2 are in close contact with the second ground electrode 3, and these potentials are equalized with the potential of the ground portion GE. In this way, since the potential of the outer ring 41 passes through the second capacitor C2 and is substantially the same as that of the ground portion GE, the control signal to the qubit can be made to reach the qubit with almost no leakage and crosstalk. The inner disc 40 engages 42 with Josephson.

Returning to FIG. 1, the superconducting composite quantum computing circuit QC will be described next. The superconducting resonator 7 reads the state of the qubit 4 by interacting with the qubit 4 . The adjacent four superconducting resonators 7 - 1 to 7 - 4 are connected by the observation electrode 8 . As described above, the read state of the qubit 4 is taken out by the observation signal on the observation signal line 5B through the observation electrode 8 .

Here, the superconducting resonator 7 and the observation electrode 8 will be described with reference to FIGS. 10 and 11 . FIG. 10 is a diagram showing an example of the superconducting resonator 7 and the observation electrode 8 according to the present embodiment. An example of the superconducting resonator 7 has a meandering shape on the first surface S1. In addition, as long as the superconducting resonator 7 can function as a resonator, the shape of the superconducting resonator 7 may be any shape. For example, the superconducting resonator 7 may have a straight shape instead of a meandering shape, or may have a U-shaped curved shape instead of a meandering shape. The observation electrode 8 has the observation substrate through electrode 80 . The observation substrate through-electrode 80 has the same characteristics as the through-electrode 10 except that the position of the circuit board 1 is different.

FIG. 11 is a diagram showing an example of a cross section of a portion of the observation electrode 8 of the superconducting composite quantum computing circuit QC according to the present embodiment. The shape of the observation substrate through-electrode 80 is a cylindrical shape, and FIG. 11 shows the observation substrate through-electrode 80 - 1 and the observation substrate through-electrode 80 - 2 as an example of the cross section of the observation substrate through-electrode 80 .

The observation signal line 5B has a contact spring pin 50B and a coaxial line dielectric portion 52B. The contact spring pin 50B includes a spring 51B inside, and pushes the circuit board 1 against the first ground electrode 2 by the elastic force of the spring 51B. The coaxial line dielectric portion 52B insulates the contact spring pin 50B from the second ground electrode 3 . The shape of the coaxial dielectric portion 52B is cylindrical, and FIG. 11 shows the coaxial dielectric portion 52B-1 and the coaxial dielectric portion 52B-2 as the cross section of the coaxial dielectric portion 52B. An example.

In addition, although this embodiment describes the case where the control signal line 5 extends from the inside of the second non-contact portion 30 of the second ground electrode 3 to the second surface S2 of the substrate surface S from the lower side in the vertical direction. configuration, but not limited to this. The control signal line 5 may be arranged on the first surface S1 of the substrate surface S by extending from the inside of the first non-contact portion 20 of the first ground electrode 2 in the vertical direction from the upper side. That is, the control signal line 5 may be arranged at a position corresponding to the position of the qubit 4 included in the wiring pattern CP formed on the first surface S1, and arranged on the first non-contact portion 20 of the first ground electrode 2. internal.

When the control signal line 5 is arranged on the first surface S1 of the substrate surface S from the inside of the first non-contact portion 20 of the first ground electrode 2 and extending from the upper side in the vertical direction, the superconducting composite quantum computing The circuit QC may also not have the filter pattern 6 .

In addition, the control signal line 5 may also be provided for each qubit 4 and the observation electrode 8: from the inside of the second non-contact part 30 of the second ground electrode 3, from the second surface S2 opposite to the substrate surface S from the inside of the second non-contact part 30 of the second ground electrode 3 The case where the lower side extends vertically, and the case where the first surface S1 of the substrate surface S extends from the inside of the first non-contact portion 20 of the first ground electrode 2 and extends vertically from the upper side.

In addition, although this embodiment demonstrated the case where the potential energy imparting member P pushed the 1st ground electrode 2 to the 1st surface S1 of the circuit board 1, it is not limited to this. The potential energy imparting member P may push the second ground electrode 3 against the second surface S2 of the circuit board 1 . Also, the superconducting composite quantum computing circuit QC may have a potential energy imparting member that pushes the first ground electrode 2 against the first surface S1 of the circuit board 1 , and a member that pushes the second ground electrode 3 against the circuit board 1 . The two types of potential energy imparting members of the second surface S2 are potential energy imparting members.

As described above, the superconducting composite quantum computing circuit QC according to the present embodiment includes the circuit board 1 , the first ground electrode 2 , and the second ground electrode 3 . The circuit substrate 1 is formed on the substrate surface S with the wiring pattern CP of the circuit element including the qubit 4 and the observation electrode 8 for observing the state of the qubit 4, and the ground pattern GP which is a ground potential, and has The through-electrode 10 which connects the 1st ground pattern GP1 formed on the 1st surface S1 among the surface S, and the 2nd ground pattern GP2 formed on the 2nd surface S2 which is the opposite surface of the 1st surface S1 in the board|substrate. The first ground electrode 2 has a first contact portion 21 in contact with the first ground pattern GP1 formed on the first surface S1 of the circuit board 1, and a shape corresponding to the shape of the wiring pattern CP formed on the first surface S1. The first non-contact portion 20 . The second ground electrode 3 has a second contact portion 31 that is in contact with the second ground pattern GP2 formed on the second surface S2 of the circuit board 1 .

With this configuration, the superconducting composite quantum computing circuit QC related to the present embodiment can suppress the occurrence or expansion of an unnecessary electromagnetic mode (resonance phenomenon of electromagnetic waves) in the space above the qubit 4 or in the circuit substrate 1, Therefore, interaction or crosstalk between qubits can be suppressed.

In the superconducting composite quantum computing circuit QC, the first ground electrode 2 makes the space above the qubit 4 smaller than that in the case where the first ground electrode 2 is not provided. Unwanted electromagnetic modes may occur in the space above qubit 4. The superconducting composite quantum computing circuit QC can shift the mode frequency of the unwanted electromagnetic mode away from the frequency of the qubit 4. Also, the superconducting composite quantum computing circuit QC can suppress the wide-ranging crosstalk of the control signal of the qubit 4 by localizing the expansion of unwanted electromagnetic modes in the space above the qubit 4. The through electrode 10 can suppress the occurrence of unwanted electromagnetic modes in the circuit substrate 1 and suppress the crosstalk of the control signal between the qubits 4 in a wide range.

In addition, the superconducting composite quantum computing circuit QC related to the present embodiment further includes pressing the first ground electrode 2 against the first surface S1 of the circuit board 1 , or pressing the second ground electrode 3 against the circuit board 1 . The potential energy imparting member P of the second surface S2. Here, the first ground electrode 2 is in contact with the ground pattern GP through the first extension 12 formed by using a superconductor having a ductility higher than that of the ground pattern GP. The second ground electrode 3 is in contact with the ground pattern GP through the second extension 14 formed by using a superconductor having a ductility higher than that of the ground pattern GP.

With this configuration, the superconducting composite quantum computing circuit QC according to the present embodiment can connect the gap between the first ground electrode 2 and the ground pattern GP on the first surface S1 of the circuit board 1, or the second ground electrode. The gap between 3 and the ground pattern GP on the second surface S2 of the circuit board 1 is removed, so that the crosstalk between the control signals and the observation signals propagating on the adjacent control signal lines 5 can be suppressed.

In addition, in the superconducting composite quantum computing circuit QC related to the present embodiment, the qubit 4 includes a first electrode (in this example, the inner disk 40 ), and a first coupling capacitor (in this example, the inner disk 40 ) with the ground portion GE is the first capacitor C1); the second electrode (in this example, the outer ring 41) and the ground portion GE have a second coupling capacitance (here the One example is the second capacitor C2 ), which is connected to the first electrode (in this example, the inner disk 40 ) by the Josephson junction 42 .

With this configuration, the superconducting composite quantum computing circuit QC related to the present embodiment can be shielded by the outer ring 41 from the metal electrodes (in this example, the inner disk 40 and the outer ring 41 ) constituting the qubit 4 from propagating. Therefore, the error rate of qubit 4 can be suppressed. Here, the unwanted electromagnetic mode propagating through the metal electrodes (in this example, the inner disk 40 and the outer ring 41 ) constituting the qubit 4 remains, for example, even with the first ground electrode 2 , the through electrode 10 , and the like. The unwanted electromagnetic mode.

Conventionally, two metal electrodes forming qubits are symmetrical with respect to the ground electrode, or one side of the metal electrode is grounded. The symmetry of the two metal electrodes with respect to the ground electrode means: the coupling capacitance between one of the two metal electrodes and the ground electrode, and between the other metal electrode of the two metal electrodes and the ground electrode The coupling capacitances are equal. In addition, the grounding of the metal electrode on one side of the two metal electrodes forming the qubit means that the metal electrode on one side has the same function as the ground electrode. The superconducting composite quantum computing circuit QC related to this embodiment can eliminate the influence of potential fluctuations on the ground electrode surface by preventing the metal electrode on one side of the two metal electrodes forming the qubit from being short-circuited to the ground electrode. .

In addition, in the superconducting composite quantum computing circuit QC related to the present embodiment, the circuit board 1 is located at the position corresponding to the qubit, that is, on the second surface S2 and the first ground pattern GP1 formed on the first surface S1. The position corresponding to the position of the included qubit 4 has the center electrode 60, the surrounding electrodes (in this example, the ground electrode 13 on the lower surface of the substrate) surrounding the center electrode 60, and the center electrode 60 and the surrounding electrodes. The electrode (in this example, the connection electrode 62 connected to the ground electrode 13 on the lower surface of the substrate.

With this configuration, the superconducting composite quantum computing circuit QC related to this embodiment can suppress the energy of the qubit 4 caused by the interaction between the qubit 4 and the control signal line 5 when the control of the qubit 4 is turned off. In the case of leakage to the outside, the error rate of the calculation of the qubit 4 can be suppressed.

In addition, the superconducting composite quantum computing circuit QC related to the present embodiment further includes a control signal line 5 . The control signal line 5 is arranged inside the first non-contact portion 20 of the first ground electrode 2 at a position corresponding to the position of the qubit 4 included in the wiring pattern CP formed on the first surface S1, or, The position corresponding to the position corresponding to the qubit is arranged inside the second non-contact part of the second ground electrode 3, and the control signal is supplied to the qubit 4, the position corresponding to the qubit is the second surface S2 Among them, the position corresponds to the position of the qubit 4 included in the wiring pattern CP formed on the first surface S1.

With this configuration, the superconducting composite quantum computing circuit QC according to the present embodiment can secure a constant density of the wiring pattern CP on the substrate surface S of the circuit substrate 1 irrespective of the number of qubits 4, so that it is possible to suppress the density of the wiring pattern CP. The case where the density of the wiring pattern CP on the substrate surface S of the substrate 1 increases.

Conventionally, the control signal lines are introduced from the side of the substrate to control the qubits arranged on the two-dimensional plane on the surface of the substrate from the periphery of the substrate. In conventional circuits, the wiring density of the circuit increases with the number of qubits and reaches a limit sooner or later. On the other hand, the superconducting composite quantum computing circuit QC related to the present embodiment adopts a three-dimensional structure in which the control signal line 5 is arranged on the second surface S2 on the lower side or the first surface S1 on the upper side of the circuit board 1, thereby , regardless of the number of qubits 4 , a certain density of the wiring pattern CP can be ensured. Since the superconducting composite quantum computing circuit QC related to the present embodiment can ensure a certain density of the wiring pattern CP regardless of the number of qubits 4, it can ensure the scalability suitable for circuit scale.

In addition, in the superconducting composite quantum computing circuit QC related to the present embodiment, the frequency band of the control signal supplied from the control signal line 5 to the qubit 4 is the microwave frequency band.

Since the superconducting composite quantum computing circuit QC related to this embodiment can use microwave signals for control and observation, it can make the surface flowing on the ground electrode compared with the conventional control using RF (Radio Frequency). The current area is minimized and the fluctuation of the electrode potential is suppressed.

(Variation of metal electrodes constituting qubits) Although the above-mentioned embodiment describes the case where the inner disk 40 and the outer ring 41, which are the metal electrodes constituting the qubit 4, form concentric metal electrodes, the shape of the metal electrodes constituting the qubit 4 is not limited. in concentric circles. Here, a modified example of the shape of the metal electrode constituting the qubit 4 will be described with reference to FIGS. 12 to 18 . The modified example will be described focusing on the part different from the metal electrode ( FIG. 4 ) constituting the qubit 4 in the above-described embodiment.

FIG. 12 is a diagram showing an example of a qubit 4a related to a modification of the present embodiment. Qubit 4a has inner disk 40a, outer ring 41a, Josephson junction 42a, qubit hand 43a-1, qubit hand 43a-2. The outer ring 41a is different from the outer ring 41 (FIG. 4), is not closed, and has a gap 44a.

FIG. 13 is a diagram showing an example of a qubit 4b related to a modification of the present embodiment. Qubit 4b has inner disk 40b, outer ring 41b, Josephson junction 42b, qubit hand 43b-1, qubit hand 43b-2. The outer ring 41b is different from the outer ring 41 (FIG. 4), is not closed, and has a gap 44b. The outer ring 41b is different from the outer ring 41a (FIG. 12) and is not directly connected to the qubit hand 43b.

The outer ring 41b has a convex portion 45b-1 and a convex portion 45b-2. The qubit hand 43b-1 has a front end 46b-1, and the qubit hand 43b-2 has a front end 46b-2. The convex portion 45b-1 and the convex portion 45b-2 are concave portions formed corresponding to the shapes of the front end portion 46b-1 and the front end portion 46b-2.

FIG. 14 is a diagram showing an example of a qubit 4c related to a modification of the present embodiment. The qubit 4c has a first rectangle 40c, a second rectangle 41c, a Josephson junction 42c, a qubit hand 43c-1, and a qubit hand 43c-2. The first rectangle 40c and the second rectangle 41c are connected by a Josephson junction 42c. The distance between the first rectangle 40c and the ground electrode 11c-6 on the upper surface of the substrate is large enough to make the value of the first capacitance C1 sufficiently smaller than that of the second capacitance C2. In FIG. 14 , as an example, the area of the first rectangle 40c is reduced to increase the distance between the first rectangle 40c and the ground electrode 11c-6 on the upper surface of the substrate. The length of the side of the second rectangle 41c facing the first rectangle 40c is longer than the length of the side of the first rectangle 40c facing the second rectangle 41c. The qubit hand 43c-1 and the qubit hand 43c-2 are not directly connected to the second rectangle 41c.

The shapes of the substrate upper surface ground electrode 11c-5 and the substrate upper surface ground electrode 11c-6, and the substrate upper surface ground electrode 11-5 (Fig. 4) and the substrate upper surface ground electrode 11-6 (Fig. The shape of the first rectangle 40c is different from the shape of the second rectangle 41c.

FIG. 15 is a diagram showing an example of a qubit 4d related to a modification of the present embodiment. The qubit 4d has a first rectangle 40d, a second rectangle 41d, a Josephson junction 42d, a qubit hand 43d-1, and a qubit hand 43d-2. The distance between the first rectangle 40d and the ground electrode 11d-6 on the upper surface of the substrate is large enough to make the value of the first capacitance C1 sufficiently smaller than that of the second capacitance C2. In FIG. 15 , as an example, the area of the first rectangle 40d is reduced, and the distance between the first rectangle 40d and the ground electrode 11d-6 on the upper surface of the substrate is increased. In the example shown in FIG. 15, the length of the side of the second rectangle 41d facing the first rectangle 40d is equal to the length of the side of the first rectangle 40d facing the second rectangle 41d. In addition, the length of the side of the second rectangle 41d facing the first rectangle 40d and the length of the side of the first rectangle 40d facing the second rectangle 41d may also be the same as the first rectangle 40c and the second rectangle 41d shown in FIG. 14 . 2 rectangles 41c are generally unequal. The qubit hand 43d-1 has a curved front end 46d-1, and the qubit hand 43d-2 has a curved front end 46d-2. The ground electrode 11d-5 on the upper surface of the substrate has a convex portion 110d. The front end portion 46d-1, the front end portion 46d-2, and the convex portion 110d face the second rectangle 41d. In the qubit 4d of FIG. 15, since the front end portion 46d-1, the front end portion 46d-2, and the convex portion 110d are present, it is different from the case where the front end portion 46d-1, the front end portion 46d-2, and the convex portion 110d are not provided. ratio, the second capacitor C2 becomes larger.

FIG. 16 is a diagram showing an example of a qubit 4e related to a modification of the present embodiment. The qubit 4e has a first rectangle 40e, a cross 41e, and a Josephson junction 42e. The cross portion 43e-1 and the cross portion 43e-2 are part of a cross showing a qubit adjacent to the qubit 4e, respectively. The first rectangle 40e and the cross 41e are connected by a Josephson junction 42e. The shape of the substrate upper surface ground electrode 11e-5 and the substrate upper surface ground electrode 11e-6, and the shape of the substrate upper surface ground electrode 11-5 (FIG. 4) and the substrate upper surface ground electrode 11-6 (FIG. 4) are It differs depending on the shape of the first rectangle 40e and the cross 41e.

FIG. 17 is a diagram showing an example of a qubit 4f related to a modification of the present embodiment. The qubit 4f has a first rectangle 40f, a cross 41f, and a Josephson junction 42f. The cross portion 43f-1 and the cross portion 43f-2 are a part of a cross showing a qubit adjacent to the qubit 4f, respectively. The difference between the qubit 4f ( FIG. 17 ) and the qubit 4e ( FIG. 16 ) is that the distance between the first rectangle 40f ( FIG. 17 ) and the ground electrode 11f - 2 ( FIG. 17 ) on the upper surface of the substrate is larger than that of the first rectangle 40f ( FIG. 17 ) The distance between 40e (FIG. 16) and the ground electrode 11e-2 (FIG. 16) on the upper surface of the substrate is still larger. In this example, the shape of the portion of the ground electrode 11f-2 (FIG. 17) facing the cross 41f (FIG. 17) and the first rectangle 40f (FIG. 17) is a curved line, and the top surface of the board is grounded The shape of the portion of the electrode 11e-2 (FIG. 16) facing the cross 41e (FIG. 16) and the first rectangle 40e (FIG. 16) is a straight line, so the first rectangle 40f (FIG. 17) is connected to the ground electrode on the upper surface of the substrate The distance of 11f-2 (Fig. 17) is larger. In the qubit 4f (FIG. 17), since the distance between the first rectangle 40f (FIG. 17) and the ground electrode 11f-2 (FIG. 17) on the upper surface of the substrate is large, compared with the qubit 4e (FIG. 16), the 1 Capacitor C1 is small.

FIG. 18 is a diagram showing an example of a qubit 4g related to a modification of the present embodiment. The qubit 4g has a first electrode 40g, a second electrode 41g, a Josephson junction 42g, a qubit hand 43g-1, and a qubit hand 43g-2. The first electrode 40g and the second electrode 41g are connected by the Josephson junction 42g. The first electrode 40g and the second electrode 41g each have a comb-shaped shape and face each other, thereby forming a comb-shaped electrode. In the example shown in FIG. 18 , the first electrode 40g has two protrusions, and the second electrode 41g has three protrusions. The distance between the first electrode 40g and the ground electrode 11g-6 on the upper surface of the substrate is large enough to make the value of the first capacitance C1 sufficiently smaller than that of the second capacitance C2. In FIG. 18, as an example, the area of the 1st electrode 40g is made small, and the distance of the 1st electrode 40g and the board|substrate upper surface ground electrode 11g-6 is made large.

In the above modification, the inner disk 40a, the inner disk 40b, the first rectangle 40c, the first rectangle 40d, the first rectangle 40e, the first rectangle 40f, and the first electrode 40g are examples of the first electrodes. The outer ring 41a, the outer ring 41b, the second rectangle 41c, the second rectangle 41d, the cross 41e, the cross 41f, and the second electrode 41g are examples of the second electrode.

The coupling capacitance between the second electrode and the ground portion GE is larger than the coupling capacitance between the first electrode and the ground portion GE. Compared with the case where the coupling capacitance between the second electrode and the ground portion GE is not larger than the coupling capacitance between the first electrode and the ground portion GE, the potential difference between the first electrode and the second electrode is less likely to be caused by unnecessary The effect of the change in the potential caused by the radiated electric field E.

(Variation of filter pattern) In the above-described embodiment, the case where the filter pattern 6 is connected to the central electrode 60 and the ground electrode 13 under the substrate by the four connection electrodes 62 is described, but the present invention is not limited to this. Here, a modification of the filter pattern 6 will be described with reference to FIGS. 19 to 21 . The modified example will be described centering on the part different from the filter pattern 6 ( FIG. 6 ) of the above-described embodiment.

FIG. 19 is a diagram showing an example of the filter pattern 6a related to the present embodiment. The filter pattern 6a has the center part electrode 60a and the connection electrode 62a. The center portion electrode 60a is surrounded by the substrate lower surface ground electrode 13a with the gap portion 61a interposed therebetween. The center part electrode 60a and the board|substrate lower surface ground electrode 13a are connected by one connection electrode 62a. In addition, the number of the connection electrodes 62 is not limited to the case of 4 described in FIG. 6 and the case of 1 described in FIG. 19 , and may be 2, 3, or 5 or more.

FIG. 20 is a diagram showing an example of the filter pattern 6b according to the present embodiment. The filter pattern 6b has the center part electrode 60b and the connection electrode 62b. The center portion electrode 60b is surrounded by the substrate lower surface ground electrode 13b with the gap portion 61b interposed therebetween. The center portion electrode 60b and the substrate lower surface ground electrode 13b are connected through the connection electrode 62b. In the filter pattern 6b, the center part electrode 60b and the connection electrode 62b are integrated. As an example, the center electrode 60b and the connection electrode 62b have a curved outline. The width of the connection electrode 62b (FIG. 20) becomes narrower from the center electrode 60b toward the ground electrode 13b below the substrate. In addition, the number of the connection electrodes 62b is not limited to the one described in FIG. 20, and may be two or more.

FIG. 21 is a diagram showing an example of the filter pattern 6c according to the present embodiment. The filter pattern 6c has the center part electrode 60c, the connection electrode 62c-1, and the connection electrode 62c-2. The center portion electrode 60c is surrounded by the lower substrate ground electrode 13c with the gap portion 61b-1 and the gap portion 61b-2 interposed therebetween. The center part electrode 60c and the board|substrate lower surface ground electrode 13c are connected through the connection electrode 62c-1 and the connection electrode 62c-2. The shape of the center electrode 60c is a rectangle. In addition, the number of the connection electrodes 62c-1 and the connection electrodes 62c-2 is not limited to the case of the two described in FIG. 21, and may be one or three or more.

Although one embodiment of the present invention has been described in detail above with reference to the drawings, the specific configuration is not limited to the above, and various design changes and the like can be made without departing from the gist of the present invention.

1: circuit board 2: 1st ground electrode 3: 2nd ground electrode 4,4-1~4-6,4a,4b,4c,4d,4e,4f,4g: qubits 4C: 1st Equivalent Circuit 4Ca: 2nd Equivalent Circuit 5: Control signal line 5A: control signal line 5B: Signal line for observation 6, 6a, 6b, 6c: filter pattern 7,7-1~7-4: Superconducting resonator 8: Observation electrode 9,9-1~9-4,Cdq: capacitor 10,10-1~10-2: Through electrode 11,11-1~11-6,11a-5~11a-6,11b-5~11b-6,11c-5~11c-6,11d-5~11d-6,11e-2,11e-5~ 11e-6, 11f-2, 11f-5~11f-6, 11g-5~11g-6: Ground electrode on the upper surface of the substrate 12: Extension 1 12-1: Superconducting microbumps on the upper surface 13, 13-1, 13-2, 13a, 13b, 13c: Ground electrodes under the substrate 14: Extension 2 14-1, 14-2: Conductive Contacts 20, 20-1~20-6: 1st non-contact part 21, 21-1~21-12: The first contact part 30, 30-1~30-2: 2nd non-contact part 31, 31-1, 31-2: 2nd contact part 40, 40a, 40b: inner disc 40c, 40d, 40e, 40f: 1st rectangle 40g: 1st electrode 41, 41a, 41b: outer ring 41c, 41d: 2nd rectangle 41e, 41f: Cross 41g: 2nd electrode 42, 42a, 42b, 42c, 42d, 42e, 42f, 42g: Josephson engagement 43,43-1~43-4,43a-1~43a-2,43b,43b-1~43b-2,43c-1~43c-2,43d-1~43d-2,43g-1~43g- 2: qubit hand 43e-1~43e-2, 43f-1~43f-2: Cross section 44a, 44b: Clearance 45: Ground electrode under the substrate 45b-1~45b-2, 110d: convex part 46: Trench 46b-1~46b-2, 46d-1~46d-2: Front end 50: Contact Pin 50A, 50B: Contact spring pins 51A, 51B: Spring 52A, 52A-1, 52A-2, 52B, 52B-1, 52B-2: Coaxial line dielectric body 60, 60a, 60b, 60c: center electrode 61, 61-1~61-4, 61a, 61b, 61b-1~61b-2, 61c-1: Clearance 62, 62-1~62-4, 62a, 62b, 62c-1~62c-2: connecting electrodes 80, 80-1, 80-2: Observation of substrate through electrodes C1: 1st capacitor C2: 2nd capacitor Cc: 3rd capacitor Cq: Capacitance CP: Wiring pattern Cd1: 1st capacitor Cd2: 2nd capacitor Cdc: 3rd capacitor E, E1, E2: Unwanted radiated electric field ED: Driving Electric Field G1: Curve GE: Ground GP: Ground Pattern GP1: 1st ground pattern GP2: 2nd ground pattern I: control current Ic,IL: current i,iC,iL: the magnitude of the current Ids: Inductors LCR:LC Resonator Ls: Inductance P: Give Potential Energy Component QC: Superconducting Composite Quantum Computing Circuit S: Substrate surface S1: Side 1 S2: Side 2 X, X1, X2: area for observation Y, Y1, Y2: Clearance ground area

FIG. 1 is a diagram showing an example of the configuration of a superconducting composite quantum computing circuit according to an embodiment of the present invention. Fig. 2 is a top view of an observation area on the surface of the substrate according to the embodiment of the present invention. 3 is a diagram showing an example of a first non-contact portion and a first contact portion according to the embodiment of the present invention. FIG. 4 is a diagram showing an example of a qubit related to the embodiment of the present invention. FIG. 5 is a diagram showing an example of a first equivalent circuit according to the embodiment of the present invention. FIG. 6 is a diagram showing an example of a filter pattern according to an embodiment of the present invention. FIG. 7 is a diagram showing an example of a second equivalent circuit according to the embodiment of the present invention. 8 is a diagram showing an example of the relationship between the current flowing in the third capacitor and the frequency of the control current according to the embodiment of the present invention. 9 is a diagram showing an example of a cross section of a portion of a qubit of a superconducting composite quantum computing circuit according to an embodiment of the present invention. FIG. 10 is a diagram showing an example of a superconducting resonator and an observation electrode according to an embodiment of the present invention. FIG. 11 is a diagram showing an example of a cross section of a portion of the observation electrode of the superconducting composite quantum computing circuit according to the embodiment of the present invention. FIG. 12 is a diagram showing an example of a qubit related to a modification of the present invention. FIG. 13 is a diagram showing an example of a qubit related to a modification of the present invention. FIG. 14 is a diagram showing an example of a qubit related to a modification of the present invention. FIG. 15 is a diagram showing an example of a qubit related to a modification of the present invention. FIG. 16 is a diagram showing an example of a qubit related to a modification of the present invention. FIG. 17 is a diagram showing an example of a qubit related to a modification of the present invention. FIG. 18 is a diagram showing an example of a qubit related to a modification of the present invention. FIG. 19 is a diagram showing an example of a filter pattern related to a modification of the present invention. FIG. 20 is a diagram showing an example of a filter pattern related to a modification of the present invention. FIG. 21 is a diagram showing an example of a filter pattern related to a modification of the present invention.

1: circuit board

2: 1st ground electrode

3: 2nd ground electrode

4-1~4-6: Qubits

5A: control signal line

5B: Signal line for observation

6: Filter Pattern

7-1~7-4: Superconducting Resonator

8: Observation electrode

9-1~9-4: Capacitors

10-1~10-2: Through electrode

11-1~11-4: Ground electrode on the top of the substrate

12-1: Superconducting microbumps on top

20-1~20-2: 1st non-contact part

21-1~21-3: The first contact part

30-1~30-2: 2nd non-contact part

31: 2nd contact part

QC: Superconducting Composite Quantum Computing Circuit

S: Substrate surface

X1, X2: area for observation

Y1, Y2: Clearance ground area

Claims (5)

A superconducting composite quantum computing circuit, comprising a circuit substrate, the circuit substrate having a wiring pattern of circuit elements including qubits and observation electrodes for observing the state of the qubits formed on the substrate surface, and a ground potential, that is, a ground pattern, Furthermore, a through electrode is provided, and the through electrode connects the ground pattern formed on the first surface on the surface of the substrate and the ground pattern formed on the second surface, which is the opposite surface of the first surface, inside the substrate. The superconducting composite quantum computing circuit supplies a control signal from a direction perpendicular to the second surface at the position of the second surface corresponding to the position of the qubit included in the wiring pattern formed on the first surface Wire. The superconducting composite quantum computing circuit of claim 1, wherein the qubits comprise: a first electrode having a first coupling capacitance with the ground portion; and a second electrode having a larger coupling capacitance with the ground portion than the first coupling capacitance The second coupling capacitor is connected to the first electrode by Josephson junction. The superconducting composite quantum computing circuit according to claim 1, comprising a center electrode at a position on the second surface corresponding to the position of the qubit included in the wiring pattern formed on the first surface, and the A peripheral electrode surrounding the center electrode, and a connecting electrode connecting the center electrode and the peripheral electrode. The superconducting composite quantum computing circuit according to any one of claims 1 to 3, wherein the wiring pattern formed on the first surface is Above, a single superconducting resonator is provided for each of the aforementioned qubits, and the aforementioned observation electrode is connected to a plurality of the aforementioned qubits through the aforementioned superconducting resonator. The superconducting composite quantum computing circuit according to claim 4, wherein the observation electrode penetrates the circuit substrate and is pushed by the observation signal line on the second surface, and the observation signal line is perpendicular to the second surface. The direction is supplied and the front end is provided with a contact spring pin.

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