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TWI767311B - 運算放大器及信號放大方法 - Google Patents

運算放大器及信號放大方法 Download PDF

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TWI767311B
TWI767311B TW109129889A TW109129889A TWI767311B TW I767311 B TWI767311 B TW I767311B TW 109129889 A TW109129889 A TW 109129889A TW 109129889 A TW109129889 A TW 109129889A TW I767311 B TWI767311 B TW I767311B
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voltage
bias voltage
signal
input
current source
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TW202112060A (zh
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林育弘
陳冠達
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聯發科技股份有限公司
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Abstract

本發明提供了一種運算放大器及信號放大方法。該運算放大器包括單級放大器和電流控制器。單級放大器被佈置為接收輸入信號並放大輸入信號以生成輸出信號，其中，單級放大器包括回應於偏置電壓輸入而操作的壓控電流源電路。電流控制器耦接至壓控電流源電路，電流控制器接收輸入信號，並根據輸入信號生成偏置電壓輸入。根據本發明的運算放大器及信號放大方法，可以實現放大器的增強的迴轉率，從而改善放大器的輸出。

Description

運算放大器及信號放大方法
本發明涉及放大輸入信號以生成輸出信號，並且更具體地，涉及使用具有迴轉率增強(slew-rate enhancement)(例如，AB類迴轉率增強)的單級(single-stage)放大器的運算放大器及其相關方法。
應當理解，一般而言，最有效的運算放大器類型是具有單個極點(single pole)的單級放大器。單級放大器可以輕鬆實現高頻寬和低雜訊。但是，單級放大器在迴轉率(slew rate)方面受限。運算放大器的迴轉率表示電路中在任何一點處信號的最大變化率。換句話說，迴轉率方面的限制會導致非線性效應，如果放大器輸入信號的頻率超過運算放大器的迴轉率極限，則非線性效應將使得放大器的輸出嚴重失真。
有鑑於此，本發明提供了一種使用具有迴轉率增強(slew-rate enhancement)(例如，AB類迴轉率增強)的單級放大器的運算放大器及其相關方法。
根據本發明的第一方面，公開了一種運算放大器，其包括單級放大器和電流控制器。單級放大器被佈置為接收輸入信號並放大所述輸入信號以生成輸出信號，其中，所述單級放大器包括回應於偏置電壓輸入而操作的壓控電 流源電路。電流控制器耦接至所述壓控電流源電路，其中所述電流控制器接收所述輸入信號，並根據所述輸入信號生成所述偏置電壓輸入。
根據本發明的第二方面，公開了一種示例性信號放大方法。該示例性信號放大方法包括：根據輸入信號生成偏置電壓輸入；以及通過單級放大器對所述輸入信號進行放大以生成輸出信號，其中，所述單級放大器包括回應於所述偏置電壓輸入而操作的壓控電流源電路。
根據本發明的運算放大器及信號放大方法，可以實現放大器的增強的迴轉率，從而改善放大器的輸出。
在閱讀了在各個附圖和附圖中示出的優選實施例的以下詳細描述之後，本發明的這些和其他目的無疑對於本領域習知技藝者將變得顯而易見。
100:運算放大器
102:單級放大器
104:電流控制器
106:共模回饋電路
200:伸縮式放大器
202:壓控電流源
204:頂部電流源
206:尾部電流源
300:電流控制器
800:共模回饋電路
附圖被包括進來以提供對本發明的進一步理解，附圖被結合在本說明書中並構成本說明書的一部分。附圖示出了本發明的實施例，並且與說明書一起用於解釋本發明的原理。在附圖中：
第1圖是示出根據本發明實施例的運算放大器的示意圖。
第2圖是示出根據本發明實施例的伸縮式放大器的示意圖。
第3圖是示出根據本發明實施例的電流控制器的示意圖。
第4圖是示出在正信號IN+的電壓位準低於負信號IN-的電壓位準的情況下操作的電流控制器的示意圖。
第5圖是示出在正信號IN+的電壓位準低於負信號IN-的電壓位準的情況下操作的伸縮式放大器的示意圖。
第6圖是示出在正信號IN+的電壓位準高於負信號IN-的電壓位準的情況下操作 的電流控制器的示意圖。
第7圖是示出在正信號IN+的電壓位準高於負信號IN-的電壓位準的情況下操作的伸縮式放大器的示意圖。
第8圖是示出根據本發明實施例的共模回饋電路的示意圖。
在說明書及申請專利範圍當中使用了某些詞彙來指稱特定的元件。本領域習知技藝者應可理解，電子設備製造商可以會用不同的名詞來稱呼同一元件。本說明書及申請專利範圍並不以名稱的差異來作為區別元件的方式，而是以元件在功能上的差異來作為區別的基準。在通篇說明書及申請專利範圍當中所提及的“包括”是開放式的用語，故應解釋成“包括但不限定於”。此外，“耦接”一詞在此是包含任何直接及間接的電氣連接手段。因此，若文中描述第一裝置電性連接於第二裝置，則代表該第一裝置可直接連接於該第二裝置，或通過其他裝置或連接手段間接地連接至該第二裝置。
第1圖是示出根據本發明實施例的運算放大器的示意圖。運算放大器100包括單級放大器102、電流控制器104和共模回饋電路(common-mode feedback circuit，CMFB)106。共模回饋電路106可以是可選的。例如，當單級放大器102是單端放大器時，可以省略共模回饋電路106。為了更好地理解本發明的技術特徵，以下假設單級放大器102是全差動(fully differential)放大器。
單級放大器102被佈置為接收輸入信號並放大該輸入信號以產生輸出信號。例如，單級放大器102是差動放大器，使得輸入信號是由正信號IN+和負信號IN-組成的差動信號，而輸出信號是由正信號OUT+和負信號OUT-組成的差動信號。在本發明的一些實施例中，單級放大器102可以由伸縮式放大器(telescopic amplifier)實現。
第2圖是示出根據本發明實施例的伸縮式放大器的示意圖。第1圖所示的單級放大器102可以由第2圖所示的伸縮式放大器200實現。如第2圖所示，伸縮式放大器200包括P溝道金屬氧化物半導體(P-channel metal-oxide semiconductor，PMOS)電晶體MP1、MP2、MP3、MP4、MP5、MP6和N溝道金屬氧化物半導體(N-channel metal-oxide semiconductor，NMOS)電晶體MN1、MN2、MN3、MN4、MN5、MN6。PMOS電晶體MP1、MP3、MP5以及NMOS電晶體MN1、MN3、MN5級聯在兩個參考電壓之間，兩個參考電壓包括電源電壓VDD和地電壓GND，其中VDD>GND。另外，PMOS電晶體MP2、MP4、MP6和NMOS電晶體MN2、MN4、MN6級聯在包括電源電壓VDD和地電壓GND的兩個參考電壓之間。
PMOS電晶體MP1的源極節點被佈置為接收一個參考電壓(例如，電源電壓VDD)，PMOS電晶體MP1的閘極節點被佈置為接收偏置電壓VTP1。PMOS電晶體MP2的源極節點被佈置為接收一個參考電壓(例如，電源電壓VDD)，PMOS電晶體MP2的閘極節點被佈置為接收偏置電壓VTP2。NMOS電晶體MN1的源極節點被佈置為接收另一參考電壓(例如，地電壓GND)，NMOS電晶體MN1的閘極節點被佈置為接收偏置電壓VTN1。NMOS電晶體MN2的源極節點被佈置為接收另一參考電壓(例如，地電壓GND)，並且NMOS電晶體MN2的閘極節點被佈置為接收偏置電壓VTN2。
PMOS電晶體MP3的閘極節點被佈置為接收正信號P+(P+=IN+)，PMOS電晶體MP4的閘極節點被佈置為接收負信號P-(P-=IN-)，其中正信號P+和負信號P-形成一個差動信號。另外，NMOS電晶體MN3的閘極節點被佈置為接收正信號N+(N+=IN+)，並且NMOS電晶體MN4的閘極節點被佈置為接收負信號N-(N-=IN-)，其中正信號N+和負信號N-形成一個差動信號。如第1圖所示，正信號P+和N+分別通過耦合電容器C1和C2從相同的正信號IN+得到，而負 信號P-和N-通過耦合電容器C3和C4分別從相同的負信號IN-得到。理想地，耦合電容器C1-C4可以是相同的電容器。
PMOS電晶體MP5的閘極節點和NMOS電晶體MN5的閘極節點被佈置為分別接收偏置電壓Vbp1和Vbn1，PMOS電晶體MP5的汲極節點和NMOS電晶體MN5的汲極節點都耦接到差動放大器輸出的負信號OUT-。另外，PMOS電晶體MP6的閘極節點和NMOS電晶體MN6的閘極節點被佈置為分別接收偏置電壓Vbp2和Vbn2，PMOS電晶體MP6的汲極節點和NMOS電晶體MN6的汲極節點都耦接到差動放大器輸出的正信號OUT+。
伸縮式放大器200具有壓控電流源202，其中壓控電流源202包括頂部(top)電流源204和尾部(tail)電流源206。壓控電流源202回應於偏置電壓輸入(bias voltage input)而工作，偏置電壓包括VTP1、VTP2、VTN1和VTN2，其中頂部電流源204由偏置電壓VTP1和VTP2控制，尾部電流源206由偏置電壓VTN1和VTN2控制。在該實施例中，第1圖中所示的電流控制器104耦接到壓控電流源電路202，並且被佈置為接收輸入信號(該輸入信號包括正信號IN+和負信號IN-，其中IN+=P+=N+並且IN-=P-=N-)，並且根據該輸入信號(包括正信號IN+和負信號IN-，其中IN+=P+=N+和IN-=P-=N-)生成偏置電壓輸入(包括偏置電壓VTP1、VTP2、VTN1和VTN2)。因此，偏置電壓輸入{VTP1，VTP2，VTN1，VTN2}是不固定的，並且回應於輸入信號{IN+，IN-}而被動態地調整。
第3圖是示出根據本發明實施例的電流控制器的示意圖。第1圖所示的電流控制器104可以通過電流控制器300來實現。通過電流控制器300動態調整的偏置電壓輸入，能夠為作為單級放大器的伸縮式放大器200的壓控電流源電路202實現AB類迴轉率增強。
請結合第5圖來參考第4圖。第4圖是示出在正信號IN+的電壓位準低於負信號IN-的電壓位準的情況下操作的電流控制器300的示意圖。第5圖是示出 在正信號IN+的電壓位準低於負信號IN-的電壓位準的情況下操作的伸縮式放大器200的示意圖。假設第1圖中所示的單級放大器102由第2圖所示的伸縮式放大器200實現，第1圖所示的電流控制器104由第3圖所示的電流控制器300實現。
當正信號IN+的電壓位準變得低於負信號IN-的電壓位準時，正信號P+的電壓位準和正信號N+的電壓位準降低，並且負信號P-的電壓位準和負信號N-的電壓位準增加。因此，由於IN+=P+=N+，第4圖中所示的PMOS電晶體MP7的閘極節點處的電壓降低以及第4圖所示的NMOS電晶體MN7的閘極節點處的電壓也降低，並且由於IN-=P-=N-，第4圖中所示的PMOS電晶體MP8的閘極節點處的電壓增加以及第4圖所示的NMOS電晶體MN8的閘極節點處的電壓也增加。流過PMOS電晶體MP7的電流增加，而PMOS電晶體MP8截止(turned off)。另外，流過NMOS電晶體MN8的電流增加，而NMOS電晶體MN7截止。因此，偏置電壓VTP1和VTN1被上推(pushed up)，偏置電壓VTP2和VTN2被下拉(pulled down)。簡而言之，當正信號IN+的電壓位準低於負信號IN-的電壓位準時，電流控制器300被佈置為增加偏置電壓VTP1和VTN1並且降低偏置電壓VTP2和VTN2。注意，這裡提供的電流控制器300的具體結構並非是對本發明的限制，只要能夠實現如上功能，本領域習知技藝者可以採用任何適合的電路結構或者可以對第3圖或第4圖所示的電流控制器進行任意適當的變更或修改。
如第5圖所示，由於偏置電壓VTP1的增加，PMOS電晶體MP1可以截止；由於負信號P-的電壓的增加，PMOS電晶體MP4可以截止；由於正信號N+的電壓的降低，NMOS電晶體MN3可以截止；由於偏置電壓VTN2的降低，NMOS電晶體MN2可以截止。由於在PMOS電晶體MP2的閘極節點處的偏置電壓VTP2降低以及在PMOS電晶體MP3的閘極節點處的正信號P+的電壓降低，因此負信號OUT-的輸出節點可以從電源電壓VDD汲取(drain)大電流IP1。另外，由於在NMOS電晶體MN1的閘極節點處的偏置電壓VTN1的增加以及在NMOS電晶體 MN4的閘極節點處的負信號N-的電壓的增加，可以從正信號OUT+的輸出節點處汲取大電流IN1至地電壓GND。偏置電壓VTP1、VTP2、VTN1和VTN2不是固定的，而是由電流控制器300動態調整的。借助電流控制器300，可以提供大電流IP1和IN1以增強在正信號IN+的電壓位準低於負信號IN-的電壓位準的情況下伸縮式放大器200的迴轉率。
請結合第7圖參考第6圖，第6圖是示出在正信號IN+的電壓位準高於負信號IN-的電壓位準的情況下操作的電流控制器300的示意圖。第7圖是示出在正信號IN+的電壓位準高於負信號IN-的電壓位準的情況下操作的伸縮式放大器200的示意圖。假設第1圖所示的單級放大器102由第2圖所示的伸縮式放大器200實現，第1圖所示的電流控制器104由第3圖所示的電流控制器300實現。當正信號IN+的電壓位準變得高於負信號IN-的電壓位準時，正信號P+的電壓位準和正信號N+的電壓位準增加，並且負信號P-的電壓位準和負信號N-的電壓位準減小。因此，由於IN+=P+=N+，第6圖所示的PMOS電晶體MP7的閘極節點處的電壓增加並且第6圖所示的NMOS電晶體MN7的閘極節點處的電壓增加；並且由於IN-=P-=N-，第6圖所示的PMOS電晶體MP8的閘極節點處的電壓降低以及第6圖所示的NMOS電晶體MN8的閘極節點處的電壓降低。流過PMOS電晶體MP8的電流增加，而PMOS電晶體MP7可以截止。另外，流過NMOS電晶體MN7的電流增加，而NMOS電晶體MN8可以截止。因此，偏置電壓VTP1和VTN1被下拉，而偏置電壓VTP2和VTN2被上推。簡而言之，當正信號IN+的電壓位準高於負信號IN-的電壓位準時，電流控制器300被佈置為減小偏置電壓VTP1和VTN1並增大偏置電壓VTP2和VTN2。注意，這裡提供的電流控制器300的具體結構並非是對本發明的限制，只要能夠實現如上功能，本領域習知技藝者可以採用任何適合的電路結構或者可以對第3圖或第6圖所示的電流控制器進行任意適當的變更或修改。
如第7圖所示，由於偏置電壓VTP2的增加，PMOS電晶體MP2可以截止；由於正信號P+的電壓增加，PMOS電晶體MP3可以截止；由於負信號N-的電壓降低，NMOS電晶體MN4可以截止；由於偏置電壓VTN1降低，NMOS電晶體MN1可以截止。由於在PMOS電晶體MP1的閘極節點處的偏置電壓VTP1減小和在PMOS電晶體MP4的閘極節點處的負信號P-的電壓減小，正信號OUT+的輸出節點可以從電源電壓VDD汲取大電流IP2。另外，由於在NMOS電晶體MN2的閘極節點處的偏置電壓VTN2增加和在NMOS電晶體MN3的閘極節點處的正信號N+的電壓增加，可以從負信號OUT-的輸出節點汲取大電流IN2至地電壓GND。偏置電壓VTP1、VTP2、VTN1和VTN2不是固定的，而是由電流控制器300動態調整的。借助電流控制器300，可以提供大電流IP2和IN2以增強在正信號IN+的電壓位準高於負信號IN-的電壓位準的情況下伸縮式放大器200的迴轉率。
在該實施例中，第2圖中所示的PMOS電晶體MP1、MP2和NMOS電晶體MN1、MN2經由第3圖所示的電流控制器300的浮置閘極(floating gate)電流源來偏置。如第5圖和第7圖所示，AB類控制包括PMOS電晶體MP3、MP4和NMOS電晶體MN3、MN4，並且回應於輸入信號{IN+=P+=N+，IN-=P-=N-}而操作。如第4圖和第6圖所示，浮置閘極電流源包括PMOS電晶體MP7、MP8和NMOS電晶體MN7、MN8，並且回應於輸入信號{IN+=P+=N+，IN-=P-=N-}而操作。浮置閘極電流源具有與AB類控制相同的結構和相同的電源電壓依賴性，導致PMOS電晶體MP1、MP2和NMOS電晶體MN1、MN2的靜態電流與電源電壓無關。
當由全差動放大器實現單級放大器102時，可以採用共模回饋電路106來最小化由單級放大器102產生的差動輸出{OUT+，OUT-}的共模電壓的偏移。第8圖是示出根據本發明實施例的共模回饋電路的示意圖。第1圖所示的共模回饋電路106可以由共模回饋電路800來實現。共模回饋電路800被佈置為監視 正信號OUT+和負信號OUT-的共模電壓，並將該共模電壓與參考電壓VCM比較以產生回饋控制電壓VFBP。例如，參考電壓VCM可以等於電源電壓VDD的一半。考慮到電流控制器104由第3圖所示的電流控制器300實現的情況，電流控制器300包括PMOS電晶體MP9，並且PMOS電晶體MP9的閘極節點被佈置為接收從共模回饋電路800產生的回饋控制電壓VFBP。換句話說，電流控制器300進一步被佈置為接收回饋控制電壓VFBP，並回應於回饋控制電壓VFBP而影響偏置電壓輸入{VTP1，VTP2，VTN1，VTN2}。
考慮共模電壓高於參考電壓VCM的情況，通過共模回饋電路800降低了回饋控制電壓VFBP，並且流過電流控制器300的PMOS電晶體MP9的電流增加，從而進一步增加了偏置電壓VTP1、VTP2、VTN1和VTN2。關於第5圖所示的場景，流過PMOS電晶體MP2的電流IP1減小，而流過NMOS電晶體MN4的電流IN1增大。關於第7圖所示的場景，流過PMOS電晶體MP1的電流IP2減小，而流過NMOS電晶體MN2的電流IN2增大。在每種情況下，共模電壓都會降低。
考慮共模電壓低於參考電壓VCM的另一種情況，通過共模回饋電路800增加了回饋控制電壓VFBP，並且流過電流控制器300的PMOS電晶體MP9的電流減少，從而進一步減小了偏置電壓VTP1、VTP2、VTN1和VTN2。關於第5圖所示的場景，流過PMOS電晶體MP2的電流IP1增加，而流過NMOS電晶體MN4的電流IN1減少。關於第7圖中所示的場景，流過PMOS電晶體MP1的電流IP2增加，而流過NMOS電晶體MN2的電流IN2減少。在每種情況下，共模電壓都會增加。
共模回饋電路800可以包括可選的米勒補償(Miller compensation)電路，該米勒補償電路耦接在輸出信號{OUT+，OUT-}與偏置電壓輸入{VTP1，VTP2，VTN1，VTN2}之間，用於共模反饋回路的穩定性補償。在該實施例中，米勒補償電路可以包括米勒電容器CM5、CM6、CM7、CM8、CM9、CM10、 CM11和CM12。另外，也可以通過如第1圖所示使用米勒電容器CM1、CM2、CM3和CM4將米勒補償應用於單級放大器102。然而，這些僅僅是出於說明的目的，並不意味著對本發明的限制。
對於不具有所提出的AB類迴轉率增強方案的典型單級放大器，它可以通過消耗大量的靜態電流(例如，4000uA)來實現高信號雜訊和失真比(signal-to-noise and distortion ratio，SDNR)(例如106dB)。與典型的單級放大器相比，本發明的運算放大器100(包括具有所提出的AB類迴轉率增強方案的單級放大器102)可以通過消耗更少的靜態電流(例如，740uA)來實現更高的SDNR(例如，110dB)，其中單級放大器102的靜態電流可以是640uA，並且電流控制器104的靜態電流可以是100uA。
本領域習知技藝者將容易地認識到，在保持本發明的教導的同時，可以對裝置和方法進行多種修改和變更。因此，以上公開內容應被解釋為僅由所附申請專利範圍的界限來限定。
100:運算放大器
102:單級放大器
104:電流控制器
106:共模回饋電路

Claims (12)

  1. 一種運算放大器，包括：單級放大器，被佈置為接收輸入信號並放大所述輸入信號以生成輸出信號，其中，所述單級放大器包括回應於偏置電壓輸入而操作的壓控電流源電路；以及電流控制器，耦接至所述壓控電流源電路，其中所述電流控制器接收所述輸入信號，並根據所述輸入信號生成所述偏置電壓輸入其中，所述偏置電壓輸入包括第一偏置電壓、第二偏置電壓、第三偏置電壓和第四偏置電壓，所述壓控電流源電路包括頂部電流源和尾部電流源，所述頂部電流源包括：第一P溝道金屬氧化物半導體(PMOS)電晶體，其閘極節點接收所述第一偏置電壓；以及第二PMOS電晶體，其閘極節點接收所述第二偏置電壓，所述尾部電流源包括：第一N溝道金屬氧化物半導體(NMOS)電晶體，其閘極節點接收所述第三偏置電壓；以及第二NMOS電晶體，其閘極節點接收所述第四偏置電壓。
  2. 如請求項1之運算放大器，其中，由所述電流控制器動態調整的所述偏置電壓輸入使得所述壓控電流源電路能夠實現AB類迴轉率增強。
  3. 如請求項1之運算放大器，其中，所述單級放大器是伸縮式放大器；所述第一P溝道金屬氧化物半導體(PMOS)電晶體，其源極節點接收第一參考電壓；所述第二PMOS電晶體，其源極節點接收所述第一參考電壓；所述第一N溝道金屬氧化物半導體(NMOS)電晶體，其源極節點接收第二 參考電壓，其中所述第二參考電壓低於所述第一參考電壓；以及所述第二NMOS電晶體，其源極節點接收所述第二參考電壓。
  4. 如請求項3之運算放大器，其中，所述輸入信號是包括正信號和負信號的差動信號；當所述正信號的電壓位準低於所述負信號的電壓位準時，所述電流控制器被佈置為增加所述第一偏置電壓和所述第三偏置電壓，並減小所述第二偏置電壓和所述第四偏置電壓；當所述正信號的電壓位準高於所述負信號的電壓位準時，所述電流控制器被佈置為減小所述第一偏置電壓和所述第三偏置電壓，並增加所述第二偏置電壓和所述第四偏置電壓。
  5. 如請求項1之運算放大器，其中，所述輸出信號是包括正信號和負信號的差動信號；所述運算放大器還包括：共模回饋電路，被佈置為監視所述正信號和所述負信號的共模電壓，並將所述共模電壓與參考電壓進行比較以產生回饋控制電壓，其中，所述電流控制器還用於接收所述回饋控制電壓，並回應於所述回饋控制電壓而影響所述偏置電壓輸入。
  6. 如請求項5之運算放大器，其中，所述共模回饋電路還包括：米勒補償電路，耦接在所述輸出信號和所述偏置電壓輸入之間。
  7. 一種信號放大方法，包括：根據輸入信號生成偏置電壓輸入；以及通過單級放大器對所述輸入信號進行放大以生成輸出信號，其中，所述單級放大器包括回應於所述偏置電壓輸入而操作的壓控電流源電路其中，所述偏置電壓輸入包括第一偏置電壓、第二偏置電壓、第三偏置電壓和第四偏置電壓，所述壓控電流源電路包括頂部電流源和尾部電流源，所述頂部電流源包括：第一P溝道金屬氧化物半導體(PMOS)電晶體，其閘極節點接收所述第一 偏置電壓；以及第二PMOS電晶體，其閘極節點接收所述第二偏置電壓，所述尾部電流源包括：第一N溝道金屬氧化物半導體(NMOS)電晶體，其閘極節點接收所述第三偏置電壓；以及第二NMOS電晶體，其閘極節點接收所述第四偏置電壓。
  8. 如請求項7之信號放大方法，其中，回應於所述輸入信號而動態地調節所述偏置電壓輸入，以使得所述壓控電流源電路能夠實現AB類迴轉率增強。
  9. 如請求項7之信號放大方法，其中，所述單級放大器是伸縮式放大器；所述第一PMOS電晶體，其源極節點接收第一參考電壓；所述第二PMOS電晶體，其源極節點接收所述第一參考電壓；所述第一NMOS電晶體，其源極節點接收第二參考電壓，其中所述第二參考電壓低於所述第一參考電壓；以及所述第二NMOS電晶體，其源極節點接收所述第二參考電壓。
  10. 如請求項9之信號放大方法，其中，所述輸入信號是包括正信號和負信號的差動信號；根據所述輸入信號生成所述偏置電壓輸入的步驟包括：當所述正信號的電壓位準低於所述負信號的電壓位準時，增加所述第一偏置電壓和所述第三偏置電壓，並減小所述第二偏置電壓和所述第四偏置電壓；以及當所述正信號的電壓位準高於所述負信號的電壓位準時，減小所述第一偏置電壓和所述第三偏置電壓，並增加所述第二偏置電壓和所述第四偏置電壓。
  11. 如請求項7之信號放大方法，其中，所述輸出信號是包括正信號和負信號的差動信號；所述信號放大方法還包括： 監視所述正信號和所述負信號的共模電壓；以及將所述共模電壓與參考電壓進行比較以生成回饋控制電壓，其中所述偏置電壓輸入的生成受到所述回饋控制電壓的影響。
  12. 如請求項11之信號放大方法，其中，還包括：在所述輸出信號和所述偏置電壓輸入之間提供米勒補償。
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