TWI764033B - Board with embedded passive component - Google Patents

Abstract

A board includes: a core structure; one or more first passive components embedded in the core structure; a first build-up structure disposed on one side of the core structure and including first build-up layers and first wiring layers; and a second build-up structure disposed on the other side of the core structure and including second build-up layers and second wiring layers. One surface of a first core layer contacting a first insulating layer is coplanar with one surface of each of the one or more first passive components contacting the first insulating layer, the other surface of each of the one or more first passive components covered with a second insulating layer is spaced apart from a second core layer, and the one or more first passive components are electrically connected to at least one of the plurality of first wiring layers and the plurality of second wiring layers.

Description

Board with Embedded Passive Components

The present disclosure relates to a board with embedded passive components, and more particularly, to a board with embedded passive components on which a semiconductor package can be mounted.

Recently, high performance packages have been required to handle exponentially increasing amounts of data, and in addition to this change, there has also been a continuing need to improve the performance of boards and passive components in packages. For example, capacitors as passive components need to have excellent high temperature reliability, small size, high capacitance, and low equivalent series inductance (ESL) values. ESL value is closely related to noise and power dissipation, and the reduction of ESL value can improve the performance of capacitors. Furthermore, the ESL reduction effect can be significantly enhanced by reducing the distance between the capacitor and the semiconductor.

In a high-efficiency package according to the related art, a capacitor (DSC: die side capacitor) is arranged around a semiconductor, or a capacitor (LSC: a lead side capacitor ( land side capacitor)), thereby reducing the distance between the capacitor and the semiconductor. However, the distance is several millimeters to tens of millimeters, and thus may cause parasitic inductance, adversely affecting power noise and power integrity.

Aspects of the present disclosure can provide a board with embedded passive components that can improve power integrity by significantly reducing the distance between the semiconductor die and passive components to reduce parasitic inductance and impedance of the board reliability, can improve reliability by significantly reducing defects (eg, voids or undulations), and in particular, even in which the thicknesses of passive components differ from each other when multiple passive components are embedded In this case, it can also have excellent through-hole processing and plating quality.

According to an aspect of the present disclosure, a board includes: a core structure including a first insulating layer, a first core layer, one or more first passive components, a second insulating layer, a second core layer, and a third insulating layer, all of which The first core layer is disposed on the first insulating layer and includes a first through hole, the one or more first passive components are disposed in the first through hole, and the second insulating layer covers the first through hole One or more first passive components fill at least part of the first through holes, the second core layer is disposed on the second insulating layer, and the third insulating layer is disposed on the second core layer a first build-up structure, disposed on one side of the core structure and comprising a plurality of first build-up layers and a plurality of first wiring layers; and a second build-up structure disposed on the other side of the core structure and includes a plurality of second build-up layers and a plurality of second wiring layers. One surface of the first core layer in contact with the first insulating layer is coplanar with one surface of the one or more first passive components in contact with the first insulating layer, and is insulated by the second Another surface of the one or more first passive components covered by the layer is spaced apart from the second core layer, and the one or more first passive components are electrically connected to the plurality of first wiring layers and at least one of the plurality of second wiring layers.

Hereinafter, exemplary embodiments of the present disclosure will now be explained in detail with reference to the accompanying drawings. electronic device

FIG. 1 is a block schematic diagram illustrating an example of an electronic device system.

Referring to FIG. 1 , an electronic device 1000 can accommodate a mainboard 1010 . The mainboard 1010 may include chip-related components 1020 , network-related components 1030 , other components 1040 , etc., which are physically or electrically connected to the mainboard 1010 . These components can be connected to other components to be described below to form various signal lines 1090 .

The chip-related components 1020 may include: memory chips, such as volatile memory (such as dynamic random access memory (DRAM)), non-volatile memory (such as read only memory, ROM), flash memory, etc.; application processor chips such as central processing units (eg, central processing unit (CPU)), graphics processors (eg, graphics processing unit (GPU)) ), digital signal processors, cryptographic processors, microprocessors, microcontrollers, etc.; and logic chips, such as analog-to-digital converters (ADCs), application-specific integrated circuits (application-specific integrated circuit, ASIC) and so on. However, the wafer-related components 1020 are not limited thereto, and other types of wafer-related components may also be included. In addition, the wafer-related components 1020 may be combined with each other.

The network-related components 1030 may include, for example, the following protocols: wireless fidelity (Wi-Fi) (Institute of Electrical and Electronics Engineers (IEEE) 802.11 family, etc.), worldwide interoperability for microwave access (worldwide interoperability for microwave access, WiMAX) (IEEE 802.16 family, etc.), IEEE 802.20, long term evolution (LTE), evolution data only (Ev-DO), high speed packet access+ (high speed packet access+, HSPA+), high speed downlink packet access+ (HSDPA+), high speed uplink packet access+ (HSUPA+), enhanced data GSM environment (enhanced data GSM) environment, EDGE), global system for mobile communications (GSM), global positioning system (global positioning system, GPS), general packet radio service (general packet radio service, GPRS), code division multiple access (code) division multiple access, CDMA), time division multiple access (TDMA), digital enhanced cordless telecommunications (DECT), Bluetooth, 3G protocol, 4G protocol and 5G protocol and the following protocols Any other wireless and wired protocols specified thereafter. However, the network-related components 1030 are not limited thereto, but may also include various other wireless standards or protocols or wired standards or protocols. In addition, the network-related components 1030 may be combined with each other together with the wafer-related components 1020 described above.

Other components 1040 may include high frequency inductors, ferrite inductors, power inductors, ferrite beads, low temperature co-fired ceramic (LTCC), electromagnetic interference (electromagnetic interference) , EMI) filter, multilayer ceramic capacitor (multilayer ceramic capacitor, MLCC) and so on. However, the other components 1040 are not limited thereto, but may also include passive components for various other purposes, and the like. In addition, other components 1040 may be combined with each other together with the wafer-related components 1020 or the network-related components 1030 described above.

Depending on the type of electronic device 1000 , the electronic device 1000 may include other components that may or may not be physically or electrically connected to the motherboard 1010 . These other components may include, for example, camera 1050, antenna 1060, display device 1070, battery 1080, audio codec (not shown), video codec (not shown), power amplifier (not shown) shown), compass (not shown in the figure), accelerometer (not shown in the figure), gyroscope (not shown in the figure), speaker (not shown in the figure), mass storage unit (such as a hard disk) drive) (not shown in the figure), a compact disk (CD) drive (not shown in the figure), a digital versatile disk (DVD) drive (not shown in the figure), and the like. However, these other components are not limited thereto, and may also include other components for various purposes depending on the type of the electronic device 1000 and the like.

The electronic device 1000 can be a smart phone, a personal digital assistant (PDA), a digital video camera, a digital still camera, a network system, a computer, a monitor, a tablet PC, a laptop type personal computer, portable netbook PC (netbook PC), TV, video game machine (video game machine), smart watch, automotive components, etc. However, the electronic device 1000 is not limited to this, but can also be any other electronic device that processes data.

FIG. 2 is a schematic perspective view illustrating an example of an electronic device.

Referring to FIG. 2 , the electronic device may be a smart phone 1100 . For example, the motherboard 1110 may be accommodated in the body 1101 of the smart phone 1100 , and various electronic components 1120 may be physically or electrically connected to the motherboard 1110 . Additionally, other components, such as the camera 1130 , that may or may not be physically connected or electrically connected to the motherboard 1110 , such as the camera 1130 , may be accommodated in the body 1101 . Some of the electronic components 1120 may be wafer-related components, and some of the wafer-related components may be semiconductor packages 1121 . The semiconductor package 1121 may include an organic interposer. Also, although not shown, the semiconductor package 1121 may be mounted on a printed circuit board such as a ball grid array (BGA) board to be mounted on a motherboard or the like. Meanwhile, the electronic device is not necessarily limited to the smart phone 1100, but may be other electronic devices. Board with Embedded Passive Components

In the following, a board with embedded passive components will be explained with reference to the accompanying drawings, which board can reduce the parasitic inductance and impedance of the board by significantly reducing the distance between the semiconductor die and the passive components. Improves power integrity, which can improve reliability by significantly reducing defects (eg, voids or waviness), and in particular, even in situations where the thicknesses of passive components differ from each other when multiple passive components are embedded , can also have excellent through-hole processing and plating quality.

3 is a schematic cross-sectional view showing an example of a board with embedded passive components.

3, a board with embedded passive components 100A according to an example may include a core structure 110A and a first build-up structure 120 and a second build-up structure 130 disposed on opposite sides of the core structure 110A. The core structure 110A may include a plurality of core layers 111a1 and 111a2, and a plurality of insulating layers 111b1, 111b2, 111b3, and 111b4. More specifically, the core structure 110A may include: a first insulating layer 111b1; a first core layer 111a1 disposed on the first insulating layer 111b1 and having one or more through holes 111a1h; one or more passive components 112a, passive components The element 112b and the passive element 112c are respectively disposed in each of the one or more through holes 111a1h; the second insulating layer 111b2 covers the passive element 112a, the passive element 112b and the passive element 112c and fills the through holes 111a1h at least part of each of the second core layer 111a2, disposed on the second insulating layer 111b2; the third insulating layer 111b3, disposed on the second core layer 111a2; and the fourth insulating layer 111b4, disposed on the second between the insulating layer 111b2 and the second core layer 111a2. In addition, the core structure 110A may include: a first core wiring layer 116a disposed on a side of the first insulating layer 111b1 opposite to the first core layer 111a1 and a second core wiring layer 116b disposed on the third insulating layer 111b3 on the side opposite to the second core layer 111a2. The first core wiring layer 116a and the second core wiring layer 116b can pass through the first core layer 111a1 and the second core layer 111a2 and the first insulating layer 111b1, the second insulating layer 111b2, the third insulating layer 111b3 and the fourth insulating layer Owner's vias 114 in layer 111b4 are electrically connected to each other. The passive element 112a, the passive element 112b, and the passive element 112c can be electrically connected to the first core wiring layer 116a through the connecting vias 115a, 115b and 115c respectively passing through the first insulating layer 111b1. The first build-up structure 120 may include a plurality of first build-up layers 121 , a plurality of first wiring layers 122 and a plurality of first wiring via layers 123 , and the second build-up structure 130 may include a plurality of second build-up layers 131 , multiple A second wiring layer 132 and a plurality of second wiring via layers 133 . The corresponding passive components 112 a , passive components 112 b and passive components 112 c are electrically connected to the first wiring layers 122 or the second wiring layers of the first build-up structure 120 through the first core wiring layer 116 a or the second core wiring layer 116 b The plurality of second wiring layers 132 of the build-up structure 130 .

In a high performance package according to the related art, capacitors (DSC) are arranged around semiconductors on the board, or capacitors (LSC) are arranged near solder balls of the board under the semiconductor region to reduce electrical distances. However, the distance is several millimeters to several tens of millimeters, and thus causes parasitic inductance, which makes it difficult to achieve excellent power noise and power integrity effects. To solve this problem, passive components such as capacitors can be embedded in the board below the semiconductor region. For example, passive components can be embedded in the core layer of the board. In detail, a cavity can be formed in the core layer, and passive components can be arranged in the cavity and then covered with an insulating material. However, in this case, small-sized passive components are arranged near one side surface of the thick core layer, and thus it is difficult to fill the remaining space in the cavity with insulating material, which may easily occur such as voids or undulations, etc. defect. Alternatively, passive components can be embedded in the build-up layers of the board. However, in this case, the build-up layers are thinner than the passive components to be embedded, and even in the case where the build-up layers are stacked in multiple layers, the accumulated tolerance in the thickness of the stacked build-up layers can lead to difficult management for The depth of the embedded cavity.

On the other hand, in the board 100A with embedded passive components according to the example, the core structure 110A includes the plurality of core layers 111a1 and 111a2 and the plurality of insulating layers 111b1 , insulating layers 111b2 , insulating layers 111b3 and insulating layer 111b4. The through hole 111a1h is formed in at least one core layer 111a, and the passive element 112a, the passive element 112b, and the passive element 122c are disposed in the through hole 111a1h and embedded by being covered with an insulating material. That is, the core structure 110A is formed by forming the through-holes 111a1h in one core layer 111a1 having the same thickness as each of the passive element 112a, the passive element 112b, and the passive element 112c Similar thicknesses (eg, the difference between the thickness of core layer 111a1 and the thickness of each of passive component 112a, passive component 112b, and passive component 112c is a few micrometers to tens of micrometers); passive component 112a, passive component 112b and passive components 112c are disposed in the through holes 111a1h; and then the core layer 111a2 and the insulating layer 111b1, the insulating layer 111b2, the insulating layer 111b3 and the insulating layer 111b4 are additionally stacked in another manner to increase the thickness of the core structure 110A. Therefore, the small-sized passive element 112a, the passive element 112b, and the passive element 112c are arranged in the through holes 111a1h formed in the core layer 111a1 having a similar thickness and are covered with insulating materials, thereby making it possible to solve the above-mentioned defects such as voids or waves ups and downs). In addition, by additionally using other core layers 111a2 and the insulating layer 111b1, insulating layer 111b2, insulating layer 111b3, and insulating layer 111b4 to form the core structure 110A that is thick and formed as symmetrical as possible, and thus can maintain rigidity and suppress warpage Excellent results are achieved in terms of curvature, which are similar to those of the related art using a thick core layer.

Specifically, in the board with embedded passive components 100A according to the example, one surface of the first core layer 111a1 in contact with the first insulating layer 111b1 is connected to each of the passive components 112a, the passive components 112b, and the passive components 112c One surface of each of them is coplanar with each other, for example, one surface of the electrode of each of the passive element 112a, the passive element 112b, and the passive element 112c in contact with the first insulating layer is the same as that in contact with the first insulating layer 111b1. One surface of the two insulating layers 111b2 is coplanar with each other, and at the same time, the other surface of each of the passive element 112a, the passive element 112b and the passive element 112c covered by the second insulating layer 111b2 is spaced apart from the second core layer 111a2 predetermined distance. As can be understood from the processes to be described below, in the process of fabricating core structure 110A, passive component 112a, passive component 112b, and passive component 112c may be configured such that each of passive component 112a, passive component 112b, and passive component 112c One surface of one and one surface of the first core layer 111a1 in which the passive components 112a, 112b, and 112c are embedded are coplanar with each other, and then the surfaces of the passive components 112a, 112b, and 112c embedded therein The first core layer 111a1 may be turned upside down so that the flat surface faces upward. In such a case, regardless of the thickness of each of passive component 112a, passive component 112b, and passive component 112c, and the insulation distance to the electrodes of each of passive component 112a, passive component 112b, and passive component 112c, may be Evenly, a flat surface in which the one surface of each of the passive element 112a, the passive element 112b, and the passive element 112c and the one surface of the first core layer 111a1 are coplanar with each other can be provided. Therefore, the heights of the connection through holes 115a, the connection through holes 115b, and the connection through holes 115c respectively connected to the passive element 112a, the passive element 112b, and the passive element 112c may be the same as each other. In this case, in the process of forming the first insulating layer 111b1, the connecting vias 115a, the connecting vias 115b, the connecting vias 115c, and the first core wiring layer 116a, more excellent via processing and plating can be achieved Cover quality without defects such as voids or waviness.

In the following, the configuration of the board 100A with embedded passive components will be explained in more detail with reference to the accompanying drawings.

Passive components 112a, passive components 112b, and passive components 112c are embedded in the core structure 110A, and the core structure 110A is used to increase the rigidity of the board. The core structure 110A may include: a first insulating layer 111b1; a first core layer 111a1 disposed on the first insulating layer 111b1 and having one or more through holes 111a1h; one or more passive components 112a, passive components 112b, and passive components 112c, respectively disposed in the one or more through holes 111a1h; a second insulating layer 111b2, covering the passive element 112a, the passive element 112b and the passive element 112c and filling at least part of each of the through holes 111a1h; the second insulating layer 111b2 The core layer 111a2 is disposed on the second insulating layer 111b2; the third insulating layer 111b3 is disposed on the second core layer 111a2; and the fourth insulating layer 111b4 is disposed between the second insulating layer 111b2 and the second core layer 111a2 between. In addition, the core structure 110A may include: a first core wiring layer 116a disposed on a side of the first insulating layer 111b1 opposite to the first core layer 111a1; and a second core wiring layer 116b disposed on the third insulating layer 111b3 on the side opposite to the second core layer 111a2. The first core wiring layer 116a and the second core wiring layer 116b can pass through the first core layer 111a1 and the second core layer 111a2 and the first insulating layer 111b1, the second insulating layer 111b2, the third insulating layer 111b3 and the fourth insulating layer Owner's vias 114 in layer 111b4 are electrically connected to each other. The passive element 112a, the passive element 112b, and the passive element 112c can be electrically connected to the first core wiring layer 116a through the connecting vias 115a, 115b and 115c respectively passing through the first insulating layer 111b1.

The first core layer 111a1 and the second core layer 111a2 can each increase the rigidity of the core structure 110A. The material of each of the first core layer 111a1 and the second core layer 111a2 may be an insulating material. In this case, the insulating material may be a thermosetting resin such as epoxy resin; a thermoplastic resin such as polyimide resin; a resin in which a thermosetting resin or thermoplastic resin is mixed with an inorganic filler, or a thermosetting resin or thermoplastic resin A resin impregnated in a core material such as fiberglass (or glass cloth, or fiberglass cloth) together with inorganic fillers, such as copper clad laminate (CCL) or unclad CCL (unclad CCL), etc. However, the materials of the first core layer 111a1 and the second core layer 111a2 are not limited thereto, and at least one of the first core layer 111a1 and the second core layer 111a2 may also be made of different kinds of rigid materials (eg, glass substrates or ceramics) substrate) formed. The through holes 111a1h formed in the first core layer 111a1 may each be a hole formed to continuously surround the passive element 112a, the passive element 112b, and the passive element accommodated in each through hole 111a1h when viewed in a plan view 112c.

The first insulating layer 111b1 , the second insulating layer 111b2 , the third insulating layer 111b3 , and the fourth insulating layer 111b4 may serve as bonding layers for bonding layers to each other in the core structure 110A. The material of each of the first insulating layer 111b1, the second insulating layer 111b2, the third insulating layer 111b3, and the fourth insulating layer 111b4 may also be an insulating material. In this case, similarly, the following can be used as the insulating material: a thermosetting resin such as epoxy resin; a thermoplastic resin such as polyimide resin; a resin in which a thermosetting resin or thermoplastic resin is mixed with an inorganic filler, or A resin in which a thermosetting resin or a thermoplastic resin is impregnated into a core material such as glass fiber together with an inorganic filler, such as a prepreg (prepreg, PPG) or the like. The first insulating layer 111b1 , the second insulating layer 111b2 , the third insulating layer 111b3 , and the fourth insulating layer 111b4 may be introduced and combined in an uncured state, and then cured into a lump to suppress warpage. The boundaries between the first insulating layer 111b1 , the second insulating layer 111b2 , the third insulating layer 111b3 and the fourth insulating layer 111b4 may be distinct or may not be distinct. If necessary, the fourth insulating layer 111b4 may be omitted.

The first core layer 111a1 and the second core layer 111a2 may have substantially the same thickness. The first insulating layer 111b1 and the third insulating layer 111b3 may have substantially the same thickness. The thickness of each of the first core layer 111a1 and the second core layer 111a2 may be greater than the thickness of each of the first insulating layer 111b1 , the second insulating layer 111b2 , the third insulating layer 111b3 and the fourth insulating layer 111b4 . Here, the thickness of the second insulating layer 111b2 does not include the thickness of the portion of the second insulating layer 111b2 that fills the through hole 111a1h. That is, the thickness of the second insulating layer 111b2 means the thickness of the portion of the second insulating layer 111b2 between the first core layer 111a1 and the fourth insulating layer 111b4. The core structure 110A is formed symmetrically with respect to the center thereof (eg, the interface between the second insulating layer 111b2 and the fourth insulating layer 111b4 as described above), and thus warpage can be effectively suppressed.

The number of passive elements 112a, passive elements 112b and passive elements 112c may be plural, and the plurality of passive elements 112a, passive elements 112b and passive elements 112c may be arranged in each through hole 111a1h. Passive component 112a, passive component 112b, and passive component 112c may be the same as each other or different from each other. Passive components 112a, passive components 112b, and passive components 112c may be conventional passive components such as capacitors, inductors, and the like. The thicknesses of the passive element 112a, the passive element 112b, and the passive element 112c may be the same as each other or different from each other. One surface of the passive component 112a, one surface of the passive component 112b, and one surface of the passive component 112c in contact with the first insulating layer 111b1 may be coplanar with each other, and the other surface of the passive component 112a covered by the second insulating layer 111b2, The other surface of the passive element 112b and the other surface of the passive element 112c may be physically spaced apart from the second core layer 111a2 by a predetermined distance. The electrodes of the passive element 112a, the passive element 112b, and the passive element 112c can be electrically connected to the first core wiring layer 116a through the connection through hole 115a, the connection through hole 115b, and the connection through hole 115c, respectively. The heights of the connection through holes 115a, the connection through holes 115b, and the connection through holes 115c may be the same as each other. The thickness of each of the passive component 112a, the passive component 112b, and the passive component 112c may be less than the thickness of the first core layer 111a1. That is, the thickness of the first core layer 111a1 may be greater than the thickness of each of the passive element 112a, the passive element 112b, and the passive element 112c, and the thickness of the first core layer 111a1 is the same as that of the passive element 112a, the passive element 112b, and the passive element The difference between the thicknesses of each of 112c may be several microns to tens of microns or less.

The first core wiring layer 116a and the second core wiring layer 116b may perform various functions in the core structure 110A depending on the design of the corresponding layers. For example, the first core wiring layer 116a and the second core wiring layer 116b may include a ground (GND) pattern, a power (PWR) pattern, a signal (S) pattern, and the like. Here, the signal (S) pattern may include various signals other than a ground (GND) pattern, a power (PWR) pattern, and the like, such as data signals and the like. In addition, the first core wiring layer 116a and the second core wiring layer 116b may include various pads. The material of each of the first core wiring layer 116 a and the second core wiring layer 116 b may be, for example, copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel ( Conductive materials (specifically, metallic materials) such as Ni), lead (Pb), titanium (Ti), or alloys thereof.

The marking pattern 116c may be disposed on the other surface of the first core layer 111a1 covered by the second insulating layer 111b2. The mark pattern 116c may be an align mark for arranging the passive element 112a, the passive element 112b, and the passive element 112c in the through hole 111a1h. At least one of the marking patterns 116c may be electrically insulated from the plurality of first wiring layers 122 and the plurality of second wiring layers 132 . For example, at least one of the marking patterns 116c can be a discrete pattern that is electrically floating relative to other conductive patterns, wiring layers, or vias of the board 100A with embedded passive components. The material of the marking pattern 116c may be, for example, copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti) or alloys thereof and other conductive materials (specifically, metallic materials).

The through holes 114 electrically connect the first core wiring layer 116a and the second core wiring layer 116b to each other. The vias 114 may include vias for ground, vias for power, vias for signals, and the like. The material of each of the through holes 114 may be, for example, copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium ( Ti) or its alloys and other conductive materials (specifically, metallic materials). The through hole 114 may have a cylindrical shape. The through holes 114 may penetrate the core structure 110A. This is because the core wiring layer in the core structure 110A can be omitted. That is, the core wiring layer in the core structure 110A can be omitted, and the number of other pattern layers can also be minimized. This will significantly reduce the occurrence of gaps between layers when the metal inhibits the movement of absorbed moisture. Here, a minimized number of pattern layers may include the marking pattern 116c described above (eg, a device-targeted design) for machining through-holes 111a1h and embedding passive components 112a, 112b, and 112c. The through-hole 114 may be a plated through-hole (PHT), wherein the metal material 114a passes through the first core layer 111a1 and the second core layer 111a2 and the first insulating layer 111b1 , the second insulating layer 111b2 , the third The wall surfaces of the through-hole holes of the owners in the three insulating layers 111b3 and the fourth insulating layer 111b4 are conformally plated. In this case, a plugging material 114b may fill the space surrounded by the metal material 114a in the through hole hole. As the sealing material 114b, a conventional sealing material such as insulating material or conductive ink can be used.

The connection via 115a, the connection via 115b and the connection via 115c can respectively electrically connect the passive element 112a, the passive element 112b and the passive element 112c to the first core wiring layer 116a. Thus, the passive element 112a, the passive element 112b, and the passive element 112c can be electrically connected to the first core wiring in the core structure 110A through the connection vias 115a, the connection vias 115b, and the connection vias 115c, respectively, only in the upward direction. layer 116a. The connection vias 115a, the connection vias 115b, and the connection vias 115c may each include one of a via for ground, a via for power, a via for signal, and the like. In addition, the material of each of the connection vias 115a, the connection vias 115b, and the connection vias 115c may be, for example, copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au) , nickel (Ni), lead (Pb), titanium (Ti) or its alloys and other conductive materials (specifically, metal materials). Each of the connection vias 115 a , the connection vias 115 b , and the connection vias 115 c may have a tapered shape whose taper direction is the same as that of the wiring vias of the wiring via layer 123 of the first build-up structure 120 The taper direction is the same.

The first build-up structure 120 provides various wiring designs so that the board 100A with embedded passive components can essentially function as a printed circuit board. The first build-up structure 120 may include the plurality of first build-up layers 121 , the plurality of first wiring layers 122 and the plurality of first wiring via layers 123 . A first passivation layer 124 may be disposed on the uppermost side of the first build-up structure 120 . The first passivation layer 124 may have a plurality of openings 124h exposing at least a portion of the uppermost first wiring layer 122, and a first electrical connection structure 140 may be configured in each of the plurality of openings 124h.

The first build-up layer 121 may include an insulating material, and the following may be used as the insulating material, but the material of the first build-up layer 121 is not limited thereto: thermosetting resin, such as epoxy resin; thermoplastic resin, such as polyimide resin ; A resin in which a thermosetting resin or thermoplastic resin is mixed with an inorganic filler, or a thermosetting resin or thermoplastic resin is impregnated into a core material composed of an inorganic filler, such as Ajinomoto build-up film (ABF), etc. The number of the first build-up layers 121 is not particularly limited, and various designs can be made depending on design details. The boundaries between the first build-up layers 121 may be indistinct or may be conspicuous. The thickness of each of the first build-up layers 121 may be smaller than the thickness of each of the core layer 111a1 and the core layer 111a2. In addition, the elastic modulus of each of the first build-up layers 121 may be smaller than the elastic modulus of each of the core layer 111a1 and the core layer 111a2. That is, the first build-up layer 121 may be designed to be as thin as possible in order to introduce the plurality of first wiring layers 122 .

The first wiring layer 122 may perform various functions depending on the design of the corresponding layer. For example, the first wiring layer 122 may include a ground (GND) pattern, a power (PWR) pattern, a signal (S) pattern, and the like. Here, the signal (S) pattern may include various signals other than a ground (GND) pattern, a power (PWR) pattern, and the like, such as data signals and the like. In addition, the first wiring layer 122 may include various pads. The material of each of the first wiring layers 122 may be, for example, copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), Conductive materials (specifically, metallic materials) such as titanium (Ti) or its alloys.

The first wiring via layers 123 electrically connect the first wiring layers 122 to each other. In addition, the first wiring via layer 110 electrically connects the first core wiring layer 116a and the first wiring layer 122 to each other. The first wiring via layers 123 may also each include vias for grounding, vias for power, vias for signals, and the like. In addition, the material of each of the first wiring via layers 123 may be, for example, copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead Conductive materials (specifically, metal materials) such as (Pb), titanium (Ti), or alloys thereof. The wiring vias of each of the first wiring via layers 123 may have a tapered shape whose taper direction is the same as that of each of the connection vias 115 a , the connection vias 115 b , and the connection vias 115 c The taper direction is the same.

The first passivation layer 124 can protect the first build-up layer 121 , the first wiring layer 122 and the first wiring via layer 123 . The material of the first passivation layer 124 is not particularly limited. For example, the material of the first passivation layer 124 may be an insulating material, and in this case, a solder resist may be used as the insulating material. However, the material of the first passivation layer 124 is not limited to this, but can also be the above-mentioned prepreg, ABF, or the like.

The first electrical connection structure 140 can be used as an external connection terminal for mounting semiconductor chips, semiconductor packages, etc. on the board 100A with embedded passive components. The first electrical connection structure 140 may be formed of a low melting point metal (eg, solder (eg, tin (Sn)-aluminum (Al)-copper (Cu), etc.)). However, this is only an example, and the material of the first electrical connection structure 140 is not particularly limited. The first electrical connection structures 140 may be pins, balls, pins, and the like. The first electrical connection structure 140 may have a multi-layer structure or a single-layer structure. When the first electrical connection structure 140 has a multi-layer structure, the first electrical connection structure 140 may include copper (Cu) pillars and solder. When the first electrical connection structure 140 has a single-layer structure, the first electrical connection structure 140 may include tin-silver solder or copper (Cu). However, this is only an example, and the first electrical connection structure 140 is not limited thereto.

The second build-up structure 130 also provides various wiring designs so that the board 100A with embedded passive components can essentially function as a printed circuit board. The second build-up structure 130 may include the plurality of second build-up layers 131 , the plurality of second wiring layers 132 and the plurality of second wiring via layers 133 . A second passivation layer 134 may be disposed on the lowermost side of the second build-up structure 130 . The second passivation layer 134 may have a plurality of openings 134h each exposing at least a portion of the lowermost second wiring layer 132 . A second electrical connection structure 150 may be configured in each of the plurality of openings 134h. The second build-up structure 130 may be formed to be as symmetrical as possible to the first build-up structure 120 with respect to the core structure 110A. That is, the number of build-up layers 121 and the number of build-up layers 131 may be the same as each other, and the number of wiring layers 122 and the number of wiring layers 132 may be the same as each other. In addition, the thickness of each of the build-up layers 121 may be the same as the thickness of each of the build-up layers 131 , and the thickness of each of the wiring layers 122 may be the same as the thickness of each of the wiring layers 132 . In other words, the first build-up structure 120 and the second build-up structure 130 can be simultaneously formed on both sides of the core structure 110A through a build-up process.

The second build-up layer 131 may include an insulating material, and the following may be used as the insulating material, but the material of the second build-up layer 131 is not limited thereto: thermosetting resin, such as epoxy resin; thermoplastic resin, such as polyimide resin ; A resin in which a thermosetting resin or thermoplastic resin is mixed with an inorganic filler, or a thermosetting resin or thermoplastic resin is impregnated into a core material composed of an inorganic filler, such as Ajinomoto Laminated Film (ABF), etc. The number of the second build-up layers 131 is not particularly limited, and various designs can be made depending on design details. The boundaries between the second build-up layers 131 may be indistinct or may be conspicuous. The thickness of each of the second build-up layers 131 may be smaller than the thickness of each of the core layer 111a1 and the core layer 111a2. In addition, the elastic modulus of each of the second build-up layers 131 may be smaller than the elastic modulus of each of the core layer 111a1 and the core layer 111a2. That is, the second build-up layer 131 may be designed to be as thin as possible in order to introduce the plurality of second wiring layers 132 .

The second wiring layer 132 may also perform various functions depending on the design of the corresponding layer. For example, the second wiring layer 132 may include a ground (GND) pattern, a power (PWR) pattern, a signal (S) pattern, and the like. Here, the signal (S) pattern may include various signals other than a ground (GND) pattern, a power (PWR) pattern, and the like, such as data signals and the like. In addition, the second wiring layer 132 may include various pads. The material of each of the second wiring layers 132 may be, for example, copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), Conductive materials (specifically, metallic materials) such as titanium (Ti) or its alloys.

The second wiring via layers 133 electrically connect the corresponding second wiring layers 132 to each other. In addition, the second wiring via layer 133 electrically connects the second core wiring layer 116b and the second wiring layer 132 to each other. The second wiring via layers 133 may also each include vias for grounding, vias for power, vias for signals, and the like. In addition, the material of each of the second wiring via layers 133 may be, for example, copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead Conductive materials (specifically, metal materials) such as (Pb), titanium (Ti), or alloys thereof. The wiring vias of each of the second wiring via layers 133 may have a tapered shape whose taper direction is associated with the connection vias 115 a , the connection vias 115 b , and the connection vias 115 c and the first wirings The taper directions of the wiring vias of each of the via layers 123 are opposite.

The second passivation layer 134 can protect the second build-up layer 131 , the second wiring layer 132 and the second wiring via layer 133 . The material of the second passivation layer 134 is also not particularly limited. For example, the material of the second passivation layer 134 may be an insulating material, and in this case, a solder resist may be used as the insulating material. However, the material of the second passivation layer 134 is not limited to this, but can also be the prepreg, ABF, etc. described above.

The second electrical connection structure 150 can be used as an external connection terminal for mounting the board 100A with embedded passive components on a mainboard of an electronic device or the like. The second electrical connection structure 150 may also be formed of a low melting point metal (eg, solder (eg, tin (Sn)-aluminum (Al)-copper (Cu), etc.)). However, this is only an example, and the material of the second electrical connection structure 150 is not particularly limited. The second electrical connection structures 150 can be pins, balls, pins, and the like. The second electrical connection structure 150 may have a multi-layer structure or a single-layer structure. When the second electrical connection structure 150 has a multi-layer structure, the second electrical connection structure 150 may include copper (Cu) pillars and solder. When the second electrical connection structure 150 has a single-layer structure, the second electrical connection structure 150 may include tin-silver solder or copper (Cu). However, this is only an example, and the second electrical connection terminal 150 is not limited thereto.

4 to 9 are schematic diagrams illustrating an example of a process for manufacturing the board with embedded passive components shown in FIG. 3 .

Referring to FIG. 4 , a copper-clad laminate substrate and the like as the first core layer 111a1 may be prepared first. In this case, a marking pattern 116c may be formed on at least one surface of the first core layer 111a1. Next, one or more through holes 111a1h may be formed in the first core layer 111a1 using a laser drill, a mechanical drill, or the like. Next, a tape 210 may be attached to one side of the first core layer 111a1, and one or more passive components 112a, 112b, and 112c may be disposed on the first core layer 111a1 using the tape 210 in each of the one or more through holes 111a1h.

5, the second insulating layer 111b2 may be laminated by covering the first core layer 111a1 and the passive element 112a, the passive element 112b and the passive element 112c with the copper foil 220 and filling at least part of each of the through holes 111a1h on tape 210, and can then be cured. Next, the tape 210 can be peeled off. After peeling off the tape 210, one surface of the first core layer 111a1, one surface of the second insulating layer 111b2, and one surface of each of the passive component 112a, the passive component 112b, and the passive component 112c are coplanar with each other. Next, the copper foil 220 can be removed by etching.

Next, referring to FIG. 6 , the first copper foil 116as and the first insulating layer 111b1 may be stacked, so that the passive element 112a, the passive element 112b and the passive element 112c are embedded, and the first core layer 111a1, The fourth insulating layer 111b4, the second core layer 111a2, the third insulating layer 111b3, and the second copper foil 116bs may be stacked together in this order, thereby forming the underlying structure of the core structure 110A described above. The first insulating layer 111b1, the third insulating layer 111b3, and the fourth insulating layer 111b4 may be introduced using a prepreg in an uncured state, and the second core layer 111a2 may be introduced using an uncoated CCL.

7, a mechanical drill, a laser drill, etc. may be used to form through-hole holes 114h through the prepared base structure of the core structure 110A. In addition, through-hole holes 115ah, through-hole holes 115bh, and through-hole holes 115ch may be formed penetrating the first insulating layer 111b1 and exposing the corresponding electrodes of the passive element 112a, the passive element 112b, and the passive element 112c. Next, the through holes 114 , the connecting through holes 115 a , the connecting through holes 115 b and the connecting through holes may be formed by using the first copper foil 116as and the second copper foil 116bs as seed layers by plating, plugging, etc. 115c and the first core wiring layer 116a and the second core wiring layer 116b. The core structure 110A may be formed through a series of processes.

Next, referring to FIG. 8 , a first build-up layer 121 and a second build-up layer 131 are formed on opposite sides of the core structure 110A, respectively. The first build-up layer 121 and the second build-up layer 131 may be formed by laminating and then curing ABF or the like. Next, via holes 123h and via holes 133h may be formed in the first build-up layer 121 and the second build-up layer 131, respectively, by using a laser drill, a mechanical drill, or the like. Next, the first wiring via layer 123 and the second wiring via layer 133 and the first wiring layer 122 and the second wiring layer 132 may be formed by plating or the like.

Next, referring to FIG. 9 , by repeating the above-mentioned series of processes, as many first build-up layers 121 and second build-up layers 131 , first wiring layers 122 and second wiring layers 132 , and The first wiring via layer 123 and the second wiring via layer 133 . Then, similarly, the first passivation layer 124 and the second passivation layer 134 may be formed by laminating and then optionally curing ABF or the like, thereby forming the first build-up structure 120 and the second build-up structure 130 . Additionally, a first electrical connection metal 140 and a second electrical connection metal 150 may be formed, and then a reflow process may be performed, thereby obtaining the board 100A with embedded passive components according to the above-described example.

10 is a schematic cross-sectional view showing another example of a board with embedded passive components.

Referring to FIG. 10 , in the board with embedded passive components 100B according to another example, the passive components 112 a , the passive components 112 b , and The passive component 112c may be disposed and embedded in the through hole 111a1h of the first core layer 111a1 of the core structure 110B. Thus, even in the case where the thicknesses of the passive element 112a, the passive element 112b, and the passive element 112c are different from each other, one surface of the passive element 112a, one surface of the passive element 112b, and the passive element 112c that are in contact with the first insulating layer 111b1, respectively, One surface of the first core layer 111a1 and one surface of the second insulating layer 111b2 may be coplanar with each other, respectively, in contact with the first insulating layer 111b1. However, the other surface of the passive element 112a, the other surface of the passive element 112b, and the other surface of the passive element 112c, each covered by the second insulating layer 111b2, may be located on different levels. Thereby, even in the case where the thicknesses of the passive element 112a, the passive element 112b, and the passive element 112c are different from each other, a flat surface can be provided without any difficulty, and thus more excellent through-hole processing and plating quality can be achieved, No defects (eg, voids or undulations in the process of forming the first insulating layer 111b1, the connecting vias 115a, the connecting vias 115b, the connecting vias 115c, and the first core wiring layer 116a). Descriptions of other configurations overlap with those described above with reference to FIGS. 3 to 9 , and are therefore omitted.

11 is a schematic cross-sectional view showing another example of a board with embedded passive components.

11 , compared to the board 100A with embedded passive components according to the above-described example, in the board 100C with embedded passive components according to another example, the core structure 110C may further include a third insulating layer disposed on the The third core layer 111a3 on 111b3 and the fifth insulating layer 111b5 disposed on the third core layer 111a3. That is, in order to increase the thickness of the core structure 110C, the third core layer 111a3 may be introduced by attaching an uncoated CCL or the like. In such a case, a thicker core structure 110C may be introduced. Meanwhile, the description of the board 100B with embedded passive components according to another example can also be applied to the board 100C with embedded passive components according to another example. Descriptions of other configurations overlap with those described above with reference to FIGS. 3 to 10 , and are therefore omitted.

12 is a schematic cross-sectional view showing another example of a board with embedded passive components.

12 , in the board with embedded passive components 100D according to another example, the second core layer 111a2 of the core structure 110D may include one or more one through hole 111a2h, and one or more passive components 112d, 112e, and 112f are disposed in each of the one or more through holes 111a2h. In this case, in the core structure 110D, a fourth insulating layer 111b4 may be disposed between the second insulating layer 111b2 and the second core layer 111a2 to cover the second core layer 111a2 and the passive components 112d and 112e, respectively and passive components 112f, and fill at least a portion of each of the second through holes 111a2h. If necessary, a fifth insulating layer 111b5 may be additionally disposed between the second insulating layer 111b2 and the fourth insulating layer 111b4. In addition, the core structure 110D may further include a connection through hole 115d, a connection through hole 115e, and a connection through hole 115f. The connection through hole 115d, the connection through hole 115e, and the connection through hole 115f each penetrate the third insulating layer 111b3 and connect the second core wiring. The layer 116b is electrically connected to the passive element 112d, the passive element 112e, and the passive element 112f, respectively. In addition, one surface of the passive element 112d, one surface of the passive element 112e, and one surface of the passive element 112f, each in contact with the third insulating layer 111b3, may be coplanar with each other, and may be in contact with the second, each in contact with the third insulating layer 111b3. One surface of the core layer 111a2 and one surface of the fourth insulating layer 111b4 are coplanar. The other surface of the passive element 112d, the other surface of the passive element 112e, and the other surface of the passive element 112f covered by the fourth insulating layer 111b4 may each be spaced apart from the first core layer 111a1 by a predetermined distance. In addition, the heights of the connection through holes 115d, the connection through holes 115e, and the connection through holes 115f may be the same as each other. Therefore, in the process of forming the third insulating layer 111b3, the connecting vias 115d, the connecting vias 115e, the connecting vias 115f, and the second core wiring layer 116b, more excellent via processing and plating quality can also be achieved. There are no defects such as voids or undulations. The through holes 111a2h formed in the second core layer 111a2 may each be a hole formed to continuously surround the passive element 112d, the passive element 112e, and the passive element 112f accommodated in each through hole 111a2h when viewed in plan. In addition, the connection through hole 115d, the connection through hole 115e, and the connection through hole 115f may have a tapered shape whose taper direction corresponds to each of the connection through hole 115a, the connection through hole 115b, and the connection through hole 115c The taper direction is opposite. Meanwhile, the description of the board with embedded passive components 100B according to another example and the board with embedded passive components 100C according to another example can also be applied to the board with embedded passive components 100D according to another example. Descriptions of other configurations overlap with those described above with reference to FIGS. 3 to 11 , and are therefore omitted.

13 is a schematic cross-sectional view showing an example of a situation in which a semiconductor package is mounted on a board with embedded passive components.

13 , in the case where the board with embedded passive components 100A according to the example is used as a BGA board, on the board 100A with embedded passive components, the first semiconductor wafer 311 , the second semiconductor wafer 312 and the The third semiconductor die 313 is mounted on the interposer 314 and is electrically connected to the semiconductor packages 300 of each other. Here, instead, the DSC 400 and the LSC 450 disposed on the BGA board according to the related art may be embedded in the board 100A with embedded passive components as the passive component 112a, the passive component 112b, and the passive component 112c to pass through the first build-up layer The plurality of first wiring layers 122 and the like of the structure 120 are electrically connected to the first semiconductor chip 311 , the second semiconductor chip 312 and the third semiconductor chip 313 of the semiconductor package 300 with very short electrical paths. Meanwhile, the first semiconductor chip 311 can be an application specific integrated circuit (ASIC), and the second semiconductor chip 312 and the third semiconductor chip 313 can be a high bandwidth memory (HBM). However, the first semiconductor wafer 311 , the second semiconductor wafer 312 and the third semiconductor wafer 313 are not limited thereto. Meanwhile, the semiconductor package 300 can also be mounted on the board with embedded passive components 100B, the board with embedded passive components 100C, and the board with embedded passive components 100D according to other examples in substantially the same manner.

14 is a schematic cross-sectional view showing an example of a situation in which a semiconductor wafer is mounted on a board with embedded passive components.

14 , in the case where the board with embedded passive components 100A according to the example is used as a BGA board, a packaged semiconductor die 350 may be mounted on the board with embedded passive components 100A. Here, instead, the DSC 400 and the LSC 450 disposed on the BGA board according to the related art may be embedded in the board 100A with embedded passive components as the passive component 112a, the passive component 112b, and the passive component 112c to pass through the first build-up layer The plurality of first wiring layers 122 and the like of the structure 120 are electrically connected to the semiconductor chips 351 in the packaged semiconductor chips 350 with very short electrical paths. Meanwhile, the semiconductor wafer 351 may be a central processing unit (CPU), but is not limited thereto. Meanwhile, the packaged semiconductor chip 350 can also be mounted on the board with embedded passive components 100B, the board with embedded passive components 100C, and the board with embedded passive components 100D according to other examples in substantially the same manner.

Figure 15 schematically represents the effect of a board with embedded passive components.

15 , the board 100A with embedded passive components, the board 100B with embedded passive components, the board 100C with embedded passive components, or the board 100D with embedded passive components is used in place of the BGA board according to the related art (eg 13 or 14), passive components 112a, passive components 112b, and passive components 112c are embedded in board 100A with embedded passive components, in board 100B with embedded passive components, with embedded passive components The board 100C or board 100D with embedded passive components in order to be electrically connected to the semiconductor die with very short electrical paths. Therefore, compared to the case of using DSC and LSC, the distance between the chip and the capacitor can be reduced, thereby making it possible to effectively reduce the parasitic inductance and impedance of the board. Therefore, the power integrity characteristics can be effectively improved.

As described above, according to exemplary embodiments in the present disclosure, a board with embedded passive components can be provided that can be reduced by significantly reducing the distance between the semiconductor die and the passive components The parasitic inductance and impedance of the device improves power integrity, improves reliability by significantly reducing defects such as voids or ripples, and specifically, even in which passive components are embedded when multiple passive components are embedded. In the case where the thicknesses are different from each other, excellent through-hole processing and plating quality can also be obtained.

In this disclosure, the term "coplanar" (which means that components are located on substantially the same level) herein is a concept that includes not only the situation where components are located on the exact same level, but also includes due to the process errors in which the components are located at slightly different levels. In addition, the phrase "same height" herein is a concept that includes not only the case where the heights of the components are identical to each other, but also the case where there is a slight difference between the heights of the components due to errors in the process. That is, the phrase "same height" means that the heights of the components are substantially the same as each other.

Herein, for convenience, the lower side, lower portion, lower surface, etc. are used to refer to the direction toward the mounting surface of the semiconductor package including the organic interposer with respect to the cross-section of the drawings, while the upper side, upper portion, The upper surface and the like are used to refer to the direction opposite to the stated direction. However, these directions are defined for convenience of explanation, and the scope of the present application is not particularly limited by the directions defined above.

While exemplary embodiments have been shown and described above, it will be apparent to those skilled in the art that modifications and variations can be made without departing from the scope of the invention as defined by the appended claims.

100A, 100B, 100C, 100D‧‧‧ board 110A, 110B, 110C‧‧‧Core structure 111a1‧‧‧Core Layer/First Core Layer 111a1h‧‧‧Through hole 111a2‧‧‧Core Layer/Second Core Layer 111a2h‧‧‧Through Hole/Second Through Hole 111a3‧‧‧The third core layer 111b1‧‧‧Insulating layer/First insulating layer 111b2‧‧‧Insulating layer/Second insulating layer 111b3‧‧‧Insulating layer/Third insulating layer 111b4‧‧‧Insulating Layer/Fourth Insulating Layer 111b5‧‧‧Fifth insulating layer 112a, 112b, 112c, 112d, 112e, 112f‧‧‧Passive components 114‧‧‧Through hole 114a‧‧‧Metal materials 114b‧‧‧plugging material 114h‧‧‧Through Hole 115a, 115b, 115c, 115d, 115e, 115f‧‧‧connecting through holes 115ah, 115bh, 115ch, 123h, 133h‧‧‧Through Hole 116a‧‧‧First core wiring layer 116as‧‧‧First copper foil 116b‧‧‧Second core wiring layer 116bs‧‧‧Second copper foil 116c‧‧‧Marking pattern 120‧‧‧First Laminated Structure 121‧‧‧Laminated Layer/First Laminated Layer 122‧‧‧Wiring Layer/First Wiring Layer 123‧‧‧Wire Via Layer/First Wiring Via Layer 124‧‧‧First passivation layer 124h, 134h‧‧‧opening 130‧‧‧Second Laminated Structure 131‧‧‧Laminate/Second Laminate 132‧‧‧Wiring Layer/Second Wiring Layer 133‧‧‧Second wiring through hole layer 134‧‧‧Second passivation layer 140‧‧‧First Electrical Connection Structure 150‧‧‧Second Electrical Connection Structure 210‧‧‧Tape 220‧‧‧Copper foil 300, 1121‧‧‧Semiconductor packaging 311‧‧‧First Semiconductor Chip 312‧‧‧Second semiconductor chip 313‧‧‧Third semiconductor chip 314‧‧‧Interposer 350‧‧‧Packaged semiconductor chips 351‧‧‧Semiconductor chips 400‧‧‧Die Side Capacitor (DSC) 450‧‧‧Lead Side Capacitor (LSC) 1000‧‧‧Electronic devices 1010‧‧‧Mainboard 1020‧‧‧Chip related components 1030‧‧‧Network related components 1040‧‧‧Other components 1050, 1130‧‧‧Camera 1060‧‧‧Antenna 1070‧‧‧Display device 1080‧‧‧battery 1090‧‧‧Signal Line 1100‧‧‧Smart Phone 1101‧‧‧Main body 1110‧‧‧Motherboard 1120‧‧‧Electronic components

The above and other aspects, features and advantages of the present invention will be more clearly understood by reading the following detailed description in conjunction with the accompanying drawings, in which: FIG. 1 is a block schematic diagram illustrating an example of an electronic device system. FIG. 2 is a schematic perspective view illustrating an example of an electronic device. 3 is a schematic cross-sectional view showing an example of a board with embedded passive components. 4 to 9 are schematic diagrams illustrating an example of a process for manufacturing the board with embedded passive components shown in FIG. 3 . 10 is a schematic cross-sectional view showing another example of a board with embedded passive components. 11 is a schematic cross-sectional view showing another example of a board with embedded passive components. 12 is a schematic cross-sectional view showing another example of a board with embedded passive components. 13 is a schematic cross-sectional view showing an example of a situation in which a semiconductor package is mounted on a board with embedded passive components. 14 is a schematic cross-sectional view showing an example of a situation in which a semiconductor wafer is mounted on a board with embedded passive components. Figure 15 schematically represents the effect of a board with embedded passive components.

111a1‧‧‧Core Layer/First Core Layer

111a1h‧‧‧Through hole

111a2‧‧‧Core Layer/Second Core Layer

111b1‧‧‧Insulating layer/First insulating layer

111b2‧‧‧Insulating layer/Second insulating layer

111b3‧‧‧Insulating layer/Third insulating layer

111b4‧‧‧Insulating Layer/Fourth Insulating Layer

112a, 112b, 112c‧‧‧Passive components

116as‧‧‧First copper foil

116bs‧‧‧Second copper foil

116c‧‧‧Marking pattern

Claims (17)

A board with embedded passive components, comprising: a core structure, including a first insulating layer, a first core layer, one or more first passive components, a second insulating layer, a second core layer and a third insulating layer, the The first core layer is disposed on the first insulating layer and includes a first through hole, the one or more first passive components are disposed in the first through hole, and the second insulating layer covers the first through hole One or more first passive components fill at least part of the first through holes, the second core layer is disposed on the second insulating layer, and the third insulating layer is disposed on the second core layer a first build-up structure, disposed on one side of the core structure and comprising a plurality of first build-up layers and a plurality of first wiring layers; and a second build-up structure disposed on the other side of the core structure and includes a plurality of second build-up layers and a plurality of second wiring layers, wherein one surface of the first core layer in contact with the first insulating layer and the one or more layers in contact with the first insulating layer One surface of each of the first passive components is coplanar, and the other surface of each of the one or more first passive components covered by the second insulating layer is coplanar with the second core The layers are spaced apart, and the one or more first passive components are electrically connected to at least one of the plurality of first wiring layers and the plurality of second wiring layers. The board with embedded passive components as described in claim 1, wherein one surface of the second insulating layer in contact with the first insulating layer and the first insulating layer in contact with the first insulating layer a core layer and the one or more first One surface of each of the moving components is coplanar. The board with embedded passive components of claim 2, wherein the first core layer has a thickness equal to or greater than the thickness of each of the one or more first passive components. The board with embedded passive components of claim 1, wherein the one or more first passive components include a 1-1 passive component and a 1-2 passive component, and the first passive component is One surface of the 1-1 passive component in contact with the insulating layer and one surface of the 1-2 passive component in contact with the first insulating layer are coplanar with each other. The board with embedded passive components according to claim 4, wherein the 1-1 passive component and the 1-2 passive component have different thicknesses from each other and are separated by the second insulating layer The other surface of the covered 1-1 passive component and the other surface of the 1-2 passive component covered by the second insulating layer are located at different levels. The board with embedded passive components as claimed in claim 4, wherein the core structure further comprises a first core wiring layer, a 1-1 connection via hole and a 1-2 connection via hole, and the A core wiring layer is disposed on a side of the first insulating layer opposite to the first core layer, and the 1-1 connection through hole and the 1-2 connection through hole respectively penetrate through the first core layer. an insulating layer electrically connecting the first core wiring layer to the 1-1 passive component and the 1-2 passive component, respectively, The first core wiring layer is electrically connected to the plurality of first wiring layers, and the 1-1 connection through hole and the 1-2 connection through hole have the same height. The board with embedded passive components according to claim 6, wherein the core structure further comprises a second core wiring layer and a through hole, and the second core wiring layer is disposed on the third insulating layer. On the side opposite to the second core layer, the through hole penetrates the first insulating layer, the first core layer, the second insulating layer, the second core layer and the third The owner in the insulating layer electrically connects the first core wiring layer and the second core wiring layer to each other, and the second core wiring layer is electrically connected to the plurality of second wiring layers. The board with embedded passive components as claimed in claim 1, wherein the core structure further comprises a core structure disposed on the other surface of the first core layer covered by the second insulating layer marking patterns, and at least one of the marking patterns is electrically insulated from the plurality of first wiring layers and the plurality of second wiring layers. The board with embedded passive components of claim 1 , wherein each of the first core layer and the second core layer has a thickness greater than that of the first build-up layer and the second build-up layer. The thickness of the thickness of each. The board with embedded passive components of claim 9, wherein each of the first core layer and the second core layer has a thickness greater than that of the first build-up layer and the second build-up layer. The elastic modulus of the elastic modulus of each. With embedded passive components as described in claim 1 of the scope of application The board, wherein the core structure further comprises a third core layer disposed on the third insulating layer and a fourth insulating layer disposed on the third core layer. The board with embedded passive components as claimed in claim 1, wherein the second core layer includes a second through hole, and the board further includes one or more through holes disposed in the second through hole a second passive component. The board with embedded passive components as claimed in claim 12, wherein the one or more second passive components include a 2-1 passive component and a 2-2 passive component, and the core structure further includes a fourth insulating layer, a second core wiring layer, a 2-1 connection via hole and a 2-2 connection via hole, the fourth insulating layer being disposed between the second insulating layer and the second core layer , so as to cover the one or more second passive components and fill at least part of the second through holes, the second core wiring layer is disposed on the third insulating layer opposite to the second core layer On one side, the 2-1 connection through hole and the 2-2 connection through hole respectively penetrate through the third insulating layer and electrically connect the second core wiring layer to the 2-2 1 passive component and the 2-2 passive component, the second core wiring layer is electrically connected to the plurality of second wiring layers, and the 2-1 passive component in contact with the third insulating layer One surface of the 2-2 passive component in contact with the third insulating layer and one surface of the second core layer in contact with the third insulating layer are coplanar, The other surface of the 2-1 passive component covered by four insulating layers and The other surfaces of the 2-2 passive components covered by the fourth insulating layer are each spaced apart from the first core layer, and the 2-1 connecting vias are connected to the 2-2 The vias have the same height. The board with embedded passive components as described in claim 1, further comprising a semiconductor package, the semiconductor package is disposed on a side of the first build-up structure opposite to the core structure, wherein the One or more first passive components are electrically connected to the semiconductor package through the plurality of first wiring layers. The board with embedded passive components according to claim 1, further comprising a semiconductor wafer, the semiconductor wafer is disposed on a side of the first build-up structure opposite to the core structure, wherein the One or more first passive components are electrically connected to the semiconductor chip through the plurality of first wiring layers. The board with embedded passive components according to claim 1, further comprising a plurality of electrical connection metals, the plurality of electrical connection metals are disposed on the second laminate structure opposite to the core structure on one side of the , wherein the one or more first passive components are electrically connected to at least one of the plurality of electrically connecting metals through the plurality of first wiring layers and the plurality of second wiring layers one. The board with embedded passive components as claimed in claim 1, wherein the first build-up structure includes first through holes that penetrate through the plurality of first build-up layers and are respectively connected to the plurality of first wiring layers, The second build-up structure includes a second through hole, the second through hole penetrates the plurality of second build-up layers and is respectively connected to the plurality of second wiring layers, and the first through hole is connected to the plurality of second wiring layers. The second through hole tapers in the opposite direction.

Images