TWI755155B - RC oscillator circuit and information processing device - Google Patents

Abstract

The present invention mainly discloses an RC oscillator circuit, which includes a zero temperature coefficient current source, an oscillation signal generating unit and a signal shaping unit, and is characterized in that the oscillation signal generating unit includes a core oscillation unit and a comparator unit, The oscillation signal generating unit generates a first differential signal and a second differential signal according to a zero temperature coefficient current received from the zero temperature coefficient current source, so that the comparator unit is based on the first differential signal and the first differential signal. Two differential signals to output an oscillating signal. Finally, after the signal shaping unit performs a signal shaping process on the oscillating signal, it outputs a square wave signal used as a clock signal. In particular, the RC oscillator circuit of the present invention can output a square wave signal with a 50% duty cycle without providing a reference voltage to the comparator unit and without strictly controlling the charge/discharge current of the capacitor.

Description

RC oscillator circuit and information processing device

The present invention relates to the technical field of oscillators, in particular to an RC oscillator circuit that does not need to provide a reference voltage to a comparator and does not need to strictly control the charge/discharge current of a capacitor.

It is known that an electronic oscillator is a special electronic circuit used to generate a periodic analog signal (such as a sine wave, a square wave, or a triangular wave), and has been widely used in integrated circuit chips (ie. , electronic chips). Conventional oscillators are mainly divided into harmonic oscillators and relaxation oscillators. The relaxation oscillators are also called RC oscillators, which are mainly used to generate clock signals required by digital logic circuits. With the gradual improvement of the integration level of electronic chips, RC oscillators are widely integrated in various electronic chips due to their advantages of small circuit area, easy integration and low cost.

FIG. 1 shows a circuit structure diagram of a conventional RC oscillator. As shown in FIG. 1, the conventional RC oscillator 1a includes: a charging current source 11a, a first switch 12a, a second switch 13a, a discharging current source 14a, a capacitor 15a, a comparator 16a, a first Two comparators 17a, and an RS latch unit 18a. In the conventional RC oscillator 1a, the comparator 16a receives a first reference voltage V _{REF_H} and a capacitor terminal voltage V _C of the capacitor 15a, and the second comparator 17a receives a second reference voltage V _{REF_L} and the capacitor terminal voltage V _C . It should be understood that when the first reference voltage V _{REF_H} and the second reference voltage V _{REF_L} are fixed, the level of the output signals of the comparator 16a and the second comparator 17a will increase with the change of the capacitor terminal voltage V _C , flip down. Therefore, by using a first switch control signal S1 and a second switch control signal S2 to control the first switch 12a and the second switch 13a to be turned on and off periodically, the comparator 16a and the second comparator 17a can be respectively A certain period oscillation signal is output to the RS latch unit 18a. Finally, after the constant period oscillation signal is shaped by the RS latch unit 18a, a square wave signal used as a clock signal is output.

It is worth noting that the conventional RC oscillator 1a needs to use two high-performance comparators, and at the same time, two stable reference voltages are required as the threshold voltages of the comparators, resulting in the setting of the peripheral circuits required for the RC oscillator 1a. complex. On the other hand, in order for the square wave signal output by the RS latch unit 18a to have a 50% duty cycle, it is necessary to control the charging current and the discharging current to be strictly consistent, so as to ensure the charging time and discharging time of the capacitor 15a. Strictly consistent, ultimately increases the difficulty of circuit design and is not easy to achieve.

It can be seen from the above description that there is an urgent need in the art for a new RC oscillator circuit that does not need to provide a reference voltage to the comparator and does not need to strictly control the charge/discharge current of the capacitor.

The main purpose of the present invention is to provide an RC oscillator circuit, which can output a square wave with a duty cycle of 50% without providing a reference voltage to the comparator unit and without strictly controlling the charge/discharge current of the capacitor Signal.

In order to achieve the above object, the present invention proposes an embodiment of the RC oscillator circuit, which includes:

a zero temperature coefficient current source for generating a zero temperature coefficient current;

an oscillating signal generating unit coupled to the zero temperature coefficient current source for generating an oscillating signal; wherein the oscillating signal generating unit includes a core oscillating unit and a comparator unit, the core oscillating unit is The zero temperature coefficient current of the coefficient current source generates a first differential signal and a second differential signal, so that the comparator unit outputs the oscillating signal after receiving the first differential signal and the second differential signal ;as well as

A signal shaping unit, coupled to the comparator unit of the oscillating signal generating unit, is used for performing a signal shaping process on the oscillating signal, thereby outputting a clock signal.

In one embodiment, the core oscillator unit includes:

a first resistor, a first end of which is coupled to a working voltage;

a first P-type MOSFET element, a source terminal of which is coupled to a second terminal of the first resistor;

a second resistor, a first end of which is coupled to the working voltage;

a second P-type MOSFET element, a source terminal of which is coupled to a second terminal of the second resistor;

a capacitor, a first terminal of which is coupled to a drain terminal of the first P-type MOSFET element, and a second terminal of which is coupled to a drain terminal of the second P-type MOSFET element;

A third P-type MOSFET element, a source terminal of which is coupled to a first common connection between the drain terminal of the first P-type MOSFET element and the capacitor, and a drain terminal of which is coupled to the first P-type MOSFET One gate terminal of the MOSFET element;

A fourth P-type MOSFET element, a source terminal of which is coupled to a second common contact between the drain terminal of the second P-type MOSFET element and the capacitor, and a drain terminal of which is coupled to the second P-type MOSFET One gate terminal of the MOSFET element;

a third resistor, a first terminal of which is coupled to a third common contact between the drain terminal of the third P-type MOSFET element and the gate terminal of the first P-type MOSFET element;

a fourth resistor, a first terminal of which is coupled to a fourth common contact between the drain terminal of the fourth P-type MOSFET element and the gate terminal of the second P-type MOSFET element, and a second the end is coupled to a second end of the third resistor; and

A current mirror has a first electrical terminal, a second electrical terminal and a third electrical terminal, wherein the first electrical terminal is coupled to the zero temperature coefficient current source, and the second electrical terminal is coupled to A fifth common contact between the third resistor and the fourth resistor, and the third electrical terminal is coupled to a ground terminal.

In one embodiment, the comparator unit includes a comparator having a positive input terminal, a negative input terminal and an output terminal, wherein the negative input terminal is coupled to the third common node to receive the first differential signal, the positive input terminal is coupled to the fourth common contact to receive the second differential signal, and the output terminal is used to output the oscillating signal.

In one embodiment, the signal shaping unit includes:

a first inverter, an input terminal of which is coupled to the output terminal of the comparator; and

A second inverter, an input terminal of which is coupled to an output terminal of the first inverter, and an output terminal of which is used for outputting the clock signal.

In one embodiment, the current mirror includes:

a first N-type MOSFET element, a drain terminal of which is coupled to the fifth common contact, and a source terminal of which is coupled to the ground terminal; and

A second N-type MOSFET element, a drain terminal of which is coupled to the zero temperature coefficient current source to receive the zero temperature coefficient current, a source terminal of which is coupled to the ground terminal, and a gate terminal of which is coupled to the first N One gate terminal of the type MOSFET element.

In one embodiment, the zero temperature coefficient current source includes:

a bandgap reference circuit unit for generating a reference voltage;

an operational amplifier having a positive input terminal, a negative input terminal and an output terminal, and the negative input terminal is coupled to the bandgap reference circuit to receive the reference voltage;

a fifth P-type MOSFET element, a gate terminal of which is coupled to the output terminal of the operational amplifier, and a source terminal of which is coupled to the operating voltage;

a positive temperature coefficient resistor, a first end of which is coupled to a drain end of the fifth P-type MOSFET element;

a negative temperature coefficient resistor, a first terminal of which is coupled to a second terminal of the positive temperature coefficient resistor, and a second terminal of which is coupled to the ground terminal;

A sixth P-type MOSFET element, a gate terminal of which is coupled to a sixth common point between the fifth P-type MOSFET element and the output terminal of the operational amplifier, and a source terminal of which is coupled to the operating voltage ;as well as

A seventh P-type MOSFET element has a gate terminal coupled to the sixth common contact and a source terminal coupled to the operating voltage.

In a possible embodiment, the RC oscillator circuit of the present invention further includes a first resistance adjustment unit coupled to the first end and the second end of the third resistor, and the first resistance adjustment unit includes :

a plurality of first adjustment resistors, wherein a first end of each of the first adjustment resistors is coupled to the first end of the third resistor; and

A plurality of first switching elements, wherein each of the first switching elements is connected in series with each of the first adjustment resistors, so that a second end of each of the first adjustment resistors passes through one of the first switching elements connected in series with the first switching element. The channel is coupled to the second end of the third resistor; wherein each of the first switching elements has a control end for receiving a first switching control signal, so as to be activated according to the control of the first switching control signal or disconnect the channel.

In a possible embodiment, the RC oscillator circuit of the present invention further includes a second resistance adjustment unit coupled to the first end and the second end of the fourth resistor, and the second resistance adjustment unit includes :

a plurality of second adjustment resistors, wherein a first end of each of the second adjustment resistors is coupled to the first end of the fourth resistor; and

A plurality of second switch elements, wherein each of the second switch elements is connected in series with each of the second adjustment resistors, so that a second end of each of the second adjustment resistors passes through one of the second switch elements connected in series with it. The channel is coupled to the second end of the fourth resistor; wherein, each of the second switch elements has a control end for receiving a second switch control signal, so as to be activated according to the control of the second switch control signal or disconnect the channel.

The present invention also provides an information processing device, which has at least one electronic chip, and the electronic chip includes an RC oscillator circuit of the present invention as described above.

In one embodiment, the information processing device is selected from the group consisting of smart phones, smart watches, smart bracelets, tablet computers, notebook computers, all-in-one computers, access control devices, desktop computers, and industrial computers. An electronic device in a group.

In order to enable your examiners to further understand the structure, characteristics, purpose, and advantages of the present invention, drawings and detailed descriptions of preferred embodiments are attached as follows.

FIG. 2 shows a block diagram of an RC oscillator circuit of the present invention. The present invention discloses an RC oscillator circuit that can be applied in an integrated circuit chip (ie, an electronic chip) to generate a clock signal required by a digital logic circuit inside the electronic chip. The features and advantages of the RC oscillator circuit of the present invention are that the RC oscillator circuit of the present invention can output a 50% duty cycle without providing a reference voltage to the comparator unit and without strictly controlling the charge/discharge current of the capacitor. The ratio of the square wave signal is used as the clock signal.

As shown in FIG. 2, the RC oscillator circuit 1 of the present invention mainly includes a zero temperature coefficient current source 10, an oscillation signal generating unit 11 and a signal shaping unit 12, wherein the zero temperature coefficient current source 10 is used to generate a zero temperature coefficient current source 10. temperature coefficient current I0 , and the oscillation signal generating unit 11 is coupled to the zero temperature coefficient current source 10 . According to the design of the present invention, the oscillating signal generating unit 11 includes a core oscillating unit 111 and a comparator unit 112 . As shown in FIG. 2 , the core oscillation unit 111 generates a first differential signal Out0 and a second differential signal Out1 according to a zero temperature coefficient current I0 received from the zero temperature coefficient current source 10 , so that the comparator unit 112 outputs an oscillation signal after receiving the first differential signal Out0 and the second differential signal Out1. More specifically, the signal shaping unit 12 is coupled to the comparator unit 112 of the oscillating signal generating unit 11 for performing a signal shaping process on the oscillating signal, thereby outputting a square wave signal used as a clock signal.

Continue to refer to FIG. 2, and please refer to FIG. 3 at the same time, which shows a circuit topology diagram of the RC oscillator circuit of the present invention. As shown in FIG. 3, the core oscillation unit 111 includes: a first resistor R1, a first P-type MOSFET element Mp1, a second resistor R2, a second P-type MOSFET element Mp2, a capacitor C0, a A third P-type MOSFET element Mp3 , a fourth P-type MOSFET element Mp4 , a third resistor R3 , a fourth resistor R4 , and a current mirror 1111 . Wherein, a first end of the first resistor R1 is coupled to a working voltage V _DD , and a source end of the first P-type MOSFET element Mp1 is coupled to a second end of the first resistor R1 . On the other hand, a first end of the second resistor R2 is coupled to the operating voltage V _DD , and a source end of the second P-type MOSFET element Mp2 is coupled to a second end of the second resistor R2 .

In more detail, a first terminal of the capacitor C0 is coupled to a drain terminal of the first P-type MOSFET element Mp1, and a second terminal thereof is coupled to a drain terminal of the second P-type MOSFET element Mp2. In addition, a source terminal of the third P-type MOSFET element Mp3 is coupled to a first common contact CN1 between the drain terminal of the first P-type MOSFET element Mp1 and the capacitor C0, and a drain terminal thereof is coupled to A gate terminal of the first P-type MOSFET element Mp1. 3 also shows that a source terminal of the fourth P-type MOSFET element Mp4 is coupled to a second common contact CN2 between the drain terminal of the second P-type MOSFET element Mp2 and the capacitor C0, and a drain terminal thereof The terminal is coupled to a gate terminal of the second P-type MOSFET element Mp2. And, a first terminal of the third resistor R3 is coupled to a third common contact CN3 between the drain terminal of the third P-type MOSFET element Mp3 and the gate terminal of the first P-type MOSFET element Mp1 . On the other hand, a first terminal of the fourth resistor R4 is coupled to a fourth common contact between the drain terminal of the fourth P-type MOSFET element Mp4 and the gate terminal of the second P-type MOSFET element Mp2 CN4, and a second end thereof is coupled to a second end of the third resistor R3. Further, a first electrical terminal of the current mirror 1111 is coupled to the zero temperature coefficient current source 10, and a second electrical terminal of the current mirror 1111 is coupled to a connection between the third resistor R3 and the fourth resistor R4 The fifth common contact CN5 has a third electrical terminal coupled to a ground terminal.

As shown in FIG. 2 and FIG. 3 , in the oscillation signal generating unit 11 , the comparator unit 112 includes a high-speed comparator 1121 having a positive input terminal, a negative input terminal and an output terminal. The negative input terminal is coupled to the third common contact CN3 to receive the first differential signal Out0, the positive input terminal is coupled to the fourth common contact CN4 to receive the second differential signal Out1, And the output end is used for outputting the oscillation signal. Further, FIG. 3 also shows that the signal shaping unit 12 includes a first inverter 121 and a second inverter 122 , wherein an input end of the first inverter 121 is coupled to the comparator 1121 output terminal, and an input terminal of the second inverter 122 is coupled to an output terminal of the first inverter 121 . In more detail, an output terminal of the second inverter 122 is used for outputting the clock signal.

It is added that, in the core oscillation unit 111, the current mirror 1111 includes a first N-type MOSFET element Mn1 and a second N-type MOSFET element Mn2. Wherein, a drain terminal of the first N-type MOSFET element Mn1 is coupled to the fifth common node CN5, and a source terminal thereof is coupled to the ground terminal. In addition, the second N-type MOSFET element Mn2 has a drain terminal coupled to the zero temperature coefficient current source 10 to receive the zero temperature coefficient current I0, a source terminal thereof is coupled to the ground terminal, and a gate terminal thereof is coupled to the ground terminal. The terminal is coupled to a gate terminal of the first N-type MOSFET element Mn1.

Continue to refer to FIG. 2 and FIG. 3 , and also refer to FIG. 4 , which shows a circuit topology diagram of the zero temperature coefficient current source of the RC oscillator circuit of the present invention. In an exemplary embodiment, the circuit topology of the zero temperature coefficient current source 10 may include: a bandgap reference circuit unit 101 for generating a reference voltage V _REF , an operational amplifier 102 , and a fifth P-type MOSFET The element Mp5, a positive temperature coefficient resistor R _TC0 , a negative temperature coefficient resistor R _TC1 , a sixth P-type MOSFET element Mp6 , and a seventh P-type MOSFET element Mp7 . As shown in FIG. 4 , the operational amplifier 102 has a positive input terminal, a negative input terminal and an output terminal, and the negative input terminal is coupled to the bandgap reference circuit 101 to receive the reference voltage V _REF . On the other hand, a gate terminal of the fifth P-type MOSFET element Mp5 is coupled to the output terminal of the operational amplifier 102 , and a source terminal thereof is coupled to the operating voltage V _DD . It should be noted that a first end of the positive temperature coefficient resistor R _TC0 is coupled to a drain end of the fifth P-type MOSFET element Mp5 , and a first end and a second end of the negative temperature coefficient resistor R _TC1 are respectively coupled to a second end of the positive temperature coefficient resistor R _TC0 and the ground end. In more detail, a gate terminal of the sixth P-type MOSFET element Mp6 is coupled to a sixth common contact CN6 between the fifth P-type MOSFET element Mp5 and the output terminal of the operational amplifier 102, and its A source terminal is coupled to the working voltage V _DD . In addition, a gate terminal of the seventh P-type MOSFET element Mp7 is coupled to the sixth common node CN6, and a source terminal thereof is coupled to the working voltage V _DD .

As shown in FIG. 3 , the zero temperature coefficient current I0 generated by the zero temperature coefficient current source 10 is mirrored by the current mirror 1111 as a tail current (Tail current) I _T of the core oscillation unit 111 . As shown in FIG. 4 , in the circuit structure of the zero temperature coefficient current source 10 , the bandgap reference circuit unit 101 generates a stable reference voltage V _REF and transmits it to the negative input of the operational amplifier 102 (ie, the error amplifier) terminal, use the operational amplifier 102 to control the fifth P-type MOSFET element Mp5 to generate a drain current, and finally make a zero temperature coefficient bias current Ibias flow through the positive temperature coefficient resistor R _TC0 (ie, Temperature Coefficient, TC>0) and the negative temperature coefficient resistor R _TC1 (ie, TC < 0). The value of the zero temperature coefficient bias current Ibias can be calculated by the following formula (1), and the following formula (2) is used to express the result of performing partial differentiation on the formula (1).

………………………………………… (1)

………………………………………… (1)

，(

) ………(2)

, (

) ………(2)

As can be seen from the above formulas (1) and (2), a positive temperature coefficient resistor R _TC0 and a negative temperature coefficient resistor R _TC1 are connected in series to the drain of the fifth P-type MOSFET element Mp5, so that the positive temperature coefficient resistor flows through the positive temperature coefficient resistor. The bias current Ibias of R _TC0 and the negative temperature coefficient resistor R _TC1 has the property of zero temperature coefficient. Finally, as shown in FIG. 3 , the zero temperature coefficient current I0 generated by the zero temperature coefficient current source 10 is mirrored by the current mirror 1111 as a tail current (Tail current) I _T of the core oscillation unit 111 .

To describe in more detail, when the core oscillation unit 111 is working normally, the third P-type MOSFET element Mp3 and the fourth P-type MOSFET element Mp4 form a voltage positive feedback closed loop. The first differential signal Out0 controls the first P-type MOSFET element Mp1 and the fourth P-type MOSFET element Mp4, and the second differential signal Out1 controls the second P-type MOSFET element Mp2 and the third P-type MOSFET element Mp3. In this case, the first P-type MOSFET element Mp1 and the fourth P-type MOSFET element Mp4 and the second P-type MOSFET element Mp2 and the third P-type MOSFET element Mp3 charge and discharge the capacitor C0 alternately. It should be noted that, after being amplified by the fourth P-type MOSFET element Mp4 , the fine noise signal of the first differential signal Out0 will be superimposed on the second differential signal Out1 in an opposite phase. Likewise, after being amplified by the third P-type MOSFET element Mp3, the fine noise signal of the second differential signal Out1 will be superimposed on the first differential signal Out0 with an opposite phase.

According to the design of the present invention, the waveform shapes of the first differential signal Out0 and the second differential signal Out1 are exactly the same, and the phases differ by approximately 180 degrees. In the initial state, if Oout0=0 and Oout1=1, the first P-type MOSFET element Mp1 and the fourth P-type MOSFET element Mp4 are turned on. At this time, the left plate (ie, the first terminal) of the capacitor C0 is charged and its right plate (ie, the second terminal) is discharged, while the second P-type MOSFET element Mp2 and the third P-type MOSFET element Mp3 are approximately currentless flow past. During the charging process of the capacitor C0, the source terminal voltage of the third P-type MOSFET element Mp3 is gradually pulled up until the third P-type MOSFET element Mp3 is turned on, so that part of the tail current I _T flows through the third P-type MOSFET element Mp3 and The third resistor R3 pulls Out0 high until the first P-type MOSFET element Mp1 and the fourth P-type MOSFET element Mp4 are turned off. At this time, no current flows through the fourth P-type MOSFET element Mp4 and the fourth resistor R4, so that Out1 is pulled down until the second P-type MOSFET element Mp2 and the third P-type MOSFET element Mp3 are turned on and the right plate of the capacitor C0 (ie, the second end) is charged and its left plate (ie, the first end) is discharged. At this time, the first differential signal Out0 and the second differential signal Out1 are inverted (ie, Oout0=1 and Oout1=0), and an oscillation signal is generated. According to the operation, as long as the rising delay and falling delay of the comparator 1121 are the same, the clock signal (ie, the periodic square wave signal) output by the signal shaping unit 12 can be guaranteed to have a duty cycle of 50%, and no strict control is required. Charge and discharge current of capacitor 0.

It is added that the RC oscillator circuit 1 of the present invention further includes an oscillation frequency adjustment unit 15, which is coupled to the core oscillation unit 111 for high-speed comparison of the core oscillation unit 111 according to a trim signal (Trim signal). The device 1121 performs a gain trimming (Gain trimming) gain process. More specifically, adjusting the resistance values of the third resistor R3 and the third resistor R4 can adjust the charge and discharge current of the capacitor C0, thereby controlling the charge and discharge time to adjust the signal frequency of the output clock signal. Therefore, the present invention further adds a first resistance adjustment unit 13 and a second resistance adjustment unit 14 to the circuit topology of the RC oscillator circuit 1 .

As shown in FIG. 3 , the first resistance adjustment unit 13 is coupled to the first end and the second end of the third resistor R3 , and includes a plurality of first adjustment resistors ( R11 ˜ R1n ) and a plurality of first switches The elements ( SW11 ˜ SW1 n ), wherein a first end of each of the first adjusting resistors ( R11 ˜ R1 n ) is coupled to the first end of the third resistor R3 . In addition, each of the first switching elements ( SW11 ˜ SW1 n ) is connected in series with each of the first adjusting resistors ( R11 ˜ R1 n ), so that a second end of each of the first adjusting resistors ( R11 ˜ R1 n ) is connected in series with it. A channel of the first switching elements (SW11~SW1n) is coupled to the second end of the third resistor R3; wherein, each of the first switching elements (SW11~SW1n) has a control terminal for receiving A first switch control signal ( S11 ˜ S1 n ), so as to enable or disable the channel according to the control of the first switch control signal ( S11 ˜ S1 n ).

On the other hand, the second resistance adjusting unit 14 is coupled to the first end and the second end of the fourth resistor R4, and includes a plurality of second adjusting resistors ( R21 ˜ R2n ) and a plurality of second switching elements ( SW21-SW2n), wherein a first end of each of the second adjusting resistors (R21-R2n) is coupled to the first end of the fourth resistor R4. In addition, each of the second switching elements ( SW21 to SW2n ) is connected in series with each of the second adjustment resistors ( R21 to R2n ), so that a second end of each of the second adjustment resistors ( R21 to R2n ) is connected in series with it. A channel of the second switching elements (SW21-SW2n) is coupled to the second end of the fourth resistor R4; wherein, each of the second switching elements (SW21-SW2n) has a control terminal for receiving one second turn off control signals ( S21 ˜ S2n ), so as to enable or turn off the channel according to the control of the second switch control signals ( S21 ˜ S2n ).

Thus, the above has completely and clearly described the RC oscillator circuit of the present invention; and, from the above, it can be known that the present invention has the following advantages:

(1) The present invention discloses an RC oscillator circuit, which includes a zero temperature coefficient current source, an oscillation signal generating unit and a signal shaping unit, and is characterized in that the oscillation signal generating unit includes a core oscillation unit and a comparator The oscillating signal generating unit generates a first differential signal and a second differential signal according to a zero temperature coefficient current received from the zero temperature coefficient current source, so that the comparator unit is based on the first differential signal and the all The second differential signal is used to output an oscillating signal. Finally, after the signal shaping unit performs a signal shaping process on the oscillating signal, it outputs a square wave signal used as a clock signal. In particular, the RC oscillator circuit of the present invention can output a square wave signal with a 50% duty cycle without providing a reference voltage to the comparator unit and without strictly controlling the charge/discharge current of the capacitor.

(2) The present invention also provides an information processing device. The information processing device has at least one electronic chip, and the electronic chip includes an RC oscillator circuit of the present invention as described above. And, the information processing device is selected from the group consisting of smart phones, smart watches, smart bracelets, tablet computers, notebook computers, all-in-one computers, access control devices, desktop computers, and industrial computers An electronic device.

It must be emphasized that the above-mentioned disclosure in this case is a preferred embodiment, and any partial changes or modifications originating from the technical ideas of this case and easily inferred by those who are familiar with the art are within the scope of the patent of this case. category of rights.

To sum up, regardless of the purpose, means and effect of this case, it shows that it is different from the prior art, and its first invention is suitable for practical use, and indeed meets the patent requirements of the invention. To benefit the society is to pray for the best.

1a: RC oscillator

11a: Charge current source

12a: First switch

13a: Second switch

14a: Discharge current source

15a: Capacitor

16a: first comparator

17a: Second comparator

18a: RS Latch Unit

1: RC oscillator circuit

10: Zero temperature coefficient current source

101: Bandgap reference circuit unit

102: Operational Amplifier

11: Oscillation signal generating unit

111: Core oscillator unit

1111: Current Mirror

112: Comparator unit

1121: Comparator

12: Signal shaping unit

121: The first inverter

122: Second inverter

13: The first resistance adjustment unit

14: The second resistance adjustment unit

15: Oscillation frequency adjustment unit

R1: first resistor

R2: Second resistor

R3: the third resistor

R4: Fourth resistor

R _TC0 : Positive temperature coefficient resistor

R _TC1 : Negative Temperature Coefficient Resistor

Mp1: The first P-type MOSFET element

Mp2: Second P-type MOSFET element

Mp3: The third P-type MOSFET element

Mp4: Fourth P-type MOSFET element

Mp5: Fifth P-type MOSFET element

Mp6: Sixth P-type MOSFET element

Mp7: Seventh P-type MOSFET element

Mn1: first N-type MOSFET element

Mn2: Second N-type MOSFET element

R ₁₁ ~R _1n : the first adjustment resistor

R ₂₁ ~R _2n : the second adjustment resistor

SW ₁₁ ~SW _1n : the first switching element

SW ₂₁ ~SW _2n : the second switching element

1 is a circuit diagram of a conventional RC oscillator; 2 shows a block diagram of an RC oscillator circuit of the present invention; FIG. 3 shows the circuit topology diagram of the RC oscillator circuit of the present invention; and FIG. 4 shows the circuit topology diagram of the zero temperature coefficient current source of the RC oscillator circuit of the present invention.

1: RC oscillator circuit

10: Zero temperature coefficient current source

11: Oscillation signal generating unit

111: Core oscillator unit

112: Comparator unit

12: Signal shaping unit

15: Oscillation frequency adjustment unit

Claims (10)

An RC oscillator circuit comprising: a zero temperature coefficient current source 10 for generating a zero temperature coefficient current I0; An oscillating signal generating unit 11 is coupled to the zero temperature coefficient current source 10 and used to generate an oscillating signal; wherein, the oscillating signal generating unit 11 includes a core oscillating unit 111 and a comparator unit 112 , the core oscillating unit 111 According to the zero temperature coefficient current I0 received from the zero temperature coefficient current source 10, a first differential signal Out0 and a second differential signal Out1 are generated, so that the comparator unit 112 receives the first differential signal Out0 and the second differential signal Out1. outputting the oscillation signal after the second differential signal Out1; and A signal shaping unit 12 is coupled to the comparator unit 112 of the oscillating signal generating unit 11 for performing a signal shaping process on the oscillating signal, thereby outputting a clock signal. The RC oscillator circuit according to claim 1, wherein the core oscillation unit 111 comprises: a first resistor R1, a first end of which is coupled to a working voltage V _DD ; a first P-type MOSFET element Mp1, which A source terminal is coupled to a second terminal of the first resistor R1; a second resistor R2, a first terminal of which is coupled to the operating voltage V _DD ; a second P-type MOSFET element Mp2, a source terminal of which is coupled a second terminal of the second resistor R2; a capacitor C0, a first terminal of which is coupled to a drain terminal of the first P-type MOSFET element Mp1, and a second terminal of which is coupled to the second P-type MOSFET A drain terminal of the element Mp2; a third P-type MOSFET element Mp3, a source terminal of which is coupled to a first common contact CN1 between the drain terminal of the first P-type MOSFET element Mp1 and the capacitor C0, and A drain terminal is coupled to a gate terminal of the first P-type MOSFET element Mp1; a fourth P-type MOSFET element Mp4, a source terminal of which is coupled to the drain terminal of the second P-type MOSFET element Mp2 and the capacitor C0 A second common contact CN2 between, and a drain terminal of which is coupled to a gate terminal of the second P-type MOSFET element Mp2; a third resistor R3, a first terminal of which is coupled to the third P-type MOSFET A third common contact CN3 between the drain terminal of the element Mp3 and the gate terminal of the first P-type MOSFET element Mp1; a fourth resistor R4, a first end of which is coupled to the fourth P-type MOSFET element A fourth common contact CN4 between the drain terminal of Mp4 and the gate terminal of the second P-type MOSFET element Mp2, and a second terminal thereof is coupled to a second terminal of the third resistor R3; and a The current mirror 1111 has a first electrical terminal, a second electrical terminal and a third electrical terminal, wherein the first electrical terminal is coupled to the zero temperature coefficient current source 10, and the second electrical terminal is coupled to A fifth common contact CN5 between the third resistor R3 and the fourth resistor R4 is connected, and the third electrical terminal is coupled to a ground terminal. The RC oscillator circuit of claim 2, wherein the comparator unit 112 includes a comparator 1121 having a positive input terminal, a negative input terminal and an output terminal, wherein the negative input terminal is coupled to the third The common contact CN3 is used for receiving the first differential signal Out0, the positive input terminal is coupled to the fourth common contact CN4 for receiving the second differential signal Out1, and the output terminal is used for outputting the oscillating signal. The RC oscillator circuit of claim 3, wherein the signal shaping unit 12 comprises: a first inverter 121, an input terminal of which is coupled to the output terminal of the comparator 1121; and A second inverter 122 has an input terminal coupled to an output terminal of the first inverter 121 and an output terminal for outputting the clock signal. The RC oscillator circuit of claim 4, wherein the current mirror 1111 includes: a first N-type MOSFET element Mn1, a drain terminal of which is coupled to the fifth common node CN5, and a source terminal of which is coupled to the ground terminal; and A second N-type MOSFET element Mn2 has a drain terminal coupled to the zero temperature coefficient current source 10 to receive the zero temperature coefficient current I0, a source terminal coupled to the ground terminal, and a gate terminal coupled to the zero temperature coefficient current source 10 A gate terminal of the first N-type MOSFET element Mn1. The RC oscillator circuit of claim 4, wherein the zero temperature coefficient current source 10 comprises: a bandgap reference circuit unit 101 for generating a reference voltage V _REF ; an operational amplifier 102 having a positive input terminal, a negative input terminal and an output terminal, and the negative input terminal is coupled to the bandgap reference circuit 101 to receive the reference voltage V _REF ; a fifth P-type MOSFET element Mp5, a gate terminal of which is coupled to the operational amplifier The output terminal of 102, and a source terminal thereof is coupled to the working voltage V _DD ; a positive temperature coefficient resistor R _TC0 , a first terminal of which is coupled to a drain terminal of the fifth P-type MOSFET element Mp5; a negative temperature A coefficient resistor R _TC1 , a first terminal of which is coupled to a second terminal of the positive temperature coefficient resistor R _TC0 , and a second terminal of which is coupled to the ground terminal; a sixth P-type MOSFET element Mp6 , a gate terminal of which is is coupled to a sixth common contact CN6 between the fifth P-type MOSFET element Mp5 and the output terminal of the operational amplifier 102, and a source terminal thereof is coupled to the operating voltage V _DD ; and a seventh P-type A gate terminal of the MOSFET element Mp7 is coupled to the sixth common node CN6, and a source terminal thereof is coupled to the working voltage V _DD . The RC oscillator circuit as claimed in claim 4, further comprising a first resistance adjustment unit 13 coupled to the first end and the second end of the third resistor R3, and the first resistance adjustment unit 13 includes: a plurality of first adjustment resistors (R11-R1n), wherein a first end of each of the first adjustment resistors (R11-R1n) is coupled to the first end of the third resistor R3; and a plurality of first switching elements (SW11~SW1n), wherein each of the first switching elements (SW11~SW1n) is connected in series with each of the first adjustment resistors (R11~R1n), so that each of the first adjustment resistors (R11 A second end of ~R1n) is coupled to the second end of the third resistor R3 through a channel of the first switching elements ( SW11 ~ SW1n ) connected in series; wherein, each of the first switching elements ( SW11 ~ SW1n ) SW11˜SW1n) have a control terminal for receiving a first switch control signal (S11˜S1n), so as to enable or disconnect the channel according to the control of the first switch control signal (S11˜S1n). The RC oscillator circuit as claimed in claim 7, further comprising a second resistance adjustment unit 14 coupled to the first end and the second end of the fourth resistor R4, and the second resistance adjustment unit 14 includes: a plurality of second adjustment resistors (R21-R2n), wherein a first end of each of the second adjustment resistors (R21-R2n) is coupled to the first end of the fourth resistor R4; and a plurality of second switching elements ( SW21~SW2n), wherein each of the second switching elements (SW21~SW2n) is connected in series with each of the second adjustment resistors (R21~R2n), so that one second of each of the second adjustment resistors (R21~R2n) The terminal is coupled to the second terminal of the fourth resistor R4 through a channel of the second switching elements (SW21~SW2n) connected in series with it; wherein each of the second switching elements (SW21~SW2n) has a control The terminals are used for receiving a second switch control signal (S21-S2n), so as to enable or disconnect the channel according to the control of the second switch control signal (S21-S2n). An information processing device has at least one electronic chip, and the electronic chip includes the RC oscillator circuit described in any one of claim 1 to claim 8. The information processing device according to claim 9, wherein the information processing device is selected from the group consisting of smart phones, smart watches, smart bracelets, tablet computers, notebook computers, all-in-one computers, access control devices, desktop An electronic device in the group consisting of computers, and industrial computers.

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