TWI753526B - Voltage control - Google Patents

Abstract

This application relates to methods and apparatus for voltage control, and in particular to maintain safe voltages for components of audio driving circuits that are operable in a high voltage mode. An audio driving circuit (100) may include a power supply module (106) and may be operable such that, in use, a voltage magnitude at a source terminal of at least a first transistor (306, 309, 603, 605) of the audio driving circuit can exceed its gate-source voltage tolerance. A voltage generator (111P) is configured to output a first intermediate voltage (V_SAFEP) to an intermediate voltage path for use as a gate control voltage for at least the first transistor, to maintain its gate-source voltage below tolerance. An intermediate path voltage clamp (114P) is provided for selectively clamping the intermediate voltage path to a voltage level, so as to maintain the magnitude of the gate-source voltage of the first transistor below tolerance. The voltage clamp (114P) is enabled by a reset condition (RST) for the audio driving circuit.

Description

voltage control circuit

The field of representative embodiments of the present disclosure pertains to methods, apparatus, and/or implementations related to or related to controlling voltages, and in particular, controlling voltages for audio driving circuitry to avoid the risk of voltage stress.

Many electronic devices are capable of providing audio drive signals to audio output transducers, such as loudspeakers. In some cases, the electronic device may be able to provide an audio drive signal to an accessory or peripheral, such as a set of headphones or earbuds or the like, which in use may be available via some wired connection Removably connected to the electronic device. For example, many electronic devices may have sockets or sockets, such as 3.5mm sockets, for receiving corresponding mating plugs of accessory equipment. Audio drive circuitry of an electronic device, such as an audio codec, may be operable when connected to provide an analog audio drive signal to drive an accessory device's loudspeaker.

There are a wide variety of different audio accessory devices that can be connected in use to such electronic devices, and at least some audio accessory devices can represent relatively high impedance loads. For example, for DC, some headphone accessories may have load impedances on the order of hundreds of ohms.

In order to drive audio accessories that present relatively high impedance loads, it may be necessary to enable the audio driver circuitry to generate relatively high power, large amplitude drive signals. In particular, compared to such audio driver circuits such as codec or headphone amplifier circuits or the like In the conventional case, it may be necessary to generate a driving signal with a larger amplitude. However, such large amplitude drive signals can result in greater than typical voltage stress across components of the audio drive circuitry.

Embodiments of the present disclosure relate to methods, apparatus, and systems for voltage control, and in particular, to generating and maintaining suitable control voltages for audio driving circuitry.

According to one aspect of the present disclosure, there is provided an audio driving circuit comprising: a first transistor having a gate-source voltage tolerance; and a power supply module configured to generate a voltage at least a first supply voltage at the audio driver circuit, wherein the audio driver circuit is operable in a first mode in which the first supply voltage has a first magnitude such that in use A voltage magnitude at a source terminal of the first transistor may exceed the gate-source voltage tolerance of the first transistor. A voltage generator is configured to output a first intermediate voltage to an intermediate voltage path for use as a gate control voltage of at least the first transistor in the first mode, the first intermediate voltage having a value lower than A magnitude of the first magnitude to maintain the magnitude of the gate-source voltage of the first transistor below the tolerance when applied to the gate of the first transistor. The audio driver circuit also includes an intermediate path voltage clamp for selectively voltage clamping the intermediate voltage path to a voltage level so that the gate-source voltage of the first transistor varies between the gate-source voltages. The magnitude remains below the tolerance with the voltage clamp enabled by a reset condition for the audio driver circuit.

The reset condition may include the initiation of a hardware reset during which one or more externally generated clocks for digital control of the audio driver circuit are unavailable.

The audio driver circuit may also include clamp enable circuitry configured to enable operation of the first mid-path voltage clamp in response to the reset condition. The clamp enables The use circuitry can be configured to receive a power supply that is different from the input voltage for the power supply module and remains available during a reset initiated by the reset condition. In some examples, the clamp enable circuitry can be configured to receive a battery voltage from a battery of a host device as the power supply. The clamp enable circuitry may include a voltage regulator configured to regulate the battery voltage. In some examples, the clamp enable circuitry can include a reset module configured to monitor the reset condition and generate a reset control signal in response to detecting the reset condition to enable this mid-path voltage clamp.

In some examples, the mid-path voltage clamp can include a series connection of a plurality of diodes and a clamp enable transistor, the plurality of diodes and the clamp enable transistor being configured in series at Between a node receiving the first supply voltage and a node of the intermediate voltage path. The clamp enable circuitry can include a voltage selector configured to receive the reset control signal, the first supply voltage, and the first intermediate voltage, and to selectively select based on the reset control signal The ground output is based on the first supply voltage or an output voltage of the first intermediate voltage as a gate control signal for the clamp enable transistor of the intermediate path voltage clamp.

In some implementations, the audio driver circuit can include at least a first voltage selector configured to receive the first intermediate voltage and controlled based on the received transistor for one of the associated transistors The signal selectively outputs the intermediate voltage as a gate control voltage for at least one transistor. The first voltage selector can be configured to receive the transistor control signal, the first supply voltage and the first intermediate voltage, and to selectively output based on the first supply voltage or the first intermediate voltage based on the transistor control signal An output voltage of an intermediate voltage is used as the gate control voltage. In some examples, the first transistor may form part of the first voltage selector. In some examples, the first voltage selector can output a gate control voltage to at least one of: one of an output stage of an output driver of an audio driver circuit a transistor; and a transistor of an audio output path clamp switch.

The first transistor may be implemented as one of a laterally diffused MOS transistor device or an extended drain MOS transistor device.

In some examples, the power supply module is operable in the first mode to further generate a second supply voltage that is opposite in polarity to the first supply voltage but equal in magnitude to the first supply voltage. In this case, the audio driver circuit may further include a second voltage generator configured to output a second intermediate voltage to a second intermediate voltage path in the first mode for use as at least a first A gate control voltage of the two transistors, the second intermediate voltage has a magnitude lower than the first magnitude so that when applied to the gate of the second transistor the gate of the second transistor - The magnitude of the source voltage is maintained below a gate-source voltage tolerance of the second transistor. There may also be an intermediate path voltage clamp for selectively clamping the second intermediate voltage path to a defined voltage for the magnitude of the gate-source voltage of the second transistor maintained below this tolerance. The voltage clamp for the second intermediate voltage path can also be enabled by a reset condition for the audio driver circuit.

In some examples, the power supply module may be further operable in a second mode in which the first supply voltage has a second magnitude that is lower than the first magnitude. In normal operation in the second mode, a voltage magnitude at a source terminal of the first transistor may not exceed the gate-source voltage tolerance of the first transistor. The voltage generator can be disabled in the second mode.

The audio driving circuit can be implemented as an integrated circuit. The audio driver circuit can form at least part of an audio codec.

Embodiments also relate to an electronic device comprising an audio driver circuit as described in any of the variations herein. The electronic device may include a connector for a removable mating connection with an accessory device in use, and the audio driver circuit may be configured to At least one audio driving signal is output to an electrical contact of the connector. The electronic device can be at least one of the following: a portable device, a battery powered device, a communication device; a mobile or cellular phone device or a smart phone; a computing device; a tablet, notebook A laptop, laptop or desktop computer; a wearable device; a smart watch; a voice activated or voice controlled device.

In another aspect, an audio driver circuit is provided that includes: a plurality of transistors; and a power supply module operable in a first mode to generate at least a first voltage having a first voltage magnitude a voltage, wherein the first voltage magnitude is such that in use in the first mode, for a first group of one or more transistors, a source terminal of the transistor in the first group can exceed the The gate-source voltage tolerance of the transistor. An intermediate voltage generator configured to output a first intermediate voltage to an intermediate voltage path in the first mode to provide a gate control voltage usable as the one or more transistors of the first set , wherein the first intermediate voltage differs from the first voltage by an amount less than the gate-source voltage tolerance of a transistor in the first group. An intermediate path voltage clamp is provided for selectively voltage clamping the intermediate voltage path in response to a reset condition for the audio driver circuit.

In another aspect, an audio driver circuit is provided, comprising: at least one first transistor having a gate-source voltage tolerance; and a power supply having a power supply controller, the The power supply controller is operable to control the power supply in a first mode to generate a supply voltage having a magnitude greater than the gate-source voltage tolerance. A voltage controller is configured to generate a first control voltage for use as at least a gate control voltage of the first transistor to maintain the magnitude of the gate-source voltage of the first transistor below the tolerance, and a voltage clamp is configured to clamp the output of the voltage controller to the first control voltage if the power supply controller is inoperable.

In another aspect, an integrated circuit is provided, comprising: a voltage generator, it is used to generate a first control voltage for use as a safety gate control voltage for at least one transistor; and a voltage clamp is used to clamp the output of the voltage controller to the first control voltage, wherein the The voltage clamp is enabled and disabled by a reset signal for the integrated circuit.

Any of the various features of the various implementations discussed herein can be implemented in any and all suitable combinations with any one or more of the other described features, unless expressly indicated to the contrary.

100: Audio driver circuit/audio driver circuit system

101: Host device

102: Audio Load/Amplifier

103: Accessory Equipment

104: Differential Output Digital-to-Analog Converter (DAC)

105: Output Driver/Differential Input Amplifier

106: Power supply module

107: Contact

108: Connector/dotted box

109: Contact

110: Dotted box/Audio output path clamp

111P: Positive Voltage Generator

111N: Negative Voltage Generator

112P: Positive voltage selector

112N: Voltage selector

113N: switch

113P: switch

114N: Safety Voltage Clamp

114P: Safety Voltage Clamp

115: Clamp enable circuitry

201: Current Source

202: Resistor

203: Buffer

204: Reset Mod (POR)

205: Clamp enable transistor

206: Level Shift Voltage Selector/Selective Level Shifter

206N: Selective Level Shifter

301: Transistor/PMOS

302: Transistor/NMOS

303: Transistor/PMOS

304: Transistor/NMOS

305: Transistor/PMOS Devices

306: Transistor/PMOS Devices

307: Transistor/NMOS

308: Transistor/PMOS Devices

309: Transistor/PMOS Devices

310: Transistor/NMOS

401: Transistor

402: Transistor

403: Transistor

404: Transistor

405: Transistor/NMOS Devices

406: Transistor/NMOS Devices

407: Transistor/PMOS Devices

408: Transistor/NMOS Devices

409: Transistor

410: Transistor/PMOS Devices

501: Enable switch

601: Output PMOS transistor

602: Output NMOS transistor

603: Transistor

604: Transistor

605: PMOS transistor switch

606: NMOS transistor switch

701: Transistor

702: Transistor

703: Transistor

C1: gate control voltage

C2: gate control voltage

C _M1 : Capacitor

C _M2 : Capacitor

GND: ground

INA: Signal

INB: Signal

N1: Node

N2: Midpoint Node

N3: Node/Voltage

N4: Node

OUT: Amplifier output

RST: reset signal

S _RST : reset control signal

S _D : Audio driver signal

S _IN : input signal

S _N : second analog signal

S _P : first analog signal

S _LS : input signal

S _TN : Transistor control signal

S _TP : Transistor Control Signal/Logic Signal

V1: Voltage

V _BD : battery voltage

V _BR : Regulated battery voltage

V _NEG : Negative Supply Voltage

V _POS : Positive Supply Voltage

V _PS : Input power supply voltage

V _SAFEP : Positive Intermediate Voltage

V _SAFEN : Negative Intermediate Voltage

V _TN : Control voltage

V _TN1 : Control signal

V _TN2 : Controlled signal

V _TP : Control voltage

V _TP1 : Control signal

V _TP2 : Controlled signal

In order to better understand the examples of the present disclosure and to show more clearly how they may be practiced, reference will now be made to the following drawings by way of example only, in which:

FIG. 1 illustrates an example of an audio driver circuit system according to an embodiment;

FIG. 2 shows an example of an intermediate voltage generation path and a safe voltage clamp suitable for maintaining a positive intermediate voltage;

FIG. 3 shows an example of a selective level shift circuit suitable for positive voltages;

4 illustrates one example of a selective level shift circuit suitable for negative voltages;

Figure 5 shows an example of a safety voltage clamp suitable for maintaining a negative intermediate voltage;

Figure 6 illustrates one example of a portion of a suitable audio output driver; and

Figure 7 illustrates one example of a suitable output path clamp switch configuration.

The following description sets forth example embodiments in accordance with the present disclosure. Other example embodiments and implementations will be apparent to those of ordinary skill in the art. Furthermore, those of ordinary skill in the art will recognize that various equivalent techniques may be employed in place of or in conjunction with the embodiments discussed below, and all such equivalents should be considered to be covered by this disclosure.

As discussed above, the host device may include audio driver circuitry, such as an audio codec or the like, for outputting audio drive signals to the audio transducers. The audio driver circuit may be capable of outputting an audio drive signal to a transducer, such as a loudspeaker, that together with the audio driver circuitry is part of the host device. Additionally or alternatively, the audio driver circuit may be capable of outputting an audio driver signal to accessory equipment that, in use, is removably connected to the host device, and the audio driver circuit may thus include a headphone amplifier circuit, for example as an audio encoder at least part of the decoder.

FIG. 1 illustrates a simplified example of an audio driver circuit 100 according to an embodiment. Figure 1 shows that an audio driver circuit 100 may be part of a host device 101 and is configured, in use, to output an audio driver signal _SD to drive an audio load 102, such as a loudspeaker. In the example of FIG. 1 , audio load 102 is a loudspeaker that is removably connected to accessory equipment 103 of host device 101 , but in other examples, the audio load may be part of host device 101 . It should be noted that Figure 1 shows only one audio output for simplicity, but in practice there may be additional audio signal paths, such as for driving stereo audio output signals to the left and right speakers of the left and right loudspeakers connected to the accessory device. Right audio channel.

In the example of FIG. 1, the audio signal path includes a digital-to-analog converter (DAC) 104 and an output driver 105, such as a suitable amplifier. In this example, the DAC 104 receives the input signal S _IN and produces a differential output signal, and thus produces a first analog signal SP and a second analog signal _{S N} that are part of a differential pair. In this example, the output driver 105 is thus a differential input amplifier that generates the drive signal _SD . The power supply module 106 receives the input power supply voltage V _PS and generates at least one supply voltage for supplying components of the audio output path. In this example, power supply module 106 generates bipolar supply voltages V _POS and V _NEG that are supplied to output driver 105 . In some examples, the power supply module 106 may be a suitable DC-DC converter, such as a charge pump, that receives the input power supply voltage _VPS and generates bipolar supply voltages _VPOS and _VNEG .

The output driver 105 generates the output drive signal _SD as positive and negative variations relative to a defined reference voltage, which in this example is ground (GND). It should be noted that although Figure 1 shows a differential output DAC 104 and a differential input amplifier 105, it will be appreciated that a single-ended audio signal path may be implemented in some audio driver circuits.

In this example, the drive signal _SD generated by the output driver 105 is output to drive the loudspeaker 102 of the accessory device 103 such as a headphone or earbud speaker or the like. In use, the accessory device 103 may be removably connected to the host device via suitable connectors, such as connectors of the accessory device and sockets of the host device, although any suitable plug and socket connectors may be used. In use, the contacts 107 of the audio accessory device 103, such as the poles of the connectors (generally indicated by the dashed boxes 108), will be coupled directly or indirectly to respective contacts 109 of the host device 101, such as the jacks (generally indicated by the dashed boxes) 110 indicates the extreme point). The loudspeaker 102 of the audio accessory device 103 may also have a return path through a contact/pole 107 of the accessory device's connector 108 to a defined reference voltage, in this example to ground.

Figure 1 also shows that there may be an audio output path clamp 110 for clamping the output of amplifier 105 to a reference voltage, in this example ground (GND), when the output audio drive signal _SD is not required . The audio output path clamp 110 can be disabled when the audio driver circuit 100 is operating to provide a drive signal, but can be enabled when the output path needs to be clamped—ie, held—to ground. The audio output path clamp 110 may include a switch configuration for selectively coupling the audio output path to a reference voltage, which in this example is ground.

It will be appreciated that the various components of the audio driver circuit 100 will typically include semiconductor devices, particularly transistors. The output driver 105 will typically contain multiple transistors. Likewise, the audio output path clamp 110 may typically be implemented by one or more transistors. Those skilled in the art will readily understand that semiconductor devices such as transistors will typically have a certain voltage rating, namely The voltage tolerance of the voltage across the device. Voltage tolerance indicates the maximum voltage that can be tolerated across a particular terminal of a device in a safe and continuous manner. A device may be able to withstand voltage stress greater than the specified tolerance for short periods of time, but voltage stress greater than the given tolerance for a relatively long period of time will shorten the operating life of the device, and voltages significantly higher than the given tolerance Stress can cause damage and/or malfunction to the device. For example, voltage stress above the gate-source breakdown voltage of the transistor device may cause damage.

Conventionally, for the power supply and output signal levels commonly used in headphone driver circuits and the like, transistors with suitable voltage ratings can be readily fabricated using standard semiconductor processing suitable for high volume manufacturing. Merely by way of example, conventional mono-ie left or right-headphone drive circuits may typically have been implemented to operate with drive signal _SD at a level of about one volt rms (1Vrms), and thus The peak-to-peak voltage range is about two (2) to three (3) volts, eg, the voltage range is +1.5V to -1.5V. For at least some common semiconductor process node geometries, transistors capable of handling such voltage stresses, such as about 3.5V, can be easily implemented and mass produced.

In some cases, when driving audio accessories such as headphones that present relatively high impedance loads of, say, hundreds of ohms, it may be desirable to be able to output larger amplitude drive signals in at least one mode of operation, eg, to provide good User experience. Again, by way of example only, in some cases it may be desirable to output a drive signal _SD of about a few volts _rms , which may involve a peak-to-peak voltage swing of the order of almost ten volts or so, such as from +5V to - 5V swing. Therefore, in at least one mode of operation, the magnitude of the power supply voltages V _POS and V _NEG may be around 5.5V. Such voltage magnitudes and peak-to-peak voltage swings will typically be greater than the voltage tolerance of conventional semiconductors such as those used in audio drive circuitry.

It has been proposed that some MOSFET type transistors can be implemented as side diffused MOS device (LDMOS) or extended drain MOS device (EDMOS). LDMOS and EDMOS are known designs that have been used in the field of power amplifiers for RF communications. Such devices are designed to withstand drain-source voltages that may be greater than other standard designs. For example, conventional semiconductor fabrication processes can be used to produce LDMOS devices with voltage ratings of 5V or 12V (for drain-source voltage), and thus can be implemented in other conventional headphone driver circuits and other LDMOS devices.

Thus, LDMOS or EDMOS or similar enhancement mode tolerance transistors may be advantageously implemented to allow such high power operation of audio driver circuits as discussed above. Depending on the expected voltage stress across the transistor in the off state, the transistor may be implemented, for example, as a 5V device or a 12V device as appropriate.

However, although implementing the transistors as LDMOS or EDMOS may improve the voltage handling capability of the drain, such as about 3.5V to 5V or 12V from standard designs, the gate oxide of the device may be practically the same as the standard device, and There is thus still a limit to the voltage tolerance of the gate, and especially a limit to the maximum gate-source voltage that can be safely withstood. Thus, although the drain-source voltage tolerance of an LDMOS or EDMOS may be, for example, 5V or 12V, the gate-source voltage tolerance may still be about 3.5V.

Embodiments of the present disclosure relate to audio drive circuits that can advantageously operate in relatively high power modes of operation, eg, to generate drive signals such as those discussed above. In such implementations, the power supply of the audio circuit may operate in at least one mode of operation - which will be referred to herein as a high voltage mode of operation - to generate a relatively high supply voltage, eg, of a magnitude such that the first transistor The magnitude of the voltage at the terminals of the at least one supply voltage may exceed the voltage tolerance of the first transistor. In detail, the high voltage mode of operation may be that the voltage at the source terminal of the first transistor may experience a voltage greater than the gate-source voltage tolerance of the first transistor and may be greater than the gate-source breakdown voltage The operating mode of the magnitude. In high voltage operation mode, the magnitude of supply voltage can be large The gate-source voltage tolerance of the first transistor. In such high voltage operating modes, the audio driver circuit controls the gate voltage of the first transistor so as to remain within the gate-source voltage tolerance, ie, below the gate-source breakdown voltage. Specifically, the audio driver circuit generates at least one intermediate voltage that can be used as a gate control voltage of the first transistor.

The first transistor may be a transistor of an audio driver circuit configured such that, in use in a high voltage mode of operation, the source of the first transistor may experience a voltage that is actually at or close to the relevant supply voltage, i.e. The source voltage may be at or near the positive supply voltage VPOS for p-channel _devices such as PMOS or at or near the negative supply voltage _VNEG for n-channel devices such as NMOS.

The audio driver circuit is configured to generate at least one intermediate voltage that can be used as a gate control voltage for at least the first transistor. The intermediate voltage may be generated with the same polarity as the associated supply voltage, but with a lower magnitude. The intermediate voltage is thus an intermediate voltage between a reference voltage, eg ground, and the associated supply voltage, and is therefore non-zero (relative to the reference voltage). In particular, the intermediate voltage may be generated to differ from the associated supply voltage by an amount greater than a voltage threshold for controlling conduction through the first transistor but less than the gate-source voltage tolerance of the first transistor. The intermediate voltage can thus be identified as a safe voltage level, which can be safely supplied to the gate of the first transistor and will keep the gate-source voltage within tolerance even if the source of the first transistor is at The same applies to the associated supply voltage.

Merely by way of example, in some implementations, the power supply module may operate in a high voltage mode to generate at least one supply voltage of nominal magnitude or 4V or more or 4.5V or more or 5V or more. The power supply module can generate bipolar voltages of these magnitudes. The magnitude of the supply voltage may be greater than the voltage tolerance of the first transistor, especially the gate-source voltage tolerance. In some implementations, the gate-source voltage tolerance of the first transistor may be less than 4V. In some examples, the gate-source voltage tolerance or rating of the first transistor may be 3V or more, or 3.5V or more. The intermediate voltage can be generated to be at least 2V lower in magnitude than the associated supply voltage or more, or at least 2.5V or at least 3V, but not differ by more than the gate-source tolerance.

The safe intermediate voltage can be selectively used to provide a suitable control voltage to one or more transistors of an audio driver circuit, such as to a group of one or more transistors that can withstand relatively high voltages at one terminal in a high voltage operating mode. crystal. For example, consider that a transistor has its source coupled to the relevant supply voltage, such as a PMOS, has its source coupled to the positive supply voltage V _POS , and therefore the source remains at this voltage whether the transistor is on or not. In this case, if the gate voltage is controlled to be substantially equal to the relevant supply voltage, there will be virtually no gate-source voltage and the transistor will be turned off. If the gate voltage is driven to an intermediate voltage level, the gate-source voltage will be sufficient to turn on the transistor, but the gate-source voltage will remain within tolerance.

The audio driver circuit 100 thus includes at least one voltage generator for outputting a suitable intermediate voltage to the intermediate voltage path. FIG. 1 shows that in this example, there may be respective positive voltage generators 111P and negative voltage generators 111N (which may be identified collectively or individually by reference numeral 111 ) when the power supply module 106 is at high voltage In the operating mode, the voltage generators are operable to generate respective positive intermediate voltages V _SAFEP and negative intermediate voltages V _SAFEN .

The voltage generator 111 may generate the intermediate voltage in any convenient manner. Figure 2 shows the positive intermediate voltage path in more detail. FIG. 2 shows that, in this example, voltage generator 111P includes a current source 201 for generating a defined current through a defined resistor 202 to produce a voltage that is buffered by buffer 203 to provide a positive intermediate voltage V _SAFEP .

The positive intermediate voltage V _SAFEP and the negative intermediate voltage V _SAFEN may thus be selectively used to provide gate control voltages for controlling the gate voltages of the transistors of the audio driver circuitry 100 in high voltage mode. As discussed above, if the source of the associated transistor is held at one of these supply voltages, then the associated transistor can be controlled by selectively controlling the gate voltage to be equal to the intermediate voltage or supply voltage, respectively for on or off. Referring back to FIG. 1 , the intermediate voltages V _SAFEP and V _SAFEN are thus each supplied to at least one respective voltage selector 112P or 112N. Voltage selectors 112P and 112N are each operable to selectively output an associated intermediate voltage, or some other voltage, in this example an associated supply voltage, to provide an appropriate gate control voltage.

In the example of FIG. 1, voltage selector 112P receives positive intermediate voltage V _SAFEP and positive supply voltage V _POS and outputs a voltage that can be selectively varied between a voltage substantially equal to V _POS or a voltage substantially equal to V _SAFEP At least one control voltage V _TP . As mentioned above, such a control voltage would be suitable for controlling both the on and off states of the PMOS transistor whose source voltage is at or close to supplying V _POS , for example.

Likewise, voltage selector 112N receives negative intermediate voltage V _SAFEN and negative supply voltage V _NEG and selectively outputs one of these voltages as at least control voltage V _TN , _which will be suitable at the source The NMOS transistor whose voltage is at or near the negative supply V _NEG is controlled in both its on and off states.

Voltage selectors _112P and _112N may be controlled by respective transistor control signals STP and STN, which may be logic signals, for example, which are generated to indicate the desired state of the transistors, ie, off or on. Pass. In the example of Figure 1, the voltage selector is actually a level shifter that level shifts the input transistor control signal to level shift to the appropriate gate that varies between the intermediate voltage and the supply voltage Voltage control, the input transistor control signal may be, for example, a logic signal that varies between ground and a low positive voltage to signal logic 0 and logic 1.

3 illustrates one example of a suitable level-shifting voltage selector that may be used as positive voltage selector 112P. The voltage selector has an input stage that includes four transistors 301 to 304 connected between voltage V1 and a reference voltage, which in this example is ground. The voltage V1 may be a positive voltage lower than the supply voltage V _POS in the high voltage operating mode, and may be, for example, the power supply voltage V _PS input to the power supply module. This enables the input stage to be a low power stage even when the audio driver circuit is operating in high voltage mode. Input signal S _LS may be a suitable logic signal, which may be logic signal S _TP for voltage selector 112P. This input signal is coupled to the gates of the series connected PMOS 301 and NMOS 302 transistor switches, and thus selectively turns on one of these switches to drive node N1 (between PMOS 301 and NMOS 302) to V1 or ground. Thus, transistors 301 and 302 are connected and operated as inverters. The gates of the series connected PMOS 303 and NMOS 304 are driven by the voltage at node N1 such that the voltage at the midpoint node N2 is the other of V1 or ground. Therefore, transistors 303 and 304 are also connected and operated as inverters. Complementary voltage control at nodes N1 and N2 includes output stages of level-shifting voltage selectors of transistors 305-310.

PMOS 305, PMOS 306 and NMOS 307 are connected in series in a branch between the positive supply voltage _VPOS and a reference voltage, which in this example is ground. Likewise, PMOS 308, PMOS 309 and NMOS 310 are connected in series in another branch between these voltages. PMOS 305 has its source coupled to the positive supply voltage V _POS and its gate driven by the voltage at node N3 between PMOS 308 and PMOS 309 . Likewise, PMOS 308 has its source coupled to the positive supply voltage _VPOS and its gate driven by the voltage at node N4. PMOS 306 and PMOS 309 have their gates coupled to the positive mid-voltage and their sources coupled to nodes N4 and N3, respectively. Complementary voltages at nodes N1 and N2 drive the gates of NMOS 310 and NMOS 307 to control conduction through one branch or the other. The interaction between the PMOS devices 305, 306, 308, and 309 of the output stage of the level-shifting voltage selector regulates the voltages at nodes N3 and N4 to be close to the supply voltage _VPOS and the positive mid-voltage, respectively, or vice versa, This depends on which NMOS is on, and therefore on the state of the input signal _STP . The control voltage _VTP can be tapped from node N3 or equivalently from node N4, or the complementary outputs can be tapped from both nodes.

The source terminals of PMOS 305 and PMOS 308 of the output stage are coupled to the positive supply voltage. However, since nodes N3 and N4 are regulated not to drop below the positive intermediate voltage V _SAFEP , the gate-source voltages of these transistors remain within tolerance. Likewise, the sources of PMOS 306 and 309 coupled to nodes N4 and N3, respectively, can be raised at or near the positive supply voltage V _POS , but the gates of these devices remain at the intermediate voltage V _SAFEP and thus remain at the gate within the pole-to-source voltage tolerance.

4 illustrates an example of a suitable level-shifting voltage selector that may be used as negative selector 112N. Again, this level shifting voltage selector has a low voltage input stage with transistors 401-404, and a higher voltage output stage with transistors 405-410. The level shift selector operates in substantially the same way, but in this case the input inverting stage controls the PMOS devices 407 and 410 to control the conduction of the branches through the output stage, and the NMOS devices 405-408 operate to regulate the output voltage V _TN .

Referring back to FIG. 1 , the generation of intermediate voltages V _SAFEP and V _SAFEN thus advantageously allows the audio driver circuit 100 to operate in a high voltage mode, where the magnitude of the supply voltage is greater than that which can be coupled in use to receive a supply at one terminal Voltage The maximum gate-source voltage that one or more transistors can withstand.

In some implementations, the audio driver circuit may operate in more than one voltage mode, ie, wherein the power supply module 106 is operable to output supply voltages of different magnitudes in different voltage modes. This may advantageously allow high voltage modes to be used when driving signals into high impedance loads are required, eg, for performance reasons, but allows use of lower voltage modes with lower power consumption when such high voltage modes are not required. The power supply module 106 may thus be operable in at least one low voltage mode of operation to generate the power supply, wherein the magnitude of the supply voltage is below the gate-source tolerance of the transistor. The maximum peak-to-peak signal swing can also be lower than the gate-source tolerance in low-voltage operating modes.

When operating in low voltage mode, it may not be necessary to generate an intermediate voltage. Therefore, when operating in the low voltage mode, the voltage generator 111 may be disabled, eg, the buffer 203 shown in FIG. 2 may be disabled. In this case, the positive supply voltage V _POS and the negative supply voltage V _NEG can be used as control voltages without undue voltage stress on the transistors. Switches 113P and 113N may thus be closed to connect the safety voltage inputs to selectors 112P and 112N to negative supply voltage V _NEG and positive supply voltage V _POS , respectively.

While operation in multiple voltage modes including at least one high voltage mode and at least one low voltage mode may be beneficial in some applications, in other implementations the audio driver circuit may only operate in one or more high voltage modes Operates to generate the drive signal, that is, when the audio drive circuit operates to receive the input signal S _IN and generate the drive signal _SD , it always operates in the high voltage mode. Even for audio driver circuits that can only operate in high voltage mode, switches such as switches 113P or 113N for connecting a safe voltage path to a defined system voltage may be beneficial in regulating the path between the audio driver circuits during startup Voltage.

Thus, in general, embodiments relate to an audio driver circuit that includes at least one voltage generator 111 that generates one or more voltages for regulating the audio driver circuit in a high voltage mode of operation of the audio driver circuit. A suitable safe voltage for the gate-source voltage of a crystal to which the one or more transistors may be exposed to voltages of magnitude greater than their gate-source voltage tolerance. This protects the associated transistor from undue voltage stress during normal operation.

However, problems can arise during the hardware reset of the audio driver circuit. Those skilled in the art will appreciate that it is typical for the audio driver circuitry to be implemented as an integrated circuit and to include some reset functionality. The audio driver circuit can be controlled to respond to reset conditions, which can be received substantially at any time, and shut down. In this case, the power supply module 106 will stop operating.

If the reset condition occurs at a time when the audio driver circuit is operating in the high voltage mode, the supply voltage at that time will be relatively high, eg, in the magnitude of about 5.5V. As discussed above, a power supply module will typically include a DC-DC converter such as a charge pump, and such a DC-DC converter will typically be configured to work with an output storage capacitor (not shown) in normal operation operate to maintain supply voltage. In response to the reset condition, the DC-DC converter may stop charging these output storage capacitors, but these storage capacitors will take some time to discharge. In a In some implementations, a respective discharge resistor may be selectively connected in series between the two terminals of the respective storage capacitor in a power-down or reset situation to facilitate discharge, but even in these implementations It may also take a few milliseconds for the storage capacitor to discharge to a level that is safe relative to the gate-source voltage tolerance of the transistor.

In some cases, the audio driver circuit is operable to perform what may be referred to as a software reset. In this case, the digital control circuitry of the audio driver circuit can continue to receive the externally generated system clock during the shutdown procedure, and the audio driver circuit can be powered down in a controlled manner. In such a software reset, the voltage generator 111 may be controlled so as to continue to generate the safe intermediate voltages V _SAFEP and V _SAFEN until the storage capacitors of the power supply modules have discharged to a safe level.

However, the audio circuitry is also operable to perform what may be referred to as a hardware reset, and in a hardware reset, the system clock necessary to digitally control the circuitry will typically become unavailable. In such cases, the audio driver circuit cannot be powered down in a fully controlled manner and, in particular, may lose control of the safe intermediate voltage. If the safe intermediate voltage is no longer available or drops significantly, this situation can cause damage to at least some of the transistors, although the supply voltage magnitude is still high.

For example, as discussed with reference to FIG. 3, the positive intermediate voltage is used to control the gate voltages of transistors 306 and 309 because the voltage at one of nodes N3 and N4 may be substantially equal to the positive supply voltage V _POS . If, for example, node N3 is at V _POS at the time of a hardware reset and the generation of the positive intermediate voltage ceases, causing the gate voltage of the transistor to drop, the gate-source voltage stress across transistor 309 may exceed the voltage capacitance relatively quickly limit.

In some cases, this may be exacerbated by the fact that since the intermediate voltage level drops under reset, switch 113P may attempt to turn on, which would then drive the intermediate voltage path to the negative supply voltage V _NEG . This results in a voltage stress equal to the difference between the supply voltages being applied as the gate-source voltage for transistor 309 . For supply voltages around ±5V, and gate-source tolerances of around 3.5V, such voltage stress is likely to destroy transistor 309.

The audio driver circuit 100 thus includes at least one safe voltage clamp 114 for selectively clamping the intermediate voltage path to a safe voltage level in response to a reset condition, particularly in response to a hardware reset. Figure 1 shows that there are safety voltage clamps 114P and 114N (which may be referred to collectively or individually by reference numeral 114) for the positive and negative intermediate voltage paths, respectively. The safety voltage clamp 114 is disabled in normal operation and is enabled by the clamp enable circuitry 115 in response to a reset condition, eg, receiving a signal via a reset pin or the like.

Referring back to FIG. 2 , this shows in more detail the safety voltage clamp and enabling circuitry, in this case for the positive mid voltage path. As previously mentioned, if the audio driver circuit is operating in the high voltage mode, the voltage generator 111P will be enabled to generate the desired positive intermediate voltage V _SAFEP and the switch 113P will be turned off. This positive intermediate voltage V _SAFEP may be supplied to the input of selector 112P, as discussed above.

During such normal operating states, the clamp enable circuitry 115 maintains the safety voltage clamp 114P in a deactivated state.

The clamp enable circuitry 115 includes a reset module (POR) 204 for monitoring a reset condition, such as the receipt of a reset signal RST indicating that a reset is required. The reset signal RST can be an indication, in particular, that a hardware reset is required, and the reset signal RST can be derived from the state of the monitored pins or terminals of the audio driver circuit. The POR module 204 generates the appropriate control signal S _RST to enable or disable the safety voltage clamp 114P.

In this example, the safe voltage clamp 114P includes a series of diodes connected between the positive supply voltage V _POS and the intermediate voltage path, with the clamp enable transistor 205 in series. In the disabled state, the clamp enable transistor 205, in this case a PMOS, is controlled off. To enable the safety voltage clamp 114, the clamp enable switch 205 is turned on. The positive supply voltage _VPOS forward biases the diodes of the clamp, but the voltage drop across the diodes means that the voltage at the intermediate voltage path is lower in magnitude than the supply voltage _VPOS . The safe voltage clamp 205 is configured to provide a selected voltage drop such that the voltage produced by the clamp when enabled can be used as a safe intermediate voltage. The safe voltage clamp 205 thus selectively provides clamping of the intermediate voltage path voltage to a safe voltage level when enabled in order to maintain the magnitude of the gate-source voltage of the first transistor below the capacitance limit.

Thus, the safety voltage clamp 114P, when enabled, operates to clamp the voltage of the intermediate voltage path to a voltage having a defined relationship to the positive supply voltage, at least until the positive supply voltage _VPOS drops to a sufficiently low level. The safety voltage clamp can be considered an alternative voltage generator that can be enabled when the voltage generator 111P is unavailable. Conveniently, the voltage provided by the voltage clamp when enabled according to the high voltage mode of operation will be at least initially substantially similar to the voltage provided by the voltage generator 111P when operating.

When clamp 114P is disabled, the source of clamp enable switch 205 may be at or near the positive supply voltage V _POS . The clamper control switch 205 may be maintained in an off state by a gate control voltage equal to _VPOS . In this case, there is no significant gate-source voltage stress. To turn on the clamp enable switch 205, the gate voltage can be controlled to an intermediate voltage level (which will be available when the reset signal is received, and once the safety voltage clamp 114P is enabled, the intermediate voltage level The voltage level will then be maintained by the operation of the safety voltage clamp 114P itself).

To generate these control voltages, the reset control signal S _RST may be input to a selective level shifter, ie, the level shift voltage selector 206 . In some examples, selective level shifter 206 may include a level shifting voltage selector such as that depicted in FIG. 3 and discussed above. In this case, however, the input S _LS to the level shifter will be the reset control signal S _RST . Additionally, to ensure that the selective level shifter 206 operates correctly during the reset procedure, the low power input stage may be powered from an always available power domain, such as for battery powered devices, the level shifter may be powered from the battery domain The input stage of the bit 206 is powered. In the example depicted in FIG. 2, the clamp enable circuitry includes a voltage regulator, such as a low dropout (LDO) regulator or the like, that receives the battery voltage V _BD and provides a voltage that can be used to shift the level The regulated battery voltage V _BR powered by the controller 206 , such as V1 in FIG. 3 . The regulated battery voltage V _BR may also be used to power other components of the clamp enable circuitry such as the POR module 204 to ensure that these components function as long as the battery voltage is available.

Safety voltage clamp 114N may operate in a similar manner. 5 shows an example of a safe voltage clamp 114N that includes an enable switch 501, in this example an NMOS. To drive the enable switch 501, a selective level shifter 206N may be used, which may for example have a structure as shown in FIG. 4 . The input S _LS to the selective level shifter 206N may be the logic signal S _RST output from the POR module 204 discussed earlier with respect to FIG. 2 .

The safety voltage clamp 114 thus ensures that the intermediate voltage generated to control the gate voltage of one or more transistors of the audio driver circuit in the high voltage mode of operation remains available as the audio driver circuit undergoes a reset procedure. The safe voltage clamp enables a safe transition from an operating state in high voltage mode to a reset state and eventual power down. The clamp enable circuitry is operated as part of the always available power domain and, in particular, the clamp enable circuitry can be powered from the received battery voltage so that this circuitry can operate correctly during resets .

As described above, in some embodiments, the positive intermediate voltage V _SAFEP and the negative intermediate voltage V _SAFEN are used to control the gate voltages of the transistors of selectors 112P and 112N. The control voltages VTP and VTN output from selectors _112P and _112N can be used to control the operation of various other transistors of the audio driver circuit and maintain the gate-source voltage within tolerance.

In some implementations, the transistors controlled by the outputs of selectors 112P and 112N may include portions of output driver 105, such as amplifiers.

For example, FIG. 6 depicts part of one example of an amplifier configuration suitable for output driver 105 . 6 shows at least a portion of an output stage of an amplifier, which may be configured, for example, with the transconductance of a capacitive feedback compensation (TCFC) amplifier, as will be understood by those skilled in the art. In some configurations, only the output stage of the amplifier receives the high positive voltage V _POS and negative voltage V _NEG and experiences the full output signal range in high power mode of operation, and thus, the voltage stress may be lower for the amplifier pre-stage. 6 shows that output PMOS transistor 601 and NMOS transistor 602 are connected in series between positive voltage supply _VPOS and negative voltage supply _VNEG and are driven to generate drive signal _SD at amplifier output OUT. Signals INA and INB received from the previous stage are received and control the driving of output transistors 601 and 602 in operation.

6 also shows a transistor 603, in this example a PMOS, configured to control the gate voltage of the output PMOS 601 during power down of the amplifier 105. In normal operation, transistor 603 is turned off so that output PMOS 601 is properly driven by the input signal to provide drive signal _SD . During power down of amplifier 105, it may be necessary to ensure that output PMOS 601 is turned off, and thus transistor 603 may be turned on to connect the gate terminal of output PMOS 601 to _VPOS . Transistor 603 is configured with its source node coupled to the positive supply voltage V _POS and its drain connected to the gate control for output PMOS 601 . Transistor 603 may be implemented as a transistor with enhancement mode drain tolerance, such as, for example, LDMOS or EDMOS as previously discussed, to withstand source-drain voltage stress in its off state. In this example, the source of transistor 603 is coupled to voltage V _POS , and thus the gate can be controlled by control signal V _TP1 output by appropriate selector 112P to be between positive supply voltage V _POS or positive intermediate voltage V _SAFEP change selectively.

Likewise, transistor 604, an NMOS in this example, is coupled between the negative supply voltage V _NEG and the gate control for output NMOS 602 to control the gate voltage of output NMOS 602 during power down. The source of transistor 604 is coupled to negative supply voltage V _NEG and can be controlled by a control signal V _TN1 output by a suitable selector _112N to selectively vary between negative supply voltage V _NEG or negative intermediate voltage V SAFEN.

It should be noted that Figure 6 shows that transistors 603 and 604 are configured with their sources connected to the respective supply voltages. This configuration can be used when the respective supply voltages are the maximum positive and negative system voltages, which is likely to be the case when operating in a high voltage operating mode. However, if the audio driver circuit can operate in a mode in which one of the supply voltages is lower in magnitude than one of the other system voltages, it may be preferable to switch between transistors 603 or 604 as appropriate The source is connected to such other system voltages. For example, if the audio driver circuit can also operate in a low voltage mode where the positive supply voltage is lower than the power supply input voltage V _PS , it may be preferable to couple the source of the transistor 603 is connected to voltage V _PS , and the source of transistor 603 can thus be coupled to different supplies in different modes of operation. However, in some embodiments, the negative supply V _NEG may be a maximum magnitude negative supply in all modes of operation, so the source of transistor 604 may be coupled only to the negative supply voltage.

Figure 6 also shows that there is a capacitor C _M1 in the feedback path that provides feedback around the output stage. Such capacitors act as Miller capacitors. It should be noted that in practical amplifiers, there may additionally be feedback from the output to a preceding stage (not shown in FIG. 6 ).

It may be desirable to be able to vary the value of the Miller capacitance in the output stage feedback path. FIG. 6 thus shows an additional capacitor C _M2 , which can be selectively connected in parallel with capacitor C _M1 to vary the effective Miller capacitance by controlling transistor switches 605 and 606 . Again, transistors 605 and 606 can experience relatively high drain-source voltages in high voltage modes of operation, and thus can be implemented as LDMOS or EDMOS type devices. The gate of the PMOS transistor 605 can be controlled by the controlled signal V _TP2 output from the selector 112P, and the gate of the NMOS transistor 606 can be controlled by the controlled signal V _TN2 output from the selector 112N.

It should be understood that the control voltage _{VTP1 used to control transistor 603 (to turn on during amplifier power down) should vary independently of control voltage VTP2 , which} selectively controls transistor 605 to operate as desired The effect of adding an additional Miller capacitor C _M2 during this period. That is, although signals V _TP1 and V _TP2 may vary between the same voltage levels, such as V _POS and V _SAFEP , the timing of switching between these levels will generally be independent, and thus each control signal may It is thus selectively output by the individual selector 112P (not separately shown).

In some implementations, the transistor controlled by the output of at least one of selectors 112P and 112N may comprise part of some other component of the audio driver circuitry that may be subjected to high voltage stress in the high voltage operating mode , such as the transistor of the output path clamp 110 .

Figure 7 shows one example of a switch configuration for the output path clamp switch. Figure 7 shows: two transistors 701 and 702 of the same polarity type, in this case NMOS devices, coupled in series between the nodes N1 and N2 of the clamp, with the source of each transistor are coupled together at node N3. Node N1 can be coupled to the output path, and node N2 can be coupled to a reference voltage, such as ground. When the output path clamp is disabled, transistors 701 and 702 will be in an off state. In order to keep these transistors off, the gate control voltages C1 and C2 for transistors 701 and 702 can be in the off state even for the peak negative values of the drive signal that would be expected for node N1 in use lower equal to V _NEG . In order to prevent the voltage at node N3 from changing to a level that would result in an unacceptable gate-source voltage, voltage N3 is regulated by transistor 703 in the clamp deactivated state. Transistor 703 is a transistor of the same polarity type, NMOS in this example, with the source of the transistor coupled to the negative supply voltage _VNEG and the drain of the transistor coupled to node N3. Transistor 703 may thus be controlled by a control voltage VTN, as may be generated by selector _112N as discussed above, and may be at a voltage equal to V _SAFEN when transistor 703 is turned on. During this phase, the voltage at node N3 remains at V _NEG . The source-drain voltage across transistor 701 can therefore vary with the drive signal to be substantially equal to the peak-to-peak voltage stress, but this peak-to-peak voltage stress is within the tolerances of LDMOS or EDMOS as discussed above . The source-drain voltage across transistor 702 is equal to the magnitude of the negative supply voltage _VNEG , which again may be within the tolerances of a suitable LDMOS or EDMOS. At this stage, there is substantially no gate-source voltage stress across transistors 701 and 702 .

When the output path clamp is enabled, both transistors 701 and 702 are on and transistor 703 is off. Transistor 703 may be turned off by a control voltage _VTN selected as _VNEG . In this state, no drive signal is output to the output path, and thus node N1 will remain at or near the same voltage as the reference voltage at node N2, ie both nodes may be at or near ground, and node N3 is also will be so. The drain-source voltage across transistor 703 is therefore equal to the negative supply voltage V _NEG . In this state, the control voltage for transistors 701 and 702 can be controlled to be a positive voltage sufficient to turn on these transistors but within the gate-source tolerance, such as the gate for transistors 701 and 702 The pole voltage may be equal to the voltage V _PS when the transistors are turned on.

It should be noted that FIGS. 6 and 7 only illustrate some examples of transistors that can be controlled using the safe intermediate voltage level generated by the voltage generator 111 .

Although the above discussion has focused on generating an intermediate safe voltage that can be used as a gate control voltage for a transistor in an audio driver circuit in a high voltage mode of operation, it may additionally or alternatively be advantageous to generate an intermediate safe voltage in order to regulate other circuit nodes The voltage at the device, such as the voltage at some other terminal of the semiconductor device, so that the voltage stress across the semiconductor device is not greater than the relative voltage tolerance of the device. The principles of the present disclosure will apply to such other protected nodes, and the present disclosure relates to the use of a safe voltage clamp for any voltage path that is enabled on reset conditions, for any voltage path, resulting in an intermediate voltage different from the supply voltage, and the absence of an intermediate voltage would cause undesired voltage stress across the component.

Embodiments of the present disclosure therefore relate to methods and apparatus for voltage control in general, and to voltage control for audio driving circuitry in particular. Some embodiments relate to audio driver circuits that can operate in a high-voltage operating mode, where the high-voltage operation In mode, at least one supply voltage may be sufficiently high that, in use, at least one semiconductor device may experience a voltage at one terminal above the voltage tolerance of the device, for example the source voltage of a transistor may exceed the gate-source voltage tolerance. The audio circuitry may also include at least one voltage generator operable to generate a magnitude smaller than the supply voltage and selectively applied to the semiconductor device when the power supply is operating in a high voltage mode of operation. an intermediate voltage of the terminal to maintain voltage stress across the first semiconductor device within the tolerance. For example, the intermediate voltage can be selectively applied as the control voltage for the gate terminal of the transistor.

In general, some embodiments relate to an integrated circuit having: a voltage generator for generating a first control voltage for use as a safety gate control voltage for at least one transistor; and a voltage clamp for For clamping the output of the voltage controller, wherein the voltage clamp is enabled and disabled by a reset signal for the integrated circuit.

It should be noted that any example voltages described above are given as examples only for ease of explanation. Other voltages are available for other applications and different semiconductor manufacturing processes. For example, as discussed above, one known process can provide a gate oxide with a voltage tolerance on the order of 3V. Other processes, such as smaller process node geometries, can often result in different - eg, lower - voltage tolerances. The principles of the present disclosure can be implemented to provide audio circuitry that can handle large signal swings while maintaining gate-source voltages within tolerances.

Embodiments have been described with reference to audio driver circuitry, but the principles of generating and clamping a safe voltage level under reset may be applicable to other applications.

It should be noted that, as used herein, the term audio is not limited to frequencies in the audible frequency range, and the term audio should be understood to include other frequencies, such as ultrasonic frequencies, and/or drive signals, such as for linear A haptic drive signal for a haptic transducer of a resonant actuator or the like.

Embodiments may be implemented as, in some instances, a codec or the like the integrated circuit. Embodiments may be incorporated into an electronic device, which may be, for example, a portable device and/or a device that can be operated on battery power. The device may be a communication device such as a mobile phone or smart phone or the like. The device may be a computing device such as a notebook, laptop or tablet computing device. The device may be a wearable device such as a smart watch. The device may be a device with voice control or activation functionality.

Those skilled in the art will recognize that some aspects of the above-described apparatus and methods, such as discovery and configuration methods, may be implemented as processor control code, such as on a disk, CD-ROM or On a non-volatile carrier medium such as DVD-ROM, programmed memory such as read only memory (firmware), or on a data carrier such as an optical or electrical signal carrier. For many applications, embodiments will be implemented on a digital signal processor (DSP), application specific integrated circuit (ASIC), or field programmable gate array (FPGA). Thus, the code may comprise conventional code or microcode, or code such as for setting up or controlling an ASIC or FPGA. The code may also include code for dynamically configuring a reconfigurable device such as an array of reprogrammable logic gates. Similarly, the code may include code for a hardware description language such as Verilog ^™ or Very High Speed Integrated Circuit Hardware Description Language (VHDL). Skilled artisans will appreciate that code can be distributed among a number of coupled components that are in communication with each other. Where appropriate, embodiments may also be implemented using code running on a field programmable analog array or similar device to configure analog hardware.

It should be noted that the above-mentioned embodiments illustrate rather than limit the invention, and that those skilled in the art will be able to design many alternative embodiments without departing from the scope of the appended claims. The word "comprising" does not exclude the presence of elements or steps other than those listed in the scope of the patent application, "a" does not exclude a plurality, and a single feature or other unit may implement several of the elements stated in the scope of the patent application function. Any reference numerals or signs in the claimed scope should not be construed as limiting the scope.

100: Audio driver circuit/audio driver circuit system

101: Host device

102: Audio Load/Amplifier

103: Accessory Equipment

104: Differential Output Digital-to-Analog Converter (DAC)

105: Output Driver/Differential Input Amplifier

106: Power supply module

107: Contact

108: Connector/dotted box

109: Contact

110: Dotted box/Audio output path clamp

111P: Positive Voltage Generator

111N: Negative Voltage Generator

112P: Positive voltage selector

112N: Voltage selector

113N: switch

113P: switch

114N: Safety Voltage Clamp

114P: Safety Voltage Clamp

115: Clamp enable circuitry

GND: ground

RST: reset signal

S _D : Audio driver signal

S _IN : input signal

S _N : second analog signal

S _P : first analog signal

S _TN : Transistor control signal

S _TP : Transistor Control Signal/Logic Signal

V _BD : battery voltage

V _NEG : Negative Supply Voltage

V _POS : Positive Supply Voltage

V _PS : Input power supply voltage

V _SAFEP : Positive Intermediate Voltage

V _SAFEN : Negative Intermediate Voltage

V _TN : Control voltage

V _TP : Control voltage

Claims (23)

An audio driver circuit comprising: a first transistor having a gate-source voltage tolerance; a power supply module configured to generate at least a first supply for the audio driver circuit voltage, wherein the audio driver circuit is operable in a first mode in which the first supply voltage has a first magnitude such that in use at a source terminal of the first transistor a voltage magnitude that can exceed the gate-source voltage tolerance of the first transistor; a voltage generator configured to output a first intermediate voltage to an intermediate voltage in the first mode a path to serve as a gate control voltage for at least the first transistor, the first intermediate voltage having a magnitude lower than the first magnitude so that when applied to the gate of the first transistor the maintaining the magnitude of the gate-source voltage of the first transistor below the tolerance; and an intermediate path voltage clamp for selectively voltage clamping the intermediate voltage path to a voltage level , in order to maintain the magnitude of the gate-source voltage of the first transistor below the tolerance, wherein the voltage clamp is enabled by a reset condition for the audio driver circuit. The audio driver circuit as described in claim 1, wherein the reset condition includes the initiation of a hardware reset, during which one or more external digital controls for the audio driver circuit are used for the hardware reset. The generated clock is unavailable. The audio driver circuit of claim 1 or claim 2 comprising clamp enable circuitry configured to enable operation of the first mid-path voltage clamp in response to the reset condition . The audio driving circuit as described in claim 3, wherein the clamp enable circuit The system is configured to receive a power supply that is different from the input voltage for the power supply module and remains available during a reset initiated by the reset condition. The audio driver circuit of claim 4, wherein the clamp enable circuit is configured to receive a battery voltage from a battery of a host device as the power supply, and wherein the clamp enable circuit The system includes a voltage regulator configured to regulate the battery voltage. The audio driver circuit of claim 3, wherein the clamp enable circuitry includes a reset module configured to monitor the reset condition, and in response to detecting the reset condition The reset condition generates a reset control signal to enable the mid-path voltage clamp. The audio driver circuit of claim 6, wherein the intermediate path voltage clamp comprises a plurality of diodes and a clamp enable transistor connected in series, the plurality of diodes and the clamp A bit enable transistor is configured in series between a node receiving the first supply voltage and a node of the intermediate voltage path. The audio driver circuit of claim 7, wherein the clamp enable circuitry includes a voltage selector configured to receive the reset control signal, the first supply voltage and the a first intermediate voltage, and selectively outputting an output voltage based on the first supply voltage or the first intermediate voltage as the clamp enable transistor for the intermediate path voltage clamp based on the reset control signal One of the gate control signals. The audio driver circuit of claim 1, comprising at least a first voltage selector configured to receive the first intermediate voltage and based on a voltage for an associated transistor Receiving the transistor control signal selectively outputs the intermediate voltage as a gate control voltage for at least one transistor. The audio driving circuit as described in claim 9, wherein the first voltage selector configured to receive the transistor control signal, the first supply voltage, and the first intermediate voltage, and to selectively output an output voltage based on the first supply voltage or the first intermediate voltage based on the transistor control signal as the gate control voltage. The audio driving circuit of claim 10, wherein the first transistor forms part of the first voltage selector. The audio driving circuit of claim 9, wherein the first voltage selector outputs a gate control voltage to at least one of: an output stage of an output driver of the audio driving circuit a transistor; and a transistor of an audio output path clamp switch. The audio driving circuit of claim 1, wherein the first transistor is one of a laterally diffused MOS transistor device or an extended drain MOS transistor device. The audio driving circuit as described in claim 1, wherein the power supply module is operable in the first mode to further generate a voltage opposite to the first supply voltage but equal in magnitude to the first supply voltage a second supply voltage. The audio driving circuit of claim 14, further comprising: a second voltage generator configured to output a second intermediate voltage to a second intermediate voltage path in the first mode to be used as a gate control voltage for at least one second transistor, the second intermediate voltage having a magnitude lower than the first magnitude, so that the second intermediate voltage when applied to the gate of the second transistor The magnitude of the gate-source voltage of the two transistors is maintained below a gate-source voltage tolerance of the second transistor; and an intermediate path voltage clamp for the second intermediate The voltage path selectively clamps to a defined voltage to maintain the magnitude of the gate-source voltage of the second transistor below the tolerance, wherein the voltage clamp is used for the audio One of the most important driving circuits Set condition enabled. The audio driving circuit of claim 1, wherein the power supply module is further operable in a second mode, in which the first supply voltage has a second magnitude, wherein The second magnitude is lower than the first magnitude, and in normal operation in the second mode, a voltage magnitude at a source terminal of the first transistor cannot exceed the first transistor's Gate-source voltage tolerance. The audio driving circuit of claim 16, wherein the voltage generator is disabled in the second mode. The audio driving circuit as described in item 1 of the claimed scope is implemented as an integrated circuit. The audio driving circuit of claim 1, wherein the audio driving circuit system forms at least part of an audio codec. An electronic device comprising an audio driving circuit as described in item 1 of the scope of the application, and a connector for making a removable mating connection with an accessory device in use, wherein the audio driving circuit is assembled state to output at least one audio driving signal to an electrical contact of the connector. An electronic device, comprising an audio driving circuit as described in any one of items 1 to 19 of the scope of the application, wherein the device is at least one of the following: a portable device, a battery powered device, a communication device; a mobile or cellular telephone device or a smart phone; a computing device; a tablet, notebook, laptop or desktop computer; a wearable device; a smart watch ; a voice activated or voice controlled device. An audio driving circuit, which includes: a plurality of transistors; a power supply module, which can operate in a first mode to generate a first voltage at least a first voltage of magnitude, wherein the first voltage magnitude is such that in use in the first mode, for a first set of one or more transistors, one of the transistors in the first set the source terminal can exceed the gate-source voltage tolerance of the transistor; an intermediate voltage generator configured to output a first intermediate voltage to an intermediate voltage path in the first mode to provide a A voltage used as a gate control voltage of the one or more transistors of the first group, wherein the first intermediate voltage differs from the first voltage by less than the gate of one of the transistors in the first group - an amount of source voltage tolerance; an intermediate path voltage clamp for selectively voltage clamping the intermediate voltage path in response to a reset condition for the audio driver circuit. An audio driver circuit comprising: at least one first transistor having a gate-source voltage tolerance; a power supply having a power supply controller operable to a controlling the power supply in a first mode to generate a supply voltage having a magnitude greater than the gate-source voltage tolerance; a voltage controller configured to generate a first control voltage for use as at least a gate control voltage of the first transistor to maintain the magnitude of the gate-source voltage of the first transistor below the tolerance; and a voltage clamp for use in the power The output of the voltage controller is clamped to the first control voltage if the supply controller is inoperable.

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