TWI745237B - Display device - Google Patents

Abstract

A display device includes a substrate and a plurality of test pads. The substrate has a display area and a peripheral area arranged adjacently, and the display area is provided with a plurality of pixel units. The plurality of test bonding pad groups are arranged in the peripheral area, and each of the test bonding pad groups has a first test bonding pad and a second test bonding pad. The first test pad or the second test pad includes a transparent conductive layer and a metal layer arranged up and down, and the metal layer is electrically connected to the transparent conductive layer. Wherein, the first test pad and the second test pad are arranged oppositely, and the area of the transparent conductive layer is larger than the area of the metal layer.

Description

Display device

The present invention relates to the field of display technology, and in particular to a display device with a specially designed cell test pad.

In the production process of the display device, the detection of the electrical characteristics of the substrate is a particularly important step. In the prior art, an array tester (Array Tester) is usually used to contact a cell test pad with a fixture, and test signals are written into the pixels in the substrate for detection and analysis. The test pads are usually arranged on the periphery of the substrate. On both sides of the area.

In recent years, with the continuous narrowing of the frame of display devices, new requirements have been put forward for the use of existing test devices for substrate inspection. When the peripheral area of the display panel becomes narrower, the specifications of the test pads provided in this area have also changed. Being continuously compressed, when the size of the test pad is reduced, the measurement electrical area of the display device will be limited, and the test pad will be arranged too densely. Under the premise of the same size of the test probe, the test The probe can't make normal and effective contact with the test pad, so that the product cannot be tested electrically, and it is impossible to detect whether the product is abnormal.

In order to solve the above technical problems, the purpose of the present invention is to provide a display device with a new design. At the same time, it ensures the normal and effective contact between the transparent conductive layer and the test probe.

Specifically, an embodiment of the present invention discloses a display device, including:

A substrate having a display area and a peripheral area arranged adjacently, and the display area is provided with a plurality of pixel units;

A plurality of test pad groups are arranged in the peripheral area, each of the test pad groups has a first test pad and a second test pad, the first test pad or the second test pad The soldering pad includes a transparent conductive layer and a metal layer arranged up and down, and the metal layer is electrically connected to the transparent conductive layer;

Wherein, the first test pad and the second test pad are disposed opposite to each other, and the area of the transparent conductive layer is larger than the area of the metal layer.

In an embodiment of the present invention, the metal layer and the transparent conductive layer at least partially overlap the vertical projection area of the substrate.

In an embodiment of the present invention, the transparent conductive layer has a first part and a second part, the first part overlaps the vertical projection area of the metal layer on the substrate, and the second part is located at the The metal layer is outside the vertical projection area of the substrate.

In an embodiment of the present invention, the first test pad and the second test pad are symmetrically arranged.

In an embodiment of the present invention, the plurality of test pad groups are sequentially arranged along a first direction.

In an embodiment of the present invention, the metal layer of the first test pad and the metal layer of the second test pad are sequentially arranged along a first direction.

In an embodiment of the present invention, the transparent conductive layer of the first test pad and the transparent conductive layer of the second test pad are arranged in sequence along a second direction, and the second direction is different from that of the second direction.述第一向。 Said the first direction.

In an embodiment of the present invention, the display device further includes a plurality of traces, the plurality of traces are disposed in the peripheral area, and the plurality of traces are connected to the second portion of the transparent conductive layer. The vertical projection area partially overlaps the substrate at least partially.

In an embodiment of the present invention, the ratio of the area of the metal layer of the first test pad or the second test pad to the area of the transparent conductive layer is less than or equal to 15%.

In an embodiment of the present invention, the first test pad and the second test pad are substantially complementary.

In order to make the above-mentioned features and effects of the present invention more clear and understandable, the following specific embodiments are described in detail in conjunction with the accompanying drawings of the specification.

In order to make the above-mentioned objects, features and advantages of the present invention more obvious and understandable, the specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings. In the following description, many specific details are explained in order to fully understand the present invention. However, the present invention can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without departing from the connotation of the present invention. Therefore, the present invention is not limited by the specific implementation disclosed below.

It should be noted that when an element is referred to as being "fixed to" another element, it can be directly on the other element or a central element may also be present. When an element is considered to be "connected" to another element, it can be directly connected to the other element or an intermediate element may be present at the same time.

Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the technical field of the present invention. The terms used in the specification of the present invention herein are only for the purpose of describing specific embodiments, and are not intended to limit the present invention. The term "and/or" as used herein includes any and all combinations of one or more related listed items.

Please refer to FIGS. 1 and 2. FIG. 1 shows a side view of a display device with a test pad according to an embodiment of the present invention, and FIG. 2 shows a display device with a test pad according to an embodiment of the present invention Top view. The display device as shown in FIG. 1 includes a substrate 100, and the substrate 100 may be, for example, a TFT substrate. The material of the substrate 100 can be glass, quartz, organic polymer, or opaque/reflective material (for example, conductive material, metal, wafer, ceramic or other applicable materials) or other applicable materials. Further, a display area AA and a peripheral area BA are further provided on the substrate 100, and a plurality of pixel units (not shown in the figure) are arranged in the display area, and the plurality of pixel units are arranged in multiple rows along a first direction. , Arranged in multiple rows along a second direction, where in this embodiment, the first direction is the Y direction, the second direction is the X direction, and the first direction is substantially perpendicular to the second direction. In addition, each of the pixel units has a thin film transistor (not shown in the figure).

Further, in order to realize the electrical characteristic detection of the display device, the display device further includes a plurality of test pad groups 200 arranged on the substrate 100. For simplicity of description, only one of the test pad groups 200 is shown in FIG. 1 . Specifically, the test pad groups 200 are arranged in the peripheral area BA of the substrate 100. Any test pad group 200 further includes at least two test pads 210. The test pad 210 includes two parts: a transparent conductive layer TL and a metal layer M2. The transparent conductive layer TL and the metal layer M2 are arranged up and down. Specifically, the transparent conductive layer TL is located above the metal layer M2 and is electrically connected to each other, and in order to effectively electrically connect the metal layer M2 and the transparent conductive layer TL, the metal layer M2 and the transparent conductive layer TL at least partially overlap the vertical projection area of the substrate 100. In this embodiment, the position of the metal layer M2 is only for illustration, and the present invention is not limited to this. The actual position of the metal layer M2 can be based on ensuring effective electrical connection with the transparent conductive layer TL, according to the display device The wiring needs to be flexibly set in the peripheral area of the display device.

Please continue to refer to FIG. 2, which further shows the specific arrangement of the test pad group 200 in the peripheral area BA. The test pad group 200 includes a first test pad 211 and a second test pad 212, wherein the first test pad 211 and the second test pad 212 are arranged opposite to each other along a first direction (ie Y direction), and each test pad The group 200 is arranged along the second direction (ie, the X direction).

FIG. 3 is a top view of a display device with a test pad according to an embodiment of the invention. As shown in FIG. 3, each test pad group 200 of this embodiment includes at least a first test pad 211 and a second test pad 212, but the present invention is not limited to this, and is used to achieve the objective of the present invention. In the case of, each of the test pad groups 200 may include more test pads 210.

Correspondingly, the first test pad 211 or the second test pad 212 of this embodiment respectively includes at least one transparent conductive layer TL and at least one metal layer M2 (not shown in FIG. 3), and the metal layer M2 is electrically connected to The transparent conductive layer TL is located above the metal layer M2. Therefore, in the top view of this embodiment, the metal layer M2 is shown in the shaded area in the figure.

In this embodiment, the transparent conductive layer TL may have a single-layer or multi-layer structure, and its material includes, for example, indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), and indium tin zinc oxide (ITZO). One or a combination of the above or other transparent conductive materials; the metal layer can also be a single-layer or multi-layer structure, and its material includes, for example, chromium, gold, silver, copper, tin, lead, hafnium, tungsten, molybdenum, neodymium, titanium, tantalum, Metals such as aluminum and zinc, the above alloys, the above metal oxides, the above metal nitrides or the above combinations, or other metal conductive materials. Of course, the present invention is not limited to this.

Further, as shown in FIG. 3, the first test pad 211 and the second test pad 212 of any test pad group 200 are arranged opposite to each other along a first direction, and the first direction may be, for example, the Y direction. The transparent conductive layer TL of the first test pad 211 and the transparent conductive layer TL of the second test pad 212 present a symmetrical inverted L shape, and the two L shapes are basically complementary. On the one hand, the complementary arrangement of this L shape The contact area with the probe 301 is increased, and on the other hand, the occupied area is more saved. At the same time, a plurality of test pad groups 200 are sequentially arranged along the second direction in the peripheral area BA, and the second direction may be, for example, the X direction. The figure is a simple illustration, and only two test pad groups 200 are shown, but the present invention is not limited to this. In more embodiments, there are multiple test pad groups. In this embodiment, the transparent conductive layer TL of the first test pad 211 and the transparent conductive layer TL of the second test pad 212 present a symmetrical inverted L shape, but it is not limited to this. The transparent conductive layer TL and the transparent conductive layer TL of the second test pad 212 can also have other shapes, as long as the transparent conductive layer TL of the first test pad 211 and the transparent conductive layer TL of the second test pad 212 are formed between Basically complementary shape is sufficient.

Furthermore, as shown in FIG. 3, the two metal layers M2 of the test pad 210 of any test pad group 200 in the figure are sequentially arranged along the second direction, so the multiple test pads in the display device of this embodiment The plurality of metal layers M2 of the group 200 are generally arranged along the second direction, where the second direction may be, for example, the X direction. The two transparent conductive layers TL of the test pads of any test pad group 200 are sequentially arranged along the first direction. In this embodiment, the transparent conductive layer TL includes, for example, two parts, and the first part 221 is connected to the metal layer M2. In the overlapping area, the second portion 222 is an area that does not overlap with the metal layer M2. The first part 221 and the second part 222 of the two transparent conductive layers TL are also arranged along the first direction respectively. Since the two transparent conductive layers TL are arranged symmetrically in an inverted L shape, the two transparent conductive layers in the test pad group 200 The layers TL are substantially centrally symmetrical, and the first direction may be the Y direction, for example. To make it easier to understand, specific dimensions will be exemplified below, but the present invention is not limited to these specific dimensions. In an embodiment of the present invention, as shown in FIG. 3, the metal layer M2 is, for example, a rectangle with a length La of 100 μm and a width Wa of 50 μm (shaded in the figure). The length Lb of the transparent conductive layer TL is, for example, 300 μm and the width Wb is, for example, 350 μm. Of course, the present invention is not limited to this. In actual manufacturing technology, the actual sizes of the metal layer M2 and the transparent conductive layer TL can be determined according to the specific specifications of the jig 300. The design of using the transparent conductive layer TL to electrically connect the metal layer M2 and to increase the area of the transparent conductive layer TL can avoid the probe 301 from being crooked due to the narrow frame, resulting in the spacing between the cell test pads ( Pad Pitch), for example, is increased to 400*400μm, which conforms to the fixture manufacturing specifications, and can smoothly realize electrical testing with fixtures.

When performing an electrical test, an array tester (Array Tester) uses a fixture 300 to contact the transparent conductive layer TL, and then write a test signal into the thin film transistor, so as to realize the detection of the pixel unit of the display panel.

The test pad groups 200 are used to contact and electrically connect with the test probe 301 in the fixture 300, so that the first test pad 211 and the second test pad 212 can pass through the test probe 301 and load from the test probe 301. With the signal in 300 and transmit it, the display panel can obtain different signals loaded on the first test pad 211 and the second test pad 212 through the test probe 301 to achieve the desired color display, thereby detecting the display panel Whether there is a defect. Specifically, the transparent conductive layer TL in the first test pad 211 and the second test pad is used to contact the test probe 301 to transmit the test signal of the jig 300; the metal layer M2 and the pixel unit in the The thin film transistor and the transparent conductive layer TL are electrically connected to each other to write the test signal of the jig 300 transmitted by the transparent conductive layer TL into the pixel unit to test the electrical characteristics of the display panel.

To describe the structure of the test pad in detail, please refer to FIG. 4, which is a schematic diagram of the structure of the test pad according to an embodiment of the present invention. FIG. 4 shows the three-dimensional structure of a test pad group 200. The test pad group 200 includes two test pads 210, and each test pad includes a transparent conductive layer TL and a metal layer M2 electrically connected to each other. .

As shown in FIG. 4, the transparent conductive layer TL includes a first portion 221 and a second portion 222. The first portion 221 has a first width w1, and the second portion 222 has a second width w2. More specifically, the transparent conductive layer TL is composed of The first part 221 and the second part 222 are combined along a side having a first width w1 and a side having a second width w2. The first width w1 is smaller than the second width w2, and the first part 221 and the second part 222 are aligned along a section. It is arranged flat, and the transparent conductive layer TL is roughly in the shape of an "L". It should be pointed out that in the actual manufacturing process, the transparent conductive layer TL is an integrally formed L-shaped physical component, and the first part 221 and the second part 222 are not actually distinguished. The first part and the second part are used in this specification only for the convenience of description, and the present invention is not limited thereto.

As mentioned above, the metal layer M2 and the transparent conductive layer TL at least partially overlap the vertical projection area of the substrate 100, as shown in FIG. To ensure its effective connection with the transparent conductive layer TL, the metal layer M2 needs to determine the specific setting position according to the manufacturing process. In the case where the transparent conductive layer TL is divided into the first part 221 and the second part 222, more specifically, in the present In an embodiment of the invention, the metal layer M2 and the first portion 221 of the transparent conductive layer TL overlap in the vertical projection area of the substrate 100.

Please refer to FIG. 5, in the display device of the present invention, a plurality of traces ML are provided. These traces ML are provided in the peripheral area and are provided in the same layer as the metal layer M2. As mentioned above, the present invention can reduce the size of the metal. The area of the layer M2 reduces the space occupied by the peripheral area, and the excess space can be used for other circuits. In other words, these traces ML can at least partially overlap the vertical projection area of the second portion 222 of the transparent conductive layer TL on the substrate 100, for example. .

As shown in FIG. 6A, FIG. 6A shows a prior art liquid crystal display panel with a chip on film (COF) structure, and the display panel has a display area AA and a peripheral area BA. If a liquid crystal display panel with a flip-chip film structure is designed with a narrow frame, the width H of its peripheral area BA is, for example, about 1000 μm, and the length H1 of the test pad needs to be reduced to 300 μm accordingly. According to the prior art, the transparent conductive layer TL and the metal For the setting method and size of the layer M2, the existing array test device (Array Test) cannot normally contact the test pad, resulting in the inability to perform electrical testing.

In an embodiment of the present invention, in order to be able to use an existing array tester (Array Tester) to perform electrical testing on the display panel under the same frame width, the above-mentioned test pad design method is used to change the transparent conductive layer TL and The area and shape of the metal layer M2 make the distance between the test pads meet the electrical test requirements of the Array Tester. As shown in Figure 6B, in a liquid crystal display panel with a Chip On Film (COF) structure, if the width H of the peripheral area BA is also 1000 μm, as shown in Figure 4, a similar design method is used to display A plurality of test pad groups 200 are arranged in the peripheral area BA of the panel along the first direction, and two L-shaped transparent conductive layers TL of any test pad group 200 are arranged symmetrically along the second direction. In this embodiment, the width w2 of the second part 222 of the transparent conductive layer TL is, for example, 250 μm; the length l1 of the first part 221 is, for example, 100 μm, and the length l2 of the second part 222 is, for example, 200 μm; A gap d of 100 μm is maintained between the pad groups 200, for example. That is, the existing array tester (Array Tester) can be used to perform electrical testing on the display panel.

Please continue to refer to FIG. 7A, which shows a liquid crystal display panel in the prior art. In the prior art, usually the cell test pad (Cell Test Pad) size needs to be maintained at 450*100 (μm) before the Array Tester can perform electrical testing. In this case, in order to meet the test pad The setting of the display device and the wiring requirements of the display device, the frame width H'needs to be at least 1155μm. However, when the frame of the display panel becomes narrow and the specifications of the test pads need to be compressed, in order to ensure that the original array tester (Array Tester) can be used to continue normal testing, the design method of the test pads needs to be changed to make the test welding The setting of the pad not only meets the needs of narrow frame design, but also meets the test requirements of the test device. In another embodiment of the present invention, as shown in FIG. 7B, this embodiment provides a narrow-frame liquid crystal display panel with a Chip On Film (COF) structure. For the design method of the test pad of the present invention, please refer to FIG. 8A and FIG. 8B for details. FIG. 8A shows a setting method of the test pad in the prior art. The specification of the test pad in the prior art is 450*100 ( μm), the distance d1 between the outer side of the test pad and the cutting line M of the display panel is generally 125 μm. FIG. 8B shows a test pad according to an embodiment of the present invention. The width w2 of the second portion of the transparent conductive layer TL of a test pad is, for example, 350 μm. In this embodiment, when the distance d2 between the outer side of the test pad and the cutting line M of the display panel is 70 μm, the display panel can be at least Reduce the 155 μm frame width to facilitate narrower frame design.

It should be pointed out that the design method of the present invention adopts the method of reducing the area of the metal layer M2 to reduce the frame width and the new design of the test pad. The area of the metal layer M2 of the first test pad 211 or the second test pad 212 The area of the transparent conductive layer TL is preferably less than or equal to 15%. In an embodiment of the present invention, FIGS. 9A to 9C show design diagrams of test pads with different areas of the metal layer M2. As shown in FIG. 9A, the distance D between two adjacent test pad groups 200 is, for example, 100 μm, and the distance DA between the transparent conductive layers TL of two test pads of the same test pad group 200 is, for example, 50 μm. For example, the metal layer M2 is designed to have a width Wm of 50 μm and a length Lm of 100 μm. The first part of the transparent conductive layer TL has a length Ln of 100 μm and a width Wn of 50 μm, and the second part of the transparent conductive layer TL has a length Lp of 300 μm and a width of Wp. As a result, the ratio of the area of the metal layer M2 to the area of the transparent conductive layer TL is 5.8%. In another embodiment of the present invention, as shown in FIG. 9B, the distance D'between two adjacent test pad groups in the figure is, for example, 100 μm, and the two test pads of the same test pad group 200 are transparent The distance DA' between the conductive layers TL is, for example, 50 μm. The minimum specification of the metal layer M2 can be designed to have a length Lm' of 20 μm and a width Wm' of 20 μm, for example, but the present invention is not limited to this. In this embodiment, when the size of the metal layer M2 is set to 20*20 (μm), the length Ln' of the first part of the transparent conductive layer TL is 20μm, the width Wn' is 20μm, and the length Lp' of the second part is It is 300 μm and the width Wp' is 330 μm, and its ratio to the area of the transparent conductive layer TL is 0.47%. The spacing between any traces is about 5 μm, which can save about 66 metal layer M2 traces.

Of course, in order to be more conducive to the realization of the narrow frame of the display device, in another embodiment of the present invention, the maximum size of the metal layer M2 is also set, as shown in FIG. 9C, where two adjacent test pads are shown in FIG. The distance D" between the groups is, for example, 100 μm, and the distance DA" between the transparent conductive layers TL of two test pads of the same test pad group 200 is, for example, 10 μm. In this embodiment, the maximum specification of the metal layer M2 is set, for example, the length Lm'' is 100 μm and the width Wm'' is 100 μm, but the present invention is not limited to this. When the specifications of the transparent conductive layer TL remain unchanged. When the ratio of the area of the metal layer M2 to the area of the transparent conductive layer TL is 15%, the spacing between any traces is about 5 μm, which can save about 52 metal layer traces.

In summary, by designing a new type of test pad, the present invention facilitates the use of existing test devices for electrical testing in the case of a display device with a narrow frame design. The main technical means of the new test pad of the present invention is to change the area of the transparent conductive layer and the metal layer of the test pad, and change the setting of the test pad, so as to realize the narrow frame of the display device, so that the gap between the test pads The spacing meets the requirements of the test device, and the test device can effectively contact the transparent conductive layer. In order to achieve a narrow frame of the display device, the area of the metal layer M2 provided in the peripheral area of the substrate 100 is reduced, so that the area occupied by the metal layer M2 is reduced, and the excess space can be used for other circuits.

Of course, the present invention can also have various other embodiments. Without departing from the spirit and essence of the present invention, those skilled in the art can make various corresponding changes and modifications according to the present invention, but these corresponding changes and All deformations shall fall within the protection scope of the appended claims of the present invention.

100: substrate 200: Test pad group 210: Test pad 211: The first test pad 212: second test pad 300: Fixture 301: Probe TL: Transparent conductive layer 221: Part One 222: Part Two M2: Metal layer ML: routing w1: first width w2: second width Wa, Wb: width l1, l2: length La: length AA: Display area BA: Surrounding area H, H’: width H1, H1’: Length DA,DA’,DA’’: Spacing D,D’,D’’: Spacing d, d1, d2: spacing Wm,Wm’ ,Wm’’: wide Wn,Wn’ ,Wn’’: wide Lm,Lm’ ,Lm’’: long Ln,Ln’,Ln’’ :Long Wp,Wp’,Wp’’: wide Lb: length LP,LP’,LP’’: long M: Display panel cutting line

FIG. 1 is a side view of a display device with a test pad according to an embodiment of the invention. FIG. 2 is a top view of a display device with a test pad according to an embodiment of the invention. FIG. 3 is a top view of a display device with a test pad according to an embodiment of the invention. 4 is a schematic diagram of the structure of a test pad according to an embodiment of the present invention. FIG. 5 is a schematic diagram of wiring of a display device with a test pad according to an embodiment of the present invention. FIG. 6A is a schematic diagram of a display panel using a test pad in the prior art. FIG. 6B is a schematic diagram of a display panel using a test pad according to an embodiment of the present invention. FIG. 7A is a schematic diagram of another display panel using a test pad of the prior art. FIG. 7B is a schematic diagram of another display panel using the test pad according to an embodiment of the present invention. FIG. 8A is a schematic diagram of the arrangement of test pads in the prior art. FIG. 8B is a schematic diagram of an arrangement of test pads according to an embodiment of the present invention. 9A to 9C are schematic diagrams of the structure of the metal layer of the present invention having different area sizes.

300: Fixture

301: Probe

200: Test pad group

221: Part One

222: Part Two

211: The first test pad

212: second test pad

TL: Transparent conductive layer

M2: Metal layer

l1, l2: length

w1: first width

w2: second width

Claims (10)

A display device, including: A substrate having a display area and a peripheral area arranged adjacently, and the display area is provided with a plurality of pixel units; and A plurality of test pad groups are arranged in the peripheral area. Each test pad group has a first test pad and a second test pad. The first test pad or the second test pad includes upper and lower test pads. A transparent conductive layer and a metal layer are provided, and the metal layer is electrically connected to the transparent conductive layer; Wherein, the first test pad and the second test pad are disposed oppositely, and the area of the transparent conductive layer is larger than the area of the metal layer. The display device according to claim 1, wherein the metal layer and the transparent conductive layer overlap at least a part of the vertical projection area of the substrate. The display device according to claim 1 or 2, wherein the transparent conductive layer has a first part and a second part, the first part overlaps the vertical projection area of the metal layer on the substrate, and the second part is located in the The metal layer is outside the vertical projection area of the substrate. The display device according to claim 3, wherein the first test pad and the second test pad are symmetrically arranged. The display device according to claim 1, wherein the plurality of test pad groups are sequentially arranged along a first direction. The display device according to claim 3, wherein the metal layer of the first test pad and the metal layer of the second test pad are sequentially arranged along a first direction. The display device according to claim 6, wherein the transparent conductive layer of the first test pad and the transparent conductive layer of the second test pad are sequentially arranged along a second direction, and the second direction is different from the The first direction. The display device according to claim 3, wherein the display device further includes a plurality of traces, the plurality of traces are disposed in the peripheral area, and the plurality of traces and the second part of the transparent conductive layer are in the The vertical projection areas of the substrate at least partially overlap. The display device according to claim 1, wherein the ratio of the area of the metal layer of the first test pad or the second test pad to the area of the transparent conductive layer is less than or equal to 15%. The display device according to claim 1, wherein the first test pad and the second test pad are substantially complementary.

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