TWI742049B - Systems for tuning an rf generator and an impedance matching network in a step-wise fashion for multiple states of the rf generator - Google Patents

Abstract

Systems and methods for tuning an impedance matching network in a step- wise fashion for each state are described. By tuning the impedance matching network in a step-wise fashion for each state instead of directly achieving optimum values of a radio frequency (RF) for each state and directly achieving an optimal value of a combined variable capacitance for each state, processing of a wafer using the tuned optimal values becomes feasible.

Description

Step-by-step adjustment of the radio frequency generator for the multi-state radio frequency generator and Impedance matching network system

The present invention relates to a system and method for adjusting an impedance matching network in a stepwise manner for a multi-state radio frequency (RF) generator.

The plasma system is used to control the plasma manufacturing process. The plasma system includes multiple radio frequency (RF) sources, an impedance matching component, and a plasma reactor. A work piece is placed inside the plasma chamber, and plasma is generated in the plasma chamber to process the work piece. It is important to handle work pieces in a similar or uniform manner. In order to process the work piece in a similar or uniform manner, it is important to adjust the RF source and impedance matching piece.

This is the background of the embodiments described in this disclosure.

The embodiments of the present disclosure provide devices, methods, and computer programs for adjusting the impedance matching network in a stepwise manner for multi-state radio frequency (RF) generators. It should be understood that the embodiments of the present invention It can be implemented in a variety of ways (for example, processes, equipment, systems, hardware, or methods on computer-readable media). Several examples are described below.

In a pulsed plasma system (such as a plasma system that is generated or maintained by a pulsed RF signal generated by an RF generator, etc.), the pulsed plasma has a set of RF power and power in one state (such as S1, etc.) In the second state (such as S2, etc.) there is a second set of RF power. Because the RF pulse time is short (for example, the pulse repetition frequency is usually 100 hertz (Hz) to 10 kilohertz (kHz), etc.), the variable capacitor driven by the motor of the impedance matching network cannot respond to the pulse of the RF signal. The variable capacitor is set to a compromise value that is the same for the two states.

Some of the advantages of the system and method described in this article include the use of a step-by-step method to adjust the variable capacitance of the impedance matching network. In this stepping method, during the state S1, calculate the optimal value of the RF frequency of the RF signal generated by the RF generator used in the state S1, and the voltage for the states S1 and S2 at the input of the model system The combination of reflection coefficient is the best value of the combined variable capacitance of the impedance matching network with the minimum value. In addition, the local value of the RF frequency at which the voltage reflection coefficient for the state S1 is the minimum is determined. In addition, during the state S2, the optimal value of the RF frequency of the RF signal generated by the RF generator used in the state S2 is calculated. In addition, the local value of the RF frequency at which the voltage reflection coefficient for the state S2 is the minimum is determined. Instead of applying the optimal value of the combined variable capacitor, the step value of the combined variable capacitor is applied to the impedance matching network. The stepping method is then repeated using the step value, the local value of the RF frequency for the state S1, and the local value of the RF frequency for the state S2 to apply another step value of the combined variable capacitor. The step value is increased until the optimal value of the combined variable capacitance is reached. It is difficult to reach the optimal value of the combined variable capacitor directly from the operating value of the impedance matching network and at the same time to achieve the optimal value of the RF frequency. This is because more than one impedance matching network is controlled at the same speed as the RF generator. Variable capacitors are difficult. By using this stepping method, the optimal values of variable capacitance and RF frequency are achieved.

Additional advantages include adjusting to have a compromise optimal value other than zero reflected power. For example, when plasma is pulsed between multiple states, the radio frequency of the RF signal generated by the RF generator changes rapidly to have different values in the pulse state, but the impedance matching network can The capacitor cannot be changed. There are three variable parameters (for example: the RF frequency of the RF signal in state S1, the RF frequency of the RF signal in state S2, and the position of the variable capacitor of the impedance matching network, etc.) to adjust four quantities (for example: The real and imaginary parts of the reflection coefficient in states S1 and S2, etc.). It is difficult to achieve zero reflected power for both the pulse states S1 and S2 at the same time, so the best compromised value of the reflection coefficient is achieved for the states S1 and S2. In order to obtain the best compromise value (for example: minimize the amount of A*Γ(S1)+(1-A)*Γ(S2), where Γ(S1) and Γ(S2) are used for pulse states S1 and S2 Voltage reflection coefficient, and A is a coefficient between 0 and 1, etc.), the model system is used to find the position of the variable capacitor and the two RF frequencies for the best compromise value.

Other implementation aspects will become apparent from the following detailed description in conjunction with the accompanying drawings.

100: Plasma system

102: model system

104: Radio Frequency (RF) Generator

106: Impedance matching network

108: Plasma Chamber

110: Host computer system

112: drive components

114: connection mechanism

116: Upper electrode

118: Chuck

120: top surface

122: RF power supply

124: Sensor

126: output

128: input

130: RF cable

132: RF transmission line

134: Processor

136: network cable

137: Memory Device

138: network cable

140: output

142: Input

144: output

1100: figure

1200: Figure

1300: figure

The embodiment is understood by referring to the following description in conjunction with the accompanying drawings.

Figure 1 is a diagram of an embodiment of a plasma system to illustrate the use of a model system to generate load impedance ZL1 (S1) for state S1.

Figure 2 is a diagram of an embodiment of the model system, which is initialized to have radio frequency RF1 (S1) and variable capacitance C1 to determine the variable capacitance and/or radio frequency. For the variable capacitance and/ Or radio frequency, the combination of the voltage reflection coefficient Γ(S1) for the state S1 and the voltage reflection coefficient Γ(S2) for the state S2 at the input of the model system is the minimum.

FIG. 3 is a diagram of an embodiment of the plasma system to illustrate the use of the model system to generate the load impedance ZL1 (S2) for the state S2.

Figure 4 is a diagram of an embodiment of the model system. The model system is initialized to radio frequency RF1 (S2) and variable capacitance C1 to determine the variable capacitance and/or radio frequency so that the voltage at the input of the model system is relative to the state S1 The combination of the reflection coefficient Γ(S1) and the voltage reflection coefficient Γ(S2) for the state S2 is the minimum value.

Figure 5 is a diagram of an embodiment of the plasma system to illustrate the use of the capacitance value C _optimum 1 to generate the step combination variable capacitance value C _step 1 for the state S1, and the use value RF _optimum 1(S1)@C1 The load impedance ZL2 (S1) is generated at the output of the model system for this state S1.

Fig. 6 is a diagram of an embodiment of a model system. The model system is set to RF _optimum 1(S1)@C1 for state S1 and a combined variable capacitor C _step 1 for state S1 to determine the model The combination of the voltage reflection coefficients Γ(S1) and Γ(S2) at the input of the system is the minimum radio frequency value and/or variable capacitance value.

Fig. 7 is a diagram of an embodiment of the plasma system to illustrate the use of the capacitance value C _optimum 1 to generate the step combination variable capacitance value C _step 1 for the state S2, and the use value RF _optimum 1(S2)@C1 The load impedance ZL2 (S2) is generated at the output of the model system for this state S2.

Fig. 8 is a diagram of an embodiment of a model system. The model system is set to RF _optimum 1(S2)@C1 for state S2 and a combined variable capacitor C _step 1 for state S2 to be used in the model system The minimum value of the combination of voltage reflection coefficients Γ(S1) and Γ(S2) is generated at the input of.

FIG. 9 is a diagram of an embodiment of the plasma system to illustrate the use of the capacitance value C _optimum 2 and the use value RF _optimum 1(S1)@C _step 1 to process the wafer W during the state S1.

FIG. 10 is a diagram of an embodiment of the plasma system to illustrate the use of the capacitance value C _optimum 2 and the use value RF _optimum 1(S2)@C _step 1 to process the wafer W during the state S2.

FIG. 11 illustrates an embodiment of a graph of a compromise between reaching the minimum value of the voltage reflection coefficient for the state S1 and the minimum value of the voltage reflection coefficient for the state S2.

FIG. 12 illustrates an embodiment of a diagram of the two states S1 and S2 of the RF signal generated by the RF generator.

FIG. 13 illustrates an embodiment of a diagram of more than two states of the RF signal generated by the RF generator.

The following embodiments describe a system and method for adjusting an impedance matching network in a stepwise manner for a multi-state radio frequency (RF) generator. It should be understood that the embodiments of the present invention may be implemented without some or all of these specific details. In other cases, in order not to unnecessarily obscure the embodiments of the present invention, well-known process operations are not described in detail.

FIG. 1 is a diagram of an embodiment of the plasma system 100 to illustrate the use of the model system 102 to generate the load impedance ZL1 (S1) for the state S1. The plasma system 100 includes a radio frequency (RF) generator 104, an impedance matching network 106, and a plasma chamber 108. The plasma system 100 includes a host computer system 110, a driving component 112, and one or more connecting mechanisms 114.

The plasma chamber 108 includes an upper electrode 116, a chuck 118, and a wafer W. The upper electrode 116 faces the chuck 118 and is, for example, grounded, coupled to a reference voltage, coupled to zero voltage, coupled to a negative voltage Wait. Examples of the chuck 118 include an electrostatic chuck (ESC) and a magnetic chuck. The lower electrode of the chuck 118 is made of metal, such as anodized aluminum, aluminum alloy, and the like. In various embodiments, the bottom electrode of the chuck 118 is covered with a thin ceramic metal layer. In addition, the upper electrode 116 is made of metal, such as aluminum, aluminum alloy, and the like. In some embodiments, the upper electrode 116 is made of silicon. The upper electrode 116 is located on the opposite side of the electrode under the chuck 118 and faces the lower electrode of the chuck 118. The wafer W is placed on the top surface 120 of the chuck 118 for processing, such as: depositing material on the wafer W, or cleaning the wafer W, or etching a layer deposited on the wafer W, or doping the wafer W, or implanting ions on the wafer W, or generating a photolithography pattern on the wafer W, or etching the wafer W, or sputtering the wafer W, or a combination thereof.

In some embodiments, the plasma chamber 108 is formed using additional components, such as: the upper electrode extension surrounding the upper electrode 116, the lower electrode extension surrounding the lower electrode of the chuck 118, the upper electrode 116 and the upper electrode The dielectric ring between the electrode extensions, the dielectric ring between the lower electrode and the lower electrode extension, is located at the edge of the upper electrode 116 and the chuck 118 to surround an area in the plasma chamber 108 where the plasma is formed Restriction ring, etc.

The impedance matching network 106 includes more than one circuit element, for example, more than one inductor, or more than one capacitor, or more than one resistor, or a combination of more than two, and the circuit elements are coupled to each other. For example, the impedance matching network 106 includes a series circuit including an inductor coupled in series with a capacitor. The impedance matching network 106 further includes a shunt circuit connected to the series circuit. The shunt circuit includes a capacitor connected in series with an inductor. The impedance matching network 106 includes more than one capacitor, and the corresponding capacitance of the more than one capacitor (for example, all variable capacitors, etc.) is variable (for example, using a driving component to change, etc.). The impedance matching network 106 includes more than one capacitor with a fixed capacitance, such as a capacitor that cannot be changed by the driving component 112. The combined variable capacitance of one or more variable capacitors of the impedance matching network 106 is C1. For example, The correspondingly placed plates of more than one variable capacitor are adjusted to a fixed position to set the variable capacitor C1. US Patent Application No. 14/245,803 provides an example of impedance matching network 106.

In some embodiments, the model system 102 includes a computer-generated model of the impedance matching network 106. For example, the model system 102 is generated by the processor 134 of the host computer system 110. The matching network model is derived from a branch of the impedance matching network 106, for example, represents a branch of the impedance matching network 106. For example, when an RF generator of x megahertz (MHz) is connected to the branch circuit of the impedance matching network 106, the matching network model means, for example, a computer-generated model of the circuit of the branch circuit of the impedance matching network 106, etc. . As another example, the number of circuit elements in the matching network model is not equal to the number of circuit elements in the impedance matching network 106.

In some embodiments, the matching network model has a smaller number of circuit elements than the number of circuit elements of the impedance matching network 106. For illustration, the matching network model is a simplified form of the branch circuit of the impedance matching network 106. For further explanation, the variable capacitances of the multiple variable capacitors of the branch circuit of the impedance matching network 106 are combined into a combined variable capacitor represented by more than one variable capacitance element of the matching network model; the impedance matching network 106 The fixed capacitances of the multiple fixed capacitors of the branch circuit are combined into a combined fixed capacitor represented by more than one fixed capacitance element of the matching network model; and/or the multiple fixed inductors of the branch circuit of the impedance matching network 106 The inductance is combined into a combined inductance represented by more than one inductance element of the matching network model; and/or the resistances of the multiple resistors of the branch circuit of the impedance matching network 106 are combined into more than one resistance of the matching network model A fixed resistor represented by the component. To illustrate more, the capacitances of capacitors connected in series are combined by the following: take the reciprocal of each capacitance value to generate multiple reciprocal capacitance values, add these reciprocal capacitance values to produce a reciprocal combined capacitance value, and then borrow The reciprocal of the reciprocal combined capacitance value is used to generate a combined capacitance value. As another illustration, the inductances of multiple inductors connected in series are summed to produce a combined inductance, and the multiple inductors connected in series The resistance of the resistor is combined to produce a combined resistance. All the fixed capacitances of all the fixed capacitors of the branch circuit of the impedance matching network 106 are combined into a combined fixed capacitance of more than one fixed capacitance element of the matching network model. Other examples of matching network models are provided in US Patent Application No. 14/245,803. In addition, the method of generating the matching network model from the impedance matching network is described in US Patent Application No. 14/245,803.

In various embodiments, each matching network model (for example, each for an x MHz RF generator, a y MHz RF generator, and a z MHz RF generator) is generated to operate at a narrow frequency Operate in-band. As an example, a 60 MHz RF generator operates in a narrow band (for example, between 57 and 63 MHz, etc.). In some embodiments, many circuit elements are used to accurately model the branch circuit of the impedance matching network 106 operating in a predetermined range (for example, from direct current (DC) power to 200 MHz). In some embodiments, A simplified version that models the operation of branch circuits in a narrow range (for example, within a predetermined percentage range from the frequency centered at 60 MHz, etc.) is used. An example of the predetermined percentage range is +/- 5% from 60 MHz. Another example of this predetermined percentage range is +/- 4% from 60 MHz. Compared with the number of circuit elements of the impedance matching network, this simplified version has a smaller number of circuit elements.

In some embodiments, the matching network model is based on an impedance matching network with three branches (each for x MHz, y MHz, and z MHz RF generators, which are further described below) A schematic diagram of 106 is generated. The three branches are connected to each other at the output 140 of the impedance matching network 106. The schematic diagram initially contains several inductors and capacitors in various combinations. For one of the three branches considered independently, the matching network model represents one of the three branches. The circuit elements are added to the matching network model by the input device, examples of which are provided below. Examples of added circuit components include resistors that were not included in the schematic diagram before, to explain in the branch of the impedance matching network 106 Inductors not included in the schematic diagram to represent the inductance of various connected RF bands; and capacitors not included in the schematic diagram to represent parasitic capacitance. In addition, some circuit elements are further added to the schematic diagram by the input device to show the nature of the transmission line of the branch of the impedance matching network 106 due to the physical size of the impedance matching network 106. For example, compared with the wavelength of the RF signal transmitted through more than one inductor, the unwound length of the more than one inductor in the branch of the impedance matching network 106 is not negligible. To explain this result, an inductor in the schematic diagram is divided into more than two inductors. Afterwards, some circuit components are removed from the schematic diagram by the input device to generate a matching network model.

In various embodiments, the matching network model and the branch circuit of the impedance matching network 106 have the same topology, such as the connections between circuit elements, the number of circuit elements, and so on. For example, if the branch circuit of the impedance matching network 106 includes a capacitor coupled in series with an inductor, the matching network model includes a capacitor coupled in series with an inductor. In this example, the inductor of the branch circuit of the impedance matching network 106 has the same value as the inductor of the matching network model, and the capacitor of the branch circuit of the impedance matching network 106 has the same value as the capacitor of the matching network model. value. As another example, if the branch circuit of the impedance matching network 106 includes a capacitor coupled in parallel with an inductor, the matching network model includes a capacitor coupled in parallel with an inductor. In this example, the inductor of the branch circuit of the impedance matching network 106 and the inductor of the matching network model have the same value, and the capacitor of the branch circuit of the impedance matching network 106 has the same value as the capacitor of the model system 102 . As another example, the matching network model has the same number and the same type of circuit elements as the circuit elements of the impedance matching network 106, and the matching network model is the connection between the circuit elements of the impedance matching network 106 Compare with connections of the same type. Examples of the types of circuit elements include resistors, inductors, and capacitors. Examples of the type of connection include series, parallel, etc.

In various embodiments, the model system 102 includes a combination of a matching network model and an RF transmission model. The input of the matching network model is input 142. The RF transmission model is connected in series to the output of the matching network model and has an output 144. The RF transmission model is derived from the RF transmission line 132 in a manner similar to the matching network model derived from the impedance matching network 106. For example, the RF transmission model has inductance, capacitance, and/or resistance derived from the inductance, capacitance, and/or resistance of the RF transmission line 132. As another example, the capacitance of the RF transmission model matches the capacitance of the RF transmission line 132, the inductance of the RF transmission model matches the inductance of the RF transmission line 132, and the resistance of the RF transmission model matches the resistance of the RF transmission line 132.

In some embodiments, the model system 102 includes a combination of an RF cable model, a matching network model, and an RF transmission model. The input of the RF cable model is input 142. The output of the RF cable model is connected to the input of the matching network model, and the output of the matching network model is connected to the input of the RF transmission model. The RF transmission model has an output of 144. The RF cable model is derived from the RF cable 130 in a manner similar to the matching network model derived from the impedance matching network 106. For example, the RF cable model has inductance, capacitance, and/or resistance derived from the inductance, capacitance, and/or resistance of the RF cable 130. As another example, the capacitance of the RF cable model matches the capacitance of the RF cable 130, the inductance of the RF cable model matches the inductance of the RF cable 130, and the resistance of the RF cable model matches the resistance of the RF cable 130.

In addition, the RF generator 104 includes an RF power supply 122 for generating RF signals. The RF generator 104 includes a sensor 124 connected to the output 126 of the RF generator 104, such as a complex impedance sensor, a complex current and voltage sensor, and a complex reflection coefficient ( complex reflection coefficient) sensor, complex voltage sensor, complex current sensor, etc. The output 126 is connected to the input 128 of the branch circuit of the impedance matching network 106 via the RF cable 130. The impedance matching network 106 is connected to the plasma chamber 108 via an RF transmission line 132. The RF transmission line 132 includes an RF rod and an RF outer conductor surrounding the RF rod.

The driving component 112 includes a driver (for example, more than one transistor, etc.) and a motor, and the motor is connected to a variable capacitor of the impedance matching network 106 via the connecting mechanism 114. Examples of the connecting mechanism 114 include more than one rod, or a plurality of rods connected to each other by gears, and the like. The connecting mechanism 114 is connected to a variable capacitor of the impedance matching network 106. For example, the connecting mechanism 114 is connected to a variable capacitor of a part of the branch circuit, and the branch circuit is connected to the RF generator 104 via the input 128.

It should be noted that in the case where the impedance matching network 106 includes more than one variable capacitor in the branch circuit connected to the RF generator 104, the driving component 112 includes an independent motor for controlling the more than one variable capacitor, and Each motor is connected to a corresponding variable capacitor via a corresponding connecting mechanism. In this example, the multiple connecting mechanisms are referred to as connecting mechanisms 114.

The RF generator 104 is an x megahertz (MHz) RF generator or a y MHz RF generator or a z MHz RF generator. In some embodiments, an example of an x MHz RF generator includes a 2 MHz RF generator, an example of a y MHz RF generator includes a 27 MHz RF generator, and an example of a z MHz RF generator includes 60 MHz The RF generator. In various embodiments, an example of an x MHz RF generator includes a 400 kHz RF generator, an example of a y MHz RF generator includes a 27 MHz RF generator, and an example of a z MHz RF generator includes 60 MHz The RF generator.

It should be noted that when two RF generators (such as x and y MHz RF generators, etc.) are used in the plasma system 100, one of the two RF generators is connected to the input 128 and the The other one of the other RF generators is connected to the other input of the impedance matching network 106. Similarly, in the case where three RF generators (such as x, y, and z MHz RF generators, etc.) are used in the plasma system 100, the first of these RF generators is connected to the input 128 The second one of the RF generators is connected to the second input of the impedance matching network 106, and the third one of the RF generators is connected to the third input of the impedance matching network 106. The output 140 is connected to the input via the branch circuit of the impedance matching network 106 128. In the embodiment where multiple RF generators are used, the output 140 is connected to the second input via the second branch circuit of the impedance matching network 106, and the output 140 is connected to the second input via the third branch of the impedance matching network 106 The circuit is connected to the third input.

The host computer system 110 includes a processor 134 and a memory device 137. The memory device 137 stores the model system 102. The model system 102 is accessed from the memory device 137 to be executed by the processor 134. Examples of the host computer system 110 include a laptop computer, or a desktop computer, or a tablet, or a smart phone. As used herein, central processing unit (CPU), controller, application-specific integrated circuit (ASIC), or programmable logic device (PLD) is used in place of processor, and these terms are used interchangeably herein use. Examples of memory devices include read-only memory (ROM), random access memory (RAM), hard disks, volatile memory, non-volatile memory, redundant array of storage disks, flash memory, etc. . The sensor 124 is connected to the host computer system 110 via a network cable 136. The example of the network cable used in this article is a cable used to transmit data in a serial manner, or in a parallel manner, or using the Universal Serial Bus (USB) protocol.

During the state S1, the RF generator 104 operates at the radio frequency RF1 (S1). For example, the processor 134 provides a recipe including the radio frequency level RF1 (S1) and the power level for the state S1 to the RF generator 104. The RF generator 104 operates between two states S1 and S2. During the state S1, the power level of the RF signal (such as more than one power amount, the root mean square power amount of the more than one power amount, the power level of the envelope of the RF signal, etc.) is greater than that during the state S2 The power level of the RF signal. Similarly, during the state S1, the frequency level of the RF signal (for example, more than one frequency, the root mean square frequency of the more than one frequency, the frequency level of the envelope of the RF signal, etc.) is greater than The frequency level of the RF signal during the state S2. The state S1 is called the high state here, and the state S2 is called the low state here.

In some embodiments, during the state S2, the power level of the RF signal is greater than the power level of the RF signal during the state S1. Similarly, in these embodiments, during the state S2, the frequency level of the RF signal (for example, more than one frequency, the root mean square frequency of the more than one frequency, etc.) is greater or less than that during the state S1 The frequency level of the RF signal. In these embodiments, the state S1 is referred to herein as the low state, and the state S2 is referred to herein as the high state.

In various embodiments, during the state S2, the power level of the RF signal is equal to the power level of the RF signal during the state S1.

In some embodiments where multiple RF generators are used, the state S1 of the RF signal generated by the first of the RF generators has a power level greater than the RF generated by the first RF generator The power level of the state S2 of the signal. In addition, the power level of the state S2 of the RF signal generated by the second of the RF generators is greater than the power level of the state S1 of the RF signal generated by the second RF generator. In addition, similarly, in these embodiments, the state S1 of the RF signal generated by the first RF generator has a frequency level greater than or less than that of the state S2 of the RF signal generated by the first RF generator. Have the frequency level. In addition, the frequency level of the state S2 of the RF signal generated by the second RF generator is greater than or less than the frequency level of the state S1 of the RF signal generated by the second RF generator.

In various embodiments, regardless of whether the power level of the RF signal during the state S2 is greater than or less than the power level of the RF signal during the state S1, the frequency level of the RF signal during the state S2 is greater or less than the power level of the RF signal during the state S2. The frequency level of the RF signal during S1.

In some embodiments, the level (such as frequency level, power level, etc.) used herein includes one or more values, and the level of the first state (such as state S1, state S2, etc.) excludes the second state (For example, state S1, state S2, etc.) the value of the level value, the second state is different from the first state. Lift For example, the power value of the RF signal during the state S1 is different from the power value of the RF signal during the state S2. As another example, the frequency value of the RF signal during the state S1 is different from the frequency value of the RF signal during the state S2.

In some embodiments, the state transition refers to the transition between two frequency levels of the RF signal. For example, the state transition ST1 is a transition from one frequency level of the state S1 of the RF signal to another frequency level of the state S2 of the RF signal. As another example, the state transition ST2 is the transition from the other frequency level of the state S2 of the RF signal to the frequency level of the state S1 of the RF signal.

In various embodiments, the RF generator 104 receives a clock signal from the processor 134 or from a clock source (such as an oscillator, etc.) in the host computer system 110, and synchronizes with the clock signal in the state S1 and Alternate between S2. To illustrate, when the pulse of the clock signal is high, the RF generator 104 generates the RF signal with the state S1, and when the clock signal is low, the RF generator 104 generates the RF signal with the state S2. The RF generator 104 receives the formula via the network cable 138 connected to the RF generator 104 and the host computer system 110, and the digital signal processor (DSP) of the RF generator 104 provides the formula to the RF power supply 122. The RF power supply 122 generates an RF signal with the radio frequency RF1 (S1) and power level specified in the recipe.

The impedance matching network 106 is initialized to have a combined variable capacitor C1. For example, the processor 134 sends a signal to the driver of the driving component 112 to generate more than one current signal. The one or more current signals are generated by the driver and sent to the corresponding one or more stators of the corresponding one or more motors of the driving assembly 112. The one or more rotors of the driving assembly 112 that are in electric field contact with the corresponding one or more stators rotate to move the connecting mechanism 114 to change the combined variable capacitance of the branch circuit of the impedance matching network 106 to C1. The branch circuit of the impedance matching network 106 with the combined variable capacitor C1 receives the RF signal with the radio frequency RF1 (S1) from the output 126 via the input 128 and the RF cable 130, and connects to the impedance of the load of the impedance matching network 106 And the source connected to the impedance matching network 106 The impedance is matched to produce a modified signal, which is an RF signal. Examples of loads include the plasma chamber 108 and the RF transmission line 132. Examples of sources include RF cable 130 and RF generator 104. The modified signal is provided to the chuck 118 from the output 140 of the branch circuit of the impedance matching network 106 via the RF transmission line 132. When the modified signal is provided to the chuck 118 in combination with more than one processing gas (such as oxygen-containing gas, fluorine-containing gas, etc.), plasma is generated or maintained in the gap between the chuck 118 and the upper electrode 116 .

When an RF signal with radio frequency RF1 (S1) is generated and the impedance matching network 106 has a combined variable capacitor C1, the sensor 124 senses the voltage reflection coefficient Γmi1 (S1) at the output 126 and passes the network cable 136 provides the voltage reflection coefficient to the processor 134. An example of the voltage reflection coefficient includes a ratio of the voltage reflected from the plasma chamber 108 toward the RF generator 104 to the voltage generated by the RF generator 104 and supplied within the RF signal. The processor 134 calculates the impedance Zmi1 (S1) from the voltage reflection coefficient Γmi1 (S1). For example, the processor 134 calculates the impedance Zmi1 by applying the equation (1)Γmi1(S1)=(Zmi1(S1)-Zo)/(Zmi1(S1)+Zo) and solving it to obtain Zmi1(S1) (S1), where Zo is the characteristic impedance of the RF transmission line 132. The impedance Zo is provided to the processor 134 by an input device (such as a mouse, keyboard, stylus, keypad, buttons, touch screen, etc.), which is provided by an input/output interface (such as a serial interface, Parallel interface, USB interface, etc.) are connected to the processor 134. In some embodiments, the sensor 124 measures the impedance Zmi1 (S1) and provides the impedance Zmi1 (S1) to the processor 134 via the network cable 136.

The impedance Zmi1 (S1) is applied to the input 142 of the model system 102 by the processor 134, and is propagated forward by the model system 102 to calculate the load impedance ZL1 (S1) at the output 144 of the model system 102. The model system 102 is initialized to have a combined variable capacitance C1 and a radio frequency value RF1 (S1). For example, the impedance Zmi1 (S1) is propagated forward by the processor 134 through more than one circuit element of the model system 102 to generate the load impedance ZL1 (S1). For illustration, the model system 102 is initialized to have Radio frequency RF1 (S1) and combined variable capacitor C1. When the model system 102 includes a series combination of a resistance element, an inductance element, a fixed capacitance element, and a variable capacitance element, the processor 134 calculates the impedance Zmi1 (S1) and the horizontal line received at the input 142 of the model system 102 The directional sum of the complex impedance across the resistive element, the complex impedance across the inductive element, the complex impedance across the variable capacitance element with variable capacitance C1, and the directional sum of the complex impedance across the fixed capacitance element ) To generate load impedance ZL1(S1).

In various embodiments, instead of measuring the voltage reflection coefficient at the output 126, the voltage reflection coefficient is measured at any point on the RF cable 130 from the output 126 (including the output 126) to the input 128. For example, the sensor 124 is connected to a point between the RF power source 122 and the impedance matching network 106 to measure the voltage reflection coefficient.

FIG. 2 is a diagram of an embodiment of the model system 102. The model system 102 is initialized to have a radio frequency RF1 (S1) and a variable capacitance C1 to determine the variable capacitance and/or radio frequency. For the variable capacitance and/ Or radio frequency, the combination of the voltage reflection coefficient Γ(S1) for the state S1 and the voltage reflection coefficient Γ(S2) for the state S2 at the input 142 is the minimum. Examples of combinations of voltage reflection coefficients Γ(S1) and Γ(S2) include AΓ(S1)+BΓ(S2), where A and B are predetermined coefficients received by the processor 134 via the input device. In some embodiments, the value of B is (1-A). Another example of the combination of the voltage reflection coefficient Γ(S1) and Γ(S2) includes: the voltage reflection coefficient Γ(S1), which is less than the predetermined value received by the processor 134 via the input device; and the voltage reflection coefficient Γ(S2 ), which is the smallest value among multiple values of the voltage reflection coefficient Γ(S2).

_{The processor 134 calculates the radio frequency value RF optimum} 1 (S1) and the combined variable capacitance value C _optimum 1 from the load impedance ZL1 (S1) and the model system 102, for the radio frequency value RF _optimum 1 (S1) and the combined variable capacitance value C _Optimum 1. The combination of the voltage reflection coefficients Γ(S1) and Γ(S2) is the minimum value among the multiple values of the combination of the voltage reflection coefficients Γ(S1) and Γ(S2) at the input 142. For example, the processor 134 propagates the load impedance ZL1 (S1) backwards through the model system 102. The model system 102 is initialized to have a radio frequency RF1 (S1) and a variable capacitor C1 to determine the radio frequency value RF _optimum 1 (S1) And the combined variable capacitance value C _optimum 1, which produces a combination of the input impedance Z(S1) for the state S1 and the input impedance Z(S2) for the state S2. For the combination of input impedances Z(S1) and Z(S2), the combination of voltage reflection coefficients Γ(S1) and Γ(S2) is the minimum. The voltage reflection coefficient Γ(S1) is derived from the input impedance Z(S1) by the processor 134 by applying equation (2) Γ(S1)=(Z(S1)-Zo)/(Z(S1)+Zo) Is generated, and the voltage reflection coefficient Γ(S2) is obtained by applying the equation (3)Γ(S2)=(Z(S2)-Zo)/(Z(S2)+Zo) from the input impedance of the processor 134 Z(S2) is generated. Backward propagation is the same as forward propagation, except that the direction of backward propagation is opposite to the direction of forward propagation.

As another example, the processor 134 changes the radio frequency value applied to the model system 102 from RF _optimum 1 (S1) to RF _optimum M (S1) and changes the capacitance value of the model system 102, and propagates the load impedance ZL1 (S1) backward. , To solve and determine the radio frequency RF _optimum 1 (S1) and the variable capacitance value C _optimum 1, which makes the combination of the voltage reflection coefficients Γ(S1) and Γ(S2) at the input 142 the minimum, where M is An integer greater than 1. For example, when the model system 102 has the radio frequency value RF _optimum 1 (S1) and the variable capacitance C _optimum 1, the processor 134 propagates the impedance ZL1 (S1) backward through the model system 102 to determine the voltage reflection at the input 142 The combination of the coefficients Γ(S1) and Γ(S2) has a first value. In addition, in this example, when the model system 102 has the radio frequency RF _optimum 2 (S1) and the variable capacitor C1, the processor 134 propagates the load impedance ZL1 (S1) backwards through the model system 102 to determine the voltage at the input 142 The combination of reflection coefficients Γ(S1) and Γ(S2) has a second value. The processor 134 determines that the first value is the minimum of the first and second values to further determine that RF _optimum 1 (S1) is the radio frequency value and C _optimum 1 is the variable combined capacitance value, so that the voltage reflection coefficient Γ( The combination of S1) and Γ(S2) is the minimum.

In some embodiments, the nonlinear least-squares optimization procedure is executed by the processor 134 to obtain and calculate the radio frequency value RF _optimum 1 (S1) from the load impedance ZL1 (S1) and the model system 102 and the combination can be The variable capacitance value C _optimum 1, which makes the combination of the voltage reflection coefficients Γ(S1) and Γ(S2) the minimum. In various embodiments, the predetermined equation is applied by the processor 134 to solve from the load impedance ZL1 (S1) and the model system 102 and calculate the radio frequency value RF _optimum 1 (S1) and the combined variable capacitance value C _optimum 1, This minimizes the combination of voltage reflection coefficients Γ(S1) and Γ(S2).

In addition, the processor 134 changes the radio frequency value applied to the model system 102 from RF _optimum 1(S1)@C1 to RF _optimum N(S1)@C1 and propagates the load impedance ZL1(S1) backward to obtain the solution and determine the input The voltage reflection coefficient Γ(S1) at 142 is the minimum RF RF _optimum 1(S1)@C1, where N is an integer greater than 1. For example, when the model system 102 has the radio frequency RF _optimum 1(S1)@C1, the processor 134 propagates the impedance ZL1(S1) backward through the model system 102 (initialized to have a variable capacitance C1) to determine the voltage reflection coefficient Γ(S1) has the first value. In addition, in this example, when the model system 102 has the radio frequency RF _optimum 2(S1)@C1, the processor 134 propagates the load impedance ZL1(S1) backward through the model system 102 (initialized to have a variable capacitance C1) to It is determined that the voltage reflection coefficient Γ(S1) has a second value. The processor 134 determines that the first value is the minimum value of the first and second values to further determine the RF _optimum 1(S1)@C1 which is the RF value at which the voltage reflection coefficient Γ(S1) is the minimum value. In some embodiments, the nonlinear square optimization procedure is used to find the RF _optimum 1(S1)@C1 with the minimum voltage reflection coefficient Γ(S1).

In various embodiments, the combination of the voltage reflection coefficients Γ(S1) and Γ(S2) is the minimum value of the radio frequency, which is referred to herein as a favorable RF value.

In some embodiments, the radio frequency value RF _optimum 1 (S1) is not calculated using the method described in FIG. 2.

In some embodiments, the RF value is sometimes referred to herein as the "parameter value". In addition, capacitance is sometimes referred to herein as "measurable factor". In addition, the value of reflection coefficient (for example, voltage reflection coefficient, etc.) and the value of impedance are examples of parameter values.

FIG. 3 is a diagram of an embodiment of the plasma system 100 to illustrate the use of the model system 102 to generate the load impedance ZL1 (S2) for the state S2. During the state S2, the RF generator 104 is operated at the radio frequency RF1 (S2), and the wafer W is placed on the top surface 120 for processing. For example, the processor 134 provides a recipe including the radio frequency level RF1 (S2) and the power level for the state S2 to the RF generator 104. The RF generator 104 receives the formula via the network cable 138 connected to the RF generator 104 and the host computer system 110, and the DSP of the RF generator 104 provides the formula to the RF power supply 122. The RF power supply 122 generates an RF signal with the radio frequency RF1 (S2) and power level specified in the recipe.

The impedance matching network 106 is initialized to have a combined variable capacitor C1. The branch circuit of the impedance matching network 106 with the combined variable capacitor C1 receives the RF signal with the radio frequency RF1 (S2) from the output 126 via the input 128 and the RF cable 130, and connects to the impedance of the load of the impedance matching network 106 It is matched with the impedance of the source connected to the impedance matching network 106 to generate a modified RF signal. During the state S2, the modified signal is provided to the chuck 118 from the output 140 of the branch circuit of the impedance matching network 106 via the RF transmission line 132. When the modified signal is provided to the chuck 118 in combination with more than one processing gas, plasma is generated or maintained in the gap between the chuck 118 and the upper electrode 116.

During the state S2, when an RF signal with radio frequency RF1 (S2) is generated and the impedance matching network 106 has a combined variable capacitance C1, the sensor 124 senses the voltage reflection coefficient Γmi1 at the output 126 (S2) , And provide the voltage reflection coefficient to the processor 134 via the network cable 136. The processor 134 calculates the impedance Zmi1 (S2) from the voltage reflection coefficient Γmi1 (S2). For example, the processor 134 calculates the impedance Zmi1(S2) by applying equation (4)Γmi1(S2)=(Zmi1(S2)-Zo)/(Zmi1(S2)+Zo) and solving for Zmi1(S2) ). In some embodiments, the sensor 124 measures the impedance Zmi1 (S2), and provides the impedance Zmi1 (S2) to the processor 134 via the network cable 136.

The impedance Zmi1 (S2) is applied to the input 142 of the model system 102 by the processor 134, and is propagated forward by the model system 102 to calculate the load impedance ZL1 at the output 144 of the model system 102 (S2). For example, the impedance Zmi1 (S2) is propagated forward by the processor 134 through more than one circuit element of the model system 102 to generate the load impedance ZL1 (S2). For illustration, the model system 102 is initialized to have a radio frequency RF1 (S2) and a variable capacitor C1. When the model system 102 includes a series combination of a resistance element, an inductance element, a fixed capacitance element, and a variable capacitance element, the processor 134 calculates the impedance Zmi1 (S2) and the horizontal line received at the input 142 of the model system 102 The directional sum of the complex impedance across the resistive element, the complex impedance across the inductive element, the complex impedance across the variable capacitance element with variable capacitance C1, and the complex impedance across the fixed capacitance element, in order to The load impedance ZL1 (S2) is generated at the output 144.

Figure 4 is a diagram of an embodiment of the model system 102. The model system 102 is initialized to have a radio frequency RF1 (S2) and a variable capacitance C1 to generate a variable capacitance and/or radio frequency value so that the input 142 is The combination of the voltage reflection coefficient Γ(S1) for the state S1 and the voltage reflection coefficient Γ(S2) for the state S2 is the minimum value. _{The processor 134 calculates the radio frequency value RF optimum} 1 (S2) from the load impedance ZL1 (S2) and the model system 102, for the radio frequency value RF _optimum 1 (S2), the voltage reflection coefficient Γ(S1) and Γ(S2) combination system The minimum value among multiple values of the combination of the voltage reflection coefficient Γ(S1) and Γ(S2). For example, the processor 134 propagates the load impedance ZL1 (S2) backward through the model system 102 to determine the radio frequency value RF _optimum 1 (S2), which generates a combination of input impedances Z(S1) and Z(S2). For this combination of input impedances Z(S1) and Z(S2), the combination of voltage reflection coefficients Γ(S1) and Γ(S2) is the minimum. As another example, the processor 134 changes the RF value applied to the model system 102 from RF _optimum 1 (S2) to RF _optimum O (S2) and propagates the load impedance ZL1 (S2) backward to determine the voltage reflection coefficient Γ(S1 The combination of) and Γ(S2) is the minimum RF _optimum 1(S2), where O is an integer greater than 1. For example, when the model system 102 has the radio frequency RF _optimum 1 (S2), the processor 134 propagates the load impedance ZL1 (S2) backward through the model system 102 with the variable capacitor C1 to determine the voltage reflection coefficient Γ(S1) and The combination of Γ(S2) has the first value. In addition, in this example, when the model system 102 has the radio frequency RF _optimum 2 (S2), the processor 134 propagates the load impedance ZL1 (S2) backward through the model system 102 with the variable capacitor C1 to determine the voltage reflection coefficient Γ( The combination of S1) and Γ(S2) has a second value. The processor 134 determines that the first value is the minimum of the first and second values to further determine that the combination of RF _optimum 1 (S2) is the voltage reflection coefficient Γ(S1) and Γ(S2) at the input 142 is the smallest The radio frequency value of the value.

In some embodiments, the radio frequency value RF _optimum 1 (S2) is not calculated using the method described in FIG. 4.

In various embodiments, the nonlinear least squares optimization procedure is executed by the processor 134 to calculate the combination of the voltage reflection coefficients Γ(S1) and Γ(S2) from the load impedance ZL1(S2) and the model system 102 _{The RF optimum} 1 (S2) is the minimum RF value at input 142. In various embodiments, the predetermined equation is applied by the processor 134 to calculate the combination of the voltage reflection coefficients Γ(S1) and Γ(S2) from the load impedance ZL1(S2) and the model system 102 to be the minimum value at the input 142 The radio frequency value RF _optimum 1(S2).

In addition, the processor 134 changes the RF value applied to the model system 102 from RF _optimum 1(S2)@C1 to RF _optimum P(S2)@C1 and propagates the load impedance ZL1(S2) backward to determine the value at the input 142 The voltage reflection coefficient Γ(S2) is the minimum RF RF _optimum 1(S2)@C1, where P is an integer greater than 1. For example, when the model system 102 has the radio frequency RF _optimum 1(S2)@C1, the processor 134 propagates the impedance ZL1(S2) backward through the model system 102 with the variable capacitor C1 to determine the voltage reflection coefficient Γ(S2) Has the first value. In addition, in this example, when the model system 102 has the radio frequency RF _optimum 2(S2)@C1, the processor 134 propagates the load impedance ZL1(S2) backward through the model system 102 with the variable capacitor C1 to determine the voltage reflection coefficient Γ(S2) has a second value. The processor 134 determines that the first value is the minimum value of the first and second values to further determine the RF _optimum 1(S2)@C1 which is the RF value at which the voltage reflection coefficient Γ(S2) is the minimum value. _{In some embodiments, the nonlinear square optimization procedure is used to find the RF optimum} 1(S2)@C1 at which the voltage reflection coefficient Γ(S2) has the smallest value at the input 142.

In some embodiments, the state S2 described with reference to FIGS. 3 and 4 follows the state S1 described with reference to FIGS. 1 and 2. For example, there is no other state between the state S1 described by FIGS. 1 and 2 and the state S2 described by FIGS. 3 and 4.

FIG. 5 is a diagram of an embodiment of the plasma system 100 to illustrate the use of the capacitance value C _optimum 1 to generate the step combination variable capacitance value C _step 1 for the state S1, and the use value RF _optimum 1(S1)@ C1 generates a load impedance ZL2 (S1) at the output 144 of the model system 102 for this state S1. The processor 134 modifies the formula for the state S1 to include the radio frequency value RF _optimum 1(S1)@C1, and provides the radio frequency value RF _optimum 1(S1)@C1 to the RF generator 104. In addition, the processor 134 determines the step variable capacitance value C _step 1 for the state S1. The step variable capacitance value C _step 1 is a step from the value C1 to the value C _optimum 1. It should be noted that when one or more capacitances of the corresponding one or more variable capacitors of the impedance matching network 106 are modified to change from C1 to C _optimum 1, the one or more variable capacitors are relative to the RF generated by the RF generator 104 The change in the RF frequency of the signal moves slowly enough.

Instead of setting the combined variable capacitance of the impedance matching network 106 to the value C _optimum 1, and instead of setting the RF generator 104 to generate an _{RF signal with radio frequency RF optimum} 1 (S1), the processor 134 controls the driving component 112 to make the impedance matching network The combined variable capacitance of the circuit 106 is set at the value C _step 1, and the RF generator 104 is controlled to operate under the radio frequency RF _optimum 1(S1)@C1. The time required for the impedance matching network 106 to reach the variable capacitance C _optimum 1 (for example, on the order of seconds) is longer than the time required for the RF generator 104 to generate an _{RF signal with the radio frequency RF optimum} 1 (S1). _{For example, the RF generator 104 reaches the RF optimum} 1 (S1) from the radio frequency RF1 (S1) in a microsecond level. Therefore, it is difficult for the self-value C1 to directly reach the value C _optimum 1 and at the same time the self-value RF1 (S1) to reach the value RF _optimum 1 (S1), so that the voltage reflection coefficients Γ(S1) and Γ( The combination of S2) is the minimum. Therefore, the variable capacitor of the impedance matching network 106 is adjusted in the direction of the conventional variable capacitor C _{optimum 1 in a stepwise manner (for example, C step 1, etc.) during the state S1.}

For radio frequency RF _optimum 1(S1)@C1 and variable capacitor C _step 1, RF generator 104 generates an _{RF signal with radio frequency RF optimum} 1(S1)@C1, which is transmitted through impedance matching network 106 to generate and provide Modified signal to the electrode under the chuck 118. When the RF generator 104 generates an _{RF signal with radio frequency RF optimum} 1(S1)@C1 and the combined variable capacitance is C _step 1, the sensor 124 measures the voltage reflection coefficient Γmi2(S1) at the output 126 and processes The device 134 generates the impedance Zmi2 (S1) from the voltage reflection coefficient Γmi1 (S1) in the same way that the impedance Zmi1 (S1) is generated from the voltage reflection coefficient Γmi1 (S1) as described above. In addition, when the model system 102 is set to have the radio frequency RF _optimum 1(S1)@C1 for the state S1 and the combined variable capacitance C _step 1 for the state S1, the impedance Zmi2(S1) passes through the model system 102 The load impedance ZL1 (S1) is generated at the output 144 in the same way that the load impedance ZL1 (S1) is derived from the impedance Zmi1 (S1) at the input 142 of the model system 102, and the load impedance ZL2 is generated at the output 144 of the model system 102 (S1).

In various embodiments, the combined variable capacitor C _step 1 is closer to the combined variable capacitor C _optimum 1 than the combined variable capacitor C1. For example, the combined variable capacitor C _step 1 is larger than the combined variable capacitor C1, and the combined variable capacitor C _optimum 1 is larger than the combined variable capacitor C _step 1. As another example, the combined variable capacitor C _step 1 is smaller than the combined variable capacitor C 1, and the combined variable capacitor C _optimum 1 is smaller than the combined variable capacitor C _step 1.

Fig. 6 is a diagram of an embodiment of the model system 102. The model system 102 is set to the radio frequency RF _optimum 1(S1)@C1 for the state S1 and the combined variable capacitor C _step 1 for the state S1 to determine The combination of the voltage reflection coefficients Γ(S1) and Γ(S2) at the input 142 is the minimum radio frequency value and/or capacitance value. For example, the processor 134 applies the radio frequency RF _optimum 1 (S1)@C1 and the combined variable capacitor C _step 1 to the model system 102. As another example, the processor 134 sets the parameter values of the model system 102 to have the radio frequency value RF _optimum 1(S1)@C1 and the combined variable capacitance value C _step 1. In the same manner as described above for calculating the combined variable capacitance C _optimum 1, the processor 134 calculates the voltage reflection coefficients Γ(S1) and Γ(S2) at the input 142 from the load impedance ZL2 (S1) and the model system 102 The minimum combined variable capacitance value C _optimum 2 of the combination system.

In addition, the processor 134 changes the radio frequency value applied to the model system 102 from RF _optimum 1(S1)@C _step 1 to RF _optimum Q(S1)@C _step 1 and propagates the load impedance ZL2(S1) backwards through the model system 102 _{, To determine the RF optimum} 1(S1)@C _step 1 where the voltage reflection coefficient Γ(S1) is the minimum value, where Q is an integer greater than 1. For example, the processor 134 propagates the impedance ZL2(S1) backward through the model system 102 configured _{as a variable capacitor C step} 1 and a radio frequency RF _optimum 1(S1)@C _{step 1 to determine the voltage reflection coefficient Γ(S1} ) Has the first value. In addition, in this example, the processor 134 propagates the impedance ZL2(S1) backward through the model system 102 _{configured with a variable capacitance C step} 1 and a radio frequency RF _optimum 2(S1)@C _{step 1 to determine the voltage reflection coefficient} Γ(S1) has a second value. The processor 134 determines that the first value is the minimum value of the first and second values to further determine the RF _optimum 1(S1)@C _step 1 which is the RF optimum 1(S1)@C step 1 which is the minimum value of the voltage reflection coefficient Γ(S1) at the input 142 value.

In some embodiments, the state S1 described with reference to FIGS. 5 and 6 follows the state S2 described with reference to FIGS. 3 and 4. For example, there is no other state between the state S2 described by FIGS. 3 and 4 and the state S1 described by FIGS. 5 and 6.

FIG. 7 is a diagram of an embodiment of the plasma system 100 to illustrate the use of the capacitance value C _optimum 1 to generate the step combination variable capacitance value C _step 1 for the state S2, and the use value RF _optimum 1(S2)@ C1 generates a load impedance ZL2 (S2) at the output 144 of the model system 102 for this state S2. The processor 134 modifies the formula for the state S2 to include the radio frequency value RF _optimum 1(S2)@C1, and provides the radio frequency value RF _optimum 1(S2)@C1 to the RF generator 104. In addition, the processor 134 determines that the step variable capacitance value C _step 1 for the state S2 is applied to the impedance matching network 106.

Instead of setting the combined variable capacitance of the impedance matching network 106 to the value C _optimum 1, and instead of setting the RF generator 104 to generate an _{RF signal with radio frequency RF optimum} 1 (S2), the processor 134 controls the driving component 112 to make the impedance matching network The combined variable capacitance of the circuit 106 is set at the value C _step 1, and the RF generator 104 is controlled to operate under the radio frequency RF _optimum 1(S2)@C1. The time required for the impedance matching network 106 to reach the variable capacitor C _optimum 1 (for example, on the order of seconds, etc.) is longer than the time required for the RF generator 104 to generate _{the RF signal with the radio frequency RF optimum} 1 (S2). For example, the RF generator 104 reaches the radio frequency RF _optimum 1 (S2) from the radio frequency RF1 (S2) in a microsecond level. Therefore, it is difficult for the self-value C1 to directly reach the value C _optimum 1 and at the same time the self-value RF1(S2) to reach the value RF _optimum 1(S2), so that the voltage reflection coefficients Γ(S1) and Γ( The combination of S2) is the minimum. Therefore, the variable capacitor of the impedance matching network 106 is adjusted in the direction of the conventional variable capacitor C _{optimum 1 in a stepwise manner (for example, C step 1, etc.) during the state S2.}

For radio frequency RF _optimum 1(S2)@C1 and variable capacitor C _step 1, RF generator 104 generates an _{RF signal with radio frequency RF optimum} 1(S2)@C1, and the RF signal is transmitted through impedance matching network 106 to generate Provides a modified signal to the electrode under the chuck 118. When the RF generator 104 generates an _{RF signal with radio frequency RF optimum} 1(S2)@C1 and the combined variable capacitance is C _step 1, the sensor 124 measures the voltage reflection coefficient Γmi2(S2) at the output 126 and processes The device 134 generates the impedance Zmi2 (S2) from the voltage reflection coefficient Γmi2 (S2) in the same way that the impedance Zmi1 (S1) is generated from the voltage reflection coefficient Γmi1 (S1) as described above. In addition, when the model system 102 is set to have the radio frequency RF _optimum 1(S2)@C1 and the variable capacitance C _step 1, the impedance Zmi2(S2) propagates forward through the model system 102, and the load impedance ZL1(S2 ) Is the same way that the impedance Zmi1 (S2) at the input 142 of the model system 102 is generated at the output 144, and the load impedance ZL2 (S2) is generated at the output 144 of the model system 102.

FIG. 8 is a diagram of an embodiment of the model system 102. The model system 102 is set to the radio frequency RF _optimum 1(S2)@C1 for the state S2 and the combined variable capacitor C _step 1 for the state S2, so as to The input 142 produces the minimum value of the combination of the voltage reflection coefficients Γ(S1) and Γ(S2). For example, the processor 134 applies the radio frequency RF _optimum 1 (S2)@C1 and the combined variable capacitor C _step 1 to the model system 102. As another example, the processor 134 sets the parameter values of the model system 102 to have the radio frequency value RF _optimum 1(S2)@C1 and the combined variable capacitance value C _step 1. The processor 134 changes the RF value applied to the model system 102 from RF _optimum 1(S2)@C _step 1 to RF _optimum R(S2)@C _step 1 and propagates the load impedance ZL2(S2) backward to determine the input 142 The voltage reflection coefficient at Γ(S2) is the minimum RF RF _optimum 1(S2)@C _step 1, where R is an integer greater than 1. For example, the processor 134 propagates the impedance ZL2(S2) backward through the model system 102 _{with the variable capacitor C step} 1 and the radio frequency RF _optimum 1(S2)@C _{step 1 to determine the voltage reflection coefficient Γ(S2)} Has the first value. In addition, in this example, the processor 134 propagates the impedance ZL2(S2) backward through _{the model system 102 with the variable capacitor C step} 1 and the radio frequency RF _optimum 2(S2)@C _{step 1 to determine the voltage reflection coefficient Γ} (S2) has a second value. The processor 134 determines that the first value is the minimum value of the first and second values to further determine the RF _optimum 1(S2)@C _step 1 which is the RF optimum 1(S2)@C step 1 which is the minimum value of the voltage reflection coefficient Γ(S2) at the input 142 value.

In some embodiments, the state S2 described with reference to FIGS. 7 and 8 follows the state S1 described with reference to FIGS. 5 and 6. For example, there is no other state between the state S1 described by FIGS. 5 and 6 and the state S2 described by FIGS. 7 and 8.

FIG. 9 is a diagram of an embodiment of the plasma system 100 to illustrate the use of the capacitance value C _optimum 2 and the use value RF _optimum 1(S1)@C _step 1 to process the wafer W during the state S1. The processor 134 modifies the formula for the state S1 to include the radio frequency value RF _optimum 1(S1)@C _step 1, and provides the radio frequency value RF _optimum 1(S1)@C _step 1 to the RF generator 104. In addition, the processor 134 controls the driving component 112 so that the combined variable capacitance of the impedance matching network 106 is _{set at the value C step} 2. It should be noted that in some embodiments, the value RF _optimum 1 (S1)@C _step 1 is the same as the value RF _optimum 1 (S1). In addition, in various embodiments, the combined variable capacitor C _step 2 is the same as the combined variable capacitor C _optimum 2.

During the state S1, when the combined variable capacitor of the impedance matching network 106 is C _step 2, the RF generator 104 generates an RF signal _{with the radio frequency RF optimum} 1(S1)@C _{step 1.} The RF signal with RF _optimum 1(S1)@C _step 1 is transmitted through the impedance matching network 106 to generate a modified signal, and the modified signal is provided to the lower electrode of the chuck 118 for processing during the state S1 Wafer W.

In some embodiments, instead of the voltage reflection coefficients (e.g. Γmi1(S1), Γmi2(S1), etc.) received from the sensor 124 for the state S1, the impedance for the state S1 (e.g. impedance Zmi1(S1), Zmi2 (S1), etc.), the processor 134 receives the voltage reflection coefficient to generate the corresponding load voltage reflection coefficient impedance at the output 144 of the model system 102 (for example, ΓL1(S1), ΓL2(S1), etc.). The corresponding load voltage reflection coefficient is applied to the output 144 of the model system 102 in the same way that the load impedance (such as ZL1(S1), ZL2(S1), etc.) of the state S1 is applied to the output of the model system 102 Place. There is no need to convert the voltage reflection coefficient to impedance, and vice versa.

In various embodiments, the combined variable capacitor C _step 2 is closer to the combined variable capacitor C _optimum 2 than the combined variable capacitor C _{step 1.} For example, the combined variable capacitor C _step 2 is greater than the combined variable capacitor C _step 1, and the combined variable capacitor C _optimum 2 is greater than the combined variable capacitor C _step 2. As another example, the combined variable capacitor C _step 2 is smaller than the combined variable capacitor C _step 1, and the combined variable capacitor C _optimum 2 is smaller than the combined variable capacitor C _step 2.

In some embodiments, the state S1 described with reference to FIG. 9 follows the state S2 described with reference to FIG. 8. For example, there is no other state between the state S2 described by FIG. 8 and the state S1 described by FIG. 9.

FIG. 10 is a diagram of an embodiment of the plasma system 100 to illustrate the use of the capacitance value C _optimum 2 and the use value RF _optimum 1(S2)@C _step 1 to process the wafer W during the state S2. The processor 134 modifies the formula for the state S2 to include the radio frequency value RF _optimum 1(S2)@C _step 1, and provides the radio frequency value RF _optimum 1(S2)@C _step 1 to the RF generator 104. In addition, the processor 134 controls the driving component 112 so that the combined variable capacitance of the impedance matching network 106 is _{set at the value C step} 2. It should be noted that in some embodiments, for the state S2, the value RF _optimum 1(S2)@C _step 1 is the same as the value RF _optimum 1(S2).

During the state S2, when the combined variable capacitor of the impedance matching network 106 is C _step 2, the RF generator 104 generates an RF signal _{with the radio frequency RF optimum} 1(S2)@C _{step 1.} The RF signal with RF _optimum 1(S2)@C _step 1 is transmitted through the impedance matching network 106 to generate a modified signal, and the modified signal is provided to the lower electrode of the chuck 118 during state S2 for processing Wafer W.

In some embodiments, instead of the voltage reflection coefficients (e.g., Γmi1(S2), Γmi2(S2), etc.) received from the sensor 124 for the state S2, the impedance for the state S2 (e.g., impedance Zmi1(S2), Zmi2) is generated. (S2), etc.), the processor 134 receives the voltage reflection coefficient to generate the corresponding load voltage reflection coefficient impedance at the output 144 of the model system 102 (for example, ΓL1 (S2), ΓL2 (S2), etc.). The corresponding load voltage reflection coefficient is applied to the output 144 of the model system 102 in the same way that the load impedance (such as ZL1(S2), ZL2(S2), etc.) of the state S2 is applied to the output of the model system 102 Place. There is no need to convert the voltage reflection coefficient to impedance, and vice versa.

In this way, for states S1 and S2, instead of applying RF _optimum 1 (S1) directly from RF1 (S1), instead of applying RF _{optimum 1 (S2) directly from RF1 (S2), and instead of} applying RF optimum 1 (S2) directly from RF1 (S2), and instead of directly applying RF optimum 1 (S2) from RF 1 (S1), and instead of directly applying RF optimum 1 (S2) from RF RF1 (S2), and instead of applying RF optimum 1 (S2) directly from RF RF1 (S2), for states S1 and S2 The variable capacitance value C1 is applied to the combined variable capacitance value C _optimum 2. The one-step method is as follows: First, for the state S1, the combined variable capacitance value C _step 1 is applied with the radio frequency RF _optimum 1(S1)@C1, and then for the state S2, apply combined variable capacitance value C _step 1 and radio frequency RF _optimum 1(S2)@C1, then for state S1, apply combined variable capacitance value C _step 2 and radio frequency RF _optimum 1(S1)@C _step 1, then For state S2, the combined variable capacitance value C _step 2 and radio frequency RF _optimum 1(S2)@C _step 1 are applied. For example, the combined variable capacitance value C _step 2 and radio frequency RF _optimum 1(S1)@C _step 1 are applied before the combined variable capacitance value C _step 2 and radio frequency RF _optimum 1(S2)@C _step 1 are applied . In addition, the application of the combined variable capacitance value C _step 1 and the radio frequency RF _optimum 1(S2)@C1 precedes the application of the combined variable capacitance value C _step 2 and the radio frequency RF _optimum 1(S1)@C _step 1. The application of the combined variable capacitance value C _step 1 and the radio frequency RF _optimum 1(S1)@C1 precedes the application of the combined variable capacitance value C _step 1 and the radio frequency RF _optimum 1(S2)@C1.

In some embodiments, the state S2 described with reference to FIG. 10 follows the state S1 described with reference to FIG. 9. For example, there is no other state between the state S1 described by FIG. 9 and the state S2 described by FIG. 10.

FIG. 11 illustrates an embodiment of a graph 1100 of a compromise between reaching the minimum value of the voltage reflection coefficient for the state S1 and the minimum value of the voltage reflection coefficient for the state S2. Figure 1100 illustrates that it is difficult to use three variable parameters (for example: the RF frequency of the RF signal generated by the RF generator 104 in state S1, the RF frequency of the RF signal generated by the RF generator 104 in state S2, and Adjust four values (for example: the real part of the voltage reflection coefficient Γ(S1), the imaginary part of the voltage reflection coefficient Γ(S1) in the position of the variable capacitor in the impedance matching network 106 with combined variable capacitors, etc.) , The real part of the voltage reflection coefficient Γ(S2), and the imaginary part of the voltage reflection coefficient Γ(S2), etc.). In some embodiments, the impedance matching network 106 has a variable capacitor with a combined variable capacitance. Without voltage reflection coefficient Γ(S1) and Γ(S2) are the same A single value for the position of a variable capacitor where time is zero. More precisely, a compromise value (for example, the value AΓ(S1)+BΓ(S2)), etc. is used.

The graph 1100 illustrates the contours of Γ for two states of pulsed plasma (for example, state S1, state S2, etc.). The isolines belong to regions R1, R2, R3, R4, R5, R6, R7, and R8. Each state has its own RF frequency, and the clock cycle for the clock signal shares the same value of the combined variable capacitor. The model system 102 is applied to select three values that optimize some functions of the voltage reflection coefficients Γ(S1) and Γ(S2), for example: the RF signal generated by the RF generator 104 for the state S1 Frequency, RF frequency for the RF signal in state S2, and combined variable capacitors, etc. For example, when the RF signal during the state S1 has a higher power level than the RF signal during the state S2, the RF signal is adjusted during the state S1, and therefore, at the input 142 of the model system 102 The value of 0.8Γ(S1)+0.2Γ(S2) is minimized, where 0.8 is an example of coefficient A, and 0.2 is an example of coefficient (1-A).

The graph 1100 plots the frequency of the RF signal generated by the 60 MHz RF generator for state S1 (eg, state 1, etc.) and for S2 (eg, state 2, etc.) relative to the position of the combined variable capacitor of the impedance matching network 106. As shown in FIG. 1100, it is difficult to determine the combined variable capacitor of the impedance matching network 106, which reaches the minimum value of the voltage reflection coefficient for the state S1 and the minimum value of the voltage reflection coefficient for the state S2. Therefore, a compromise value (for example, AΓ(S1)+BΓ(S2), etc.) is used instead of reaching the minimum value of the voltage reflection coefficient for the state S1 and the minimum value of the voltage reflection coefficient for the state S2.

FIG. 12 illustrates an embodiment of a diagram 1200 of the two states S1 and S2 of the RF signal (FIG. 1) generated by the RF generator 104. Graph 1200 plots power level versus time t. As shown in Figure 1200, there are two states S1 and S2. The state S1 has an RF power level of the RF signal generated by the RF generator 104 (for example, the envelope of the RF signal power, etc.), and/or a frequency level of the RF signal. State S2 There are: another RF power level of the RF signal generated by the RF generator 104 relative to the power level of the state S1, and/or a different RF frequency level of the RF signal relative to the frequency level of the state S1 allow. During the clock cycle of the clock signal, both states S1 and S2 share the same value of the variable capacitor in the impedance matching network 106 with combined variable capacitance. The impedances used in states S1 and S2 (for example: Zmi1(S1), Zmi1(S2), Zmi2(S1), Zmi2(S2), etc.) are measured separately, and the corresponding load impedances (for example: ZL1(S1), ZL1 (S2), ZL2 (S1), ZL2 (S2), etc.) are respectively applied to the model system 102 to select the trade-off value of the variable capacitor, and then adjust the two frequencies for the two states S1 and S2.

As shown in the figure, the state S1 has a power level P1 and the state S2 has a power level P2. For example, the power level P1 is the envelope of the RF signal (such as a sinusoidal signal, etc.) during the state S1, and the power level P2 is the envelope of the RF signal during the state S2. As another example, the total power of the RF signal during the state S2 has a smaller value than the power of the RF signal during the state S1. The power level P1 is greater than the power level P2.

FIG. 13 illustrates an embodiment of a diagram 1300 of more than two states of the RF signal (FIG. 1) generated by the RF generator 104. As shown in FIG. 1300, the plasma system uses multiple RF states (e.g., S1, S2, S3, S4, etc.) to operate. Setting the value of the position of the variable capacitor with the combined variable capacitance becomes more complicated as the number of states increases. However, in some embodiments where the four states S1 to S4 are used, five parameters (for example: four Each RF frequency is used for each of the four states of the RF signal generated by the RF generator 104; a capacitance value of a variable capacitor with a combined variable capacitance, etc.) is used to reduce the voltage reflection coefficient Minimize the predetermined function of four values (such as Γ(S1), Γ(S2), Γ(S3), Γ(S4), etc.), where Γ(S3) is at the input 142 of the model system 102 (Figure 2) It is used for the voltage reflection coefficient of state S3, and Γ(S4) is the voltage reflection coefficient for state S4 at the input 142 of the model system 102 (FIG. 2).

Graph 1300 plots power level versus time t. The RF signal has four states: S1, S2, S3, and S4. The RF signal transitions from the state S1 to the state S2, and further to the state S3 and to the state S4. The power level P2 of the state S2 is smaller than the power level P1 of the state S1. The power level P1 of the state S1 is smaller than the power level P3 of the state S3, and the power level P3 is smaller than the power level P4 of the state S4. For example, the power level P2 is the envelope of the RF signal during the state S2, the power level P1 is the envelope of the RF signal during the state S1, and the power level P3 is the envelope of the RF signal during the state S3. The power level P4 is the envelope of the RF signal during the state S4.

In various embodiments, the frequency level of state S4 is greater or less than the frequency level of state S3. Similarly, the frequency level of state S2 is greater or less than the frequency level of state S3.

In various embodiments, the power level of state S1 is less than the power level of state S2. In some embodiments, the power level of the state S4 is less than the power level of the state S3, and the frequency level of the state S4 is greater than or less than the frequency level of the state S3. In some embodiments, the power level of the state S2 is greater than the power level of the state S3, and the frequency level of the state S2 is greater than or less than the frequency level of the state S3.

In some embodiments, the power level of the first state (such as S1, S2, S3, S4, etc.) is greater or less than the power level of the second state (such as S1, S2, S3, S4, etc.). In addition, the frequency level of the first state is greater than or less than the frequency level of the second state.

It should be noted that in some embodiments, the above-mentioned embodiments described with reference to FIGS. 1 to 11 are applicable to RF signals having more than two states. For example, when an RF signal with three states S1, S2, and S3 is generated by the RF generator 104, another load impedance ZL1 (S3) at the output of the model system 102 is set to the load impedance ZL1 (S1 ) Is determined for the state S3 in the same way as the determination in FIG. 1. In addition, the RF value RF _optimum 1(S3)@C1 _{for the state S3 is determined in the same way that the RF value RF optimum} 1(S1)@C1 was determined using Figure 2, except that to determine the C _optimum 1, use In state S3, the combination of voltage reflection coefficient Γ(S1), voltage reflection coefficient Γ(S2), and voltage reflection coefficient Γ(S3) is minimized, and in order to determine the RF value RF _optimum 1(S3)@C1, voltage The reflection coefficient Γ(S3) is minimized. In addition, yet another load impedance ZL2 (S3) at the output 144 of the model system 102 is determined for the state S3 in the same way that the load impedance ZL2 (S1) was determined using FIG. 5. In addition, the RF value RF _optimum 1(S3)@C _step 1 for state S3 is determined in the same way that the RF value RF _optimum 1(S1)@C _step 1 was determined using Figure 6, except for the voltage reflection coefficient Γ(S3) is minimized. During the state S3 of the RF signal generated by the RF generator, the RF value RF _optimum 1(S3)@C _step 1 is applied to the RF generator 104, and the combined variable capacitor C _step 2 is applied to the impedance matching network 106.

In various embodiments, the N states (for example, 8 states, 16 states, etc.) of the RF signal generated by the RF generator 104 are used, where N is an integer greater than or equal to two. In various embodiments, the clock cycle of the clock signal when the N states occur during the period is the same as the clock cycle of the clock signal when the N states occur during the period (N-1). For example, the two states of the RF signal and the three states of the RF signal occur within the time period of the clock cycle of the same clock signal.

It should be understood that in some of the above embodiments, the RF signal is supplied to the lower electrode of the chuck 118 and the upper electrode 116 is grounded. In various embodiments, the RF signal is applied to the upper electrode 116 and the lower electrode of the chuck 118 is grounded.

The embodiments described herein can be implemented using various computer system configurations, including handheld hardware units, microprocessor systems, microprocessor-based or programmable consumer electronics, minicomputers, and mainframe computers. Wait. The embodiments described herein can also be implemented in a distributed computing environment, in which tasks are performed by remote processing hardware units linked via a computer network.

In some embodiments, the controller is part of the system, which may be part of the above examples. The system includes semiconductor processing equipment, which includes more than one processing tool, more than one chamber, more than one platform for processing, and/or specific processing elements (wafer base, air flow system, etc.). The system is integrated with electronic devices that are used to control the operation of the system before, during, and after the processing of semiconductor wafers or substrates. Electronic equipment is called a "controller", which can control various elements or sub-parts of the system. According to the processing requirements and/or types of the system, the controller is programmed to control any of the processes disclosed herein, including: processing gas delivery, temperature setting (such as heating and/or cooling), pressure setting, vacuum setting, power setting , RF generator setting, RF matching circuit setting, frequency setting, flow rate setting, fluid delivery setting, position and operation setting, access to a tool and other transfer tools and/or the crystal of the load lock part connected or interfaced with the system Circle transfer.

Broadly speaking, in various embodiments, the controller is defined as an electronic device with various integrated circuits, logic, memory, and/or software, which receive instructions, issue instructions, control operations, enable cleaning operations, and enable terminals. Point measurement, etc. The integrated circuit includes a chip in the form of firmware storing program instructions, a DSP, a chip defined as an ASIC, a PLD, and one or more microprocessors or microcontrollers that execute program instructions (such as software). These program commands are commands that communicate with the controller in the form of various individual settings (or program files), and these settings define the operating parameters of the semiconductor wafer execution process. In some embodiments, the operating parameters are part of a recipe defined by a process engineer for one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and/or wafers More than one processing step is completed during the manufacturing of the die.

In some embodiments, the controller is a part of the computer or is coupled to the computer, and the computer is integrated with the system, coupled to the system, connected to the system in other ways via a network, or a combination of the above. For example: the controller is in the "cloud" or the whole or part of the host computer system of the fab, allowing remote wafer processing End access. The controller allows remote access to the system to monitor the current progress of manufacturing operations, check the history of past manufacturing operations, check trends or performance metrics from multiple manufacturing operations, and change the current processing parameters to set the current operation after Processing steps, or start a new process.

In some embodiments, a remote computer (such as a server) provides a process recipe to the system via a computer network, the computer network including a local area network or the Internet. The remote computer includes a user interface that allows the input or programming of parameters and/or settings, which are then transferred from the remote computer to the system. In some examples, the controller receives commands in a set form for processing wafers. It should be understood that these settings are specifically used for the types of processes to be executed on the wafer and the types of tools that interface or control with the controller. Therefore, as described above, the controller is distributed, such as by including more than one distributed controller, which are connected by a network and work toward a common purpose (such as the implementation process described herein). An example of a distributed controller for this purpose includes more than one integrated circuit on the chamber, connected to more than one integrated circuit located at a remote end (such as at the platform level or as part of a remote computer), which combines with Control the process in the chamber.

Without limitation, in various embodiments, the system includes a plasma etching chamber, a deposition chamber, a spin-rinsing chamber, a metal plating chamber, a cleaning chamber, a bevel etching chamber, and physical vapor deposition ( PVD) chamber, chemical vapor deposition (CVD) chamber group, atomic layer deposition (ALD) chamber, atomic layer etching (ALE) chamber, ion implantation chamber, orbital chamber, and related or used in semiconductors Any other semiconductor processing chamber in wafer manufacturing and/or production.

It should be noted that although the above operation is described with reference to a parallel plate plasma chamber (for example, a capacitively coupled plasma chamber, etc.), in some embodiments, the above operation can be applied to other types of plasma chambers, such as : Plasma chamber containing inductively coupled plasma (ICP) reactor, transformer coupled plasma (TCP) reactor, conductor tool, and dielectric tool; electric chamber containing electron cyclotron resonance (ECR) reactor Pulp chamber and so on. For example: an x MHz RF generator, a y MHz RF generator, and a z MHz RF generator are coupled to the inductor in the ICP plasma chamber. Examples of the shape of the inductor include solenoids, dome-shaped coils, plate-shaped coils, and the like.

As mentioned above, depending on the process operation to be performed by the tool, the controller communicates with the following: one or more other tool circuits or modules, other tool components, group tools, other tool interfaces, adjacent tools, adjacent tools, located at various locations in the factory A tool, a host computer, another controller, or a tool for material transfer, which carries the container of the wafer in and out of the tool position and/or load end in the semiconductor production plant.

After considering the above embodiments, it should be understood that some embodiments use various computer-implemented operations including data stored in a computer system. These operations that can be realized by computers are those that manipulate physical quantities.

Some embodiments also relate to hardware units or devices used to perform these operations. The equipment is specially constructed for special purpose computers. When defined as a special purpose computer, the computer executes other processing, program execution, or common programs that are not part of the special purpose, but can still be operated for the special purpose.

In some embodiments, the operations described herein are performed by a computer that is selectively activated or configured by more than one computer program stored in computer memory or obtained through a computer network. When the data is obtained through a computer network, the data can be processed by other computers on the computer network (such as cloud computing resources).

More than one embodiment described herein can also be produced as computer readable codes on non-transitory computer readable media. The non-transitory computer-readable medium is any data storage hardware unit (such as a memory device, etc.) that stores data, and the data is later read by a computer system. Non-temporary Examples of computer-readable media include hard drives, network attached storage (NAS), ROM, RAM, compact disc ROM (CD-ROM), recordable disc (CD-R), and read-write disc (CD-ROM). RW), magnetic tape and other optical and non-optical data storage hardware units. In some embodiments, the non-transitory computer-readable medium includes computer-readable physical media dispersed in a network-coupled computer system, so that computer-readable codes are stored and executed in a distributed manner.

Although some of the method operations described above are presented in a specific order, it should be understood that in various embodiments, other housekeeping operations are performed between the method operations, or the method operations are adjusted so that these operations occur. At slightly different points in time, or in a system that allows the operations of these methods to occur in various time intervals, they are dispersed, or they are executed in a different order than the above.

It should be further noted that in one embodiment, more than one feature from any of the above embodiments may be combined with more than one feature of any other embodiment without departing from the scope of the description of the various embodiments described in this disclosure.

Although the above embodiments have been described in some details for the purpose of clear understanding, it is obvious that certain changes and modifications can be implemented within the scope of the appended patent application. Therefore, the embodiments of the present invention are considered to be illustrative rather than restrictive, and these embodiments are not limited to the details provided here, but can be added within the scope of the appended patent application and equivalents. Revise.

100: Plasma system

102: model system

104: Radio Frequency (RF) Generator

106: Impedance matching network

108: Plasma Chamber

110: Host computer system

112: drive components

114: connection mechanism

116: Upper electrode

118: Chuck

120: top surface

122: RF power supply

124: Sensor

126: output

128: input

130: RF cable

132: RF transmission line

134: Processor

136: network cable

137: Memory Device

138: network cable

140: output

142: Input

144: output

Claims (15)

A system for adjusting an impedance matching network in a stepwise manner includes: a processor configured to operate as a radio frequency (RF) generator at a first parameter value and an impedance matching network with a variable measurable Factor, a first measured input parameter value sensed between an output of the RF generator and an input of the impedance matching network is received during a first state of the RF generator, wherein the processing The device is configured to initialize one or more models for the first state to have the variable measurable factor and the first parameter value, wherein the one or more models include a model of the impedance matching network; and are coupled to the process A memory device of a device, wherein the memory device is configured to store the one or more models, and the processor is configured to when the one or more models have the variable measurable factor and the first parameter value , For the first state, use the one or more models to calculate a first output parameter value from the first measured input parameter value, wherein the processor is configured to use the first output parameter value and the one or more models to calculate a first output parameter value The best variable measurable factor, for the best variable measurable factor, a reflection coefficient for the first state and a reflection for a second state at an input of the more than one model The combination of coefficients is at the minimum value, wherein the processor is configured to use the first output parameter value and the one or more models to calculate a first operating parameter value, and for the first operating parameter value, the The reflection coefficient at the input for the first state is at a minimum, Wherein, the processor is configured to control the RF generator during the first state to operate under the first operating parameter value, and wherein, the processor is configured to set the impedance during the first state The matching network has a first step variable measurable factor, wherein the first step variable measurable factor is closer to the best variable measurable factor than the variable measurable factor Factor, the impedance matching network is adjusted in a stepwise manner for the first state. For example, the system for adjusting the impedance matching network in a stepwise manner in the first item of the scope of patent application, wherein, during the second state of the RF generator, the processor is configured to act as a second parameter of the RF generator When the impedance matching network has the variable measurable factor, receiving a second measured input parameter value sensed between the output of the RF generator and the input of the impedance matching network , Wherein the processor is configured to initialize the one or more models of the impedance matching network for the second state to have the variable measurable factor and the second parameter value, wherein the processor is configured to When the one or more models have the variable measurable factor and the second parameter value, the one or more models are used to calculate a second output parameter value from the second measured input parameter value for the second state, wherein, The processor is configured to use the second output parameter value and the one or more models to calculate a second operating parameter value, for the second operating parameter value, for the second state at the input of the one or more models The reflection coefficient of is at a minimum value, wherein the processor is configured to control the RF generator during the second state to operate at the second operating parameter value, Wherein, the processor is configured to set the impedance matching network during the second state to have the first step variable measurable factor. For example, the system for adjusting the impedance matching network in a stepwise manner according to the second item of the scope of patent application, wherein the processor is configured to operate when the RF generator is operated under the first operating parameter value and the impedance matching network has the In the first step variable measurable factor, a third measurement sensed between the output of the RF generator and the input of the impedance matching network is received during the first state of the RF generator Obtain input parameter values, wherein the processor is configured to initialize the one or more models of the impedance matching network for the first state to have the first step variable measurable factor and the first operating parameter value , Wherein the processor is configured to use the one or more models from the third test for the first state when the one or more models have the first step variable measurable factor and the first operating parameter value Obtain the input parameter value to calculate a third output parameter value, wherein the processor is configured to use the third output parameter value and the one or more models to calculate an additional optimal variable measurable factor for the additional optimal Variable measurable factor, the combination of the reflection coefficient for the first state and the reflection coefficient for the second state at the input of the one or more models is at a minimum, wherein the processor is Configured to use the third output parameter value and the one or more models to calculate a third operating parameter value, for the third operating parameter value, the reflection coefficient for the first state at the input of the one or more models Tied at the minimum, Wherein, the processor is configured to control the RF generator during the first state to operate at the third operating parameter value, and wherein the processor is configured to set the impedance during the first state The matching network may have a second step variable measurable factor, wherein the second step variable measurable factor is closer to the extra best than the first step variable measurable factor The variable measurable factor enables the impedance matching network to be adjusted in the stepwise manner for the first state. For example, the system for adjusting the impedance matching network in a stepwise manner according to the third item of the scope of patent application, wherein the processor is configured to operate when the RF generator is operated under the second operating parameter value and the impedance matching network has the In the first step variable measurable factor, a fourth measurement sensed between the output of the RF generator and the input of the impedance matching network is received during the second state of the RF generator Obtain input parameter values, wherein the processor is configured to initialize the one or more models of the impedance matching network for the second state to have the first step variable measurable factor and the second operating parameter value , Wherein the processor is configured to use the one or more models from the fourth test for the second state when the one or more models have the first step variable measurable factor and the second operating parameter value Obtain input parameter values to calculate a fourth output parameter value, wherein the processor is configured to use the fourth output parameter value and the one or more models to calculate a fourth operating parameter value, for the fourth operating parameter value, in the The reflection coefficient for the second state at the input of more than one model is at a minimum, Wherein, the processor is configured to operate the RF generator under the fourth operating parameter value during the second state, and wherein the processor is configured to set the impedance matching network during the second state , To have the second step variable measurable factor. For example, the system for adjusting the impedance matching network in a stepwise manner in the scope of the patent application, wherein the power level of the RF generator during the first state is greater than the power of the RF generator during the second state Level. For example, the system for adjusting the impedance matching network in a step-by-step manner in the scope of the patent application, wherein the one or more models are computer-generated models, and the one or more models include a model of an RF transmission line and a model of an RF cable . For example, the system for adjusting the impedance matching network in a stepwise manner in the first item of the scope of patent application, wherein, in order to calculate the first output parameter value from the first measured input parameter value using the one or more models for the first state, The processor is configured to propagate the first measured input parameter value forward through the circuit elements of the one or more models to generate the first output parameter value, wherein, in order to use the first output parameter value and the one or more models Calculate the best variable measurable factor such that the reflection coefficient for the first state and the reflection coefficient for the second state at the input of the one or more models for the best variable measurable factor The combination of the reflection coefficients is at the minimum value, and the processor is configured to solve the optimal variable measurable factor given the first output parameter value and the more than one model, so that the combination is at Minimum, Wherein, in order to calculate the first operating parameter value using the first output parameter value and the one or more models, the processor is configured to solve the first operation parameter value given the first output parameter value and the one or more models. An operating parameter value, for the first operating parameter value, the reflection coefficient for the first state at the input of the one or more models is at a minimum value. A system for adjusting a radio frequency (RF) generator includes: a processor configured to operate when the RF generator is operated at a first parameter value and an impedance matching network has a variable measurable factor, During a first state of the RF generator, a first measured input parameter value of a parameter sensed between an output of the RF generator and an input of the impedance matching network is received, wherein the processing The device is configured to initialize one or more models for the first state to have the variable measurable factor and the first parameter value, wherein the one or more models include a model of the impedance matching network; and are coupled to the process A memory device of a device, wherein the memory device is configured to store the one or more models, and the processor is configured to when the one or more models have the variable measurable factor and the first parameter value , For the first state, use the one or more models to calculate a first output parameter value from the first measured input parameter value, wherein the processor is configured to use the first output parameter value and the one or more models to calculate a first output parameter value The first operating parameter value, for the first operating parameter value, a variable for the first state at an input of the one or more models is at a minimum value, and Wherein, the processor is configured to control the RF generator during the first state to operate under the first operating parameter value. For example, the system for adjusting a radio frequency (RF) generator according to the eighth patent application, wherein, during a second state of the RF generator, the processor is configured to act as a second parameter of the RF generator When the impedance matching network has the variable measurable factor, receiving a second measured input parameter value sensed between the output of the RF generator and the input of the impedance matching network , Wherein the processor is configured to initialize the one or more models for the second state to have the variable measurable factor and the second parameter value, and wherein the processor is configured to when the one or more models have When the variable measurable factor and the second parameter value are used, the one or more models are used for the second state to calculate a second output parameter value from the second measured input parameter value, wherein the processor is configured to Using the second output parameter value and the one or more models to calculate a second operating parameter value, for the second operating parameter value, the variable for the second state at the input of the one or more models is at the minimum Value, wherein the processor is configured to control the RF generator during the second state to operate at the second operating parameter value. For example, the system for adjusting a radio frequency (RF) generator according to the ninth patent application, wherein the processor is configured to operate at the RF generator when the RF generator is operated under the first operating parameter value. Receiving a third measured input parameter value sensed between the output of the RF generator and the input of the impedance matching network during the first state, Wherein, the processor is configured to initialize the one or more models for the first state to have the first operating parameter value, and wherein the processor is configured to when the one or more models have the first operating parameter value, For the first state, use the one or more models to calculate a third output parameter value from the third measured input parameter value, wherein the processor is configured to use the third output parameter value and the one or more models to calculate a third output parameter value. Three operating parameter values, for the third operating parameter value, the variable used in the first state at the input of the one or more models is at a minimum, wherein the processor is configured to be in the first state During this period, the RF generator is controlled to operate under the third operating parameter value. For example, the system for adjusting a radio frequency (RF) generator according to the tenth item of the scope of the patent application, wherein the processor is configured to operate at the RF generator when the RF generator is operated under the second operating parameter value. During the second state, a fourth measured input parameter value sensed between the output of the RF generator and the input of the impedance matching network is received, wherein the processor is configured for the second state Initialize the one or more models to have the second operating parameter value, wherein the processor is configured to use the one or more models from the first operating parameter value for the second state when the one or more models have the second operating parameter value Four measured input parameter values calculate a fourth output parameter value, Wherein, the processor is configured to use the fourth output parameter value and the one or more models to calculate a fourth operating parameter value, for the fourth operating parameter value, the value used at the input of the one or more models is used for the first The variable of the two states is at a minimum value, wherein the processor is configured to operate the RF generator at the fourth operating parameter value during the second state. For example, the system for adjusting a radio frequency (RF) generator in the scope of the patent application, wherein the power level of the RF generator during the first state is greater than the power of the RF generator during the second state Level. For example, the system for adjusting radio frequency (RF) generators in the scope of the patent application, wherein the one or more models are computer-generated models, and the computer-generated models include a model of an RF transmission line and a model of an RF cable One model. For example, the system for adjusting a radio frequency (RF) generator according to the eighth item of the scope of patent application, wherein, in order to calculate the first output parameter value from the first measured input parameter value using the one or more models for the first state, The processor is configured to propagate the first measured input parameter value forward through the circuit elements of the one or more models to generate the first output parameter value, wherein, in order to use the first output parameter value and the one or more models Calculating the first operating parameter value, the processor is configured to solve the first operating parameter value given the first output parameter value and the one or more models, and for the first operating parameter value, in the The variable for the first state at the input of more than one model is at a minimum. For example, the system for adjusting a radio frequency (RF) generator in the eighth patent application, wherein the parameter is an impedance, and the variable is the reflection coefficient.

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