[go: up one dir, main page]

TWI608466B - Pixel array device and segment driving method - Google Patents

Pixel array device and segment driving method Download PDF

Info

Publication number
TWI608466B
TWI608466B TW105141961A TW105141961A TWI608466B TW I608466 B TWI608466 B TW I608466B TW 105141961 A TW105141961 A TW 105141961A TW 105141961 A TW105141961 A TW 105141961A TW I608466 B TWI608466 B TW I608466B
Authority
TW
Taiwan
Prior art keywords
signal
unit
pixel
transistor
electrically coupled
Prior art date
Application number
TW105141961A
Other languages
Chinese (zh)
Other versions
TW201824228A (en
Inventor
李長益
黃郁升
Original Assignee
友達光電股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 友達光電股份有限公司 filed Critical 友達光電股份有限公司
Priority to TW105141961A priority Critical patent/TWI608466B/en
Priority to CN201710037253.XA priority patent/CN106548743B/en
Application granted granted Critical
Publication of TWI608466B publication Critical patent/TWI608466B/en
Publication of TW201824228A publication Critical patent/TW201824228A/en

Links

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Description

畫素陣列裝置及分段驅動方法Pixel array device and segmentation driving method

本發明是關於一種顯示面板的驅動方法,特別是一種分段驅動的畫素陣列裝置及分段驅動方法。The present invention relates to a driving method of a display panel, and more particularly to a segment driven pixel array device and a segment driving method.

近年來,環保意識逐漸抬頭,節能減碳成為了當前的重要議題。因此,各家廠商除了致力於提升顯示面板的顯示品質與顯示技術外,在顯示面板之節能方面亦相當重視。In recent years, environmental awareness has gradually risen, and energy conservation and carbon reduction have become important issues at present. Therefore, in addition to improving the display quality and display technology of display panels, various manufacturers pay considerable attention to the energy saving of display panels.

習知,顯示面板可包含多個畫素單元、多條掃描線與多條資料線。在傳統架構中,多個畫素單元可呈矩陣排列,且各畫素單元分別電性耦接於多條掃描線之一以及多條資料線之一。在傳統顯示面板的驅動方法中,此些掃描線接可依序接收掃描訊號,以使得各列的多個畫素單元可依序根據資料線所接收到之灰階資料進行顯示,藉此來完成顯示面板之畫面顯示。Conventionally, the display panel may include a plurality of pixel units, a plurality of scan lines, and a plurality of data lines. In a conventional architecture, a plurality of pixel units may be arranged in a matrix, and each pixel unit is electrically coupled to one of the plurality of scan lines and one of the plurality of data lines. In the driving method of the conventional display panel, the scan lines can sequentially receive the scan signals, so that the plurality of pixel units of each column can be sequentially displayed according to the gray scale data received by the data lines, thereby Complete the screen display of the display panel.

在傳統顯示面板的驅動架構中,同一列的多個畫素單元因電性耦接於同一條掃描線而被同步驅動,且各畫素單元一但被驅動便需重新載入灰階資料,以避免顯示錯誤。因此,在傳統顯示面板的驅動方法中,無論各畫素單元在此時點與前時點所需顯示的灰階是否相同,顯示面板仍需時刻透過資料線更新灰階資料至各畫素單元。In a driving structure of a conventional display panel, a plurality of pixel units in the same column are synchronously driven by being electrically coupled to the same scanning line, and each pixel unit is required to reload gray scale data once it is driven. To avoid displaying errors. Therefore, in the driving method of the conventional display panel, the display panel still needs to update the gray scale data to each pixel unit through the data line, regardless of whether the gray scales of the respective pixel units are required to be displayed at the current point and the previous time point.

在一實施例中,一種畫素陣列,其包含複數資料線、複數畫素單元、至少一區段驅動單元以及控制單元。複數畫素單元以陣列形式排列,且各畫素單元電性耦接於複數資料線之一。各區段驅動單元電性耦接相鄰且電性耦接不同複數資料線的至少一畫素單元。控制單元判斷各區段驅動單元所電性耦接的各畫素單元在當前時點所對應的第一灰階資料與在前一時點所對應的第二灰階資料是否相同。當區段驅動單元所電性耦接的各畫素單元在當前時點所對應的第一灰階資料相同於在前一時點所對應的第二灰階資料時,控制單元禁能區段驅動單元,以使區段驅動單元不驅動所電性耦接的各畫素單元經由電性耦接的資料線載入對應的第一灰階資料。而當區段驅動單元所電性耦接的任一畫素單元在當前時點所對應的第一灰階資料不同於在前一時點所對應第二灰階資料時,控制單元致能區段驅動單元,以使區段驅動所電性耦接的各畫素單元經由電性耦接的資料線載入對應的第一灰階資料。In one embodiment, a pixel array includes a plurality of data lines, a plurality of pixel units, at least one segment drive unit, and a control unit. The plurality of pixel units are arranged in an array, and each pixel unit is electrically coupled to one of the plurality of data lines. Each segment driving unit is electrically coupled to at least one pixel unit adjacent to and electrically coupled to different complex data lines. The control unit determines whether the first gray scale data corresponding to each pixel unit electrically coupled by each segment driving unit is the same as the second gray scale data corresponding to the previous time point. When the first gray scale data corresponding to the pixel unit electrically coupled to the segment driving unit is the same as the second gray scale data corresponding to the previous time point, the control unit disables the segment driving unit. So that the segment driving unit does not drive the electrically coupled pixel units to load the corresponding first gray scale data via the electrically coupled data lines. When the first gray scale data corresponding to any pixel unit electrically coupled to the segment driving unit is different from the second gray scale data corresponding to the previous time point, the control unit enables the segment driving. And a unit, wherein each pixel unit electrically coupled to the segment driver is loaded with the corresponding first gray scale data via the electrically coupled data line.

在一實施例中,一種分段驅動方法,其包含接收至少一畫素單元在當前時點所對應的至少一第一灰階資料、從儲存單元讀出至少一畫素單元在前一時點所對應的至少一第二灰階資料,以及判斷各畫素單元所對應的第一灰階資料與第二灰階資料是否相同。其中,至少一畫素單元電性耦接於區段驅動單元。當各畫素單元所對應的第一灰階資料與第二灰階資料相同時,禁能區段驅動單元,以使區段驅動單元不驅動各畫素單元載入對應的第一灰階資料。而當任一畫素單元所對應的第一灰階資料與第二灰階資料不相同時,致能區段驅動單元,以使區段驅動單元驅動各畫素單元載入對應的第一灰階資料。In an embodiment, a segment driving method includes receiving at least one first grayscale data corresponding to at least one pixel unit at a current time point, and reading at least one pixel unit from the storage unit at a previous time point. At least one second grayscale data, and determining whether the first grayscale data corresponding to each pixel unit is the same as the second grayscale data. The at least one pixel unit is electrically coupled to the segment driving unit. When the first gray scale data corresponding to each pixel unit is the same as the second gray scale data, the segment driving unit is disabled, so that the segment driving unit does not drive each pixel unit to load the corresponding first gray scale data. . And when the first gray scale data corresponding to the second gray scale data is different from the second gray scale data, the segment driving unit is enabled to enable the segment driving unit to drive each pixel unit to load the corresponding first gray. Order data.

綜上所述,本發明實施例之畫素陣列裝置與分段驅動方法,其將各掃描線上的畫素單元分區段並判斷各區段中各畫素單元所對應的灰階資料是否需要更新,並於需要更新時才輸入灰階資料,以分區段刷新顯示影像,進而節省不必要的功耗。In summary, the pixel array device and the segment driving method of the embodiment of the present invention divide a pixel unit on each scan line into segments and determine whether gray scale data corresponding to each pixel unit in each segment needs to be updated. And input grayscale data when it needs to be updated, to refresh the display image in sections, thereby saving unnecessary power consumption.

以下在實施方式中詳細敘述本發明之詳細特徵及優點,其內容足以使任何熟習相關技藝者瞭解本發明之技術內容並據以實施,且根據本說明書所揭露之內容、申請專利範圍及圖式,任何熟習相關技藝者可輕易地理解本發明相關之目的及優點。The detailed features and advantages of the present invention are described in detail in the embodiments of the present invention. The objects and advantages associated with the present invention can be readily understood by those skilled in the art.

圖1為畫素陣列裝置之一實施例的概要示意圖。請參閱圖1,畫素陣列裝置100包含複數資料線D1-D4、複數畫素單元P11-P24、至少一區段驅動單元E11-E22以及控制單元110。1 is a schematic diagram of an embodiment of a pixel array device. Referring to FIG. 1, the pixel array device 100 includes a plurality of data lines D1-D4, a plurality of pixel units P11-P24, at least one segment driving unit E11-E22, and a control unit 110.

畫素單元P11-P24以陣列形式排列,並且各畫素單元P11-P24電性耦接於此些資料線D1-D4中之一。舉例來說,第一行的畫素單元P11、P21電性耦接資料線D1,且第二行的畫素單元P12、P22電性耦接資料線D2。第三行的畫素單元P13、P23電性耦接資料線D3,且第四行的畫素單元P14、P24電性耦接資料線D4。並且,依此類推之。The pixel units P11-P24 are arranged in an array, and each of the pixel units P11-P24 is electrically coupled to one of the data lines D1-D4. For example, the pixel units P11 and P21 of the first row are electrically coupled to the data line D1, and the pixel units P12 and P22 of the second row are electrically coupled to the data line D2. The pixel units P13 and P23 of the third row are electrically coupled to the data line D3, and the pixel units P14 and P24 of the fourth row are electrically coupled to the data line D4. And, and so on.

各區段驅動單元E11-E22電性耦接於相鄰且電性耦接不同資料線D1-D4的至少一個畫素單元。為方便描述,以下以每個區段驅動單元電性耦接二個畫素單元為例,但此數量非本發明之限制。於此,區段驅動單元E11電性耦接同一列且相鄰的畫素單元P11-P12。區段驅動單元E12電性耦接同一列且相鄰的畫素單元P13-P14。區段驅動單元E21電性耦接同一列且相鄰的畫素單元P21-P22。區段驅動單元E22電性耦接同一列且相鄰的畫素單元P23-P24。並且,依此類推之。Each of the segment driving units E11-E22 is electrically coupled to at least one pixel unit adjacent to and electrically coupled to the different data lines D1-D4. For convenience of description, the following is an example in which each segment driving unit is electrically coupled to two pixel units, but the number is not limited by the present invention. Here, the segment driving unit E11 is electrically coupled to the same column and adjacent pixel units P11-P12. The segment driving unit E12 is electrically coupled to the same column and adjacent pixel units P13-P14. The segment driving unit E21 is electrically coupled to the same column and adjacent pixel units P21-P22. The segment driving unit E22 is electrically coupled to the same column and adjacent pixel units P23-P24. And, and so on.

換言之,各個區段驅動單元E11/E12/E21/E22分別與其所電性耦接的至少一個畫素單元P11-P12/P13-P14/P21-P22/P23-P24構成一個顯示區段。In other words, each of the segment drive units E11/E12/E21/E22 is electrically connected to at least one of the pixel units P11-P12/P13-P14/P21-P22/P23-P24 to form a display segment.

控制單元110電性耦接於各區段驅動單元E11-E22。此外,控制單元110可電性耦接至前級電路(圖未示),例如資料驅動電路,並接收來自前級電路的各畫素單元P11-P24所對應的灰階資料。The control unit 110 is electrically coupled to each of the segment drive units E11-E22. In addition, the control unit 110 can be electrically coupled to a front stage circuit (not shown), such as a data driving circuit, and receive gray scale data corresponding to each pixel unit P11-P24 from the front stage circuit.

在顯示過程中,控制單元110確認每個顯示區段的灰階資料是否有變化來決定是否進行更新。於此,控制單元110可依據各區段驅動單元E11-E22所電性耦接的各畫素單元P11-P24在當前時點所對應的灰階資料(以下稱之為第一灰階資料I11-I14)以及在前一時點所對應的灰階資料(以下稱之為第二灰階資料I21-I24)來決定是否致動區段驅動單元E11-E22來驅動其電性耦接的各畫素單元P11-P24重新經由電性耦接的資料線D1-D4載入對應的第一灰階資料I11-I14。During the display process, the control unit 110 confirms whether there is a change in the grayscale data of each display section to decide whether to update. In this case, the control unit 110 can be based on the gray scale data corresponding to each pixel unit P11-P24 electrically coupled to each of the segment driving units E11-E22 at the current time point (hereinafter referred to as the first gray level data I11- I14) and the gray scale data corresponding to the previous time point (hereinafter referred to as the second gray scale data I21-I24) to determine whether to activate the segment driving units E11-E22 to drive the respective pixels of the electrical coupling. The units P11-P24 reload the corresponding first gray scale data I11-I14 via the electrically coupled data lines D1-D4.

在畫素陣列裝置100中,各區段驅動單元E11-E22的電路結構與運作大致上相同。為了清楚說明,以下以一個區段驅動單元E11來進行說明。In the pixel array device 100, the circuit configuration and operation of each of the segment drive units E11-E22 are substantially the same. For clarity of explanation, the following description will be made with one sector drive unit E11.

圖2為分段驅動方法之一實施例的概要流程示意圖。2 is a schematic flow chart of an embodiment of a segment driving method.

請參閱圖1與圖2,針對區段驅動單元E11,控制單元110接收區段驅動單元E11所有電性耦接的畫素單元P11、P12在當前時點所對應的第一灰階資料I11、I12(步驟S100),並且控制單元110讀出此些畫素單元P11、P12在前一時點所對應的第二灰階資料I21、I22(步驟S200)。然後,控制單元110判斷各畫素單元P11、P12所對應的第一灰階資料I11、I12與第二灰階資料I21、I22是否相同(步驟S300)。Referring to FIG. 1 and FIG. 2, for the segment driving unit E11, the control unit 110 receives the first grayscale data I11, I12 corresponding to all the electrically coupled pixel units P11 and P12 of the segment driving unit E11 at the current time point. (Step S100), and the control unit 110 reads out the second gray scale data I21, I22 corresponding to the pixel units P11, P12 at the previous time point (step S200). Then, the control unit 110 determines whether the first gray scale data I11, I12 and the second gray scale data I21, I22 corresponding to the respective pixel units P11, P12 are the same (step S300).

在步驟S300之一實施例中,控制單元110是將各畫素單元P11、P12所對應的第一灰階資料I11、I12分別和各畫素單元P11、P12所對應的第二灰階資料I21、I22進行比對。換言之,控制單元110是將畫素單元P11所對應的第一灰階資料I11與第二灰階資料I21進行比對,且將畫素單元P12所對應的第一灰階資料I12第二灰階資料I22進行比對,以判斷此二畫素單元P11、P12分別在當前時點與前一時點所需顯示的灰階是否完全相同。In an embodiment of step S300, the control unit 110 is to use the first gray scale data I11 and I12 corresponding to the pixel units P11 and P12 and the second gray scale data I21 corresponding to each of the pixel units P11 and P12. I22 is compared. In other words, the control unit 110 compares the first gray scale data I11 corresponding to the pixel unit P11 with the second gray scale data I21, and the second gray scale data I12 corresponding to the pixel unit P12. The data I22 is compared to determine whether the gray levels of the two pixel units P11 and P12 respectively need to be displayed at the current time point and the previous time point.

當控制單元110判定區段驅動單元E11所電性耦接的各畫素單元P11、P12所對應的第一灰階資料I11、I12與第二灰階資料I21、I22相同(即畫素單元P11所對應的第一灰階資料I11與第二灰階資料I12相同,且畫素單元P12所對應的第一灰階資料I21第二灰階資料I22相同)時,表示畫素單元P11、P12在當前時點所需顯示的灰階和在前一時點所顯示的灰階是相同的,此時控制單元110禁能區段驅動單元E11(步驟S400),以使區段驅動單元E11不驅動各畫素單元P11、P12經由對應的資料線D1、D2載入對應的第一灰階資料I11、I12,即不載入新的灰階資料。When the control unit 110 determines that the first gray scale data I11 and I12 corresponding to the pixel units P11 and P12 electrically coupled to the segment driving unit E11 are the same as the second gray scale data I21 and I22 (ie, the pixel unit P11) When the corresponding first gray scale data I11 is the same as the second gray scale data I12, and the first gray scale data I21 corresponding to the pixel unit P12 is the same as the second gray scale data I22, the pixel units P11 and P12 are represented. The gray level to be displayed at the current time point is the same as the gray level displayed at the previous time point. At this time, the control unit 110 disables the segment driving unit E11 (step S400) so that the segment driving unit E11 does not drive the pictures. The prime units P11 and P12 load the corresponding first gray scale data I11 and I12 via the corresponding data lines D1 and D2, that is, no new gray scale data is loaded.

反之,當控制單元110判定區段驅動單元E11所電性耦接的任一畫素單元P11、P12所對應的第一灰階資料I11、I12與第二灰階資料I21、I22不相同(即畫素單元P11所對應的第一灰階資料I11與第二灰階資料I12不相同,且/或畫素單元P12所對應的第一灰階資料I21第二灰階資料I22不相同)時,表示畫素單元P11、P12在當前時點所需顯示的灰階和在前一時點所顯示的灰階並不相同,此時控制單元110致能區段驅動單元E11(步驟S500),以使區段驅動單元E11驅動各畫素單元P11、P12經由對應的資料線D1、D2載入對應的第一灰階資料I11、I12,即載入新的灰階資料以更新此顯示區段的顯示畫面。On the contrary, when the control unit 110 determines that the first gray scale data I11 and I12 corresponding to any of the pixel units P11 and P12 electrically coupled to the segment driving unit E11 is different from the second gray scale data I21 and I22 (ie, When the first gray scale data I11 corresponding to the pixel unit P11 is different from the second gray scale data I12, and/or the first gray scale data I21 corresponding to the pixel unit P12 is different from the second gray scale data I22, The gray scales indicating that the pixel units P11 and P12 are to be displayed at the current time point are not the same as the gray scales displayed at the previous time point. At this time, the control unit 110 enables the segment driving unit E11 (step S500) to make the area. The segment driving unit E11 drives the pixel units P11 and P12 to load the corresponding first gray scale data I11 and I12 via the corresponding data lines D1 and D2, that is, load new gray scale data to update the display screen of the display segment. .

在一實施例中,畫素陣列裝置100可更包含儲存單元120。各畫素單元P11-P24在前一時點所對應的至少一第二灰階資料I21-I24能儲存於儲存單元120中,以供控制單元110於比對時再從儲存單元120中讀出使用。在另一實施例中,儲存單元120亦可用以儲存各畫素單元P11-P24不同時點的多筆灰階資料。In an embodiment, the pixel array device 100 may further include a storage unit 120. The at least one second gray scale data I21-I24 corresponding to the pixel units P11-P24 at the previous time point can be stored in the storage unit 120 for the control unit 110 to read out from the storage unit 120 when compared. . In another embodiment, the storage unit 120 can also be used to store multiple grayscale data of different pixel units P11-P24 at different points in time.

在一些實施例中,控制單元110可為微型積體電路(micrometers IC, 或為micro-IC),但本發明並非僅限於此。在一些實施例中,控制單元110與資料驅動電路以同一或不同微型積體電路實現。In some embodiments, the control unit 110 can be a micrometers IC (or micro-IC), but the invention is not limited thereto. In some embodiments, control unit 110 and data drive circuitry are implemented in the same or different micro-integrated circuits.

在一些實施例中,各區段驅動單元E11-E22分別具有一控制腳位,且各區段驅動單元E11-E24之控制腳位可電性耦接至控制單元110。各區段驅動單元E11-E22可以依據其控制腳位所接收到的訊號(禁能訊號Sd或致能訊號Se)來決定是否驅動所電性耦接的各畫素單元P11-P24,藉以使得位於同一顯示區段之畫素單元 P11-P12/P13-P14/P21-P22/P23-P24可不同時被驅動(即可分段驅動)。In some embodiments, each of the segment drive units E11-E22 has a control pin, and the control pins of each of the segment drive units E11-E24 are electrically coupled to the control unit 110. Each of the segment drive units E11-E22 can determine whether to drive the electrically coupled pixel units P11-P24 according to the signal (the disable signal Sd or the enable signal Se) received by the control pin. The pixel units P11-P12/P13-P14/P21-P22/P23-P24 located in the same display section may not be driven at the same time (i.e., segment drive).

在一些實施例中,各區段驅動單元E11-E22的控制腳位可各自獨立地電性耦接至控制單元110。換言之,控制單元110可經由不同的接線分別輸出禁能訊號Sd或致能訊號Se至各區段驅動單元E11-E22的控制腳位。在另一些實施例中,此些區段驅動單元E11-E22中彼此相鄰且電性耦接至位於不同列之畫素單元P11-P24可共用同一接線電性耦接至控制單元110。舉例而言,如圖1所示,區段驅動單元E11的控制腳位、區段驅動單元E21的控制腳位可共用同一接線電性耦接至控制單元110,且區段驅動單元E12的控制腳位、區段驅動單元E22的控制腳位可共用同一接線電性耦接至控制單元110。In some embodiments, the control pins of each of the segment driving units E11-E22 can be electrically coupled to the control unit 110 independently. In other words, the control unit 110 can output the disable signal Sd or the enable signal Se to the control pins of the segment drive units E11-E22 via different wires. In other embodiments, the pixel units E11-E22 adjacent to each other and electrically coupled to the pixel units P11-P24 located in different columns may be electrically coupled to the control unit 110 by the same wiring. For example, as shown in FIG. 1, the control pin of the segment driving unit E11 and the control pin of the segment driving unit E21 can be electrically coupled to the control unit 110 by the same wiring, and the control of the segment driving unit E12. The pin and the control pin of the segment driving unit E22 can be electrically coupled to the control unit 110 by sharing the same wire.

在一些實施例中,區段驅動單元E11-E12可響應致能訊號Se產生掃描訊號Ss,並且響應禁能訊號Sd不產生掃描訊號Ss。In some embodiments, the segment driving units E11-E12 can generate the scanning signal Ss in response to the enable signal Se, and the scanning signal Ss is not generated in response to the disable signal Sd.

圖3為圖2中步驟S400之一實施例的流程示意圖。請參閱圖1至圖3,在步驟S400之一實施例中,當控制單元110判定區段驅動單元E11所電性耦接的各畫素單元P11、P12所對應的第一灰階資料I11、I12與第二灰階資料I21、I22相同時,控制單元110產生禁能訊號Sd給區段驅動單元E11(步驟S410)。區段驅動單元E11接收禁能訊號Sd並根據禁能訊號Sd不輸出掃描訊號Ss給各畫素單元P11、P12(步驟S420),進而使得各畫素單元P11、P12無法根據掃描訊號Ss來載入對應的第一灰階資料I11、I12。FIG. 3 is a schematic flow chart of an embodiment of step S400 in FIG. Referring to FIG. 1 to FIG. 3, in an embodiment of step S400, the control unit 110 determines the first grayscale data I11 corresponding to each of the pixel units P11 and P12 electrically coupled to the segment driving unit E11, When I12 is the same as the second gray scale data I21, I22, the control unit 110 generates the disable signal Sd to the sector drive unit E11 (step S410). The segment drive unit E11 receives the disable signal Sd and does not output the scan signal Ss to the pixel units P11 and P12 according to the disable signal Sd (step S420), so that the pixel units P11 and P12 cannot be loaded according to the scan signal Ss. The corresponding first gray scale data I11, I12 are entered.

圖4為圖2中步驟S500之第二實施例的流程示意圖。請參閱圖1至圖4,在一實施例中,當控制單元110判定區段驅動單元E11所電性耦接的任一畫素單元P11、P12所對應的第一灰階資料I11、I12與第二灰階資料I21、I22不相同時,控制單元110產生致能訊號Se給區段驅動單元E11(步驟S510)。區段驅動單元E11接收致能訊號Se並根據致能訊號Se輸出掃描訊號Ss給各畫素單元P11、P12(步驟S520),進而使得各畫素單元P11、P12根據掃描訊號Ss載入對應的第一灰階資料I11、I12(步驟S530)。FIG. 4 is a schematic flow chart of the second embodiment of step S500 of FIG. 2. Referring to FIG. 1 to FIG. 4, in an embodiment, when the control unit 110 determines the first grayscale data I11, I12 corresponding to any of the pixel units P11 and P12 electrically coupled to the segment driving unit E11, When the second gray scale data I21, I22 are different, the control unit 110 generates the enable signal Se to the segment drive unit E11 (step S510). The segment drive unit E11 receives the enable signal Se and outputs the scan signal Ss to the pixel units P11 and P12 according to the enable signal Se (step S520), so that the pixel units P11 and P12 are loaded according to the scan signal Ss. The first gray scale data I11, I12 (step S530).

在一些實施例中,致能訊號Se與禁能訊號Sd可為同一個控制訊號的二個不同準位。舉例而言,控制單元110可以低準位的控制訊號來禁能區段驅動單元E11,且以高準位的控制訊號來致能區段驅動單元E11,但本發明並不以此為限。In some embodiments, the enable signal Se and the disable signal Sd can be two different levels of the same control signal. For example, the control unit 110 can disable the segment driving unit E11 by using a low-level control signal, and enable the segment driving unit E11 with a high-level control signal, but the invention is not limited thereto.

圖5為圖4中步驟S520之一實施例的流程示意圖。圖6為區段驅動單元之第一實施例的概要示意圖。圖7為圖6中之導通訊號Q1、掃描訊號Ss與穩壓訊號P之一實施例的波形示意圖。FIG. 5 is a schematic flow chart of an embodiment of step S520 in FIG. Figure 6 is a schematic diagram of a first embodiment of a segment drive unit. FIG. 7 is a waveform diagram of an embodiment of the communication number Q1, the scanning signal Ss, and the voltage stabilization signal P in FIG.

請參閱圖1至圖6,在一實施例中,各區段驅動單元E11可包含至少二個電晶體(以下分別稱之為第一電晶體M1與第二電晶體M2)。Referring to FIG. 1 to FIG. 6, in an embodiment, each segment driving unit E11 may include at least two transistors (hereinafter referred to as a first transistor M1 and a second transistor M2, respectively).

在各區段驅動單元E11中,第一電晶體M1的第一端電性耦接至控制單元110,且第一電晶體M1的控制端接收一導通訊號Q1。第二電晶體M2的第二端電性耦接至一地電壓gnd,且第二電晶體M2的控制端接收一穩壓電壓P。第一電晶體M1的第二端與第二電晶體M2的第一端互相連接以輸出掃描訊號Ss至畫素單元P11、P12。於此,第一電晶體M1的第一端即為前述之區段驅動單元E11的控制腳位。In each of the segment drive units E11, the first end of the first transistor M1 is electrically coupled to the control unit 110, and the control end of the first transistor M1 receives a pilot communication number Q1. The second end of the second transistor M2 is electrically coupled to a ground voltage gnd, and the control terminal of the second transistor M2 receives a regulated voltage P. The second end of the first transistor M1 and the first end of the second transistor M2 are connected to each other to output a scan signal Ss to the pixel units P11, P12. Here, the first end of the first transistor M1 is the control pin of the segment drive unit E11 described above.

當控制單元110致能區段驅動單元E11時,控制單元110輸出致能訊號Se至第一電晶體M1的第一端(即區段驅動單元E11的控制腳位),以致使區段驅動單元E11根據導通訊號Q1與穩壓訊號P產生掃描訊號Ss來驅動各畫素單元P11、P12(步驟520a)。When the control unit 110 enables the segment driving unit E11, the control unit 110 outputs the enable signal Se to the first end of the first transistor M1 (ie, the control pin of the segment driving unit E11) to cause the segment driving unit. E11 drives the respective pixel units P11, P12 according to the pilot signal number Q1 and the voltage-stamping signal P to generate the scanning signal Ss (step 520a).

在一些實施例中,如圖7所示,導通訊號Q1與穩壓訊號P分別具有導通期間(高準位)與截止期間(低準位),且導通訊號Q1的導通期間是與穩壓訊號P的導通期間彼此交錯。換言之,當導通訊號Q1導通區段驅動單元E11的第一電晶體M1時,穩壓訊號P可禁能區段驅動單元E11的第二電晶體M2,且當穩壓訊號P導通區段驅動單元E11的第二電晶體M2時,導通訊號Q1則可禁能區段驅動單元E11的第一電晶體M1,藉此可使得區段驅動單元E11輸出至畫素單元P11、P12的準位(掃描訊號Ss)更加穩定。In some embodiments, as shown in FIG. 7, the conduction signal number Q1 and the voltage stabilization signal P have an on period (high level) and an off period (low level), respectively, and the conduction period of the communication number Q1 is a voltage stabilization signal. The conduction periods of P are staggered with each other. In other words, when the pilot signal Q1 turns on the first transistor M1 of the segment driving unit E11, the voltage stabilizing signal P can disable the second transistor M2 of the segment driving unit E11, and when the voltage stabilizing signal P turns on the segment driving unit When the second transistor M2 of E11 is used, the communication number Q1 can disable the first transistor M1 of the segment driving unit E11, thereby enabling the segment driving unit E11 to output to the level of the pixel units P11 and P12 (scanning) Signal Ss) is more stable.

舉例來說,當控制單元110致能區段驅動單元E11(即第一電晶體M1的第一端接收到致能訊號Se)時,導通訊號Q1導通第一電晶體M1,且穩壓訊號P禁能第二電晶體M2,以致第一電晶體M1與第二電晶體M2之間的相接處輸出掃描訊號Ss給畫素單元P11、P12。反之,當控制單元110禁能區段驅動單元E11(即第一電晶體M1的第一端接收到禁能訊號Sd)時,導通訊號Q1禁能第一電晶體M1,且穩壓訊號P導通第二電晶體M2,以致第一電晶體M1與第二電晶體M2之間的相接處不輸出掃描訊號Ss給畫素單元P11、P12。For example, when the control unit 110 enables the segment driving unit E11 (ie, the first terminal of the first transistor M1 receives the enable signal Se), the communication number Q1 turns on the first transistor M1, and the voltage stabilization signal P The second transistor M2 is disabled, so that the interface between the first transistor M1 and the second transistor M2 outputs the scanning signal Ss to the pixel units P11, P12. On the contrary, when the control unit 110 disables the segment driving unit E11 (ie, the first terminal of the first transistor M1 receives the disable signal Sd), the communication number Q1 disables the first transistor M1, and the voltage stabilization signal P is turned on. The second transistor M2 is such that the interface between the first transistor M1 and the second transistor M2 does not output the scanning signal Ss to the pixel units P11, P12.

請參閱圖1至圖7,在一實施例中,當第一電晶體M1的第一端所接收的控制訊號為致能訊號Se(即區段驅動單元E11被致能)時,區段驅動單元E11在導通訊號Q1之導通期間中所輸出之掃描訊號Ss可為高準位,以驅動電性耦接的各畫素單元P11、P12經由對應的資料線D1、D2載入第一灰階資料I11、I12。反之,當第一電晶體M1的第一端所接收的控制訊號為禁能訊號Sd(即區段驅動單元E11被禁能)時,區段驅動單元E11在導通訊號Q1之導通期間中所輸出之掃描訊號Ss則為低準位,以不驅動電性耦接的各畫素單元P11、P12載入第一灰階資料I11、I12。Referring to FIG. 1 to FIG. 7 , in an embodiment, when the control signal received by the first end of the first transistor M1 is the enable signal Se (ie, the segment drive unit E11 is enabled), the segment drive The scanning signal Ss outputted by the unit E11 during the conduction period of the communication number Q1 can be a high level to drive the electrically coupled pixel units P11 and P12 to load the first gray level via the corresponding data lines D1 and D2. Information I11, I12. On the contrary, when the control signal received by the first end of the first transistor M1 is the disable signal Sd (ie, the segment driving unit E11 is disabled), the segment driving unit E11 outputs during the conduction period of the communication number Q1. The scan signal Ss is a low level, and the first gray scale data I11, I12 are loaded by the pixel units P11 and P12 that do not drive the electrical coupling.

此外,於此是以高準位來表示各訊號的導通期間,且以低準位表示各訊號的截止期間,但本發明並非以此為限。In addition, the on-period of each signal is indicated by a high level, and the off-period of each signal is indicated by a low level, but the invention is not limited thereto.

在一實施例中,各畫素單元P11-P12包括畫素開關Mp以及儲存電容Cst。畫素開關Mp的控制端電性耦接第一電晶體M1的第二端與第二電晶體M2的第一端。畫素開關Mp的第一端電性耦接對應的資料線D1/D2,並接收來自資料線D1/D2的灰階資料。儲存電容Cst電性耦接在畫素開關Mp的第二端與接地之間。當畫素開關Mp的控制端接收到高準位的掃描訊號Ss時,畫素開關Mp導通以將第一灰階資料I11/I12載入至儲存電容Cst。In an embodiment, each of the pixel units P11-P12 includes a pixel switch Mp and a storage capacitor Cst. The control terminal of the pixel switch Mp is electrically coupled to the second end of the first transistor M1 and the first end of the second transistor M2. The first end of the pixel switch Mp is electrically coupled to the corresponding data line D1/D2, and receives gray scale data from the data line D1/D2. The storage capacitor Cst is electrically coupled between the second end of the pixel switch Mp and the ground. When the control terminal of the pixel switch Mp receives the high-level scan signal Ss, the pixel switch Mp is turned on to load the first gray-scale data I11/I12 to the storage capacitor Cst.

圖8為以區段驅動單元E11為例之第二實施例的概要示意圖。圖9為圖8中之導通訊號、掃描訊號與穩壓訊號之一實施例的波形示意圖。請參閱圖1至圖5、圖8及圖9,在一實施例中,區段驅動單元E11可更包含一電容C1。在區段驅動單元E11中,此電容C1電性耦接在第一電晶體M1的控制端與第一電晶體M1的第二端之間,例如:電容C1的第一端電性耦接第一電晶體M1的控制端與導通訊號Q1,電容C1的第二端電性耦接第一電晶體M1的第二端與第二電晶體M2的第一端。於此,電容C1可用以抬升輸入至第一電晶體M1之控制端的導通訊號Q1之準位。舉例而言,在控制單元110輸出禁能訊號Sd時,導通訊號Q1可為高準位,且導通訊號Q1之準位可為一第一值V1。接著,當控制單元110輸出致能訊號Se時,導通訊號Q1之準位便可受到電容C1之影響而抬升至一第二值V2,進而使得經由第一電晶體M1的第二端與第二電晶體M2的第一端輸出的掃描訊號Ss的準位可不受到第一電晶體M1的臨界電壓(threshold voltage)的影響。於此,第一值V1小於第一電晶體M1的臨界電壓,且第二值V2大於第一電晶體M1的臨界電壓和第一值V1的總和,但本發明並非僅限於此。FIG. 8 is a schematic diagram showing a second embodiment in which the segment driving unit E11 is taken as an example. FIG. 9 is a waveform diagram of an embodiment of the communication number, the scanning signal, and the voltage stabilization signal of FIG. 8. Referring to FIG. 1 to FIG. 5, FIG. 8 and FIG. 9, in an embodiment, the segment driving unit E11 may further include a capacitor C1. In the segment driving unit E11, the capacitor C1 is electrically coupled between the control end of the first transistor M1 and the second end of the first transistor M1. For example, the first end of the capacitor C1 is electrically coupled. The second end of the first transistor M1 and the second end of the second transistor M2 are electrically coupled to the second end of the first transistor M1. Here, the capacitor C1 can be used to raise the level of the conduction number Q1 input to the control terminal of the first transistor M1. For example, when the control unit 110 outputs the disable signal Sd, the communication number Q1 can be a high level, and the level of the communication number Q1 can be a first value V1. Then, when the control unit 110 outputs the enable signal Se, the level of the communication number Q1 can be raised to a second value V2 by the capacitor C1, thereby making the second end and the second through the first transistor M1. The level of the scanning signal Ss outputted by the first end of the transistor M2 may not be affected by the threshold voltage of the first transistor M1. Here, the first value V1 is smaller than the threshold voltage of the first transistor M1, and the second value V2 is greater than the sum of the threshold voltage of the first transistor M1 and the first value V1, but the present invention is not limited thereto.

圖10為以區段驅動單元E11為例之第三實施例的概要示意圖,且圖11為圖10中之導通訊號、掃描訊號、穩壓訊號、時脈訊號與反時脈訊號之一實施例的波形示意圖。10 is a schematic diagram of a third embodiment of the segment driving unit E11, and FIG. 11 is an embodiment of the communication number, the scanning signal, the voltage stabilization signal, the clock signal, and the inverse clock signal in FIG. Waveform diagram.

在一些實施例中,區段驅動單元E11可更包含第三電晶體M3。在區段驅動單元E11中,第三電晶體M3的第一端電性耦接在第二電晶體M2和第一電晶體M1的相接處(例如:第一電晶體M1的第二端與第二電晶體M2的第一端)。換言之,於本實施例中,第三電晶體M3的第一端也電性耦接電容C1的第二端,電容C1的第一端電性耦接第一電晶體M1的控制端與導通訊號Q1。第三電晶體M3的第二端電性耦接在地電壓gnd。第三電晶體M3的的控制端電性耦接一反時脈訊號XCK。其中,反時脈訊號XCK反相於一時脈訊號CK。於此,第三電晶體M3與反時脈訊號XCK可用以協助穩定區段驅動單元E11輸出至畫素單元P11-P12的掃描訊號Ss之準位。In some embodiments, the segment driving unit E11 may further include a third transistor M3. In the segment driving unit E11, the first end of the third transistor M3 is electrically coupled to the junction of the second transistor M2 and the first transistor M1 (eg, the second end of the first transistor M1 and The first end of the second transistor M2). In other words, in the embodiment, the first end of the third transistor M3 is also electrically coupled to the second end of the capacitor C1. The first end of the capacitor C1 is electrically coupled to the control end of the first transistor M1 and the communication number. Q1. The second end of the third transistor M3 is electrically coupled to the ground voltage gnd. The control terminal of the third transistor M3 is electrically coupled to an inverse clock signal XCK. The anti-clock signal XCK is inverted to a clock signal CK. Here, the third transistor M3 and the inverse clock signal XCK can be used to assist the stable segment driving unit E11 to output the level of the scanning signal Ss to the pixel units P11-P12.

在一實施例中,提供給區段驅動單元E11-E22的第一電晶體M1的控制端的導通訊號Q1-Q2可由閘極驅動電路130或額外設置的訊號產生器產生。In an embodiment, the conduction numbers Q1-Q2 of the control terminals of the first transistor M1 provided to the segment drive units E11-E22 may be generated by the gate drive circuit 130 or an additionally provided signal generator.

在一實施例中,請參照圖1,畫素陣列裝置100可更包含至少一閘極驅動電路130,且各閘極驅動電路130電性耦接於至少一區段驅動單元E11-E22中的至少一者。閘極驅動電路130可用以產生導通訊號Q1-Q2並輸出導通訊號Q1-Q2到至少一區段驅動單元E11-E22中之第一電晶體M1的控制端。In an embodiment, referring to FIG. 1 , the pixel array device 100 further includes at least one gate driving circuit 130 , and each gate driving circuit 130 is electrically coupled to the at least one segment driving unit E11-E22. At least one. The gate driving circuit 130 can be used to generate the conduction number Q1-Q2 and output the conduction number Q1-Q2 to the control terminal of the first transistor M1 of the at least one segment driving unit E11-E22.

在一些實施例中,畫素陣列裝置100可更包含複數掃描線G1-G2。掃描線G1-G2交錯於資料線D1-D4,以定義出複數個畫素區域A。此些畫素單元P11-P24則分別位於此些畫素區域A中。各掃瞄線G1-G2電性耦接於閘極驅動電路130與對應的區段驅動單元E11-E22。舉例來說,掃描線G1電性耦接在閘極驅動電路130與第一列的區段驅動單元E11-E12之間。掃描線G2電性耦接在閘極驅動電路130與第二列的區段驅動單元E21-E22之間。並且,依此類推之。換言之,同一列的畫素單元P11-P14經由各自對應的區段驅動單元E11-E12電性連接至同一掃描線G1-G2。舉例來說,掃描線G1電性耦接第一列的所有區段驅動單元E11-E12。掃描線G2電性耦接第二列的所有區段驅動單元E21-E22。並且,依此類推之。也就是說,第一列的畫素單元P11-P14經由各自對應的區段驅動單元E11-E12電性連接至掃描線G1。第二列的畫素單元P21-P24經由各自對應的區段驅動單元E21-E22電性連接至掃描線G2。並且,依此類推之。In some embodiments, the pixel array device 100 can further include a plurality of scan lines G1-G2. Scan lines G1-G2 are interleaved on data lines D1-D4 to define a plurality of pixel areas A. The pixel units P11-P24 are located in the pixel areas A, respectively. Each of the scan lines G1-G2 is electrically coupled to the gate drive circuit 130 and the corresponding segment drive unit E11-E22. For example, the scan line G1 is electrically coupled between the gate drive circuit 130 and the segment drive units E11-E12 of the first column. The scan line G2 is electrically coupled between the gate drive circuit 130 and the segment drive units E21-E22 of the second column. And, and so on. In other words, the pixel units P11-P14 of the same column are electrically connected to the same scan line G1-G2 via the respective corresponding segment drive units E11-E12. For example, the scan line G1 is electrically coupled to all of the segment drive units E11-E12 of the first column. The scan line G2 is electrically coupled to all of the segment drive units E21-E22 of the second column. And, and so on. That is, the pixel units P11-P14 of the first column are electrically connected to the scan line G1 via the respective corresponding segment drive units E11-E12. The pixel units P21-P24 of the second column are electrically connected to the scanning line G2 via respective corresponding segment driving units E21-E22. And, and so on.

於此,閘極驅動電路130所產生的導通訊號Q1經由掃描線G1輸入至對應的區段驅動單元E11-E12中的第一電晶體M1的控制端,並且其所產生的導通訊號Q2經由掃描線G2輸入至對應的區段驅動單元E21-E22中之第一電晶體M1的控制端。Here, the conduction number Q1 generated by the gate driving circuit 130 is input to the control terminal of the first transistor M1 in the corresponding segment driving unit E11-E12 via the scanning line G1, and the generated communication number Q2 is scanned. The line G2 is input to the control terminal of the first transistor M1 of the corresponding sector drive unit E21-E22.

此外,在一些實施例中,閘極驅動電路130可更用以產生穩壓訊號P,且閘極驅動電路130電性耦接並輸出穩壓訊號P到區段驅動單元E11-E22中之第二電晶體M2的控制端。In addition, in some embodiments, the gate driving circuit 130 can be further used to generate the voltage stabilizing signal P, and the gate driving circuit 130 is electrically coupled and outputs the voltage stabilizing signal P to the segment driving unit E11-E22. The control terminal of the second transistor M2.

在一實施例中,閘極驅動電路130可根據一時脈訊號CK作動,並且依據時脈訊號CK產生導通訊號Q1-Q2與穩壓訊號P。In an embodiment, the gate driving circuit 130 can be activated according to a clock signal CK, and generate the conduction number Q1-Q2 and the voltage stabilization signal P according to the clock signal CK.

在一些實施例中,於步驟S520或步驟S520a之前,畫素陣列裝置100即可利用閘極驅動電路130產生導通訊號Q1-Q2與穩壓訊號P給區段驅動單元E11-E22,以使得各區段驅動單元E11-E22被致能後即可根據導通訊號Q1-Q2與穩壓訊號P產生掃描訊號Ss來驅動所電性耦接的畫素單元P11-P24載入對應的第一灰階資料I11-I14。In some embodiments, before step S520 or step S520a, the pixel array device 100 can generate the conduction number Q1-Q2 and the voltage stabilization signal P to the segment driving units E11-E22 by using the gate driving circuit 130, so that each After the segment drive unit E11-E22 is enabled, the scan signal Ss can be generated according to the conduction signal number Q1-Q2 and the voltage stabilization signal P to drive the electrically coupled pixel units P11-P24 to load the corresponding first gray scale. Information I11-I14.

在一些實施例中,閘極驅動電路130可為GOA(Gate On Array)電路,但本發明並非以此為限,閘極驅動電路130亦可為任何合適的訊號產生器。In some embodiments, the gate driving circuit 130 can be a GOA (Gate On Array) circuit, but the invention is not limited thereto, and the gate driving circuit 130 can also be any suitable signal generator.

需注意的是,以上雖是以各區段驅動單元E11-E22電性耦接兩個畫素單元P11-P24(即各區段驅動單元E11-E22用以驅動二個畫素單元P11-P24)為例,但本發明並非以此為限,舉例來說,如圖12所示,區段驅動單元E11-E22的數量可和畫素單元P11-P22的數量相同,且各區段驅動單元E11-E22是以一對一之方式電性耦接對應的畫素單元P11-P22。或者,各區段驅動單元E11-E22可電性耦接三個或三個以上畫素單元P11-P24。再者,於此所揭之各區段驅動單元E11-E22所電性耦接之畫素單元P11-P24的數量雖皆相同,但本發明並非以此為限。換言之,各區段驅動單元E11-E22所電性耦接之畫素單元P11-P24的數量亦可彼此不相同。It should be noted that although the above, the segment driving units E11-E22 are electrically coupled to the two pixel units P11-P24 (ie, the segment driving units E11-E22 are used to drive the two pixel units P11-P24). For example, the present invention is not limited thereto. For example, as shown in FIG. 12, the number of segment driving units E11-E22 may be the same as the number of pixel units P11-P22, and each segment driving unit The E11-E22 is electrically coupled to the corresponding pixel units P11-P22 in a one-to-one manner. Alternatively, each of the segment driving units E11-E22 may be electrically coupled to three or more pixel units P11-P24. The number of pixel units P11-P24 electrically coupled to each of the segment drive units E11-E22 is the same, but the invention is not limited thereto. In other words, the number of pixel units P11-P24 electrically coupled to each of the segment driving units E11-E22 may also be different from each other.

綜上所述,本發明實施例之畫素陣列裝置與分段驅動方法,其將各掃描線上的畫素單元分區段並判斷各區段中各畫素單元所對應的灰階資料是否需要更新,並於需要更新時才輸入灰階資料,以分區段刷新顯示影像,進而節省不必要的功耗。In summary, the pixel array device and the segment driving method of the embodiment of the present invention divide a pixel unit on each scan line into segments and determine whether gray scale data corresponding to each pixel unit in each segment needs to be updated. And input grayscale data when it needs to be updated, to refresh the display image in sections, thereby saving unnecessary power consumption.

雖然本發明的技術內容已經以較佳實施例揭露如上,然其並非用以限定本發明,任何熟習此技藝者,在不脫離本發明之精神所作些許之更動與潤飾,皆應涵蓋於本發明的範疇內,因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。Although the technical content of the present invention has been disclosed in the above preferred embodiments, it is not intended to limit the present invention, and any modifications and refinements made by those skilled in the art without departing from the spirit of the present invention are encompassed by the present invention. The scope of protection of the present invention is therefore defined by the scope of the appended claims.

100‧‧‧畫素陣列裝置100‧‧‧ pixel array device

110‧‧‧控制單元110‧‧‧Control unit

120‧‧‧儲存單元120‧‧‧ storage unit

130‧‧‧閘極驅動電路130‧‧ ‧ gate drive circuit

C1‧‧‧電容C1‧‧‧ capacitor

CK‧‧‧時脈訊號CK‧‧‧ clock signal

Cst‧‧‧儲存電容Cst‧‧‧ storage capacitor

D1-D4‧‧‧資料線D1-D4‧‧‧ data line

E11-E24‧‧‧區段驅動單元E11-E24‧‧‧ Section Drive Unit

G1-G2‧‧‧掃描線G1-G2‧‧‧ scan line

gnd‧‧‧地電壓Gnd‧‧‧ ground voltage

I11-I14‧‧‧第一灰階資料I11-I14‧‧‧ first grayscale data

I21-I24‧‧‧第二灰階資料I21-I24‧‧‧second grayscale data

M1‧‧‧第一電晶體M1‧‧‧first transistor

M2‧‧‧第二電晶體M2‧‧‧second transistor

M3‧‧‧第三電晶體M3‧‧‧ third transistor

Mp‧‧‧畫素開關Mp‧‧ pixel switch

P‧‧‧穩壓訊號P‧‧‧ voltage regulator signal

P11-P24‧‧‧畫素單元P11-P24‧‧‧ pixel unit

Ss‧‧‧掃描訊號Ss‧‧‧ scan signal

Sd‧‧‧禁能訊號Sd‧‧‧ disable signal

Se‧‧‧致能訊號Se‧‧‧ enable signal

Q1-Q2‧‧‧導通訊號Q1-Q2‧‧‧Direction number

XCK‧‧‧反時脈訊號XCK‧‧‧ anti-clock signal

A‧‧‧畫素區域A‧‧‧ pixel area

V1‧‧‧第一值V1‧‧‧ first value

V2‧‧‧第二值V2‧‧‧ second value

S100~S530‧‧‧步驟S100~S530‧‧‧Steps

圖1為畫素陣列裝置之一實施例的概要示意圖。 圖2為分段驅動方法之一實施例的流程示意圖。 圖3為圖2中步驟S400之一實施例的流程示意圖。 圖4為圖2中步驟S500之第一實施例的流程示意圖。 圖5為圖7中步驟S520之一實施例的流程示意圖。 圖6為區段驅動單元之第一實施例的概要示意圖。 圖7為圖6中之導通訊號、掃描訊號與穩壓訊號之一實施例的波形示意圖。 圖8為區段驅動單元之第二實施例的概要示意圖。 圖9為圖8中之導通訊號、掃描訊號與穩壓訊號之一實施例的波形示意圖。 圖10為區段驅動單元之第三實施例的概要示意圖。 圖11為圖10中之導通訊號、掃描訊號穩壓訊號、時脈訊號與反時脈訊號之一實施例的波形示意圖。 圖12為畫素陣列裝置之另一實施例的概要示意圖。1 is a schematic diagram of an embodiment of a pixel array device. 2 is a schematic flow chart of an embodiment of a segment driving method. FIG. 3 is a schematic flow chart of an embodiment of step S400 in FIG. FIG. 4 is a schematic flow chart of the first embodiment of step S500 of FIG. 2. FIG. 5 is a schematic flow chart of an embodiment of step S520 in FIG. 7. Figure 6 is a schematic diagram of a first embodiment of a segment drive unit. FIG. 7 is a waveform diagram of an embodiment of the communication number, the scanning signal, and the voltage stabilization signal of FIG. 6. Figure 8 is a schematic diagram of a second embodiment of a segment drive unit. FIG. 9 is a waveform diagram of an embodiment of the communication number, the scanning signal, and the voltage stabilization signal of FIG. 8. Figure 10 is a schematic diagram of a third embodiment of a segment drive unit. 11 is a waveform diagram of an embodiment of the pilot communication number, the scan signal voltage stabilization signal, the clock signal, and the inverse clock signal in FIG. Figure 12 is a schematic diagram of another embodiment of a pixel array device.

S100~S500‧‧‧步驟 S100~S500‧‧‧Steps

Claims (12)

一種畫素陣列裝置,包含:複數資料線;複數畫素單元,以陣列形式排列,電性耦接於該複數資料線之一;至少一區段驅動單元,各該區段驅動單元電性耦接該複數畫素單元中相鄰且電性耦接不同該複數資料線的至少一畫素單元;及一控制單元,判斷各該區段驅動單元所電性耦接的各該畫素單元在當前時點所對應的一第一灰階資料與在前一時點所對應的一第二灰階資料是否相同;其中,該控制單元於判斷到相同時禁能該區段驅動單元,以使該區段驅動單元不驅動對應的各該畫素單元經由對應的該資料線載入對應的該第一灰階資料;以及其中,該控制單元於判斷到不相同時致能該區段驅動單元,以使該區段驅動單元驅動對應的各該畫素單元經由對應的該資料線載入對應的該第一灰階資料。 A pixel array device comprising: a plurality of data lines; a plurality of pixel units arranged in an array, electrically coupled to one of the plurality of data lines; at least one segment driving unit, each of the segment driving units being electrically coupled And at least one pixel unit adjacent to the plurality of pixel units and electrically coupled to the plurality of data lines; and a control unit determining that each of the pixel units electrically coupled to each of the segment driving units is Whether the first gray scale data corresponding to the current time point is the same as the second gray scale data corresponding to the previous time point; wherein the control unit disables the segment drive unit when determining the same, so that the area is The segment driving unit does not drive the corresponding pixel unit to load the corresponding first grayscale data via the corresponding data line; and wherein the control unit enables the segment driving unit when determining that the segment driving unit is different And causing each of the pixel units corresponding to the segment driving unit to drive the corresponding first gray scale data via the corresponding data line. 如請求項1所述的畫素陣列裝置,其中各該區段驅動單元包含:一第一電晶體,該第一電晶體的第一端電性耦接該控制單元,該第一電晶體的第二端電性耦接該對應的該至少一畫素單元,且第一電晶體的控制端電性耦接一導通訊號;及一第二電晶體,該第二電晶體的第一端電性耦接該第一電晶體的該第二端與對應的該至少一畫素單元,該第二電晶體的第二端電性耦接一地電 壓,且該第二電晶體的控制端電性耦接一穩壓訊號,其中該導通訊號的導通期間和該穩壓訊號的導通期間交錯。 The pixel array device of claim 1, wherein each of the segment driving units comprises: a first transistor, the first end of the first transistor is electrically coupled to the control unit, the first transistor The second end is electrically coupled to the corresponding at least one pixel unit, and the control end of the first transistor is electrically coupled to the first communication signal; and the second transistor is electrically connected to the first end of the second transistor. The second end of the first transistor is electrically coupled to the corresponding at least one pixel unit, and the second end of the second transistor is electrically coupled to a ground The control terminal of the second transistor is electrically coupled to a voltage stabilizing signal, wherein an on period of the conduction signal is interleaved with an on period of the voltage stabilization signal. 如請求項2所述的畫素陣列裝置,其中各該區段驅動單元更包含:一電容,電性耦接於該第一電晶體的該控制端與該第一電晶體的該第二端之間,用以抬升該導通訊號的準位。 The pixel array device of claim 2, wherein each of the segment driving units further comprises: a capacitor electrically coupled to the control end of the first transistor and the second end of the first transistor Between, to raise the level of the communication number. 如請求項2所述的畫素陣列裝置,更包含:至少一閘極驅動電路,各該閘極驅動電路電性耦接並輸出該導通訊號至至少一該第一電晶體的該控制端,且各該閘極驅動電路電性耦接並輸出該穩壓訊號至至少一該第二電晶體的該控制端。 The pixel array device of claim 2, further comprising: at least one gate driving circuit, each of the gate driving circuits electrically coupled to output the communication signal to the control terminal of the at least one first transistor, And each of the gate driving circuits is electrically coupled to and outputs the voltage stabilizing signal to the control terminal of the at least one second transistor. 如請求項4所述的畫素陣列裝置,其中該至少一閘極驅動電路係根據一時脈訊號產生該導通訊號,各該區段驅動電路更包含:一第三電晶體,該第三電晶體的第一端電性耦接該第一電晶體的該第二端、該第二電晶體的該第一端與對應的該至少一畫素單元,該第三電晶體的第二端電性耦接該地電壓,且該第三電晶體的控制端電性耦接一反時脈訊號,其中該反時脈訊號反相於該時脈訊號。 The pixel array device of claim 4, wherein the at least one gate driving circuit generates the communication signal according to a clock signal, and each of the segment driving circuits further comprises: a third transistor, the third transistor The first end is electrically coupled to the second end of the first transistor, the first end of the second transistor, and the corresponding at least one pixel unit, and the second end of the third transistor is electrically The control circuit of the third transistor is electrically coupled to an inverse clock signal, wherein the inverse clock signal is inverted to the clock signal. 如請求項1所述的畫素陣列裝置,更包含:至少一閘極驅動電路,各該閘極驅動電路電性耦接該至少一區段驅動單元中之至少一者。 The pixel array device of claim 1, further comprising: at least one gate driving circuit, each of the gate driving circuits electrically coupled to at least one of the at least one segment driving unit. 一種分段驅動方法,包含:接收至少一畫素單元在當前時點所對應的至少一第一灰階資料,其中該至少一畫素單元電性耦接一區段區動單元; 從一儲存單元讀出該至少一畫素單元在前一時點所對應的至少一第二灰階資料;判斷各該畫素單元所對應的該第一灰階資料與該第二灰階資料是否相同;當各該畫素單元所對應的該第一灰階資料與該第二灰階資料相同時,禁能該區段驅動單元,以使該區段驅動單元不驅動各該畫素單元載入對應的該第一灰階資料;及當任一該畫素單元所對應的該第一灰階資料與該第二灰階資料不相同時,致能該區段驅動單元,以使該區段驅動單元驅動各該畫素單元載入對應的該第一灰階資料。 A segment driving method includes: receiving at least one first gray level data corresponding to at least one pixel unit at a current time point, wherein the at least one pixel unit is electrically coupled to a segment area moving unit; Reading, by a storage unit, at least one second gray level data corresponding to the at least one pixel unit at a previous time point; determining whether the first gray level data and the second gray level data corresponding to each pixel unit are When the first gray scale data corresponding to each pixel unit is the same as the second gray scale data, the segment driving unit is disabled, so that the segment driving unit does not drive each pixel unit Entering the corresponding first grayscale data; and when the first grayscale data corresponding to any of the pixel units is different from the second grayscale data, enabling the segment driving unit to make the region The segment driving unit drives each of the pixel units to load the corresponding first gray scale data. 如請求項7所述的分段驅動方法,其中該禁能該區段驅動單元的步驟包含:產生一禁能訊號給該區段驅動單元;及由該區段驅動單元根據該禁能訊號不輸出一掃描訊號給各該畫素單元,以使各該畫素單元無法根據該掃描訊號載入對應的該第一灰階資料。 The segment driving method of claim 7, wherein the step of disabling the segment driving unit comprises: generating a disable signal to the segment driving unit; and the segment driving unit does not according to the disable signal A scan signal is output to each of the pixel units, so that each pixel unit cannot load the corresponding first gray scale data according to the scan signal. 如請求項7所述的分段驅動方法,其中該致能該區段驅動單元的步驟包含:產生一致能訊號給該區段驅動單元;由該區段驅動單元根據該致能訊號產生一掃描訊號給各該畫素單元;及由各該畫素單元根據該掃描訊號載入對應的該第一灰階資料。 The segment driving method of claim 7, wherein the step of enabling the segment driving unit comprises: generating a consistent energy signal to the segment driving unit; and generating, by the segment driving unit, a scan according to the enabling signal The signal is given to each of the pixel units; and the corresponding pixel unit loads the corresponding first gray level data according to the scanning signal. 如請求項9所述的分段驅動方法,更包含: 利用一閘極驅動電路產生一導通訊號與一穩壓訊號給該區段驅動單元,該導通訊號的導通期間和該穩壓訊號的導通期間交錯;其中,產生該掃描訊號的步驟包括:由該區段驅動單元根據該致能訊號、該導通訊號與該穩壓訊號產生該掃描訊號。 The segmentation driving method according to claim 9, further comprising: Using a gate driving circuit to generate a pilot signal and a voltage stabilizing signal to the segment driving unit, the conducting period of the pilot signal is interleaved with the conducting period of the voltage stabilizing signal; wherein the step of generating the scan signal includes: The segment driving unit generates the scanning signal according to the enabling signal, the guiding communication number and the voltage stabilization signal. 如請求項7所述的分段驅動方法,更包含:利用一閘極驅動電路產生一導通訊號與一穩壓訊號給該區段驅動單元,該導通訊號的導通期間和該穩壓訊號的導通期間交錯;其中,驅動各該畫素單元的步驟包括:由該區段驅動單元根據該導通訊號與該穩壓訊號驅動各該畫素單元。 The segment driving method of claim 7, further comprising: generating a conduction signal and a voltage stabilization signal to the segment driving unit by using a gate driving circuit, and conducting the conduction period of the conduction signal and the conduction of the voltage stabilization signal Interleaving; wherein the step of driving each of the pixel units comprises: driving, by the segment driving unit, each of the pixel units according to the conduction signal and the voltage stabilization signal. 如請求項7所述的分段驅動方法,其中該至少一畫素單元電性耦接不同資料線。 The segment driving method of claim 7, wherein the at least one pixel unit is electrically coupled to different data lines.
TW105141961A 2016-12-16 2016-12-16 Pixel array device and segment driving method TWI608466B (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
TW105141961A TWI608466B (en) 2016-12-16 2016-12-16 Pixel array device and segment driving method
CN201710037253.XA CN106548743B (en) 2016-12-16 2017-01-18 Pixel array device and segment driving method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW105141961A TWI608466B (en) 2016-12-16 2016-12-16 Pixel array device and segment driving method

Publications (2)

Publication Number Publication Date
TWI608466B true TWI608466B (en) 2017-12-11
TW201824228A TW201824228A (en) 2018-07-01

Family

ID=58398818

Family Applications (1)

Application Number Title Priority Date Filing Date
TW105141961A TWI608466B (en) 2016-12-16 2016-12-16 Pixel array device and segment driving method

Country Status (2)

Country Link
CN (1) CN106548743B (en)
TW (1) TWI608466B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108806582B (en) * 2018-07-02 2021-06-18 上海中航光电子有限公司 Array substrate, electronic paper display panel, driving method and display device thereof

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW201237838A (en) * 2011-03-01 2012-09-16 Chimei Innolux Corp Image display system and method
CN102890907A (en) * 2011-07-18 2013-01-23 群康科技(深圳)有限公司 Pixel element, display panel thereof, and control method thereof
TW201610953A (en) * 2014-09-03 2016-03-16 友達光電股份有限公司 Dynamically adjusting display driving method and display apparatus using the same

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3589649B2 (en) * 2001-12-13 2004-11-17 三菱電機株式会社 Display device
CN103489392A (en) * 2013-10-22 2014-01-01 合肥京东方光电科技有限公司 Time schedule control method, time program controller and display device
JP2016053683A (en) * 2014-09-04 2016-04-14 株式会社リコー Image display device, image display system, image display method, and program
CN105096807B (en) * 2015-09-06 2017-09-29 京东方科技集团股份有限公司 Timing control unit, display panel and driving method, display device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW201237838A (en) * 2011-03-01 2012-09-16 Chimei Innolux Corp Image display system and method
CN102890907A (en) * 2011-07-18 2013-01-23 群康科技(深圳)有限公司 Pixel element, display panel thereof, and control method thereof
TW201610953A (en) * 2014-09-03 2016-03-16 友達光電股份有限公司 Dynamically adjusting display driving method and display apparatus using the same

Also Published As

Publication number Publication date
CN106548743B (en) 2019-06-14
CN106548743A (en) 2017-03-29
TW201824228A (en) 2018-07-01

Similar Documents

Publication Publication Date Title
CN107240372B (en) Display driver circuit and display device including display driver circuit
US20150325200A1 (en) Source driver and display device including the same
KR20160109905A (en) Gate Driver, Display driver circuit and display device comprising thereof
KR20220065166A (en) Display device and method of operating a display device
US10475406B2 (en) Display panel having zigzag connection structure and display device including the same
JP2009025804A (en) Display device and driving method thereof
CN107633796A (en) Display device and the method for refreshing the image that display device produces
US9024859B2 (en) Data driver configured to up-scale an image in response to received control signal and display device having the same
US20130127930A1 (en) Video signal line driving circuit and display device provided with same
JP7114875B2 (en) ELECTRO-OPTICAL DEVICE, ELECTRO-OPTICAL DEVICE CONTROL METHOD, AND ELECTRONIC DEVICE
US12142222B2 (en) Pixel circuit and display device including the pixel circuit for improving resolution
WO2012053466A1 (en) Display device and method of driving same
US12283223B2 (en) Gate driver and display device having the same
US12136373B2 (en) Pixel circuit and display device having the same
TWI608466B (en) Pixel array device and segment driving method
KR20210047399A (en) Power management circuit of a display device, and display device
US20250342796A1 (en) Pixel circuit, display apparatus including the same, and electronic device including the same
US11887528B2 (en) Display device and method of driving display device
US12033583B2 (en) Gate driver and display device having the same
US20080042958A1 (en) Circuits and Methods for Generating a Common Voltage
US11741868B2 (en) Reference voltage generator, display device including the same, and method of driving display device
CN101162335A (en) Gate driver, electro-optical device, electronic instrument, and drive method
US12542082B2 (en) Display apparatus and method of driving display panel using the same
US12525164B2 (en) Display device and method of driving display device
US20250316218A1 (en) Gate driver and display apparatus including the same