TWI697865B - Electronic device with graphics processing computing resource configuration function and control method thereof - Google Patents

Abstract

An electronic device with graphics processing computing resource configuration function and a control method of an electronic device are provided. The electronic device includes a processor, a switching circuit, and an image processing circuit. The processor includes a first processing unit and a second processing unit. The switching circuit is coupled to the first processing unit and the second processing unit. The image processing circuit includes a first graphics processing circuit and a second graphics processing circuit which are respectively connected to the switching circuits. The processor and the image processing circuit are used to run the test program to generate test data. The processor controls the switching circuit according to the test data, which makes the first processing unit be electrically connected to the first graphics processing circuit and the second processing unit be electrically connected to the second graphics processing circuit or makes the first processing unit be electrically connected to the first graphics processing circuit and the second graphics processing circuit.

Description

Electronic device with graphics processing operation resource allocation function and its control method

The present invention relates to an electronic device and a control method of the electronic device, and in particular to an electronic device with a graphics processing operation resource allocation function and a control method thereof.

The electronic device has a processor and an image processing circuit. Generally speaking, when a processor and a plurality of graphics processing circuits of an image processing circuit work together, the resources allocated by the processor to each graphics processing circuit will determine the overall image processing performance. Therefore, there is a need for an electronic device and a control method of the electronic device, which can improve the computing resource allocation method of the processor and the complex graphics processing circuit, and enhance the image processing performance of the overall electronic device.

The embodiment of the present invention provides an electronic device with a graphics processing operation resource allocation function, including a processor, a switching circuit, and an image processing circuit. The processor includes a first processing unit and a second processing unit. The switching circuit connects the first processing unit and the second processing unit. The image processing circuit includes a first graphics processing circuit and a second graphics processing circuit separately connected to the switching circuit. The processor and the image processing circuit are used to run the test program to generate test data, and the processor is used to control the switching circuit according to the test data, so that the first processing unit is electrically connected to the first graphics processing circuit and the second processing unit is electrically connected to the second Graphics processing circuit, or cause the first processing order The element is electrically connected to the first graphics processing circuit and the second graphics processing circuit.

An embodiment of the present invention provides a control method of an electronic device with a graphics processing operation resource allocation function, including: running a test program through a processor and an image processing circuit to generate test data; and according to the test data, the first processing unit of the processor The first graphics processing circuit of the image processing circuit is electrically connected, and the second processing unit of the processor is electrically connected to the second graphics processing circuit of the image processing circuit, or the first processing unit is electrically connected to the first graphics processing circuit and the first graphics processing circuit. 2. Graphics processing circuit.

In summary, the electronic device and the control method of the electronic device with the graphics processing computing resource allocation function provided by the embodiments of the present invention can improve the computing resource allocation method of the complex graphics processing circuit of the processor and the image processing circuit, thereby improving the overall The actual image processing performance of the electronic device. Furthermore, the user of the electronic device can more flexibly match any expansion card and the electronic device can achieve the best actual image processing performance regardless of the expansion card.

100: electronic device

110: processor

111: first processing unit

111A: Port

111B: Port

112: second processing unit

112A: Port

112B: Port

120: switching circuit

130: image processing circuit

131: The first graphics processing circuit

132: The second graphics processing circuit

133: The third graphics processing circuit

140: Expansion card

301: Step

302: Step

[FIGS. 1A-1C] are schematic diagrams of electronic devices with graphics processing and computing resource allocation functions according to some embodiments of the present invention.

[Fig. 2A-2C] is a schematic diagram of an implementation aspect of the electronic device of Fig. 1A-1C.

[FIGS. 3A-3C] are schematic diagrams of another embodiment of the electronic device of FIGS. 1A-1C.

[FIG. 4] is a flowchart of a control method of an electronic device with graphics processing operation resource allocation function according to some embodiments of the present invention.

Figure 1A is a graph processing computing resource allocation function according to an embodiment of the present invention Schematic diagram of the electronic device 100. The electronic device 100 includes a processor 110, a switching circuit 120 and an image processing circuit 130. The switching circuit 120 is connected between the processor 110 and the image processing circuit 130. In FIG. 1A, the processor 110 includes two processing units as an example, and the processor 110 includes a first processing unit 111 and a second processing unit 112. In addition, in FIG. 1A, the image processing circuit 130 includes two graphics processing circuits (such as Graphics Processing Unit, GPU) as an example. The image processing circuit 130 includes a first graphics processing circuit 131 and a second graphics processing circuit 132. As shown in FIG. 1A, the processing units 111 and 112 are connected to the switching circuit 120, and the switching circuit 120 is connected to the graphics processing circuits 131 and 132. The electronic device 100 needs to use graphics processing circuits 131 and 132. In this case, because the processor 110 includes processing units 111 and 112, the processor 110 needs to determine how to configure the processing units 111 and 112 and the graphics processing circuits 131 and 132.

In operation, please refer to FIG. 4 together. In step 301, the processor 110 controls the switching circuit 120 to operate in the first mode, so that the processing units 111, 112 and the graphics processing circuits 131, 132 enter the first mode shown in FIG. 1B. A connection mode is that the first processing unit 111 and the second processing unit 112 are respectively connected to the first graphics processing circuit 131 and the second graphics processing circuit 132 via the switching circuit 120. In this case, the processor 110 and the image processing circuit 130 jointly run the test program in step 301, and generate first test data based on the running of the test program. Subsequently, in step 301, the processor 110 controls the switching circuit 120 to operate in the second mode, so that the processing units 111, 112 and the graphics processing circuits 131, 132 enter the second connection mode as shown in FIG. 1C, that is, the first connection mode. The processing unit 111 is connected to the first graphics processing circuit 131 and the second graphics processing circuit 132 via the switching circuit 120, and the second processing unit 112 is not connected to any graphics processing circuit 131, 132. Similarly, based on the second connection mode, the processor 110 and the image processing circuit 130 jointly run the test program in step 301, and generate based on the running of the test program The second test data.

Further, in step 302, the processor 110 first compares the first test data with the second test data. If the processor 110 determines that the actual image processing performance of the first test data corresponding to the processor 110 and the image processing circuit 130 is better than the actual image processing performance of the second test data corresponding to the processor 110 and the image processing circuit 130, the processor 110 In step 302, the switching circuit 120 is controlled to make the processing units 111, 112 and the graphics processing circuits 131, 132 enter the first connection mode corresponding to the first test data (as shown in FIG. 1B); on the contrary, if the processor 110 determines the second test The actual image processing performance corresponding to the data is better than the actual image processing performance corresponding to the first test data. Then the processor 110 controls the switching circuit 120 in step 302 to make the processing units 111, 112 and the graphics processing circuits 131, 132 enter the corresponding second test The second connection mode of the data (as shown in Figure 1C).

Based on the content of the above-mentioned embodiments, the electronic device 100 can automatically determine the optimal configuration mode between the processing units 111 and 112 of the processor 110 and the graphics processing circuits 131 and 132 of the image processing circuit 130. Specifically, the electronic device 100 can run various test programs according to requirements, and can control the switching circuit 120 through the processor 110 according to the test data generated by the various test programs, and automatically enable the processing units 111 and 112 of the processor 110 to perform image processing. The graphics processing circuits 131 and 132 of the circuit 130 have the best configuration to produce better actual image processing performance.

In some embodiments, when the processor 110 and the image processing circuit 130 jointly run the test program, the processor 110 may control the switching circuit 120 so that the processing units 111, 112 and the graphics processing circuits 131, 132 enter the data shown in FIG. 1C first. The second connection mode, and the test data is generated in the second connection mode. Subsequently, the processor 110 controls the switching circuit 120 to The processing units 111, 112 and the graphics processing circuits 131, 132 first enter the first connection mode as shown in FIG. 1B, and generate test data in the first connection mode.

In some embodiments, the aforementioned test program includes a sequence of switching between the first connection mode and the second connection mode. For example, the first connection mode has priority over the second connection mode. The processor 110 first controls the switching circuit 120 to operate in the first mode based on the switching sequence included in the test program, so that the processing units 111, 112 and the graphics processing circuits 131, 132 enter the first connection mode as shown in FIG. 1B. The processor 110 Cooperating with the image processing circuit 130 to run the test program based on the first connection mode and generate the first test data; after the first test data is generated, the processor 110 controls the switching circuit 120 to switch to the second mode, so that the processing units 111, 112 and the graphics processing circuits 131 and 132 enter the second connection mode as illustrated in FIG. 1C, and the processor 110 and the image processing circuit 130 cooperate to run the test program based on the second connection mode, and generate second test data. The processor 110 compares the first test data and the second test data, and determines how to configure the processing units 111 and 112 and the graphics processing circuits 131-132 based on the comparison result.

In some embodiments, the electronic device 100 may further include a memory unit. The memory unit stores a list of switching sequences of different connection modes. When the processor 110 and the image processing circuit 130 cooperate to run the test program, the processor 110 reads The memory unit is taken to obtain the switching sequence of different connection modes stored in the memory unit, and the processor 110 controls the switching circuit 120 based on the switching sequence of the different connection modes stored in the memory unit, and the memory unit stores the first The switching sequence of the two connection modes and the second connection mode is taken as an example. The processing units 111, 112 and the graphics processing circuits 131, 132 enter the first connection mode and the second connection mode according to the switching sequence of the different connection modes stored in the memory unit. Connection mode. For example, if the memory unit stores the second connection mode in preference to the first connection mode, the processor 110 first controls the switching circuit 120 operates in the second mode, so that the processing units 111 and 112 and the graphics processing circuits 131 and 132 enter the second connection mode as illustrated in FIG. 1C, thereby generating second test data. In the same way, after generating the second test data, the processor 110 controls the switching circuit 120 to switch to the first mode, so that the processing units 111, 112 and the graphics processing circuits 131, 132 enter the first connection mode as illustrated in FIG. 1B. In order to generate the first test data. The processor 110 then determines how to configure the processing units 111 and 112 and the graphics processing circuits 131-132 based on the first test data and the second test data.

In other embodiments, each graphics processing circuit 131-132 has different preset image processing performance, and the aforementioned memory unit prestores a plurality of preset codes and/or models of different graphics processing circuits and corresponding The default image processing performance. When the processor 110 and the image processing circuit 130 are running the test program in cooperation, the processor 110 can read the memory unit according to the code and/or model of the graphics processing circuit 131-132, and compare the code and the code of the graphics processing circuit 131-132. / Or the model and the preset code and/or model to obtain the preset image processing performance of each graphics processing circuit 131-132, and the processor 110 should control first according to the preset image processing performance of the graphics processing circuit 131-132 The switching circuit 120 enters the first mode or the second mode, which will not be repeated here.

In some embodiments, the switching circuit 120 includes a plurality of switching elements, thereby being controlled by the processor 110 to switch the graphics processing circuits 131-132 connecting the processing units 111, 112 and the image processing circuit 130 to display corresponding various Various connection relationships of connection modes, such as the aforementioned first connection mode and second connection mode. In some embodiments, the switching circuit 120 includes a re-timer. In this situation, the processor 110 can control the retimer to compensate for the data delay caused by different paths, so as to obtain more accurate actual image processing performance.

2A-2C and 3A-3C are electronic devices according to another embodiment of the present invention Schematic diagram of set 100. Please refer to FIGS. 2A-2C and 3A-3C together. The difference between FIGS. 2A-2C and 3A-3C and FIGS. 1A-1C is that the electronic device 100 further includes an expansion card 140, which can be a host bus interface ( Host Bus Adapter; HBA) card or Redundant Array of Independent Disks (RAID) card. In addition, the image processing circuit 130 includes three graphics processing circuits 131-133. The expansion card 140 is connected to the switching circuit 120, and the switching circuit 120 is connected to the graphics processing circuits 131-133. Based on this, the processor 110 needs to determine how to configure the connection between the processing units 111, 112 and the graphics processing circuits 131-133, so as to adjust the processing units 111, 112 and the graphics processing circuits 131-133 according to different expansion cards 140. Between the connection. Furthermore, according to different expansion cards 140, the processor 110 can configure the processing units 111 and 112 to be fully loaded or under-loaded with different connection combinations.

In detail, as shown in FIGS. 2A-2C and 3A-3C, the first processing unit 111 of the processor 110 has two ports 111A, 111B, and the second processing unit 112 of the processor 110 has two ports 112A, 112B The expansion card 140 and the image processing circuit 130 share the ports 111A, 111B, 112A, and 112B of the processor 110. That is, the ports 111A, 111B, 112A, and 112B of the processor 110 can be connected to the graphics processing circuits 131-133 and Any one of expansion cards 140. Wherein, the fully loaded connection of the processor 110 means that all the ports 111A, 111B, 112A, and 112B of the processor 110 are respectively connected to any one of the graphics processing circuits 131-133 and the expansion card 140; further, the processor The configuration of 110 as a non-full connection means that at least one of the four ports 111A, 111B, 112A, and 112B of the processor 110 is not connected to any one of the graphics processing circuits 131-133 and the expansion card 140. The processor 110 can control the configuration of the switching circuit 120 to configure each processing unit 111, 112 and the graphics processing circuits 131-133 to form a fully loaded connection or an underloaded connection. Furthermore, the processor 110 can be based on the The connection changes the configuration of the switching circuit 120 to form multiple connection combinations between the processing units 111, 112 and the graphics processing circuits 131-133 corresponding to various connection modes, which are fully loaded or not fully loaded.

For example, taking one of the first processing units 111 of the processor 110 fixedly connected to the expansion card 140 via the switching circuit 120 as an example, as shown in FIG. 2A, one of the ports 111A of the first processing unit 111 is switched through The circuit 120 is fixedly connected to the expansion card 140, the other port 111B of the first processing unit 111 is connected to the first graphics processing circuit 131 through the switching circuit 120, and the two ports 112A and 112B of the second processing unit 112 are switched through The circuit 120 is respectively connected to the graphics processing circuits 132 and 133, that is, all the ports 111A, 111B, 112A, and 112B of the processor 110 are respectively connected to any one of the graphics processing circuits 131-133 and the expansion card 140. The aforementioned The connection forms a fully loaded first connection mode; then, taking one of the ports 111A of the aforementioned first processing unit 111 fixedly connected to the expansion card 140 via the switching circuit 120 as an example, the processor 110 changes the switching circuit 120 based on the fully loaded connection The configuration, as shown in FIG. 2B, causes the port 111B of the first processing unit 111 to be changed to be connected to the second graphics processing circuit 132 via the switching circuit 120, and the ports 112A and 112B of the second processing unit 112 are changed to be connected to the second graphics processing circuit 132 via the switching circuit. The circuit 120 is connected to the graphics processing circuits 131 and 133; therefore, all the ports 111A, 111B, 112A, and 112B of the processor 110 are respectively connected to any one of the graphics processing circuits 131-133 and the expansion card 140. The aforementioned connection A fully loaded second connection mode is formed; in the same way, one of the ports 111A of the aforementioned first processing unit 111 is fixedly connected to the expansion card 140 via the switching circuit 120 as an example, the processor 110 then changes the switching circuit 120 based on the fully loaded connection The configuration, as shown in Figure 2C, causes the port 111B of the first processing unit 111 to be changed to be connected to the third graphics processing circuit 133 via the switching circuit 120, and the ports 112A and 112B of the second processing unit 112 to be changed to via The switching circuit 120 is connected to the graphics processing circuits 131 and 132; All the ports 111A, 111B, 112A, and 112B of the processor 110 are respectively connected to any one of the graphics processing circuits 131-133 and the expansion card 140, and the aforementioned connection forms a fully loaded third connection mode.

Further, in the case of not being fully loaded, take the aforementioned connection port 111A of the first processing unit 111 fixedly connected to the expansion card 140 via the switching circuit 120 as an example, as shown in FIG. 3A, the connection port 111B of the first processing unit 111 It is not connected to any of the graphics processing circuits 131-133 in the image processing circuit 130 through the switching circuit 120, and the ports 112A and 112B of the second processing unit 112 are connected to the graphics processing circuits 131 and 132 through the switching circuit 120; therefore, At least one of the four connection ports 111A, 111B, 112A, 112B of the processor 110 is not connected to any of the graphics processing circuits 131, 132 and the expansion card 140, and the aforementioned connection forms the first connection that is not fully loaded mode. Next, taking the aforementioned connection port 111A of the first processing unit 111 fixedly connected to the expansion card 140 via the switching circuit 120 as an example, the processor 110 changes the configuration of the switching circuit 120 based on the under-loaded connection, as shown in FIG. 3B. As a result, the port 111B of the first processing unit 111 is changed from not being connected to the image processing circuit 130 to being connected to the first graphics processing circuit 131 via the switching circuit 120, and the port 112A of the second processing unit 112 is changed to being connected via the switching circuit 120 In the second graphics processing circuit 132, the port 112B of the second processing unit 112 is changed to not be connected to the image processing circuit 130 by the switch circuit 120; therefore, the four ports 111A, 111B, 112A, 112B of the processor 110 At least one of them is not connected to any of the graphics processing circuits 131, 132 and the expansion card 140, and the aforementioned connection forms a second connection mode that is not fully loaded; for the same reason, the aforementioned connection port of the first processing unit 111 111A is fixedly connected to the expansion card 140 via the switching circuit 120 as an example. The processor 110 then changes the configuration of the switching circuit 120 based on the under-loaded connection, as shown in FIG. 3C, causing the connection port 111B of the first processing unit 111 to change To connect to the second graphics processing circuit 132 via the switching circuit 120, the port 112A of the second processing unit 112 is changed to connect to the first graphics processing circuit 131 via the switching circuit 120, and the port 112B of the second processing unit 112 is also changed The switching circuit 120 is not connected to the image processing circuit 130; therefore, at least one of the four ports 111A, 111B, 112A, and 112B of the processor 110 is not connected to the graphics processing circuits 131, 132 and the expansion card 140 In either case, the aforementioned connection forms a third connection mode that is not fully loaded.

Based on this, the processor 110 is based on the fully loaded first connection mode, the fully loaded second connection mode, the fully loaded third connection mode, the under-loaded first connection mode, the under-loaded second connection mode, and the under-loaded third connection The mode and the image processing circuit 130 cooperate to run the test program to generate six test data respectively. The processor 110 respectively compares the six test data and determines the test data corresponding to the best actual image processing performance to control the switching circuit 120 to switch to the corresponding configuration. For example, the first connection mode is fully loaded, the second connection mode is fully loaded, the third connection mode is fully loaded, the first connection mode is not fully loaded, the second connection mode is not fully loaded, and the third connection mode is not fully loaded. Corresponding to the first test data, the second test data, the third test data, the fourth test data, the fifth test data, and the sixth test data as examples, if the processor 110 determines the actual image processing performance corresponding to the first test data Better than the actual image processing performance corresponding to other test data, the processor 110 controls the switching circuit 120 to make the processing units 111, 112 and the graphics processing circuits 131-133 enter the first connection mode corresponding to the full load of the first test data, as shown in FIG. 2A Shown. The rest of the situation can be deduced by analogy and will not be repeated.

Therefore, since the expansion card 140 has different customized specifications according to the requirements of different customers of the electronic device 100, that is, the operating performance of the expansion card 140 will vary according to the different customized specifications required by the customers, and will also Because the customer temporarily changes the requirements, the collocation has a different operation As a high-performance expansion card 140, the designer of the electronic device 100 cannot predict whether the customer will change the operating performance of the expansion card 140 and configure the processor 110 and the image processing circuit 130 in a better connection mode in advance. After the electronic device 100 is matched with different expansion cards 140, the original connection mode can still make the matched image processing circuit 130 have better actual image processing performance, and some of the electronic device 100 according to the present invention In an embodiment, the processor 110 can automatically configure the connection mode of the processor 110 and the image processing circuit 130 according to actual conditions (for example, the expansion card 140 and the image processing circuit 130 actually used by the electronic device 100), and the use of the electronic device 100 It can be more flexibly matched with any expansion card 140 and can achieve the best actual image processing performance of the electronic device 100 without modifying or redesigning the electronic device 100.

In some embodiments, when the processor 110 and the image processing circuit 130 run the test program together, the processor 110 can generate the first, second, third, fourth, fifth, and sixth test data in any order according to the above operations .

In some embodiments, the processor 110 has not yet determined the graphics processing circuits 131-133 that need to be used to perform specific image processing tasks. In this situation, the processor 110 can control the switching circuit 120 so that all possible connection modes between the processing units 111 and 112 and the graphics processing circuits 131-133 can be constructed to execute the test program and generate test data. The processor 110 can select the number of graphics processing circuits 131-133 to be used and the connection method according to the test data. For example, the processor 110 compares the test data generated by the various connection modes between the corresponding processing units 111 and 112 and the graphics processing circuits 131-133 and determines that only the graphics processing circuits 131 and 132 are required. In this situation, the processor 110 turns off the third graphics processing circuit 133, and connects the processing units 111 and 112 to the graphics processing circuit based on the comparison results of the test data. Circuits 131, 132. For example, in FIGS. 3A to 3C, the processor 110 has turned off the third graphics processing circuit 133, and the processor 110 is only connected to the graphics processing circuits 131 and 132.

In summary, the electronic device and the control method of the electronic device provided by the embodiments of the present invention can improve the computing resource allocation method of the multiple graphics processing circuits of the processor and the image processing circuit, thereby enhancing the actual image processing performance of the overall electronic device. Furthermore, the user of the electronic device can more flexibly match any expansion card and the electronic device can achieve the best actual image processing performance regardless of the expansion card.

100: electronic device

110: processor

111: first processing unit

112: second processing unit

120: switching circuit

130: image processing circuit

131: The first graphics processing circuit

132: The second graphics processing circuit

Claims (11)

An electronic device with graphics processing and computing resource allocation function, including: A processor including a first processing unit and a second processing unit; A switching circuit connecting the first processing unit and the second processing unit; and An image processing circuit, including a first graphics processing circuit and a second graphics processing circuit connected to the switching circuit; Wherein, the processor and the image processing circuit are used to run a test program to generate a test data, and the processor is used to control the switching circuit according to the test data, so that the first processing unit is electrically connected to the first graphics processing The circuit and the second processing unit are electrically connected to the second graphics processing circuit, or the first processing unit is electrically connected to the first graphics processing circuit and the second graphics processing circuit. The electronic device according to claim 1, wherein the switching circuit is operated in a first mode or a second mode, and when the switching circuit is operated in the first mode, the first processing unit is electrically connected through the switching circuit The first graphics processing circuit is connected and the second processing unit is electrically connected to the second graphics processing circuit via the switching circuit to form a first connection mode. When the switching circuit operates in the second mode, the first processing The unit is electrically connected to the first graphics processing circuit and the second graphics processing circuit via the switching circuit to form a second connection mode; Wherein, the processor and the image processing circuit run the test program according to the first connection mode and the second connection mode to generate the test data including a first test data and a second test data, and the processor compares The first test data and the second test data generate a comparison result to determine an image processing performance of the electronic device, and the processor selectively controls the switching circuit to operate in the first mode or the The second mode. The electronic device according to claim 2, further comprising an expansion card connected to the switching circuit, wherein the switching circuit is fixedly connected to either the first processing unit or the second processing unit of the expansion card and the processor. The electronic device according to claim 1, wherein the image processing circuit further includes a third graphics processing circuit connected to the switching circuit; Wherein, the processor is further used for controlling the switching circuit according to the test data, so that the second processing unit is electrically connected to the third graphics processing circuit. The electronic device according to claim 1, wherein the image processing circuit further includes a third graphics processing circuit connected to the switching circuit; Wherein, the processor is further used to turn off the third graphics processing circuit according to the test data. The electronic device according to claim 1, wherein the switching circuit includes a plurality of switching elements and a retimer. A control method of an electronic device with graphics processing and computing resource allocation function, including: Run a test program through a processor and an image processing circuit to generate test data; and According to the test data, a first processing unit of the processor is electrically connected to a first graphics processing circuit of the image processing circuit and a second processing unit of the processor is electrically connected to a first graphics processing circuit of the image processing circuit Two graphics processing circuits, or the first processing unit is electrically connected to the first graphics processing circuit and the second graphics processing circuit. The control method for an electronic device according to claim 7, wherein the step of running the test program through the processor and the image processing circuit to generate the test data includes: A switching circuit is controlled to operate in a first mode through the processor, and the switching circuit operating in the first mode connects the first processing unit and the first graphics processing circuit, and connects the second processing unit and the second Graphics processing circuit; When the switching circuit is operating in the first mode, run the test program through the processor and the image processing circuit to generate a first test data; Controlling the switching circuit to operate in a second mode through the processor, and the switching circuit operating in the second mode connects the first processing unit with the first graphics processing circuit and the second graphics processing circuit; and When the switching circuit is operating in the second mode, run the test program through the processor and the image processing circuit to generate a second test data; Wherein, according to the test data, the first processing unit is electrically connected to the first graphics processing circuit and the second processing unit is electrically connected to the second graphics processing circuit, or the first processing unit is electrically connected to the The steps of the first graphics processing circuit and the second graphics processing circuit include: Comparing the first test data and the second test data through the processor to generate a comparison result to determine an image processing performance of the electronic device; and The processor selectively controls the switching circuit to operate in the first mode or the second mode according to the comparison result, so that the first processing unit is electrically connected to the first graphics processing circuit and the second processing unit is electrically connected The second graphics processing circuit is connected, or the first processing unit is electrically connected to the first graphics processing circuit and the second graphics processing circuit. The control method of the electronic device according to claim 8, further comprising: permanently connecting the expansion card and the processor through the switching circuit to any one of the first processing unit or the second processing unit. The control method of an electronic device as described in claim 7, further comprising: According to the test data, the second processing unit is electrically connected to a third graphics processing circuit of the image processing circuit. The control method of an electronic device as described in claim 7, further comprising: A third graphics processing circuit of the image processing circuit is turned off by the processor according to the test data.

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