TWI697140B - Semiconductor light emitting device - Google Patents

Abstract

The semiconductor light-emitting device of the embodiment includes: a conductive substrate; and two or more luminous bodies, which are provided in parallel on the substrate, and each include a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type A semiconductor layer and a light-emitting layer provided between the first semiconductor layer and the second semiconductor layer. The two or more light-emitting bodies include a first light-emitting body electrically connected to the substrate, and a second light-emitting body connected in series to the first light-emitting body. Furthermore, the present invention includes: a first electrode provided between the first luminous body and the substrate, and electrically connected to the first semiconductor layer of the first luminous body and the substrate; and a second electrode provided on the Between the second luminous body and the substrate, and electrically connected to the first semiconductor layer of the second luminous body; and the first wiring, which electrically connects the second semiconductor layer of the first luminous body and the second electrode Sexual connection.

Description

Semiconductor light emitting device

The embodiment of the present invention mainly relates to a semiconductor light emitting device.

There are semiconductor light emitting devices that use a light emitting diode (Light Emitting Diode: LED) as a light source. Such a semiconductor light-emitting device can achieve high brightness by integrating a plurality of LEDs on a substrate. Moreover, by connecting a plurality of LEDs in series, for example, compared with a case where the same power is used to drive LEDs connected in parallel, the driving current can be reduced, and the reliability of the semiconductor light emitting device can be improved. However, in order to connect a plurality of LEDs in series, it is necessary to electrically isolate the LEDs from the substrate, and the bonding pads for connecting to external circuits must also be arranged on the substrate. Therefore, the heat dissipation of the LED is hindered and it is difficult to achieve miniaturization of the device.

An embodiment of the present invention provides a semiconductor light emitting device that can improve heat dissipation of LEDs connected in series and can realize a small size.

The semiconductor light-emitting device of the embodiment includes: a conductive substrate; and two or more luminous bodies, which are provided in parallel on the substrate, and each include a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type A semiconductor layer and a light-emitting layer provided between the first semiconductor layer and the second semiconductor layer. The two or more light-emitting bodies include a first light-emitting body electrically connected to the substrate, and a second light-emitting body connected in series to the first light-emitting body. Furthermore, the present invention includes: a first electrode provided between the first luminous body and the substrate And electrically connected to the first semiconductor layer of the first luminous body and the substrate; the second electrode is provided between the second luminous body and the substrate, and is electrically connected to the second luminous body A first semiconductor layer; and a first wiring having a first portion spanning the first luminous body and the second luminous body and a second portion extending in the second luminous body and electrically connected to the second electrode Part, and the second semiconductor layer of the first luminous body is electrically connected to the second electrode.

1: semiconductor light emitting device

2: semiconductor light emitting device

3: Semiconductor light emitting device

4: Semiconductor light emitting device

5: Semiconductor light emitting device

6: Semiconductor light emitting device

10: substrate

15: metal layer

20: Luminous body

20a: Luminous body

20b: illuminant

20c: Illuminant

20d: illuminant

20e: illuminant

20f: illuminant

20g: luminous body

20s: surface

20x: Illuminator

20y: luminous body

21: n-type semiconductor layer

23: Luminous layer

25: p-type semiconductor layer

27: p-side contact layer

29: Wiring Department

30: p-side electrode

30a: p-side electrode

30b: p-side electrode

30c: p-side electrode

30d: p-side electrode

30e: p-side electrode

30h: p-side electrode

30k: extension

30i: extension

30p: outer edge

30x: p-side electrode

30y: p-side electrode

31: contact hole

33: Insulation

35: Wiring

37: separation tank

39: Conductor

40: junction layer

40g: Extension

41: Metal layer

43: Metal layer

45: Conductor

47: Metal layer

49: Metal layer

50: insulating layer

50a: contact hole

60: n side bonding pad

65: n side bonding pad

65a: wiring

65b: wiring

70: p-side bonding pad

81: recess

83: n-side electrode

100: substrate

110: substrate

115: metal layer

120a: illuminant

120b: illuminant

120e: Light emitting part

120n: non-luminous part

120s: surface

121: n-type semiconductor layer

123: light emitting layer

125: p-type semiconductor layer

127: p-side contact layer

129a: p-side top cover

129b: p-side top cover

130a: n-side electrode

130b: n-side electrode

131: Wiring

133: Wiring

135: Wiring

137: conductor

139: Conductor

140: junction layer

141: Conductor

143: conductor

150: insulating layer

170: p-side bonding pad

180: n-side bonding pad

210: substrate

215: Metal layer

220a: illuminant

220b: illuminant

220s: surface

221: n-type semiconductor layer

223: Luminous layer

225: p-type semiconductor layer

230a: p-side electrode

230b: p-side electrode

231: p-side contact layer

233: p-side top cover layer

233ea: Extension Department

233eb: Extension Department

240: junction layer

250: insulating layer

260a: n-side electrode

260b: n-side electrode

261a: recess

261b: recess

265: n-side contact layer

267: Embedding layer

270: Insulation

280: p-side bonding pad

290: Wiring

295: electrical conductor

DL: cutting line

GA: Illuminant group

GB: Luminous group

W _D : width

W _E : interval

X: axis

Y: axis

Z: axis

FIG. 1 is a cross-sectional view showing a semiconductor light emitting device according to the first embodiment.

2(a) and (b) are a plan view and a circuit diagram of an equivalent circuit of the semiconductor light emitting device according to the first embodiment.

FIG. 3 is a plan view showing a semiconductor light emitting device according to a modification of the first embodiment.

4(a) to 7(b) are cross-sectional views showing the manufacturing process of the semiconductor light emitting device according to the first embodiment.

8 is a cross-sectional view showing a semiconductor light-emitting device according to a second embodiment.

9 is a cross-sectional view showing a semiconductor light emitting device according to a third embodiment.

10 is a cross-sectional view of a semiconductor light-emitting device showing a modification of the third embodiment.

11 is a cross-sectional view showing a semiconductor light-emitting device according to a fourth embodiment.

12(a) to (d) are graphs showing the area ratio of the bonding pad to the luminous body.

[Related application]

This application has priority based on Japanese Patent Application No. 2015-178165 (application date: September 10, 2015). This application includes all contents of the basic application by referring to the basic application.

Hereinafter, the embodiment will be described with reference to the drawings. The same parts in the drawings are marked with the same numbers and their detailed descriptions are appropriately omitted, and the different parts will be explained. In addition, the drawings are schematic diagrams or conceptual diagrams. The relationship between the thickness and width of each part and the ratio of the sizes between the parts are not necessarily the same as the actual ones. In addition, even when the same part is shown, there may be cases where the sizes or ratios are different from each other according to the drawings.

Furthermore, the arrangement and configuration of each part will be described using the X axis, Y axis, and Z axis shown in the figures. The X axis, Y axis, and Z axis are orthogonal to each other, and respectively represent the X direction, Y direction, and Z direction. In addition, there are cases where the Z direction is set upward and the reverse direction is set downward.

The description of the embodiments is illustrative, and the invention is not limited thereto. In addition, the constituent elements described in the embodiments can be applied in common as long as they are technically permitted. Hereinafter, the first conductivity type will be described as n type, and the second conductivity type will be described as p type. However, the first conductivity type may be referred to as p type, and the second conductivity type may be referred to as n type.

[First Embodiment]

FIG. 1 is a cross-sectional view showing a semiconductor light-emitting device 1 of the first embodiment. FIG. 2(a) is a plan view showing the semiconductor light emitting device 1. FIG. Fig. 1 is a cross-sectional view taken along line A-A shown in Fig. 2(a). 2(b) is a circuit diagram of an equivalent circuit of the semiconductor light emitting device 1.

As shown in FIG. 1, the semiconductor light-emitting device 1 includes a substrate 10, a first light-emitting body (hereinafter referred to as a light-emitting body 20 a ), and a second light-emitting body (hereinafter referred to as a light-emitting body 20 b ). The substrate 10 has conductivity, for example, a silicon substrate. The light emitters 20a and 20b include an n-type semiconductor layer 21, a light-emitting layer 23, and a p-type semiconductor layer 25, respectively. The light-emitting layer 23 is provided between the n-type semiconductor layer 21 and the p-type semiconductor layer 25.

The n-type semiconductor layer 21 includes, for example, an n-type gallium nitride layer (GaN layer). In addition, the n-type semiconductor layer 21 may further include a buffer layer including GaN, aluminum nitride (AlN), aluminum gallium nitride (AlGaN), or the like. In this case, the n-type GaN layer is provided between the buffer layer and the light-emitting layer 23.

The light emitting layer 23 includes, for example, a quantum well composed of a well layer containing indium gallium nitride (InGaN) and a barrier layer containing GaN. In addition, the light-emitting layer 23 may have a multiple quantum well structure including a plurality of quantum wells.

The p-type semiconductor layer 25 has, for example, a structure in which a p-type AlGaN layer and a p-type GaN layer are stacked. A p-type AlGaN layer is formed on the light-emitting layer 23, and a p-type GaN layer is formed on the p-type AlGaN layer.

The semiconductor light-emitting device 1 further includes a p-side contact layer 27, a first electrode (hereinafter referred to as a p-side electrode 30a), and a second electrode (hereinafter referred to as a p-side electrode 30b). The p-side contact layer 27 is electrically connected to the p-type semiconductor layer 25 of the light-emitting bodies 20a and 20b, respectively. The p-side electrodes 30a and 30b cover the p-side contact layer 27 on the surface of the p-type semiconductor layer 25, respectively. The p-side electrode 30a is electrically connected to the p-type semiconductor layer 25 of the light-emitting body 20a via the p-side contact layer 27. The p-side electrode 30b is electrically connected to the p-type semiconductor layer 25 of the light-emitting body 20b via another p-side contact layer 27.

The p-side contact layer 27 is preferably made of a material having a low contact resistance to the p-type semiconductor layer 25 and a high reflectance to the light emitted from the light-emitting layer 23. The p-side contact layer 27 is, for example, a metal layer containing silver (Ag). For the p-side electrodes 30a and 30b, a material having a high reflectance to the light emitted from the light-emitting layer 23, such as aluminum, is used.

The luminous bodies 20 a and 20 b are provided on the substrate 10 via the bonding layer 40 and the insulating layer 50. The bonding layer 40 has conductivity and is provided between the substrate 10 and the insulating layer 50. The p-side electrode 30a and the p-side contact layer 27 are located between the insulating layer 50 and the light-emitting body 20a. The p-side electrode 30b and the p-side contact layer 27 are located between the insulating layer 50 and the light-emitting body 20b.

The insulating layer 50 has a contact hole 50a communicating with the p-side electrode 30a. Inside the contact hole 50a, for example, a conductor 45 connected to the p-side electrode 30a is provided. That is, the light-emitting body 20a is electrically connected to the substrate 10 via the p-side contact layer 27, the p-side electrode 30a, the conductor 45, and the bonding layer 40. On the other hand, the luminous body 20b is electrically insulated from the bonding layer 40 and the substrate 10 by the insulating layer 50. The embodiment is not limited to this. For example, a structure in which the conductive layer 45 is not provided and a part of the bonding layer 40 extends into the contact hole 50a and is connected to the p-side electrode 30a may be used.

The semiconductor light-emitting device 1 further includes a wiring 35 that electrically connects the n-type semiconductor layer 21 of the light-emitting body 20a and the p-side electrode 30b. The luminous body 20b has a contact hole 31 communicating from its upper surface to the p-side electrode 30b. One end of the wiring 35 extends through the contact hole 31 provided in the light-emitting body 20b, and is connected to the p-side electrode 30b. In addition, the other end of the wiring 35 extends toward the light-emitting body 20a and is connected to the n-type semiconductor layer 21 of the light-emitting body 20a. As a result, the luminous body 20b is connected in series to the luminous body 20a.

The wiring 35 is formed on the insulating layer 33. The insulating layer 33 covers a part of the upper surface of each of the luminous bodies 20a and 20b, the respective side surfaces, and the inner wall of the contact hole 31. The wiring 35 is electrically insulated from the n-type semiconductor layer 21, the light-emitting layer 23, and the p-type semiconductor layer 25 of the light-emitting body 20b by the insulating layer 33. The wiring 35 is electrically insulated from the light-emitting layer 23 and the p-type semiconductor layer 25 of the light-emitting body 20a by the insulating layer 33. The wiring 35 preferably has, for example, a gold (Au) layer on its outermost surface.

FIG. 2(a) is a schematic view showing the arrangement of the upper surface of the semiconductor light-emitting device 1 (hereinafter referred to as the wafer surface). The semiconductor light-emitting device 1 includes a plurality of light-emitting bodies 20 and n-side bonding pads 60. The adjacent light-emitting bodies 20 are electrically connected by wires 35. Furthermore, two or more wires 35 may be arranged between adjacent light-emitting bodies 20. As a result, the current flowing through the wiring 35 can be reduced.

The plurality of luminous bodies 20 further includes, for example, a third luminous body (hereinafter referred to as a luminous body 20c) connected in series to the luminous body 20. A third electrode (with a Hereinafter referred to as p-side electrode 30c). In addition, the n-type semiconductor layer 21 of the light-emitting body 20b is electrically connected to the p-side electrode 30c via a wiring 35. The wiring 35 is connected to the p-side electrode 30c via a contact hole 31 provided in the light-emitting body 20c.

As shown in FIG. 2(b), the plurality of light-emitting bodies 20 include, for example, two light-emitting body groups GA and GB. The luminous body groups GA and GB respectively include eight luminous bodies 20 connected in series. The luminous body groups GA and GB are connected in parallel to the substrate 10 and the n-side bonding pad 60. For example, the light emitters 20a and 20d are located at one end of the light emitter groups GA and GB, and are electrically connected to the substrate 10.

The luminous bodies 20a and 20d have the same structure, and are electrically connected to the substrate 10 via the conductor 45 (see FIG. 1). In addition, the luminous bodies 20f and 20g are located at the other ends of the luminous body groups GA and GB, respectively, and are electrically connected to the n-side bonding pad 60.

As shown in FIG. 2(a), the n-side bonding pad 60 is provided across the luminous bodies 20f and 20g. The bonding pad 60 is electrically connected to the cathode sides of the luminous bodies 20f and 20g, for example, the n-type semiconductor layer 21.

In this way, in the semiconductor light emitting device 1, one end of the luminous body 20 connected in series is electrically connected to the substrate 10, and the other end is electrically connected to the n-side bonding pad 60 disposed on the wafer surface. Thereby, the bonding pad on the anode side or the cathode side can be omitted from the wafer surface, so that the light emitting area of the light emitting body 20 can be enlarged. For example, in order to arrange bonding pads with a diameter of 100 microns (μm) on the wafer surface, it is necessary to provide a non-light emitting region with a diameter of about 140 μm. It corresponds to 3% of the area of the light-emitting area in a semiconductor light-emitting device with a wafer size of 1 mm square.

12(a) to 12(d) are plots showing the area ratio of the bonding pad to the light-emitting body 20. FIG. The horizontal axis is the number of luminous bodies 20 disposed on the substrate 10. The vertical axis is the area ratio of the bonding pad to one luminous body 20. PA1 in each figure represents the bonding disposed on the substrate 10 When the number of pads is one. PA2 represents the case where the number of bonding pads disposed on the substrate 10 is two.

FIG. 12(a) shows the case where the size of one side of the substrate 10, that is, the wafer size is 3 mm. The wafer sizes in Figure 12(b) to Figure 12(d) are 2.5mm, 2.0mm and 1.5mm, respectively. As shown in FIGS. 12(a) to 12(d), the greater the number of luminous bodies 20, the greater the ratio of the area of the bonding pads. Furthermore, if the number of bonding pads is one, the area ratio of bonding pads decreases. In addition, the smaller the wafer size, the larger the area ratio of the bonding pad.

As shown in FIG. 2(a), the size of the luminous body 20 is preferably the same. For example, it is preferable to make the density of the driving current flowing through each light-emitting layer 23 the same by making the area of the light-emitting layer 23 of each light-emitting body 20 connected in series the same. As a result, the brightness of each luminous body 20 becomes equal, and the luminous distribution on the wafer surface can be made uniform. For example, if a plurality of luminous bodies 20 with different sizes are arranged, the current density in the luminous bodies 20 with smaller sizes may increase and the brightness may decrease. In addition, electromigration is likely to occur in a portion with a high current density. Therefore, by making the size of the light-emitting body 20 the same, the light emission of the semiconductor light-emitting device 1 can be made uniform, and the reliability thereof can be improved.

Further, the adjacent phosphor of interval W _E 20 Room is desirable to surround a plurality of relatively narrow width W _D of the dicing line DL of the light emitter 20. Thereby, the size of the semiconductor light emitting device can be reduced. In addition, the low-luminance area between adjacent light-emitting bodies 20 can be reduced, thereby achieving uniform light emission. Furthermore, the outer edge 30p of the p-side electrode 30 is preferably formed on the wafer surface so as to be located inside the light-emitting body 20, for example.

3 is a plan view showing a semiconductor light-emitting device 2 according to a modified example of the first embodiment. The semiconductor light-emitting device 2 includes a plurality of light-emitting bodies 20 and n-side bonding pads 65. The plurality of luminous bodies 20 includes luminous body groups GA and GB. The luminous body groups GA and GB are connected in parallel to a base not shown The board 10 and the n-side bonding pad 65 (see FIG. 2(b)).

The n-side bonding pad 65 is arranged adjacent to the light-emitting bodies 20f and 20g. Furthermore, the n-side bonding pad 65 is electrically connected to the n-type semiconductor layers 21 of the light-emitting bodies 20f and 20g via wirings 65a and 65b, respectively.

In this example, the luminous body 20a and the luminous body 20d share the p-side electrode 30h. The p-side electrode 30h is provided between the substrate 10 and the light-emitting body 20a and between the substrate 10 and the light-emitting body 20d. The p-side electrode 30h is electrically connected to the substrate 10 via the contact hole 50a of the insulating layer 50 (see FIG. 1).

Furthermore, the plurality of light-emitting bodies 20 includes a light-emitting body 20e connected in series to the light-emitting body 20d. A p-side electrode 30e is provided between the substrate 10 and the light-emitting body 20e. In addition, the n-type semiconductor layer 21 of the luminous body 20d is electrically connected to the p-side electrode 30e via a wiring 35. The wiring 35 is connected to the p-side electrode 30e via a contact hole 31 provided in the light-emitting body 20e.

Next, a method of manufacturing the semiconductor light-emitting device 1 of the first embodiment will be described with reference to FIGS. 4(a) to 7(b). 4(a) to 7(b) are cross-sectional views sequentially showing the manufacturing process of the semiconductor light emitting device 1.

As shown in FIG. 4( a ), an n-type semiconductor layer 21, a light-emitting layer 23 and a p-type semiconductor layer 25 are sequentially deposited on the substrate 100. In this specification, the layered state includes the state of being directly connected, and also includes the state in which other elements are interposed.

The substrate 100 is, for example, a silicon substrate or a sapphire substrate. The n-type semiconductor layer 21, the light-emitting layer 23, and the p-type semiconductor layer 25 each include a nitride semiconductor. The n-type semiconductor layer 21, the light-emitting layer 23, and the p-type semiconductor layer 25 include, for example, Al _x Ga _1-xy In _y N (x≧0, y≧0, x+y≦1).

The n-type semiconductor layer 21 includes, for example, an n-type GaN contact layer doped with silicon (Si) as an n-type impurity and an n-type AlGaN cladding layer doped with Si. The n-type AlGaN cladding layer is disposed on the n-type, for example Between the GaN contact layer and the light-emitting layer 23. The n-type semiconductor layer 21 may further include a buffer layer. For example, the n-type GaN contact layer is disposed between the buffer layer and the n-type AlGaN cladding layer. The buffer layer includes, for example, at least any one of AlN, AlGaN, and GaN.

The light-emitting layer 23 has, for example, a multiple quantum well (MQW) structure. In the MQW structure, for example, a plurality of barrier layers and a plurality of well layers are alternately stacked. For example, AlGaInN or GaInN is used for the well layer. For the barrier layer, for example, n-type AlGaN doped with Si or n-type Al _0.1 Ga _0.9 N doped with Si is used. The thickness of the barrier layer is, for example, 2 nm or more and 30 nm or less. Among the plurality of barrier layers, the composition or thickness of the barrier layer (p-side barrier layer) closest to the p-type semiconductor layer 25 may be different from other barrier layers.

The wavelength (peak wavelength) of light (emitted light) emitted from the light-emitting layer 23 is, for example, 210 nm or more and 700 nm or less. The peak wavelength of the emitted light may be, for example, 370 nm or more and 480 nm or less.

The p-type semiconductor layer 25 includes, for example, an undoped AlGaN spacer layer, a p-type AlGaN cladding layer doped with magnesium (Mg) as a p-type impurity, a p-type GaN layer doped with Mg, and a relatively high concentration P-type GaN contact layer doped with Mg. A p-type GaN layer is arranged between the p-type GaN contact layer and the light-emitting layer 23. A p-type AlGaN cladding layer is arranged between the p-type GaN layer and the light-emitting layer 23. An AlGaN spacer layer is arranged between the p-type AlGaN cladding layer and the light-emitting layer 23. For example, the p-type semiconductor layer 25 includes an Al _0.11 Ga _0.89 N spacer layer, a p-type Al _0.28 Ga _0.72 N cladding layer, a p-type GaN layer, and a p-type GaN contact layer.

Furthermore, a p-side contact layer 27 and p-side electrodes 30a and 30b are selectively formed on the p-type semiconductor layer 25. The p-side contact layer 27 is, for example, a metal layer containing Ag, and is formed using a vacuum evaporation method. The p-side electrodes 30a and 30b cover the p-side contact layer 27, respectively. The p-side electrodes 30a and 30b are, for example, metal layers containing aluminum (Al), and are formed using a vacuum evaporation method.

As shown in FIG. 4(b), an insulating layer 50 covering the surfaces of the p-side electrodes 30a, 30b and the p-type semiconductor layer 25 is formed. The insulating layer 50 is, for example, a silicon oxide layer or a silicon nitride layer formed using CVD (Chemical Vapor Deposition). In addition, the insulating layer 50 may have a structure in which a silicon oxide layer and a silicon nitride layer are stacked, for example.

As shown in FIG. 4(c), a contact hole 50a is formed in the insulating layer 50, and a conductor 45 is embedded. The conductor 45 contains, for example, aluminum (Al) or titanium nitride (TiN).

As shown in FIG. 5( a ), metal layers 41 and 43 are formed on the insulating layer 50 and the conductor 45. The metal layer 41 contains, for example, at least any one of Ti, Pt, and Ni. In addition, the metal layer 43 includes, for example, a bonding metal such as a welding material. The metal layer 43 includes, for example, Ni-Sn system, Au-Sn system, Bi-Sn system, Sn-Cu system, Sn-In system, Sn-Ag system, Sn-Pb system, Pb-Sn-Sb system, Sn-Sb At least one of the soldering materials of the system, Sn-Pb-Bi system, Sn-Pb-Cu system, Sn-Pb-Ag system, and Pb-Ag system.

As shown in FIG. 5( b ), the substrate 10 is arranged above the metal layer 43. The substrate 10 has metal layers 47 and 49 on the surface opposite to the metal layer 43. The metal layer 47 contains, for example, at least any one of Ti, Pt, and Ni. In addition, the metal layer 49 contains, for example, a bonding metal such as a welding material. The metal layer 43 includes, for example, Ni-Sn system, Au-Sn system, Bi-Sn system, Sn-Cu system, Sn-In system, Sn-Ag system, Sn-Pb system, Pb-Sn-Sb system, Sn-Sb At least one of the soldering materials of the system, Sn-Pb-Bi system, Sn-Pb-Cu system, Sn-Pb-Ag system, and Pb-Ag system.

Then, the metal layer 49 is bonded to the metal layer 43. For example, the metal layer 49 is crimped to the metal layer 43 and heated to a temperature above the melting point of the bonding metal. Thereby, the metal layer 43 and the metal layer 49 are fused, and the substrate 10 is bonded above the substrate 100.

As shown in FIG. 6( a ), the substrate 100 is removed, and the n-type semiconductor layer 21, the light-emitting layer 23, and the p-type semiconductor layer 25 are transferred above the substrate 10. The bonding layer 40 includes a metal layer 41, 43, 47 and 49. The metal layer 43 and the metal layer 47 are fused and integrated.

The substrate 100 is removed using methods such as polishing and dry etching (for example, RIE: Reactive Ion Etching). In addition, when the substrate 100 is a sapphire substrate, it is removed using, for example, LLO (Laser Lift Off).

As shown in FIG. 6(b), for example, the surface of the n-type semiconductor layer 21 is selectively etched by dry etching using chlorine gas. In addition to this treatment, wet etching is also performed to roughen the portion (surface 20s) that becomes the surface of the luminous body 20. Thereby, the light extraction efficiency can be improved. In addition, the portion where the wiring 35 is formed (wiring portion 29) is also recessed, and the thickness of the n-type semiconductor layer 21 in the Z direction is thinner than other portions. This makes it easy to form the wiring 35, and can prevent defects such as disconnection due to a step difference.

As shown in FIG. 7( a ), the n-type semiconductor layer 21, the light-emitting layer 23, and the p-type semiconductor layer 25 are selectively removed and divided into a plurality of light-emitting bodies 20. For example, the separation trench 37 is formed by selectively etching the n-type semiconductor layer 21, the light-emitting layer 23, and the p-type semiconductor layer 25 using a method such as RIE or wet etching. The surface of the insulating layer 50 is exposed on the bottom surface of the separation groove 37. Preferably, the contact holes 31 are simultaneously formed. The contact hole 31 is formed, for example, from the upper surface of the luminous body 20 b to the depth of the p-side electrode 30. The contact hole 31 communicates with the extension 30 k of the p-side electrode 30.

As shown in FIG. 7(b), a wiring 35 connecting the light-emitting body 20 in series is formed. At the same time, an n-side bonding pad 60 (not shown) is formed (see FIG. 2(a)). For example, the insulating layer 33 covering the surfaces of the plurality of luminous bodies 20 and the insulating layer 50 is formed. The insulating layer 33 is, for example, a silicon oxide layer formed using plasma CVD. Then, for example, the insulating layer 33 is selectively etched using anisotropic dry etching to expose the surface 20s of the light-emitting body 20. At the same time, the surface of the p-side electrode 30 is exposed on the bottom surface of the contact hole 31. Then, after forming the metal layer to be the wiring 35, the metal layer is selectively etched, thereby forming the wiring 35 and the side bonding pad 60. Wiring 35 and n-side bonding The pad 60 has, for example, a structure in which a plurality of metal layers are stacked, and is formed so as to include an Au layer on its outermost surface.

Furthermore, a metal layer 15 is formed on the back surface of the substrate 10. For example, after polishing the back side of the substrate 10 to a specific thickness, titanium (Ti), platinum (Pt), and gold (Au) are sequentially deposited to form the metal layer 15.

In this embodiment, by using the conductive substrate 10, the Joule heat of the luminous body 20 can be released through the substrate 10 and the metal layer 15. In addition, it is easy to miniaturize the semiconductor light-emitting device 1 by setting one bonding pad formed on the wafer surface.

[Second Embodiment]

8 is a schematic cross-sectional view showing the semiconductor light emitting device 3 of the second embodiment. The semiconductor light-emitting device 3 includes a substrate 10, a light-emitting body 20x, and a light-emitting body 20y. The light-emitting bodies 20x and 20y include an n-type semiconductor layer 21, a light-emitting layer 23, and a p-type semiconductor layer 25, respectively.

The semiconductor light-emitting device 3 further includes a p-side contact layer 27, a p-side electrode 30x, and a p-side electrode 30y. The p-side contact layer 27 is electrically connected to the p-type semiconductor layers 25 of the luminous bodies 20x and 20y, respectively. The p-side electrodes 30x and 30y cover the p-side contact layer 27 on the surface of the p-type semiconductor layer 25, respectively. The p-side electrode 30x is electrically connected to the p-type semiconductor layer 25 of the light-emitting body 20x via the p-side contact layer 27. The p-side electrode 30y is electrically connected to the p-type semiconductor layer 25 of the light-emitting body 20y via another p-side contact layer 27.

The luminous bodies 20x and 20y are disposed on the substrate 10 via the bonding layer 40 and the insulating layer 50. The bonding layer 40 has conductivity and is provided between the substrate 10 and the insulating layer 50. The p-side electrode 30x and the p-side contact layer 27 are located between the insulating layer 50 and the light-emitting body 20x. The p-side electrode 30y and the p-side contact layer 27 are located between the insulating layer 50 and the light-emitting body 20y.

Furthermore, the light-emitting body 20y has a light-emitting layer 23 penetrating from the surface of the p-type semiconductor layer 25 and Reached the recess 81 of the n-type semiconductor layer 21. Furthermore, the n-side electrode 83 is provided on the bottom surface of the recess 81. The n-side electrode 83 is electrically connected to the n-type semiconductor layer 21. The n-side electrode 83 is, for example, a metal layer containing aluminum. The insulating layer 50 extends in the recess 81 and covers the wall surface thereof. In addition, the bonding layer 40 has a portion that extends in the concave portion 81 (extended portion 40g). The extension 40g is electrically connected to the n-side electrode 83. That is, the n-type semiconductor layer 21 of the light-emitting body 20y is electrically connected to the substrate 10 via the n-side electrode 83 and the bonding layer 40.

On the other hand, the p-side electrode 30x provided between the luminous body 20x and the substrate 10 is electrically insulated from the bonding layer 40 and the substrate 10 by the insulating layer 50. That is, the luminous body 20x is electrically insulated from the substrate 10. In addition, the p-side electrode 30x has an extension portion 30i electrically connected to the p-side bonding pad 70.

The semiconductor light-emitting device 3 further includes a wiring 35 electrically connecting the n-type semiconductor layer 21 of the light-emitting body 20x and the p-side electrode 30y. The luminous body 20y has a contact hole 31 communicating from its upper surface to the p-side electrode 30y. One end of the wiring 35 extends through the contact hole 31 provided in the luminous body 20y, and is electrically connected to the p-side electrode 30y. In addition, the other end of the wiring 35 extends toward the light-emitting body 20x and is electrically connected to the n-type semiconductor layer 21 of the light-emitting body 20x. Thereby, the luminous body 20y is connected in series to the luminous body 20x.

In the above example, the luminous body 20y is directly connected to the luminous body 20x, and other luminous bodies 20 may be interposed between the luminous body 20y and the luminous body 20x to connect three or more luminous bodies 20 in series.

In this way, the n-type semiconductor layer 21 of the light-emitting body 20 may be electrically connected to the substrate 10 and the p-side bonding pad 70 electrically connected to the p-side electrode 30 may be disposed on the wafer surface. In this way, the bonding pad electrically connected to the n-type semiconductor layer 21 can be omitted, thereby expanding the area of the light emitting region occupying the wafer surface. With this, the semiconductor light emitting device 3 can be easily miniaturized.

[Third Embodiment]

9 is a schematic cross-sectional view showing a semiconductor light-emitting device 4 of the third embodiment. The semiconductor light-emitting device 4 includes a substrate 110, a light-emitting body 120a, and a light-emitting body 120b. The substrate 110 has conductivity. The substrate 110 is a silicon substrate. The luminous bodies 120 a and 120 b are disposed on the substrate 110. A metal layer 115 is provided on the back side of the substrate 110. The light-emitting body 120a and the light-emitting body 120b include, for example, a nitride semiconductor. The metal layer 115 contains, for example, titanium (Ti), platinum (Pt), and gold (Au).

The light emitters 120a and 120b include an n-type semiconductor layer 121, a light-emitting layer 123, and a p-type semiconductor layer 125, respectively. The light emitting layer 123 is provided between the n-type semiconductor layer 121 and the p-type semiconductor layer 125. The light-emitting bodies 120a and 120b respectively include a light-emitting portion 120e and a non-light-emitting portion 120n. The light-emitting portion 120e includes an n-type semiconductor layer 121, a light-emitting layer 123, and a p-type semiconductor layer 125. The non-light emitting portion 120n is a part of the n-type semiconductor layer 121, and does not include the light-emitting layer 123 and the p-type semiconductor layer 125. The surfaces 120s of the luminous bodies 120a and 120b opposite to the substrate 110 are roughened.

The semiconductor light-emitting device 4 further includes a p-side contact layer 127, p-side cap layers 129a and 129b, and n-side electrodes 130a and 130b. The p-side contact layer 127 is electrically connected to the p-type semiconductor layer 125 of the light emitters 120a and 120b, respectively. The p-side contact layer 127 is, for example, a metal layer containing silver (Ag).

The p-side cap layer 129a covers the p-side contact layer 127 electrically connected to the p-type semiconductor layer 125 of the light emitter 120a. The p-side cap layer 129b covers the p-side contact layer 127 electrically connected to the p-type semiconductor layer 125 of the light emitter 120b. The p-side capping layers 129a and 129b are, for example, metal layers including at least one of aluminum (Al), titanium (Ti), platinum (Pt), and nickel (Ni), and are formed using a vacuum evaporation method.

The n-side electrode 130a is electrically connected to the n-type semiconductor layer 121 at the non-light-emitting portion 120n of the light-emitting body 120a. The n-side electrode 130b is electrically connected to the n-type semiconductor Conductor layer 121. The n-side electrodes 130a and 130b are, for example, metal layers including aluminum (Al).

The luminous bodies 120 a and 120 b are disposed on the substrate 110 via the bonding layer 140 and the insulating layer 150. The bonding layer 140 is disposed between the substrate 110 and the insulating layer 150 and has conductivity. The bonding layer 140 includes, for example, a bonding metal such as a welding material. The insulating layer 150 is, for example, a silicon oxide layer.

The p-side contact layer 127 and the p-side cap layer 129a on one side are disposed between the insulating layer 150 and the light-emitting body 120a. The p-side contact layer 127 and the p-side cap layer 129b on the other side are disposed between the insulating layer 150 and the light-emitting body 120b. The n-side electrode 130a is provided between the non-light-emitting portion 120n of the light-emitting body 120a and the insulating layer 150. The n-side electrode 130b is provided between the non-light-emitting portion 120n of the light-emitting body 120b and the insulating layer 150.

Furthermore, the semiconductor light-emitting device 4 includes wirings 131, 133, 135 and p-side bonding pad 170. The wiring 131 electrically connects the luminous body 120a and the p-side bonding pad 170. The wiring 133 electrically connects the luminous body 120a and the luminous body 120b. The wiring 135 electrically connects the luminous body 120b and the substrate 110. The wirings 131, 133, and 135 are, for example, metal layers containing aluminum (Al).

The wiring 131 is provided in the insulating layer 150 and is electrically insulated from the substrate 110. The wiring 131 is connected to the p-side cap layer 129a. Moreover, the wiring 131 is electrically connected to the p-side bonding pad 170 via a conductor 137. The conductor 137 is disposed in the contact hole formed in the insulating layer 150.

The wiring 133 is provided in the insulating layer 150 and is electrically insulated from the substrate 110. The wiring 133 is connected to the n-side electrode 130a and the p-side cap layer 129b.

The wiring 135 electrically connects the light-emitting body 120b and the substrate 110 via the n-side electrode 130b and the bonding layer 140. The wiring 135 is provided in the insulating layer 150 and is electrically insulated from the substrate 110. The wiring 135 is connected to the n-side electrode 130b. In addition, the wiring 135 is electrically connected to the bonding layer 140 via the conductor 139. The conductor 139 is disposed in the contact hole formed in the insulating layer 150.

In this way, the semiconductor light-emitting device 4 is provided in series between the p-side bonding pad 170 and the substrate 110 The connected luminous bodies 120a and 120b. In the semiconductor light emitting device 4, by omitting the n-side bonding pad, the area of the light emitting region occupying the wafer surface can be enlarged. In this example, the luminous body 120a is directly connected to the luminous body 120b, and other luminous bodies 120 may be interposed between the luminous body 120a and the luminous body 120b to connect three or more luminous bodies 120 in series.

FIG. 10 is a schematic cross-sectional view showing a semiconductor light-emitting device 5 according to a modified example of the third embodiment. The semiconductor light-emitting device 5 includes a substrate 110, a light-emitting body 120a, and a light-emitting body 120b. In this example, the light emitters 120a and 120b are connected in series between the substrate 110 and the n-side bonding pad 180.

As shown in FIG. 10, the light-emitting body 120 a is electrically connected to the substrate 110 via the conductor 141 and the bonding layer 140. The conductor 141 is disposed in the contact hole formed in the insulating layer 150 and is in contact with the p-side cap layer 129a and the bonding layer 140.

The wiring 133 is connected to the n-side electrode 130a and the p-side cap layer 129b, and electrically connects the light-emitting body 120a and the light-emitting body 120b. The wiring 135 electrically connects the luminous body 120b and the n-side bonding pad 180. The wiring 135 is connected to the n-side electrode 130b of the n-type semiconductor layer 121 electrically connected to the light-emitting body 120b. In addition, the wiring 135 is electrically connected to the n-side bonding pad 180 via a conductor 143. The conductor 143 is disposed in the contact hole formed in the insulating layer 150 and is in contact with the wiring 135 and the n-side bonding pad 180.

In this way, in the semiconductor light emitting device 4, by omitting the p-side bonding pad, the area of the light emitting region occupying the wafer surface can be enlarged. In addition, other light-emitting bodies 120 may be interposed between the light-emitting body 120a and the light-emitting body 120b to connect three or more light-emitting bodies 120 in series.

[Fourth Embodiment]

11 is a schematic cross-sectional view showing a semiconductor light-emitting device 6 of the fourth embodiment. The semiconductor light-emitting device 6 includes a light-emitting body 220a and a light-emitting body 220b. Luminous bodies 220a and 220b, for example Contains nitride semiconductors.

The light-emitting bodies 220a and 220b include an n-type semiconductor layer 221, a light-emitting layer 223, and a p-type semiconductor layer 225, respectively. The light emitting layer 223 is provided between the n-type semiconductor layer 221 and the p-type semiconductor layer 225. The luminous bodies 220a and 220b are disposed on the substrate 210 via the bonding layer 240 and the insulating layer 250, for example. The surfaces 220s of the luminous bodies 220a and 220b opposite to the substrate 210 are roughened.

The substrate 210 has conductivity. A metal layer 215 is provided on the back side of the substrate 210. The substrate 210 is, for example, a silicon substrate. The bonding layer 240 includes, for example, a bonding metal such as a solder material, and has conductivity. The insulating layer 250 is, for example, a silicon oxide layer. The metal layer 215 includes, for example, titanium (Ti), platinum (Pt), and gold (Au).

The semiconductor light-emitting device 6 further includes p-side electrodes 230a, 230b, n-side electrodes 260a, 260b, and an insulating layer 270. The p-side electrode 230a is electrically connected to the p-type semiconductor layer 225 of the light-emitting body 220a. The p-side electrode 230b is electrically connected to the p-type semiconductor layer 225 of the light-emitting body 220b. The p-side electrodes 230a and 230b include a p-side contact layer 231 and a p-side cap layer 233, respectively. The p-side contact layer 231 is electrically connected to the p-type semiconductor layer 225. The p-side cap layer 233 covers the p-side contact layer 231 on the surface of the p-type semiconductor layer 225.

The insulating layer 270 covers the p-side electrodes 230a and 230b, respectively. The insulating layer 270 electrically insulates the p-side electrode 230a and the n-side electrode 260a. In addition, the insulating layer 270 electrically insulates the p-side electrode 230b and the n-side electrode 260b.

The n-side electrodes 260a and 260b are provided between the insulating layer 250 and the insulating layer 270. The n-side electrode 260a is electrically connected to the n-type semiconductor layer 221 via a recess 261a provided in the light-emitting body 220a. The n-side electrode 260b is electrically connected to the n-type semiconductor layer 221 via a recess 261b provided in the light-emitting body 220b. The concave portions 261a and 261b are formed with the p-type semiconductor layer 225 and the light-emitting layer 223 in parallel It is provided so as to reach the depth of the n-type semiconductor layer 221. The insulating layer 270 extends from each of the light-emitting bodies 220a and 220b along the inner walls of the concave portions 261a and 261b, and electrically insulates the light-emitting layer 223 and the p-type semiconductor layer 225 from the n-side electrodes 260a and 260b.

The n-side electrodes 260a and 260b include, for example, an n-side contact layer 265 and an embedding layer 267, respectively. The n-side contact layer 265 has, for example, a multilayer structure including an aluminum (Al) layer, a nickel (Ni) layer, and a copper (Cu) layer. The aluminum (Al) layer is in contact with the n-type semiconductor layer 221 and electrically connected. The copper (Cu) layer functions as a Cu-plated seed layer, for example. The embedded layer 267 is, for example, a Cu-plated layer.

The semiconductor light-emitting device 6 further includes a p-side bonding pad 280, a wiring 290, and a conductor 295. The p-side bonding pad 280 is provided on the extension portion 233ea of the p-side electrode 230a. The extension portion 233ea is a part of the p-side cap layer 233 extending along the insulating layer 270 to the outside of the light-emitting body 220a.

The wiring 290 electrically connects the light-emitting body 220a and the light-emitting body 220b. The wiring 290 is provided in the insulating layer 270 and is connected to the extended portion 233eb of the p-side electrode 230b and the n-side electrode 260a. The extended portion 233eb is a part of the p-side cap layer 233 extending along the insulating layer 270 to the outside of the light-emitting body 220b. That is, the wiring 290 electrically connects the p-side electrode 230b and the n-side electrode 260a.

The conductor 295 is electrically connected to the substrate 210 via the bonding layer 240. In addition, the conductor 295 is electrically connected to the light-emitting body 220b via the n-side electrode 260b. The conductor 295 is formed in the contact hole formed in the insulating layer 250 and is in contact with the bonding layer 240 and the n-side electrode 260b.

In this example, the light-emitting body 220a and the light-emitting body 220b are connected in series between the p-side bonding pad 280 and the substrate 210. The embodiment is not limited to this, and other light-emitting bodies 220 may be interposed between the light-emitting body 220a and the light-emitting body 220b to connect three or more light-emitting bodies 220 in series.

In the semiconductor light emitting devices 1 to 6 of the first to fourth embodiments described above, the area of the bonding pads arranged on the wafer surface can be reduced, thereby increasing the area of the light emitting region, that is, the light emitting body Occupied area. Furthermore, Joule heat generated by the luminous body can be efficiently released by using a substrate having conductivity. For example, when the luminous body 20 is provided on an insulating substrate such as sapphire, heat dissipation may be hindered, and the luminous efficiency and reliability of the luminous body 20 may be reduced. In addition, although a substrate with high thermal conductivity such as aluminum nitride can also be used, it is expensive.

In addition, in this specification, the “nitride semiconductor” includes B _x In _y Al _z Ga _1-xyz N (0≦x≦1, 0≦y≦1, 0≦z≦1, 0≦x+ y+z≦1) the group III-V compound semiconductor further includes a mixed crystal that contains phosphorus (P), arsenic (As), or the like as a group V element in addition to N (nitrogen). In addition, the above composition further includes various elements added to control various physical properties such as conductivity type and further includes various elements unexpectedly included in the "nitride semiconductor".

Several embodiments of the present invention have been described, but these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, substitutions, and changes can be made without departing from the scope of the invention. Such embodiments or changes are included in the scope or gist of the invention, and are included in the scope of the invention described in the patent application and its equivalent.

1‧‧‧Semiconductor light-emitting device

10‧‧‧ substrate

15‧‧‧Metal layer

20a‧‧‧luminous body

20b‧‧‧luminous body

21‧‧‧n-type semiconductor layer

23‧‧‧luminous layer

25‧‧‧p-type semiconductor layer

27‧‧‧p-side contact layer

30a‧‧‧p side electrode

30b‧‧‧p side electrode

30k‧‧‧Extension

31‧‧‧Contact hole

33‧‧‧Insulation

35‧‧‧Wiring

40‧‧‧Joint layer

45‧‧‧Conductor

50‧‧‧Insulation

50a‧‧‧contact hole

X‧‧‧axis

Y‧‧‧axis

Z‧‧‧axis

Claims (8)

A semiconductor light-emitting device comprising: a conductive substrate; two or more luminous bodies arranged on the substrate in parallel, each including a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type And a light emitting layer provided between the first semiconductor layer and the second semiconductor layer, the two or more light emitters include a first light emitter, and a second light emitter connected in series to the first light emitter; and The first wiring is electrically connected to the substrate-side surface of the first semiconductor layer of the first luminous body and the substrate-side surface of the second semiconductor layer of the second luminous body, and extends over the substrate In the upper insulating layer; and the substrate is electrically connected to any one of the second semiconductor layer of the first luminous body and the first semiconductor layer of the second luminous body. The semiconductor light-emitting device according to claim 1, wherein each of the first light-emitting body and the second light-emitting body includes: a light-emitting portion including a part of the first semiconductor layer, the second semiconductor layer, and the light-emitting layer; and The non-light-emitting portion includes the other part of the first semiconductor layer; the first wiring is electrically connected to the first semiconductor layer at the non-light-emitting portion of the first luminous body. The semiconductor light-emitting device according to claim 2, wherein the substrate is electrically connected to the first semiconductor layer at a non-light-emitting portion of the second luminous body. The semiconductor light-emitting device according to claim 3, further comprising: a metal layer provided between the substrate and the second light-emitting body and electrically connected to the substrate; and a second wiring that connects the second light-emitting body The first semiconductor layer is electrically connected to the metal layer; and the insulating layer extends between the second luminous body and the metal layer; the second wiring is provided in the insulating layer and is connected to the second The surface of the first semiconductor layer of the luminous body on the substrate side. The semiconductor light emitting device according to claim 2, wherein the substrate is electrically connected to the second semiconductor layer at the light emitting portion of the first luminous body. The semiconductor light-emitting device according to claim 5, further comprising a metal layer provided between the substrate and the first luminous body, and electrically connected to the substrate; and the insulating layer extends from the first luminous body Between the metal layer and the metal layer; the metal layer is electrically connected to the second semiconductor layer of the first luminous body through a conductor that penetrates the insulating layer. The semiconductor light-emitting device according to claim 1, further comprising: a first electrode provided between the first light-emitting body and the substrate and electrically connected to the substrate of the second semiconductor layer of the first light-emitting body The surface on the side; the second electrode, which is electrically connected to the first semiconductor layer of the first light-emitting body through the second semiconductor layer and the light-emitting layer and reaches the first recess of the first semiconductor layer through the first light-emitting body A third electrode, which is provided between the second light emitter and the substrate, and is electrically connected to the surface of the second semiconductor layer of the second light emitter on the substrate side; and a fourth electrode, which is located on the first 2 luminous body, which is electrically connected to the first semiconductor layer of the second luminous body through the second semiconductor layer and the light emitting layer and reaches the second concave portion of the first semiconductor layer, and is electrically connected to the substrate; and the first 1 Wiring electrically connects the second electrode and the third electrode. The semiconductor light-emitting device according to claim 6, further comprising: a first insulating layer having a portion provided between the third electrode and the fourth electrode; a second insulating layer having the second electrode and A portion between the substrate and the fourth electrode and the substrate; a metal layer provided between the second insulating layer and the substrate and electrically connected to the substrate; and a conductor penetrating the above The second insulating layer electrically connects the fourth electrode and the metal layer; and the first wiring is covered by the first insulating layer and the second insulating layer.

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