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TWI692857B - Semiconductor device and biometric identification apparatus - Google Patents

Semiconductor device and biometric identification apparatus Download PDF

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TWI692857B
TWI692857B TW108102818A TW108102818A TWI692857B TW I692857 B TWI692857 B TW I692857B TW 108102818 A TW108102818 A TW 108102818A TW 108102818 A TW108102818 A TW 108102818A TW I692857 B TWI692857 B TW I692857B
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light
shielding layer
layer
semiconductor device
substrate
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TW108102818A
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Chinese (zh)
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TW202029482A (en
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羅宗仁
廖志成
劉士豪
呂武羲
羅明城
鐘偉綸
林志威
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世界先進積體電路股份有限公司
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Abstract

A semiconductor device includes a substrate and a light collimator layer. The substrate has a plurality of pixels. The light collimator layer is disposed on the substrate, and the light collimator layer includes a transparent material layer, a first light-shielding layer, a second light-shielding layer and a plurality of transparent pillars. The transparent material layer covers the pixels. The first light-shielding layer is disposed on the substrate and the first light-shielding layer has a plurality of holes corresponding to the pixels. The second light-shielding layer is disposed on the first light-shielding layer. The transparent pillars are disposed in the second light-shielding layer.

Description

半導體裝置與生物辨識裝置 Semiconductor device and biometric device

本發明實施例係有關於一種半導體裝置,且特別有關於一種包含光準直層(collimator layer)的半導體裝置。 The embodiments of the present invention relate to a semiconductor device, and particularly to a semiconductor device including a light collimator layer.

半導體裝置可被使用於各種應用中。舉例而言,半導體裝置可被用來作為生物辨識裝置(例如,指紋辨識裝置、臉部辨識裝置、虹膜辨識裝置等的至少一部分)。生物辨識裝置可由大量的光學元件組成。舉例而言,上述光學元件可包括光準直器(collimator)。 Semiconductor devices can be used in various applications. For example, the semiconductor device may be used as a biometric device (eg, at least a part of a fingerprint recognition device, a face recognition device, an iris recognition device, etc.). The biometric device can be composed of a large number of optical elements. For example, the above optical element may include a light collimator.

光準直器可用於準直(collimate)光線,以減少因光發散所導致之能量損失。因此,光準直器可例如被應用於生物辨識裝置(例如,指紋辨識裝置)中,以增加其辨識的效能。 The optical collimator can be used to collimate light to reduce energy loss caused by light divergence. Therefore, the optical collimator can be applied to, for example, a biometrics recognition device (for example, a fingerprint recognition device) to increase its recognition performance.

然而,現有之光準直器及其形成方法並非在各方面皆令人滿意。 However, the existing light collimator and its forming method are not satisfactory in all aspects.

本發明實施例包括一種半導體裝置。前述半導體裝置包含基板與光準直層。基板具有複數個畫素。光準直層設置於基板之上,且光準直層包含透明材料層、第一遮光層、第二遮光層及 複數個透明柱體。透明材料層覆蓋畫素。第一遮光層設置於基板之上,且第一遮光層具有對應於畫素的複數個孔洞。第二遮光層設置於第一遮光層之上。透明柱體設置於第二遮光層中。 Embodiments of the present invention include a semiconductor device. The aforementioned semiconductor device includes a substrate and a light collimating layer. The substrate has a plurality of pixels. The light collimating layer is disposed on the substrate, and the light collimating layer includes a transparent material layer, a first shading layer, a second shading layer and Plural transparent cylinders. The transparent material layer covers the pixels. The first light shielding layer is disposed on the substrate, and the first light shielding layer has a plurality of holes corresponding to the pixels. The second light shielding layer is disposed on the first light shielding layer. The transparent cylinder is disposed in the second light shielding layer.

本發明實施例亦包括一種半導體裝置。前述半導體裝置包含基板與光準直層。基板具有複數個畫素。光準直層設置於基板之上,且光準直層包含複數個遮光層及透明材料層。遮光層設置於基板之上,且每個遮光層具有對應於畫素的複數個孔洞。透明材料層設置於遮光層之間並填充孔洞。 Embodiments of the present invention also include a semiconductor device. The aforementioned semiconductor device includes a substrate and a light collimating layer. The substrate has a plurality of pixels. The light collimating layer is disposed on the substrate, and the light collimating layer includes a plurality of light-shielding layers and transparent material layers. The light shielding layer is disposed on the substrate, and each light shielding layer has a plurality of holes corresponding to pixels. The transparent material layer is disposed between the shading layers and fills the holes.

10、10’、10”:生物辨識裝置 10, 10’, 10”: Biometric device

100、100’、100”:半導體裝置 100, 100’, 100”: semiconductor devices

101:基板 101: substrate

101T:基板頂表面 101T: substrate top surface

101B:基板底表面 101B: substrate bottom surface

102:第一材料 102: The first material

104、204、304:第一遮光層 104, 204, 304: first shading layer

106:透明材料 106: Transparent material

108:透明材料層 108: transparent material layer

110:透明柱體 110: transparent cylinder

112:第二材料 112: Second material

114、214-1、314-1:第二遮光層 114, 214-1, 314-1: second light-shielding layer

116、216:光準直層 116, 216: optical collimation layer

118:彩色濾光層 118: color filter layer

120、220:光源層 120, 220: light source layer

122:光源 122: Light source

124:蓋板 124: Cover

202:遮光材料 202: shading material

214-2、314-2:第三遮光層 214-2, 314-2: third shading layer

208、308:透明材料層 208, 308: transparent material layer

208-1、308-1:墊高部 208-1, 308-1: pad height

208-2、308-2:分隔部 208-2, 308-2: Partition

FP:指紋 FP: fingerprint

H1:高度 H1: height

L、L1:光 L, L1: light

P:畫素 P: Pixel

O1、O2、O3:孔洞 O1, O2, O3: holes

T1、T2、T1’、T2’、T3’、T4、T5:厚度 T1, T2, T1’, T2’, T3’, T4, T5: thickness

W1、W2:寬度 W1, W2: width

以下將配合所附圖式詳述本發明實施例。應注意的是,各種特徵部件並未按照比例繪製且僅用以說明例示。事實上,元件的尺寸可能經放大或縮小,以清楚地表現出本發明實施例的技術特徵。 The embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings. It should be noted that the various feature parts are not drawn to scale and are used for illustration only. In fact, the size of the element may be enlarged or reduced to clearly show the technical features of the embodiments of the present invention.

第1A、1B、1C、1D、1E、1F以及1G圖為一系列之剖面圖,其繪示出本發明一實施例之半導體裝置之形成方法。 FIGS. 1A, 1B, 1C, 1D, 1E, 1F, and 1G are a series of cross-sectional views illustrating a method of forming a semiconductor device according to an embodiment of the invention.

第1G’圖根據本發明一些實施例繪示出第1G圖之步驟的上視圖。 Figure 1G' depicts a top view of the steps of Figure 1G according to some embodiments of the invention.

第2圖繪示將本發明實施例之半導體裝置應用於生物辨識裝置的示意圖。 FIG. 2 is a schematic diagram of applying the semiconductor device of the embodiment of the present invention to a biometrics identification device.

第3A、3B、3C、3D、3E以及3F圖為一系列之剖面圖,其繪示出本發明另一實施例之半導體裝置之形成方法。 FIGS. 3A, 3B, 3C, 3D, 3E, and 3F are a series of cross-sectional views illustrating a method of forming a semiconductor device according to another embodiment of the invention.

第4圖繪示將本發明實施例之半導體裝置應用於生物辨識裝置的示意圖。 FIG. 4 is a schematic diagram of applying the semiconductor device of the embodiment of the present invention to a biometric device.

第5圖繪示將本發明實施例之半導體裝置應用於生物辨識裝置的示意圖。 FIG. 5 is a schematic diagram of applying the semiconductor device of the embodiment of the present invention to a biometrics identification device.

以下的揭露內容提供許多不同的實施例或範例以實施本案的不同特徵。以下的揭露內容敘述各個構件及其排列方式的特定範例,以簡化說明。當然,這些特定的範例並非用以限定。例如,若是本發明實施例敘述了一第一特徵部件形成於一第二特徵部件之上或上方,即表示其可能包含上述第一特徵部件與上述第二特徵部件是直接接觸的實施例,亦可能包含了有附加特徵部件形成於上述第一特徵部件與上述第二特徵部件之間,而使上述第一特徵部件與第二特徵部件可能未直接接觸的實施例。 The following disclosure provides many different embodiments or examples to implement the different features of this case. The following disclosure describes specific examples of various components and their arrangement to simplify the description. Of course, these specific examples are not meant to be limiting. For example, if an embodiment of the present invention describes a first feature part formed on or above a second feature part, it means that it may include an embodiment in which the first feature part is in direct contact with the second feature part, or It may include an embodiment in which additional feature parts are formed between the first feature part and the second feature part, so that the first feature part and the second feature part may not be in direct contact.

應理解的是,額外的操作步驟可實施於所述方法之前、之間或之後,且在所述方法的其他實施例中,部分的操作步驟可被取代或省略。 It should be understood that additional operating steps may be implemented before, during, or after the method, and in other embodiments of the method, some of the operating steps may be replaced or omitted.

此外,其中可能用到與空間相關用詞,例如「在...下方」、「下方」、「較低的」、「在...上方」、「上方」、「較高的」及類似的用詞,這些空間相關用詞係為了便於描述圖式中一個(些)元件或特徵部件與另一個(些)元件或特徵部件之間的關係,這些空間相關用詞包括使用中或操作中的裝置之不同方位,以及圖式中所描述的方位。當裝置被轉向不同方位時(旋轉90度或其他方位),則其中所使用的空間相關形容詞也將依轉向後的方位來解釋。 In addition, space-related terms may be used, such as "below", "below", "lower", "above", "above", "higher" and similar These spatially related terms are used to describe the relationship between one (s) element or feature part and another (s) element or feature part in the diagram, these spatially related terms include in use or in operation Different orientations of the device and the orientation described in the drawings. When the device is turned to different orientations (rotated 90 degrees or other orientations), the spatially related adjectives used in it will also be interpreted according to the turned orientation.

除非另外定義,在此使用的全部用語(包括技術及科 學用語)具有與此篇揭露所屬之一般技藝者所通常理解的相同涵義。能理解的是,這些用語,例如在通常使用的字典中定義的用語,應被解讀成具有與相關技術及本發明的背景或上下文一致的意思,而不應以一理想化或過度正式的方式解讀,除非在本發明實施例有特別定義。 Unless otherwise defined, all terms used here (including technical and scientific (Learning terms) has the same meaning as commonly understood by the general artisans in this article. Understandably, these terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning consistent with the background or context of the relevant technology and the present invention, and should not be interpreted in an idealized or excessively formal manner Interpretation, unless specifically defined in the embodiments of the present invention.

以下所揭露之不同實施例可能重複使用相同的參考符號及/或標記。這些重複係為了簡化與清晰的目的,並非用以限定所討論的不同實施例及/或結構之間有特定的關係。 Different embodiments disclosed below may reuse the same reference symbols and/or marks. These repetitions are for simplicity and clarity, and are not intended to limit the specific relationships between the different embodiments and/or structures discussed.

本發明實施例之半導體裝置之光準直層包括複數個具有不同截面積之孔洞的遮光層。由於在光準直層中設置了此些遮光層,並可配合設置透明材料層,因此光準直層之透明柱體可具有較小的高寬比(aspect ratio),藉此可避免或減少透明柱體發生倒塌的情況,同時使光準直層保有良好的準直效能。以下將以第1A~1G’圖所示的實施例進行說明。 The light collimating layer of the semiconductor device of the embodiment of the present invention includes a plurality of light-shielding layers with holes having different cross-sectional areas. Since these light-shielding layers are provided in the light collimating layer, and a transparent material layer can be provided in conjunction, the transparent cylinder of the light collimating layer can have a small aspect ratio, thereby avoiding or reducing The transparent column collapses, and at the same time, the light collimating layer maintains good collimating performance. The embodiment shown in FIGS. 1A to 1G' will be described below.

第1A、1B、1C、1D、1E、1F以及1G圖為一系列之剖面圖,其繪示出本發明一實施例之半導體裝置100之形成方法。第1G’圖根據本發明一些實施例繪示出第1G圖之步驟的上視圖。 FIGS. 1A, 1B, 1C, 1D, 1E, 1F, and 1G are a series of cross-sectional views illustrating a method of forming a semiconductor device 100 according to an embodiment of the invention. Figure 1G' depicts a top view of the steps of Figure 1G according to some embodiments of the invention.

首先,根據一些實施例,如第1A圖所示,提供基板101。基板101可具有頂表面101T以及相對於頂表面101T的底表面101B。 First, according to some embodiments, as shown in FIG. 1A, a substrate 101 is provided. The substrate 101 may have a top surface 101T and a bottom surface 101B opposite to the top surface 101T.

在一些實施例中,基板101可由元素半導體(例如,矽或鍺)、化合物半導體(例如,碳化矽(SiC)、砷化鎵(GaAs)、砷化銦 (InAs)或磷化銦(InP))、合金半導體(例如:SiGe、SiGeC、GaAsP或GaInP)、其他適當之半導體或前述之組合所形成。在一些實施例中,基板101可為絕緣層上半導體基板(semiconductor-on-insulator(SOI)substrate)。前述絕緣層上半導體基板可包括底板、設置於前述底板上的埋藏氧化層以及設置於前述埋藏氧化層上的半導體層。在一些實施例中,基板101可為一半導體晶圓(例如:矽晶圓或其他適當之半導體晶圓)。 In some embodiments, the substrate 101 may be made of elemental semiconductor (eg, silicon or germanium), compound semiconductor (eg, silicon carbide (SiC), gallium arsenide (GaAs), indium arsenide) (InAs) or indium phosphide (InP)), alloy semiconductors (for example: SiGe, SiGeC, GaAsP, or GaInP), other suitable semiconductors, or a combination of the foregoing. In some embodiments, the substrate 101 may be a semiconductor-on-insulator (SOI) substrate. The semiconductor substrate on the insulating layer may include a bottom plate, a buried oxide layer provided on the bottom plate, and a semiconductor layer provided on the buried oxide layer. In some embodiments, the substrate 101 may be a semiconductor wafer (for example, a silicon wafer or other suitable semiconductor wafer).

在一些實施例中,基板101可包括各種以如離子佈植及/或擴散製程所形成之p型摻雜區及/或n型摻雜區。舉例而言,前述摻雜區可被配置來形成電晶體、光電二極體及/或發光二極體,但本發明實施例並非以此為限。 In some embodiments, the substrate 101 may include various p-type doped regions and/or n-type doped regions formed by ion implantation and/or diffusion processes. For example, the aforementioned doped regions may be configured to form transistors, photodiodes, and/or light-emitting diodes, but the embodiments of the present invention are not limited thereto.

在一些實施例中,基板101可包括各種隔離特徵,以分隔基板101中不同之裝置區域。舉例而言,隔離特徵可包括淺溝槽隔離(shallow trench isolation,STI)特徵,但本發明實施例並非以此為限。在一些實施例中,形成淺溝槽隔離之步驟可包括於基板101中蝕刻出一溝槽,並於上述溝槽中填入絕緣材料(例如,氧化矽、氮化矽、或氮氧化矽)。所填充的溝槽可具有多層結構(例如,一熱氧化襯層以及填充於溝槽之氮化矽)。可進行化學機械研磨(Chemical mechanical polishing,CMP)製程以研磨多餘的絕緣材料並平坦化隔離特徵之上表面。 In some embodiments, the substrate 101 may include various isolation features to separate different device regions in the substrate 101. For example, the isolation features may include shallow trench isolation (STI) features, but the embodiments of the present invention are not limited thereto. In some embodiments, the step of forming a shallow trench isolation may include etching a trench in the substrate 101 and filling the trench with an insulating material (eg, silicon oxide, silicon nitride, or silicon oxynitride) . The filled trench may have a multi-layer structure (for example, a thermal oxide liner and silicon nitride filled in the trench). A chemical mechanical polishing (CMP) process can be performed to polish excess insulating material and planarize the upper surface of the isolation features.

在一些實施例中,基板101可包括各種導電特徵(例如,導線(conductive line)或導孔(via))。舉例而言,前述導電特徵可由鋁(Al)、銅(Cu)、鎢(W)、其各自之合金、其他適當之導電材料 或上述之組合所形成。 In some embodiments, the substrate 101 may include various conductive features (eg, conductive lines or vias). For example, the aforementioned conductive features may be made of aluminum (Al), copper (Cu), tungsten (W), their respective alloys, and other suitable conductive materials Or a combination of the above.

在第1A圖所示的實施例中,基板101可包括複數個畫素P。在一些實施例中,基板101之複數個畫素P可排列成一陣列,但本發明實施例並非以此為限。 In the embodiment shown in FIG. 1A, the substrate 101 may include a plurality of pixels P. In some embodiments, the plurality of pixels P of the substrate 101 may be arranged in an array, but the embodiment of the present invention is not limited thereto.

在一些實施例中,基板101之一個畫素P包括或對應至少一光電二極體及/或其他適當之元件,其可將所接收到的光訊號轉換成電流訊號。 In some embodiments, one pixel P of the substrate 101 includes or corresponds to at least one photodiode and/or other suitable elements, which can convert the received optical signal into a current signal.

接著,如第1B圖所示,根據一些實施例,將第一材料102設置於基板101之頂表面101T之上。在本實施例中,第一材料102為金屬,例如:銅(Cu)、銀(Ag)等,但本發明實施例並非以此為限。在其他實施例中,第一材料102可為光阻(例如,黑光阻或其他適當之非透明的光阻)、油墨(例如,黑色油墨或其他適當之非透明的油墨)、模制化合物(molding compound)(例如,黑色模制化合物或其他適當之非透明的模制化合物)、防焊材料(solder mask)(例如,黑色防焊材料或其他適當之非透明的防焊材料)、環氧樹脂、其他適當之材料或前述材料之組合。在一些實施例中,第一材料102可為光固化材料、熱固化材料或前述材料之組合。 Next, as shown in FIG. 1B, according to some embodiments, the first material 102 is disposed on the top surface 101T of the substrate 101. In this embodiment, the first material 102 is a metal, such as copper (Cu), silver (Ag), etc., but the embodiment of the present invention is not limited thereto. In other embodiments, the first material 102 may be photoresist (eg, black photoresist or other suitable non-transparent photoresist), ink (eg, black ink or other suitable non-transparent ink), molding compound ( molding compound) (for example, black molding compound or other suitable non-transparent molding compound), solder mask (for example, black solder protective material or other suitable non-transparent solder resist material), epoxy Resin, other suitable materials or a combination of the aforementioned materials. In some embodiments, the first material 102 may be a photo-curable material, a thermal-curable material, or a combination of the foregoing materials.

接著,如第1C圖所示,可進行圖案化製程以將第一材料102圖案化,形成第一遮光層104,第一遮光層104直接接觸基板101的頂表面101T。詳細而言,前述圖案化製程移除部分之第一材料102,以形成具有對應於畫素P的複數個孔洞O1的第一遮光層104。在一些實施例中,前述圖案化製程包括軟烘烤(soft baking)、光罩對準(mask aligning)、曝光(exposure)、曝光後烘烤(post-exposure baking)、 顯影(developing)、潤洗(rinsing)、乾燥、其他適當的步驟或前述步驟之組合。 Next, as shown in FIG. 1C, a patterning process may be performed to pattern the first material 102 to form a first light-shielding layer 104 that directly contacts the top surface 101T of the substrate 101. In detail, the aforementioned patterning process removes part of the first material 102 to form the first light-shielding layer 104 having a plurality of holes O1 corresponding to the pixel P. In some embodiments, the foregoing patterning process includes soft baking (soft baking), mask aligning (mask alignment), exposure (exposure), post-exposure baking (post-exposure baking), Developing, rinsing, drying, other suitable steps or a combination of the preceding steps.

接著,如第1D圖所示,將透明材料106設置於基板101之頂表面101T之上。舉例而言,透明材料106可為透明光阻、聚亞醯胺、環氧樹脂、其他適當之材料或前述材料之組合。於後續的製程中,可使用透明材料106來形成透明材料層與透明柱體(例如,後文所述之透明材料層108與透明柱體110),於後文將對此進行詳細說明。 Next, as shown in FIG. 1D, the transparent material 106 is provided on the top surface 101T of the substrate 101. For example, the transparent material 106 may be transparent photoresist, polyimide, epoxy resin, other suitable materials, or a combination of the foregoing materials. In the subsequent process, the transparent material 106 can be used to form the transparent material layer and the transparent pillar (for example, the transparent material layer 108 and the transparent pillar 110 described later), which will be described in detail later.

在一些實施例中,透明材料106可包括光固化材料、熱固化材料或上述之組合。舉例而言,可使用旋轉塗佈製程(spin-on coating process)將透明材料106塗佈於第一遮光層104與基板101之上,但本發明實施例並非以此為限。 In some embodiments, the transparent material 106 may include a photo-curable material, a thermal-curable material, or a combination of the foregoing. For example, a spin-on coating process may be used to coat the transparent material 106 on the first light-shielding layer 104 and the substrate 101, but the embodiments of the present invention are not limited thereto.

接著,如第1E圖所示,進行圖案化製程以將透明材料106圖案化,以形成透明材料層108與複數個透明柱體110。詳細而言,前述圖案化製程移除部分之透明材料106,而殘留在基板101(且對應於畫素P的複數個孔洞O1)上之透明材料106則成為透明材料層108與複數個透明柱體110。類似地,在一些實施例中,前述圖案化製程包括軟烘烤、光罩對準、曝光、曝光後烘烤、顯影、潤洗、乾燥、其他適當的步驟或前述步驟之組合。 Next, as shown in FIG. 1E, a patterning process is performed to pattern the transparent material 106 to form a transparent material layer 108 and a plurality of transparent pillars 110. In detail, the aforementioned patterning process removes part of the transparent material 106, and the transparent material 106 remaining on the substrate 101 (and corresponding to the plurality of holes O1 of the pixel P) becomes the transparent material layer 108 and the plurality of transparent pillars体110。 110. Similarly, in some embodiments, the foregoing patterning process includes soft baking, reticle alignment, exposure, post-exposure baking, development, rinsing, drying, other suitable steps, or a combination of the foregoing steps.

如第1E圖所示,在本實施例中,透明材料層108覆蓋第一遮光層104與畫素P,並填充第一遮光層104的孔洞O1;透明柱體110對應於畫素P設置。換句話說,在第1E圖所示之實施例中,透明材料層108可完全覆蓋(或部分地覆蓋)畫素P。在一些實施例中,覆蓋畫素P之透明材料層108(與第一遮光層104)可保護畫素P並減少或避免 畫素P於製程中受到損害及/或汙染之情況。在一些實施例中,透明柱體110排列成陣列,但本發明實施例並非以此為限。 As shown in FIG. 1E, in this embodiment, the transparent material layer 108 covers the first light-shielding layer 104 and the pixel P, and fills the hole O1 of the first light-shielding layer 104; the transparent pillar 110 is disposed corresponding to the pixel P. In other words, in the embodiment shown in FIG. 1E, the transparent material layer 108 may completely cover (or partially cover) the pixel P. In some embodiments, the transparent material layer 108 (and the first light-shielding layer 104) covering the pixel P can protect the pixel P and reduce or avoid Pixel P is damaged and/or contaminated during the manufacturing process. In some embodiments, the transparent pillars 110 are arranged in an array, but the embodiments of the present invention are not limited thereto.

接著,如第1F圖所示,在一些實施例中,將第二材料112設置於透明材料層108之頂表面之上。在一些實施例中,第二材料112可填充透明柱體110之間的開口並覆蓋透明柱體110。 Next, as shown in FIG. 1F, in some embodiments, the second material 112 is disposed on the top surface of the transparent material layer 108. In some embodiments, the second material 112 may fill the opening between the transparent pillars 110 and cover the transparent pillars 110.

在本實施例中,第一材料102與第二材料112不同。舉例而言,第一材料102可為金屬,而第二材料112可為光阻(例如,黑光阻或其他適當之非透明的光阻)、油墨(例如,黑色油墨或其他適當之非透明的油墨)、模制化合物(molding compound)(例如,黑色模制化合物或其他適當之非透明的模制化合物)、防焊材料(solder mask)(例如,黑色防焊材料或其他適當之非透明的防焊材料)、環氧樹脂、其他適當之材料或前述材料之組合。在一些實施例中,第二材料112可為光固化材料、熱固化材料或前述材料之組合。然而,本發明實施例並非以此為限。在其他實施例中,第一材料102也可與第二材料112相同,即第一材料102可為光阻、油墨、模制化合物、防焊材料、環氧樹脂、其他適當之材料或前述材料之組合。 In this embodiment, the first material 102 and the second material 112 are different. For example, the first material 102 may be metal, and the second material 112 may be photoresist (eg, black photoresist or other suitable non-transparent photoresist), ink (eg, black ink or other suitable non-transparent Ink), molding compound (for example, black molding compound or other suitable non-transparent molding compound), solder mask (for example, black solder resistance material or other suitable non-transparent Solder resist material), epoxy resin, other suitable materials or a combination of the foregoing materials. In some embodiments, the second material 112 may be a photo-curable material, a thermal-curable material, or a combination of the foregoing materials. However, the embodiments of the present invention are not limited thereto. In other embodiments, the first material 102 may also be the same as the second material 112, that is, the first material 102 may be photoresist, ink, molding compound, solder resist material, epoxy resin, other suitable materials, or the foregoing materials Of the combination.

接著,如第1G圖所示,可對第二材料112進行固化製程。舉例而言,上述固化製程可為光固化製程、熱固化製程或上述組合。接著,進行平坦化製程移除部分第二材料112,以暴露出透明柱體110的頂表面並形成第二遮光層114。在一些實施例中,上述平坦化製程亦移除透明柱體110之一部分(例如,透明柱體110之頂部的一部分)。舉例而言,前述平坦化製程可為化學機械研磨製程、研磨製程、回蝕刻製程、其他適當之製程或上述之組合。 Next, as shown in FIG. 1G, the second material 112 may be cured. For example, the above curing process may be a photo curing process, a thermal curing process, or a combination of the above. Next, a planarization process is performed to remove a part of the second material 112 to expose the top surface of the transparent pillar 110 and form the second light-shielding layer 114. In some embodiments, the above planarization process also removes a portion of the transparent pillar 110 (eg, a portion of the top of the transparent pillar 110). For example, the aforementioned planarization process may be a chemical mechanical polishing process, a polishing process, an etch-back process, other suitable processes, or a combination thereof.

在一些實施例中,在前述平坦化製程之後,第二遮光層114的頂表面與透明柱體110的頂表面相互對齊。亦即,在上述平坦化製程之後,第二遮光層114的頂表面與透明柱體110的頂表面共平面。 In some embodiments, after the aforementioned planarization process, the top surface of the second light-shielding layer 114 and the top surface of the transparent pillar 110 are aligned with each other. That is, after the above planarization process, the top surface of the second light-shielding layer 114 and the top surface of the transparent pillar 110 are coplanar.

在一些實施例中,如第1G圖與第1G’圖所示,第二遮光層114圍繞透明柱體110。亦即,在第1G圖與第1G’圖所示之實施例中,透明柱體110設置於第二遮光層114中。在一些實施例中,如第1G’圖所示,透明柱體110具有圓形的頂表面。但本發明實施例並非以此為限。在其他實施例中,透明柱體110的頂表面可為橢圓形、長圓形(oblong)、矩形、六角形、不規則形、其他適當之形狀或前述形狀之組合。 In some embodiments, as shown in FIGS. 1G and 1G', the second light-shielding layer 114 surrounds the transparent pillar 110. That is, in the embodiments shown in FIGS. 1G and 1G', the transparent pillar 110 is disposed in the second light-shielding layer 114. In some embodiments, as shown in FIG. 1G', the transparent cylinder 110 has a round top surface. However, the embodiments of the present invention are not limited thereto. In other embodiments, the top surface of the transparent cylinder 110 may be elliptical, oblong, rectangular, hexagonal, irregular, other suitable shapes, or a combination of the aforementioned shapes.

此外,由於透明柱體110對應於畫素P設置,因此,複數個透明柱體110亦分別對應於第一遮光層104的複數個孔洞O1。在一些實施例中,透明柱體110的寬度W2大於所對應之孔洞O1的寬度W1。舉例來說,透明柱體110的寬度W2可介於6~20μm,而孔洞O1的寬度W1可介於1~10μm。在此,透明柱體110的寬度W2定義為透明柱體110的截面的最大寬度,且孔洞O1的寬度W1定義為孔洞的截面的最大寬度。舉例來說,在本實施例中,透明柱體110的截面為圓形,因此透明柱體110的寬度W2為此圓形的直徑;孔洞O1的截面為圓形,因此孔洞O1的寬度W1為此圓形的直徑。 In addition, since the transparent pillars 110 are arranged corresponding to the pixels P, the plurality of transparent pillars 110 also respectively correspond to the plurality of holes O1 of the first light-shielding layer 104. In some embodiments, the width W2 of the transparent pillar 110 is greater than the width W1 of the corresponding hole O1. For example, the width W2 of the transparent pillar 110 may be between 6-20 μm, and the width W1 of the hole O1 may be between 1-10 μm. Here, the width W2 of the transparent cylinder 110 is defined as the maximum width of the cross section of the transparent cylinder 110, and the width W1 of the hole O1 is defined as the maximum width of the cross section of the hole. For example, in this embodiment, the cross section of the transparent cylinder 110 is circular, so the width W2 of the transparent cylinder 110 is the diameter of the circle; the cross section of the hole O1 is circular, so the width W1 of the hole O1 is The diameter of this circle.

在一些實施例中,遮光層的厚度彼此不同。舉例來說,在第1G圖所示之實施例中,第一遮光層104的厚度T1小於第二遮光層114的厚度T2。舉例來說,第一遮光層104的厚度T1可介於4~20μm, 而第二遮光層114的厚度T2可介於10~90μm。但本發明實施例並非以此為限。 In some embodiments, the thickness of the light shielding layer is different from each other. For example, in the embodiment shown in FIG. 1G, the thickness T1 of the first light shielding layer 104 is smaller than the thickness T2 of the second light shielding layer 114. For example, the thickness T1 of the first light-shielding layer 104 may be between 4-20 μm, The thickness T2 of the second light-shielding layer 114 may be between 10 and 90 μm. However, the embodiments of the present invention are not limited thereto.

如第1G圖所示,在一些實施例中,透明柱體110與第一遮光層104、第二遮光層114及透明材料層108共同形成半導體裝置100的光準直層116。在此,透明柱體110所佔據之空間可視為第二遮光層114的複數個孔洞O2,此些孔洞O2對應於複數個畫素P,且第一遮光層104之孔洞O1的截面積小於第二遮光層114之孔洞O2的截面積。 As shown in FIG. 1G, in some embodiments, the transparent pillar 110, the first light-shielding layer 104, the second light-shielding layer 114, and the transparent material layer 108 together form the light collimating layer 116 of the semiconductor device 100. Here, the space occupied by the transparent pillar 110 can be regarded as a plurality of holes O2 of the second light-shielding layer 114, the holes O2 correspond to the plurality of pixels P, and the cross-sectional area of the hole O1 of the first light-shielding layer 104 is smaller than the first The cross-sectional area of the hole O2 of the two light shielding layers 114.

可依據光的路徑調整第一遮光層104之孔洞O1與第二遮光層114之孔洞O2的大小,避免半導體裝置100內的光彼此發生串擾(crosstalk),並配合設置透明材料層108,因此,光準直層116的透明柱體110可具有較小的高寬比(例如,透明柱體110的高度H1與寬度W2的比值(亦即,H1/W2)為0.5至15),藉此可避免或減少透明柱體110倒塌,同時使光準直層116保有良好的準直效能。 The size of the hole O1 of the first light-shielding layer 104 and the hole O2 of the second light-shielding layer 114 can be adjusted according to the path of light, to avoid crosstalk between the light in the semiconductor device 100, and the transparent material layer 108 is provided in cooperation. Therefore, The transparent cylinder 110 of the light collimating layer 116 may have a small aspect ratio (for example, the ratio of the height H1 to the width W2 of the transparent cylinder 110 (that is, H1/W2) is 0.5 to 15), thereby To avoid or reduce the collapse of the transparent pillar 110, at the same time, the light collimating layer 116 maintains good collimating performance.

第2圖繪示將本發明實施例之半導體裝置100應用於生物辨識裝置10的示意圖。在此,生物辨識裝置10例如為指紋辨識裝置。 FIG. 2 is a schematic diagram of applying the semiconductor device 100 of the embodiment of the present invention to the biometrics device 10. Here, the biometrics recognition device 10 is, for example, a fingerprint recognition device.

如第2圖所示,在一些實施例中,生物辨識裝置10包含半導體裝置100、彩色濾光層118以及光源層120。半導體裝置100可以前述第1A~1G圖的步驟形成。接著,可將彩色濾光層118設置於半導體裝置100之上。彩色濾光層118可由聚合物材料或其他適當的材料所形成,其用於限制使特定波長的光通過彩色濾光層118,其他波長的光則被隔絕。 As shown in FIG. 2, in some embodiments, the biometric device 10 includes a semiconductor device 100, a color filter layer 118 and a light source layer 120. The semiconductor device 100 can be formed by the steps of FIGS. 1A to 1G described above. Next, the color filter layer 118 may be disposed on the semiconductor device 100. The color filter layer 118 may be formed of a polymer material or other suitable materials, which is used to restrict the passage of light of a specific wavelength through the color filter layer 118, while the light of other wavelengths is isolated.

接著,可將光源層120設置於彩色濾光層118之上。在一些實施例中,光源層120可包含光源(例如,發光二極體)122,光源122可例如以陣列形式排列。此外,光源層120可進一步包含阻擋層、其他適當之光學元件或前述之組合(未標示)。光源層120的頂部可例如設置蓋板(例如,玻璃蓋板)124,以形成如指紋辨識裝置之生物辨識裝置。應理解的是,光源層120中可能包含其他未繪示於第2圖中的元件,本發明實施例並非以此為限。 Then, the light source layer 120 can be disposed on the color filter layer 118. In some embodiments, the light source layer 120 may include a light source (eg, light emitting diode) 122, and the light sources 122 may be arranged in an array, for example. In addition, the light source layer 120 may further include a barrier layer, other suitable optical elements, or a combination of the foregoing (not shown). The top of the light source layer 120 may be provided with a cover plate (for example, a glass cover plate) 124 to form a biometric device such as a fingerprint identification device. It should be understood that the light source layer 120 may include other elements not shown in FIG. 2, and the embodiments of the present invention are not limited thereto.

舉例來說,由光源122發出的光線會受到外部的生物特徵(例如,指紋FP)所阻擋而產生不同的反射光L通過彩色濾光層118。彩色濾光層118可限制對應於畫素P(例如,包括或對應至少一光電二極體及/或其他適當之元件)的特定波長的光L1通過,其他波長的光則被隔絕。通過彩色濾光層118後的光進入第二遮光層114中的透明柱體110。由於第二遮光層114可為黑色(例如,由黑光阻、黑色油墨、黑色模制化合物或黑色防焊材料所形成),且第二遮光層114之孔洞O2的大小(或透明柱體110的寬度W2)是依據光的路徑所調整,因此可防止光L1彼此發生串擾,增進光準直層116之準直效能。接著,通過透明柱體110的光L1進入透明材料層108,之後再通過第一遮光層104之孔洞O1進入畫素P。類似地,由於第一遮光層104之孔洞O1的大小是依據光的路徑所調整,因此可防止光L1彼此發生串擾,增進光準直層116之準直效能。 For example, the light emitted by the light source 122 is blocked by external biological features (for example, fingerprint FP) to generate different reflected light L through the color filter layer 118. The color filter layer 118 may restrict the passage of light L1 of a specific wavelength corresponding to the pixel P (for example, including or corresponding to at least one photodiode and/or other suitable elements), while light of other wavelengths is blocked. The light passing through the color filter layer 118 enters the transparent pillar 110 in the second light shielding layer 114. Since the second light-shielding layer 114 may be black (for example, formed of black photoresist, black ink, black molding compound, or black solder resist material), and the size of the hole O2 of the second light-shielding layer 114 (or the transparent pillar 110) The width W2) is adjusted according to the path of light, thus preventing crosstalk between the light L1 and improving the collimating performance of the light collimating layer 116. Next, the light L1 passing through the transparent cylinder 110 enters the transparent material layer 108, and then enters the pixel P through the hole O1 of the first light-shielding layer 104. Similarly, since the size of the hole O1 of the first light-shielding layer 104 is adjusted according to the path of light, crosstalk between the light L1 can be prevented, and the collimating performance of the light collimating layer 116 can be improved.

在一些實施例中,使用金屬(例如,銅、銀)作為製成第一遮光層104的第一材料102可有效簡化製程。此外,經由前述光L(或光L1)的路徑可知,由於複數個遮光層(例如,第一遮光層104與 第二遮光層114)之孔洞(例如孔洞O1與O2)的大小是依據光的路徑調整,能有效對光進行限位,避免光彼此發生串擾,同時配合設置透明材料層108,可使光準直層116的透明柱體110可具有較小的高寬比,藉此可避免或減少透明柱體110倒塌,同時使光準直層116保有良好的準直效能(即畫素P所感測的解析度(resolution)更進步)。 In some embodiments, using metal (eg, copper, silver) as the first material 102 for forming the first light-shielding layer 104 can effectively simplify the manufacturing process. In addition, through the path of the aforementioned light L (or light L1), it can be seen that due to the plurality of light-shielding layers (for example, the The size of the holes (such as holes O1 and O2) of the second light-shielding layer 114) is adjusted according to the path of the light, which can effectively limit the light and prevent the light from crosstalking with each other. At the same time, the transparent material layer 108 is provided to make the light accurate The transparent pillar 110 of the straight layer 116 may have a small aspect ratio, thereby avoiding or reducing the collapse of the transparent pillar 110, and at the same time, the light collimating layer 116 maintains good collimating performance (that is, the pixel P senses The resolution is more advanced).

第3A、3B、3C、3D、3E以及3F圖為一系列之剖面圖,其繪示出本發明另一實施例之半導體裝置100’之形成方法。半導體裝置100’與半導體裝置100的一些差異在於半導體裝置100’的第一遮光層204的設置位置以及第二遮光層214-1的結構。後文將詳細描述。 Figures 3A, 3B, 3C, 3D, 3E, and 3F are a series of cross-sectional views illustrating a method of forming a semiconductor device 100' according to another embodiment of the present invention. Some differences between the semiconductor device 100' and the semiconductor device 100 are the location of the first light-shielding layer 204 of the semiconductor device 100' and the structure of the second light-shielding layer 214-1. This will be described in detail later.

首先,根據一些實施例,如第3A圖所示,提供基板101,基板101可具有頂表面101T以及相對於頂表面101T的底表面101B。基板101可包括複數個畫素P。在一些實施例中,基板101之複數個畫素P可排列成一陣列,但本發明實施例並非以此為限。在一些實施例中,基板101之一個畫素P包括或對應至少一光電二極體及/或其他適當之元件,其可將所接收到的光訊號轉換成電流訊號。 First, according to some embodiments, as shown in FIG. 3A, a substrate 101 is provided, and the substrate 101 may have a top surface 101T and a bottom surface 101B opposite to the top surface 101T. The substrate 101 may include a plurality of pixels P. In some embodiments, the plurality of pixels P of the substrate 101 may be arranged in an array, but the embodiment of the present invention is not limited thereto. In some embodiments, one pixel P of the substrate 101 includes or corresponds to at least one photodiode and/or other suitable elements, which can convert the received optical signal into a current signal.

接著,根據一些實施例,將透明材料106設置於基板101之頂表面101T之上,使透明材料106可完全覆蓋或部分地覆蓋畫素P。舉例而言,透明材料106可為透明光阻、聚亞醯胺、環氧樹脂、其他適當之材料或前述材料之組合。於後續的製程中,可使用透明材料106來形成透明材料層與透明柱體(例如,後文所述之透明材料層108與透明柱體210),於後文將對此進行詳細說明。 Next, according to some embodiments, the transparent material 106 is disposed on the top surface 101T of the substrate 101 so that the transparent material 106 can completely cover or partially cover the pixel P. For example, the transparent material 106 may be transparent photoresist, polyimide, epoxy resin, other suitable materials, or a combination of the foregoing materials. In the subsequent process, the transparent material 106 can be used to form the transparent material layer and the transparent pillar (for example, the transparent material layer 108 and the transparent pillar 210 described later), which will be described in detail later.

在一些實施例中,透明材料106可包括光固化材料、熱 固化材料或上述之組合。舉例而言,可使用旋轉塗佈製程(spin-on coating process)將透明材料106塗佈於基板101之頂表面101T之上,但本發明實施例並非以此為限。 In some embodiments, the transparent material 106 may include a photocurable material, heat Cured material or a combination of the above. For example, a spin-on coating process may be used to coat the transparent material 106 on the top surface 101T of the substrate 101, but the embodiments of the present invention are not limited thereto.

接著,根據一些實施例,如第3B圖所示,將遮光材料202設置於透明材料106上。在本實施例中,遮光材料202可為光阻(例如,黑光阻或其他適當之非透明的光阻)、油墨(例如,黑色油墨或其他適當之非透明的油墨)、模制化合物(molding compound)(例如,黑色模制化合物或其他適當之非透明的模制化合物)、防焊材料(solder mask)(例如,黑色防焊材料或其他適當之非透明的防焊材料)、環氧樹脂、其他適當之材料或前述材料之組合。在一些實施例中,遮光材料202可為光固化材料、熱固化材料或前述材料之組合。但本發明實施例並非以此為限。在其他實施例中,遮光材料202也可為金屬,例如:銅、銀等。 Next, according to some embodiments, as shown in FIG. 3B, the light-shielding material 202 is disposed on the transparent material 106. In this embodiment, the light-shielding material 202 may be photoresist (eg, black photoresist or other suitable non-transparent photoresist), ink (eg, black ink or other suitable non-transparent ink), molding compound (molding) compound) (e.g. black molding compound or other suitable non-transparent molding compound), solder mask (e.g. black solder mask or other suitable non-transparent solder resist material), epoxy resin , Other suitable materials or combinations of the foregoing materials. In some embodiments, the light-shielding material 202 may be a photo-curable material, a thermal-curable material, or a combination of the foregoing materials. However, the embodiments of the present invention are not limited thereto. In other embodiments, the light-shielding material 202 may also be metal, such as copper, silver, etc.

接著,如第3B圖所示,可進行圖案化製程以將遮光材料202圖案化,形成第一遮光層204。詳細而言,前述圖案化製程移除部分之遮光材料202,以形成具有對應於畫素P的複數個孔洞O1的第一遮光層204。在一些實施例中,前述圖案化製程包括軟烘烤(soft baking)、光罩對準(mask aligning)、曝光(exposure)、曝光後烘烤(post-exposure baking)、顯影(developing)、潤洗(rinsing)、乾燥、其他適當的步驟或前述步驟之組合。 Next, as shown in FIG. 3B, a patterning process may be performed to pattern the light-shielding material 202 to form the first light-shielding layer 204. In detail, the aforementioned patterning process removes part of the light-shielding material 202 to form the first light-shielding layer 204 having a plurality of holes O1 corresponding to the pixels P. In some embodiments, the aforementioned patterning process includes soft baking, mask aligning, exposure, post-exposure baking, developing, and moisturizing. Rinsing, drying, other suitable steps or a combination of the preceding steps.

接著,根據一些實施例,如第3C圖所示,將透明材料106設置於第一遮光層204之上,使透明材料106可完全覆蓋或部分地覆蓋第一遮光層204並填充第一遮光層204的複數個孔洞O1。 Next, according to some embodiments, as shown in FIG. 3C, the transparent material 106 is disposed on the first light-shielding layer 204 so that the transparent material 106 can completely cover or partially cover the first light-shielding layer 204 and fill the first light-shielding layer A plurality of holes O1 of 204.

接著,根據一些實施例,如第3D圖所示,再次將遮光材料202設置於透明材料106上,並進行圖案化製程以將遮光材料202圖案化,形成第二遮光層214-1。詳細而言,前述圖案化製程移除部分之遮光材料202,以形成具有對應於畫素P的複數個孔洞O2的第二遮光層214-1。類似地,前述圖案化製程包括軟烘烤、光罩對準、曝光、曝光後烘烤、顯影、潤洗、乾燥、其他適當的步驟或前述步驟之組合。 Next, according to some embodiments, as shown in FIG. 3D, the light-shielding material 202 is again disposed on the transparent material 106, and a patterning process is performed to pattern the light-shielding material 202 to form a second light-shielding layer 214-1. In detail, the aforementioned patterning process removes part of the light-shielding material 202 to form the second light-shielding layer 214-1 having a plurality of holes O2 corresponding to the pixels P. Similarly, the aforementioned patterning process includes soft baking, reticle alignment, exposure, post-exposure baking, development, rinsing, drying, other suitable steps, or a combination of the aforementioned steps.

接著,根據一些實施例,如第3E圖所示,將透明材料106設置於第二遮光層214-1之上,使透明材料106可完全覆蓋或部分地覆蓋第二遮光層214-1並填充第二遮光層214-1的複數個孔洞O2。 Next, according to some embodiments, as shown in FIG. 3E, the transparent material 106 is disposed on the second light-shielding layer 214-1 so that the transparent material 106 can completely cover or partially cover and fill the second light-shielding layer 214-1 The plurality of holes O2 of the second light-shielding layer 214-1.

接著,根據一些實施例,如第3F圖所示,再次將遮光材料202設置於透明材料106上,並進行圖案化製程以將遮光材料202圖案化,形成第三遮光層214-2。詳細而言,前述圖案化製程移除部分之遮光材料202,以形成具有對應於畫素P的複數個孔洞O3的第三遮光層214-2。類似地,前述圖案化製程包括軟烘烤、光罩對準、曝光、曝光後烘烤、顯影、潤洗、乾燥、其他適當的步驟或前述步驟之組合。 Next, according to some embodiments, as shown in FIG. 3F, the light-shielding material 202 is again disposed on the transparent material 106, and a patterning process is performed to pattern the light-shielding material 202 to form a third light-shielding layer 214-2. In detail, the aforementioned patterning process removes part of the light-shielding material 202 to form a third light-shielding layer 214-2 having a plurality of holes O3 corresponding to the pixels P. Similarly, the aforementioned patterning process includes soft baking, reticle alignment, exposure, post-exposure baking, development, rinsing, drying, other suitable steps, or a combination of the aforementioned steps.

在一些實施例中,可選擇地以透明材料106填充第三遮光層214-2的複數個孔洞O3,以使第三遮光層214-2的頂表面平坦化。但本發明實施例並非以此為限。 In some embodiments, the plurality of holes O3 of the third light-shielding layer 214-2 is optionally filled with a transparent material 106 to flatten the top surface of the third light-shielding layer 214-2. However, the embodiments of the present invention are not limited thereto.

在一些實施例中,由透明材料106所形成的透明材料層208可包含墊高部208-1與分隔部208-2。如第3F圖所示,墊高部208-1設置於基板101與第一遮光層204之間,而分隔部208-2設置於第一遮 光層204與第二遮光層214-1之間以及第二遮光層214-1與第三遮光層214-2之間。 In some embodiments, the transparent material layer 208 formed of the transparent material 106 may include a pad portion 208-1 and a partition portion 208-2. As shown in FIG. 3F, the pad portion 208-1 is provided between the substrate 101 and the first light-shielding layer 204, and the partition portion 208-2 is provided in the first mask Between the light layer 204 and the second light-shielding layer 214-1 and between the second light-shielding layer 214-1 and the third light-shielding layer 214-2.

如第3F圖所示,在本實施例中,填充於第一遮光層204的複數個孔洞O1的透明材料、填充於第二遮光層214-1的複數個孔洞O2的透明材料以及可選擇地填充於第三遮光層214-2的複數個孔洞O3的透明材料皆可視為半導體裝置100’的透明柱體210。亦即,本實施例之透明柱體210可設置於第一遮光層204中、第二遮光層214-1中及第三遮光層214-2中。類似地,透明柱體210可具有圓形的頂表面。但本發明實施例並非以此為限。在其他實施例中,透明柱體210的頂表面可為橢圓形、長圓形、矩形、六角形、不規則形、其他適當之形狀或前述形狀之組合。 As shown in FIG. 3F, in this embodiment, the transparent material of the plurality of holes O1 filled in the first light-shielding layer 204, the transparent material of the plurality of holes O2 filled in the second light-shielding layer 214-1, and optionally The transparent material filled in the plurality of holes O3 of the third light-shielding layer 214-2 can be regarded as the transparent pillar 210 of the semiconductor device 100'. That is, the transparent pillar 210 of this embodiment may be disposed in the first light-shielding layer 204, the second light-shielding layer 214-1, and the third light-shielding layer 214-2. Similarly, the transparent cylinder 210 may have a round top surface. However, the embodiments of the present invention are not limited thereto. In other embodiments, the top surface of the transparent cylinder 210 may be elliptical, oblong, rectangular, hexagonal, irregular, other suitable shapes, or a combination of the aforementioned shapes.

如第3F圖所示,在一些實施例中,透明柱體210與第一遮光層204、第二遮光層214-1、第三遮光層214-2及透明材料層208共同形成半導體裝置100’的光準直層216。 As shown in FIG. 3F, in some embodiments, the transparent pillar 210, the first light-shielding layer 204, the second light-shielding layer 214-1, the third light-shielding layer 214-2, and the transparent material layer 208 together form the semiconductor device 100'的光光向层216。 The light collimating layer 216.

在一些實施例中,第二遮光層214-1的孔洞O2的截面積與第三遮光層214-2的孔洞O3的截面積彼此不相同。舉例來說,在第3F圖所示的實施例中,第二遮光層214-1的孔洞O2的截面積小於第三遮光層214-2的孔洞的截面積;第一遮光層204的孔洞O1的截面積大於第二遮光層214-1的孔洞O2的截面積,但小於第三遮光層214-2的孔洞O3的截面積。但本發明實施例並非受限於此。在其他實施例中,第一遮光層204的孔洞O1的截面積可等於第三遮光層214-2的孔洞O3的截面積。 In some embodiments, the cross-sectional area of the hole 02 of the second light-shielding layer 214-1 and the cross-sectional area of the hole O3 of the third light-shielding layer 214-2 are different from each other. For example, in the embodiment shown in FIG. 3F, the cross-sectional area of the hole 02 of the second shading layer 214-1 is smaller than the cross-sectional area of the hole of the third shading layer 214-2; the hole O1 of the first shading layer 204 The cross-sectional area of is larger than the cross-sectional area of the hole O2 of the second light-shielding layer 214-1, but smaller than the cross-sectional area of the hole O3 of the third light-shielding layer 214-2. However, the embodiments of the present invention are not limited thereto. In other embodiments, the cross-sectional area of the hole O1 of the first light-shielding layer 204 may be equal to the cross-sectional area of the hole O3 of the third light-shielding layer 214-2.

可依據光的路徑調整第一遮光層204之孔洞O1、第二 遮光層214-1之孔洞O2及第三遮光層214-2之孔洞O3的大小,避免半導體裝置100’內的光彼此發生串擾,並配合設置透明材料層208,因此,光準直層216的每個透明柱體210可具有較小的高寬比,藉此可避免或減少透明柱體210倒塌,同時使光準直層216保有良好的準直效能。 The holes O1 and the second of the first shading layer 204 can be adjusted according to the path of light The size of the hole O2 of the light-shielding layer 214-1 and the hole O3 of the third light-shielding layer 214-2 avoid crosstalk of light in the semiconductor device 100' with each other, and the transparent material layer 208 is provided in cooperation. Therefore, the light collimating layer 216 Each transparent pillar 210 may have a small aspect ratio, thereby avoiding or reducing the collapse of the transparent pillar 210, while maintaining a good collimating performance of the light collimating layer 216.

在一些實施例中,第二遮光層214-1的厚度T2’可與第三遮光層214-1的厚度T3’不同。但本發明實施例並非以此為限。在其他實施例中,第一遮光層204的厚度T1’、第二遮光層214-1的厚度T2’與第三遮光層214-2的厚度T3’皆相同,可依實際需求改變第一遮光層204、第二遮光層214-1與第三遮光層214-2的厚度。此外,第一遮光層204、第二遮光層214-1與第三遮光層214-2彼此之間的距離也可不相同,可依據光的路徑進行調整。 In some embodiments, the thickness T2' of the second light shielding layer 214-1 may be different from the thickness T3' of the third light shielding layer 214-1. However, the embodiments of the present invention are not limited thereto. In other embodiments, the thickness T1' of the first light-shielding layer 204, the thickness T2' of the second light-shielding layer 214-1, and the thickness T3' of the third light-shielding layer 214-2 are the same, and the first light-shielding layer can be changed according to actual needs The thickness of the layer 204, the second light-shielding layer 214-1, and the third light-shielding layer 214-2. In addition, the distances between the first light-shielding layer 204, the second light-shielding layer 214-1, and the third light-shielding layer 214-2 may be different, and may be adjusted according to the path of light.

應注意的是,在一些實施例中,半導體裝置100’也可不包含第三遮光層214-2。此外,在一些實施例中,可重複第3C~3D圖(或第3E~3F圖)的流程步驟以形成更多的遮光層。本發明實施例並未限定遮光層的數量,可依實際需求而改變。 It should be noted that, in some embodiments, the semiconductor device 100' may not include the third light-shielding layer 214-2. In addition, in some embodiments, the process steps of FIGS. 3C~3D (or FIGS. 3E~3F) may be repeated to form more light-shielding layers. The embodiments of the present invention do not limit the number of light-shielding layers, and can be changed according to actual needs.

第4圖繪示將本發明實施例之半導體裝置100’應用於生物辨識裝置10’的示意圖。在此,生物辨識裝置10’例如為指紋辨識裝置。 FIG. 4 is a schematic diagram of applying the semiconductor device 100' of the embodiment of the present invention to the biometric device 10'. Here, the biometrics recognition device 10' is, for example, a fingerprint recognition device.

如第4圖所示,在一些實施例中,生物辨識裝置10’包含半導體裝置100’、彩色濾光層118以及光源層120。半導體裝置100’可以前述第3A~3F圖的步驟形成。接著,可將彩色濾光層118設置於半導體裝置100’之上。彩色濾光層118可由聚合物材料 或其他適當的材料所形成,其用於限制使特定波長的光通過彩色濾光層118,其他波長的光則被隔絕。 As shown in FIG. 4, in some embodiments, the biometric device 10' includes a semiconductor device 100', a color filter layer 118, and a light source layer 120. The semiconductor device 100' can be formed by the aforementioned steps of FIGS. 3A to 3F. Next, the color filter layer 118 may be disposed on the semiconductor device 100'. The color filter layer 118 may be made of a polymer material Or other suitable materials, which are used to restrict the passage of light of a specific wavelength through the color filter layer 118, while the light of other wavelengths is isolated.

接著,可將光源層120設置於彩色濾光層118之上。在一些實施例中,光源層120可包含光源(例如,發光二極體)122,光源122可例如以陣列形式排列。此外,光源層120可進一步包含阻擋層、其他適當之光學元件或前述之組合(未標示)。光源層120的頂部可例如設置蓋板(例如,玻璃蓋板)124,以形成如指紋辨識裝置之生物辨識裝置。應理解的是,光源層120中可能包含其他未繪示於第4圖中的元件,本發明實施例並非以此為限。 Then, the light source layer 120 can be disposed on the color filter layer 118. In some embodiments, the light source layer 120 may include a light source (eg, light emitting diode) 122, and the light sources 122 may be arranged in an array, for example. In addition, the light source layer 120 may further include a barrier layer, other suitable optical elements, or a combination of the foregoing (not shown). The top of the light source layer 120 may be provided with a cover plate (for example, a glass cover plate) 124 to form a biometric device such as a fingerprint identification device. It should be understood that the light source layer 120 may include other elements not shown in FIG. 4, and the embodiments of the present invention are not limited thereto.

舉例來說,由光源122發出的光線會受到外部的生物特徵(例如,指紋FP)所阻擋而產生不同的反射光L通過彩色濾光層118。彩色濾光層118可限制對應於畫素P(例如,包括或對應至少一光電二極體及/或其他適當之元件)的特定波長的光L1通過,其他波長的光則被隔絕。通過彩色濾光層118後的光依序進入第三遮光層214-2、第二遮光層214-1與第一遮光層204中的透明柱體210。由於第一遮光層204、第二遮光層214-1與第三遮光層214-2可為黑色(例如,由黑光阻、黑色油墨、黑色模制化合物或黑色防焊材料所形成),且第一遮光層204的孔洞O1、第二遮光層214-1的孔洞O2及第三遮光層214-2之孔洞O3的大小(或透明柱體210的寬度)是依據光的路徑所調整,因此可防止光L1彼此發生串擾,增進光準直層216之準直效能。 For example, the light emitted by the light source 122 is blocked by external biological features (for example, fingerprint FP) to generate different reflected light L through the color filter layer 118. The color filter layer 118 may restrict the passage of light L1 of a specific wavelength corresponding to the pixel P (for example, including or corresponding to at least one photodiode and/or other suitable elements), while light of other wavelengths is blocked. The light passing through the color filter layer 118 sequentially enters the transparent pillar 210 in the third light-shielding layer 214-2, the second light-shielding layer 214-1, and the first light-shielding layer 204. Since the first light-shielding layer 204, the second light-shielding layer 214-1, and the third light-shielding layer 214-2 may be black (for example, formed of black photoresist, black ink, black molding compound, or black solder resist material), and the first The size of the hole O1 of the light-shielding layer 204, the hole O2 of the second light-shielding layer 214-1, and the hole O3 of the third light-shielding layer 214-2 (or the width of the transparent pillar 210) are adjusted according to the path of light, so The crosstalk of the light L1 is prevented, and the collimating performance of the light collimating layer 216 is improved.

此外,經由前述光L(或光L1)的路徑可知,由於複數個遮光層(例如,第一遮光層204、第二遮光層214-1與第三遮光層214-2) 之孔洞(例如孔洞O1、O2與O3)的大小是依據光的路徑調整,能有效對光進行限位,避免光彼此發生串擾,同時配合設置透明材料層208,可使光準直層216的透明柱體210可具有較小的高寬比,藉此可避免或減少透明柱體210倒塌,同時使光準直層216保有良好的準直效能(即畫素P所感測的解析度更進步)。 In addition, through the path of the aforementioned light L (or light L1), it can be seen that due to the plurality of light shielding layers (for example, the first light shielding layer 204, the second light shielding layer 214-1, and the third light shielding layer 214-2) The size of the holes (such as holes O1, O2, and O3) is adjusted according to the path of the light, which can effectively limit the light and avoid crosstalk between the lights. At the same time, the transparent material layer 208 is provided in conjunction with the light collimating layer 216. The transparent pillar 210 may have a smaller aspect ratio, thereby avoiding or reducing the collapse of the transparent pillar 210, and at the same time, the light collimating layer 216 maintains good collimating performance (ie, the resolution sensed by the pixel P is more improved ).

第5圖繪示將本發明實施例之半導體裝置100”應用於生物辨識裝置10”的示意圖。在此,生物辨識裝置10”例如為指紋辨識裝置。 FIG. 5 is a schematic diagram of applying the semiconductor device 100 ″ of the embodiment of the present invention to the biometric device 10 ″. Here, the biometrics recognition device 10" is, for example, a fingerprint recognition device.

如第5圖所示,在一些實施例中,生物辨識裝置10”包含半導體裝置100”、彩色濾光層118以及光源層220。第5圖所示之半導體裝置100”與第4圖(或第3F圖)所示之半導體裝置100’的一些差異是在於透明材料層308之墊高部308-1的厚度以及第一遮光層304之孔洞O1、第二遮光層314-1及第三遮光層314-2之孔洞O3的大小。其他相同或類似之處,在此不多加贅述。 As shown in FIG. 5, in some embodiments, the biometric device 10 ″ includes a semiconductor device 100 ″, a color filter layer 118 and a light source layer 220. The difference between the semiconductor device 100" shown in FIG. 5" and the semiconductor device 100' shown in FIG. 4 (or FIG. 3F) is the thickness of the raised portion 308-1 of the transparent material layer 308 and the first light-shielding layer The size of the hole O1 of 304, the size of the hole O3 of the second light-shielding layer 314-1 and the third light-shielding layer 314-2. Other similarities or similarities will not be repeated here.

第5圖所示之透明材料層308之墊高部308-1的厚度T5大於第4圖(或第3F圖)所示之透明材料層208之墊高部208-1的厚度T4,因此,第5圖所示之依據光的路徑調整的第一遮光層304之孔洞O1、第二遮光層314-1之孔洞O2及第三遮光層314-2之孔洞O3的大小也與第4圖(或第3F圖)所示之第一遮光層204之孔洞O1、第二遮光層214-1之孔洞O2及第三遮光層214-2之孔洞O3的大小不同。 The thickness T5 of the pad portion 308-1 of the transparent material layer 308 shown in FIG. 5 is greater than the thickness T4 of the pad portion 208-1 of the transparent material layer 208 shown in FIG. 4 (or FIG. 3F). Therefore, The size of the hole O1 of the first light-shielding layer 304 and the hole O2 of the second light-shielding layer 314-1 and the hole O3 of the third light-shielding layer 314-2 shown in FIG. 5 are also different from those in FIG. 4 ( Or the hole O1 of the first light shielding layer 204 shown in FIG. 3F), the hole O2 of the second light shielding layer 214-1, and the hole O3 of the third light shielding layer 214-2 are different in size.

舉例來說,如第5圖所示,第三遮光層314-2之孔洞O3的截面積大於第二遮光層314-1之孔洞O2的截面積,且第二遮光層314-1之孔洞O2的截面積大於第一遮光層304之孔洞O1的截面積。此 外,透明材料層308之分隔部308-2也可與如第4圖(或第3F圖)所示之透明材料層208之分隔部208-2不同。在一些實施例中,光源層220也可基於透明材料層308之墊高部308-1的厚度增加,而對應縮減光源層220的厚度。 For example, as shown in FIG. 5, the cross-sectional area of the hole O3 of the third light-shielding layer 314-2 is larger than the cross-sectional area of the hole O2 of the second light-shielding layer 314-1, and the hole O2 of the second light-shielding layer 314-1 Is larger than the cross-sectional area of the hole O1 of the first light-shielding layer 304. this In addition, the partition 308-2 of the transparent material layer 308 may be different from the partition 208-2 of the transparent material layer 208 shown in FIG. 4 (or FIG. 3F). In some embodiments, the light source layer 220 may also increase the thickness of the raised portion 308-1 of the transparent material layer 308 and correspondingly reduce the thickness of the light source layer 220.

綜合上述,本發明實施例之半導體裝置之光準直層包括複數個具有不同截面積之孔洞的遮光層。由於在光準直層中設置了此些遮光層,並可配合設置透明材料層,因此光準直層之透明柱體可具有較小的高寬比,藉此可避免或減少透明柱體發生倒塌的情況,同時使光準直層保有良好的準直效能。 In summary, the light collimating layer of the semiconductor device of the embodiment of the present invention includes a plurality of light-shielding layers with holes having different cross-sectional areas. Since these light-shielding layers are provided in the light collimating layer, and the transparent material layer can be provided in coordination, the transparent cylinder of the light collimating layer can have a small aspect ratio, thereby avoiding or reducing the occurrence of the transparent cylinder The collapsed condition also keeps the light collimating layer with good collimating performance.

前述內文概述了許多實施例的特徵部件,使本技術領域中具有通常知識者可以從各個方面更佳地了解本發明實施例。本技術領域中具有通常知識者應可理解,且可輕易地以本發明實施例為基礎來設計或修飾其他製程及結構,並以此達到相同的目的及/或達到與在此介紹的實施例相同之優點。本技術領域中具有通常知識者也應了解這些相等的結構並未背離本發明實施例的發明精神與範圍。在不背離本發明實施例的發明精神與範圍之前提下,可對本發明實施例進行各種改變、置換或修改,因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。另外,雖然本發明已以數個較佳實施例揭露如上,然其並非用以限定本發明,且並非所有優點都已於此詳加說明。 The foregoing text summarizes the characteristic parts of many embodiments, so that those with ordinary knowledge in the art can better understand the embodiments of the present invention from various aspects. Those of ordinary skill in the art should understand and can easily design or modify other processes and structures based on the embodiments of the present invention to achieve the same purpose and/or achieve the embodiments described herein The same advantages. Those of ordinary skill in the art should also understand that these equivalent structures do not depart from the spirit and scope of the embodiments of the present invention. Without departing from the spirit and scope of the embodiments of the present invention, various changes, substitutions, or modifications can be made to the embodiments of the present invention. Therefore, the scope of protection of the present invention shall be deemed as defined by the scope of the attached patent application. In addition, although the present invention has been disclosed above in several preferred embodiments, it is not intended to limit the present invention, and not all advantages have been described in detail here.

本揭露之每一請求項可為個別的實施例,且本揭露之範圍包括本揭露之每一請求項及每一實施例彼此之結合。 Each request item of the present disclosure may be a separate embodiment, and the scope of the present disclosure includes each request item and each embodiment of the present disclosure in combination with each other.

100:半導體裝置 100: semiconductor device

101:基板 101: substrate

104:第一遮光層 104: first shading layer

108:透明材料層 108: transparent material layer

110:透明柱體 110: transparent cylinder

114:第二遮光層 114: Second shading layer

116:光準直層 116: Light collimation layer

H1:高度 H1: height

P:畫素 P: Pixel

O1、O2:孔洞 O1, O2: holes

T1、T2:厚度 T1, T2: thickness

W1、W2:寬度 W1, W2: width

Claims (20)

一種半導體裝置,包括:一基板,具有複數個畫素;以及一光準直層,設置於該基板之上,該光準直層包括:一透明材料層,覆蓋該等畫素;一第一遮光層,設置於該基板之上,該第一遮光層具有對應於該等畫素的複數個孔洞;一第二遮光層,設置於該第一遮光層之上;及複數個透明柱體,設置於該第二遮光層中;其中該等透明柱體的其中之一的寬度大於該等孔洞的其中之一的寬度。 A semiconductor device includes: a substrate having a plurality of pixels; and a light collimating layer disposed on the substrate, the light collimating layer includes: a transparent material layer covering the pixels; a first A light-shielding layer, disposed on the substrate, the first light-shielding layer has a plurality of holes corresponding to the pixels; a second light-shielding layer, disposed on the first light-shielding layer; and a plurality of transparent pillars, It is disposed in the second light-shielding layer; wherein the width of one of the transparent pillars is greater than the width of one of the holes. 如申請專利範圍第1項所述之半導體裝置,其中該透明材料層設置於該第一遮光層與該第二遮光層之間。 The semiconductor device as described in item 1 of the patent application range, wherein the transparent material layer is disposed between the first light-shielding layer and the second light-shielding layer. 如申請專利範圍第2項所述之半導體裝置,其中該第一遮光層由一第一材料形成,該第二遮光層由一第二材料形成,且該第一材料不同於該第二材料。 The semiconductor device as described in item 2 of the patent application range, wherein the first light shielding layer is formed of a first material, the second light shielding layer is formed of a second material, and the first material is different from the second material. 如申請專利範圍第3項所述之半導體裝置,其中該第一材料為金屬。 The semiconductor device as described in item 3 of the patent application range, wherein the first material is metal. 如申請專利範圍第3項所述之半導體裝置,其中該第二材料為光阻、油墨、模制化合物、防焊材料、環氧樹脂或前述材料之組合。 The semiconductor device as described in item 3 of the patent application range, wherein the second material is photoresist, ink, molding compound, solder resist material, epoxy resin, or a combination of the foregoing materials. 如申請專利範圍第2項所述之半導體裝置,其中該第一遮光層直接接觸該基板的頂表面。 The semiconductor device as described in item 2 of the patent application range, wherein the first light shielding layer directly contacts the top surface of the substrate. 如申請專利範圍第2項所述之半導體裝置,其中該第一遮光層的厚度小於該第二遮光層的厚度。 The semiconductor device as described in item 2 of the patent application range, wherein the thickness of the first light-shielding layer is smaller than the thickness of the second light-shielding layer. 如申請專利範圍第1項所述之半導體裝置,其中該透明材料層包括一墊高部及至少一分隔部,該墊高部設置於該基板與該第一遮光層之間,而該至少一分隔部設置於該第一遮光層與該第二遮光層之間。 The semiconductor device according to item 1 of the patent application scope, wherein the transparent material layer includes a pad portion and at least one partition portion, the pad portion is disposed between the substrate and the first light-shielding layer, and the at least one The partition is disposed between the first light-shielding layer and the second light-shielding layer. 如申請專利範圍第8項所述之半導體裝置,其中該第一遮光層與該第二遮光層由相同的材料形成。 The semiconductor device as described in item 8 of the patent application range, wherein the first light-shielding layer and the second light-shielding layer are formed of the same material. 如申請專利範圍第9項所述之半導體裝置,其中該第一遮光層與該第二遮光層的材料為光阻、油墨、模制化合物、防焊材料、環氧樹脂或前述材料之組合。 The semiconductor device as described in item 9 of the patent application range, wherein the materials of the first light-shielding layer and the second light-shielding layer are photoresist, ink, molding compound, solder resist material, epoxy resin, or a combination of the foregoing materials. 如申請專利範圍第10項所述之半導體裝置,其中該光準直層更包括一第三遮光層,該第三遮光層設置於第二遮光層之上,且該透明材料層包括複數該分隔部,該等分隔部設置於該第一遮光層與該第二遮光層之間以及該第二遮光層與該第三遮光層之間。 The semiconductor device of claim 10, wherein the light collimating layer further includes a third light shielding layer, the third light shielding layer is disposed on the second light shielding layer, and the transparent material layer includes a plurality of the partitions The partitions are provided between the first light-shielding layer and the second light-shielding layer and between the second light-shielding layer and the third light-shielding layer. 如申請專利範圍第11項所述之半導體裝置,其中該第二遮光層與該第三遮光層分別具有複數個孔洞,且該第二遮光層的每個孔洞的截面積與該第三遮光層的每個孔洞的截面積彼此不相同。 The semiconductor device as described in item 11 of the patent application range, wherein the second light-shielding layer and the third light-shielding layer respectively have a plurality of holes, and the cross-sectional area of each hole of the second light-shielding layer and the third light-shielding layer The cross-sectional area of each hole is different from each other. 如申請專利範圍第11項所述之半導體裝置,其中該第二遮光層的厚度與該第三遮光層的厚度不同。 The semiconductor device as described in item 11 of the patent application range, wherein the thickness of the second light shielding layer is different from the thickness of the third light shielding layer. 一種半導體裝置,包括: 一基板,具有複數個畫素;以及一光準直層,設置於該基板之上,該光準直層包括:複數個遮光層,設置於該基板之上,每該遮光層具有對應於該等畫素的複數個孔洞;及一透明材料層,設置於該等遮光層之間並填充該等孔洞;其中不同遮光層的孔洞的截面積彼此不相同。 A semiconductor device, including: A substrate having a plurality of pixels; and a light collimating layer disposed on the substrate, the light collimating layer includes: a plurality of light shielding layers disposed on the substrate, each light shielding layer having a corresponding to the A plurality of holes such as pixels; and a transparent material layer disposed between the light-shielding layers and filling the holes; wherein the cross-sectional areas of the holes of different light-shielding layers are different from each other. 如申請專利範圍第14項所述之半導體裝置,其中該等遮光層中最靠近該基板的遮光層直接接觸該基板。 The semiconductor device as described in item 14 of the patent application range, wherein the light-shielding layer closest to the substrate among the light-shielding layers directly contacts the substrate. 如申請專利範圍第15項所述之半導體裝置,其中最靠近該基板的遮光層的材料為金屬,其他遮光層的材料為光阻、油墨、模制化合物、防焊材料、環氧樹脂或前述材料之組合。 The semiconductor device as described in item 15 of the patent application scope, wherein the material of the light-shielding layer closest to the substrate is metal, and the material of the other light-shielding layer is photoresist, ink, molding compound, solder resist material, epoxy resin or the foregoing Combination of materials. 如申請專利範圍第15項所述之半導體裝置,其中最靠近該基板的遮光層的孔洞的截面積小於其他遮光層的孔洞的截面積。 The semiconductor device as described in item 15 of the patent application range, wherein the cross-sectional area of the hole closest to the light-shielding layer of the substrate is smaller than the cross-sectional area of the holes of the other light-shielding layer. 如申請專利範圍第14項所述之半導體裝置,其中該等遮光層的厚度彼此不同。 The semiconductor device as described in item 14 of the patent application range, wherein the thicknesses of the light-shielding layers are different from each other. 一種生物辨識裝置,包括:如請求項1或14所述之半導體裝置;一彩色濾光層,設置於該半導體裝置上;以及一光源層,包含複數個光源,該光源層設置於該彩色濾光層上。 A biometrics device, comprising: the semiconductor device according to claim 1 or 14; a color filter layer provided on the semiconductor device; and a light source layer including a plurality of light sources, the light source layer provided on the color filter On the light layer. 如申請專利範圍第19項所述之生物辨識裝置,其中各該光源對應各該畫素設置。 The biometrics identification device as described in item 19 of the patent application scope, wherein each of the light sources is set corresponding to each of the pixels.
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Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200744213A (en) * 2006-05-19 2007-12-01 Chunghwa Picture Tubes Ltd Thin film transistor array substrate and manufacturing method thereof
TW200846801A (en) * 2007-05-24 2008-12-01 Au Optronics Corp Pixel structure and manufacturing method thereof, electro-optical apparatus having the pixel structure and manufacturing method thereof
US20120052606A1 (en) * 2010-08-27 2012-03-01 Semiconductor Energy Laboratory Co., Ltd. Manufacturing methods of semiconductor device and light-emitting display device
TW201351679A (en) * 2012-06-15 2013-12-16 Gio Optoelectronics Corp Light emitting apparatus
US20140011331A1 (en) * 1999-07-06 2014-01-09 Semiconductor Energy Laboratory Co., Ltd. Semiconductor Device and Fabrication Method Thereof
TW201405828A (en) * 2012-07-31 2014-02-01 E Ink Holdings Inc Display panel, thin film transistor and manufacturing method thereof
TW201627844A (en) * 2015-01-30 2016-08-01 速博思股份有限公司 In-cell OLED touch panel structure with high touch position resolution
TW201721863A (en) * 2015-12-03 2017-06-16 群創光電股份有限公司 Display device
US20180097031A1 (en) * 2010-01-08 2018-04-05 Sony Corporation Semiconductor device, solid-state image sensor and camera system
TWM572986U (en) * 2017-07-17 2019-01-11 金佶科技股份有限公司 Bio-sensing apparatus

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20140011331A1 (en) * 1999-07-06 2014-01-09 Semiconductor Energy Laboratory Co., Ltd. Semiconductor Device and Fabrication Method Thereof
TW200744213A (en) * 2006-05-19 2007-12-01 Chunghwa Picture Tubes Ltd Thin film transistor array substrate and manufacturing method thereof
TW200846801A (en) * 2007-05-24 2008-12-01 Au Optronics Corp Pixel structure and manufacturing method thereof, electro-optical apparatus having the pixel structure and manufacturing method thereof
US20180097031A1 (en) * 2010-01-08 2018-04-05 Sony Corporation Semiconductor device, solid-state image sensor and camera system
US20120052606A1 (en) * 2010-08-27 2012-03-01 Semiconductor Energy Laboratory Co., Ltd. Manufacturing methods of semiconductor device and light-emitting display device
TW201351679A (en) * 2012-06-15 2013-12-16 Gio Optoelectronics Corp Light emitting apparatus
TW201405828A (en) * 2012-07-31 2014-02-01 E Ink Holdings Inc Display panel, thin film transistor and manufacturing method thereof
TW201627844A (en) * 2015-01-30 2016-08-01 速博思股份有限公司 In-cell OLED touch panel structure with high touch position resolution
TW201721863A (en) * 2015-12-03 2017-06-16 群創光電股份有限公司 Display device
TWM572986U (en) * 2017-07-17 2019-01-11 金佶科技股份有限公司 Bio-sensing apparatus

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