TWI691948B - Display apparatus and display driving circuit thereof - Google Patents

Abstract

A display apparatus and a display driving circuit thereof are provided. The display apparatus includes a display panel and the display driving circuit. The display panel includes a plurality of power traces and a plurality of pixel units. The pixel units are coupled to a power voltage of the display panel through the power traces respectively. The display driving circuit is coupled to the display panel and configured to generate a plurality of data driving voltages to respectively drive the pixel units. The display driving circuit includes a gamma voltage generating circuit and a data line driving circuit. The gamma voltage generating circuit is coupled to the power voltage and generates a plurality of compensated gamma voltages according to a variation of the power voltage and a reference voltage group. The data line driving circuit is coupled to the gamma voltage generating circuit to receive the compensated gamma voltages, and generates and adjusts the data driving voltages according to the compensated gamma voltages and a grayscale image data.

Description

Display device and its display driving circuit

The present invention relates to a display technology, and in particular to a display device and a display drive circuit thereof that can instantly compensate a display screen according to a change in power supply voltage.

With the development of the semiconductor industry and the optoelectronic industry, Light Emission Diode (LED) is not only widely used in lighting applications, but also in the field of displays. Among them, Organic Light-Emitting Diode (Organic-LED, OLED) displays are considered to be one of the mainstream displays due to their thin thickness, high efficiency, high contrast, no viewing angle limitation, and fast response speed.

In an organic light emitting diode display, a power management integrated circuit is usually provided, wherein the power management integrated circuit can be coupled to the organic light emitting diode display panel through the power traces of the adapter board and the flexible printed circuit board to Provide the power supply voltage required for the display screen of the organic light-emitting diode display panel. However, the power supply traces of the interposer board and the flexible printed circuit board usually have parasitic resistance. When the current flows through the parasitic resistance, a voltage drop will occur, resulting in the power supply voltage and power management integration received by the organic light-emitting diode display panel There is a voltage difference between the power supply voltages provided by the circuit. In addition to this, the parasitic resistance of different adapter boards and flexible printed circuit board power traces is also different. In this way, when different adapter boards and flexible printed circuit boards are used, the brightness of the display screen of the organic light-emitting diode display panel will be different.

In addition, the organic light emitting diode display panel itself usually has a parasitic coupling capacitance between the power voltage trace and the data trace. When the driving voltage on the data trace changes, the voltage on the power supply voltage trace will change through the coupling capacitor, which will affect the color accuracy of the display screen.

In order to solve the above problems, the amount of change in the power supply voltage can be converted into digital data by analog-to-digital conversion, and the grayscale screen data provided to the display drive circuit can be adjusted according to the converted digital data, so that the display drive circuit can Adjusted gray scale screen data to adjust the brightness and color of the displayed screen. However, the digital data after analog-to-digital conversion usually has resolution errors, resulting in the brightness and color of the adjusted display screen still being inaccurate. In addition, the compensation method for adjusting the grayscale screen data according to the digital data can only sequentially compensate the image of the next pixel row or the image of the next display screen, and cannot achieve the effect of compensating the display screen in real time. .

In view of this, the present invention provides a display device and its display driving circuit, which can instantly compensate the display screen according to the change of the power supply voltage, thereby improving the accuracy of the brightness and color of the display screen.

The display device of the present invention includes a display panel and a display driving circuit. The display panel includes multiple power traces and multiple pixel units. The pixel units are respectively coupled to the power supply voltage of the display panel through the power supply traces. The display driving circuit is coupled to the display panel and used to generate a plurality of data driving voltages to drive the pixel units respectively. The display driving circuit includes a gamma voltage generating circuit and a data line driving circuit. The gamma voltage generating circuit is coupled to the power voltage, and is used to generate a plurality of compensated gamma voltages according to the variation of the power voltage and the reference voltage group. The data line driving circuit is coupled to the gamma voltage generating circuit to receive the compensated gamma voltages, and generates and adjusts the data driving voltages according to the compensated gamma voltages and gray-scale image data.

The display driving circuit of the present invention is used to generate multiple data driving voltages to drive the display panel. The display driving circuit includes a gamma voltage generating circuit and a data line driving circuit. The gamma voltage generating circuit is used to receive the power voltage of the display panel, and generate a plurality of compensated gamma voltages according to the variation of the power voltage and the reference voltage group. The data line driving circuit is coupled to the gamma voltage generating circuit to receive the compensated gamma voltages, and generates and adjusts the data driving voltages according to the compensated gamma voltages and gray-scale image data.

In an embodiment of the present invention, the above-mentioned power supply voltage variation includes the fixed DC voltage drop difference caused by the parasitic resistance of the power supply wiring between the power supply circuit and the display panel, and the power supply wiring in the display panel and The amount of dynamic AC voltage difference caused by the coupling effect of parasitic capacitance between data traces.

Based on the above, in the display device and the display driving circuit thereof provided by the present invention, the gamma voltage generating circuit can dynamically generate the compensated gamma voltage according to the received power supply voltage variation and the reference voltage group, and the data line The driving circuit can generate and adjust the data driving voltage according to the compensated gamma voltage, so the display driving circuit is based on the amount of change in the power supply voltage and uses the gamma voltage compensation method (that is, the analogy method) to adjust the data driving voltage, so The display screen can be compensated instantly. In addition, the data driving voltage is adjusted by analogy to avoid errors caused by digitization of the voltage, so the brightness and color accuracy of the displayed image can be effectively improved.

In order to make the above-mentioned features and advantages of the present invention more obvious and understandable, the embodiments are specifically described below in conjunction with the accompanying drawings for detailed description as follows.

In order to make the content of the present invention easier to understand, the following specific examples are given as examples on which the present invention can indeed be implemented. In addition, wherever possible, elements/components/steps with the same reference numerals in the drawings and embodiments represent the same or similar components.

FIG. 1 is a schematic circuit block diagram of a display device according to an embodiment of the invention. Please refer to Figure 1. The display device 100 includes a display panel 120 and a display driving circuit 140, but the invention is not limited thereto. In other embodiments of the present invention, the display device 100 may further include a power circuit 190.

The power circuit 190 is coupled to the display panel 120 through the power trace EL to generate the original voltage ELVDD, wherein the original voltage ELVDD is transmitted to the display panel 120 through the power trace EL to provide the power voltage ELVDD'. The power supply trace EL has a parasitic resistance. Therefore, when the output current of the power supply circuit 190 flows through the power supply trace EL, a voltage drop is generated across the power supply trace EL, so that the power supply voltage ELVDD' at the end of the display panel 120 is less than the original voltage ELVDD generated by the power supply circuit 190.

The display panel 120 may be, for example, an organic light-emitting diode display panel, but the invention is not limited thereto. The display panel 120 includes a plurality of scan lines SL, a plurality of data lines DL, a plurality of power traces PL, and a pixel array PA. The pixel array PA includes a plurality of pixel units PX arranged in an array. The power supply terminal of each pixel unit PX is coupled to the power supply voltage ELVDD' through the corresponding power supply trace PL. Each pixel unit PX is coupled to the corresponding scan line SL and data line DL.

The display driving circuit 140 is disposed in the non-display area of the display panel 120. The display driving circuit 140 is coupled to the scan lines SL, the data lines DL, and the power supply voltage ELVDD' of the display panel 120. The display driving circuit 140 can generate a plurality of scan driving voltages VSCAN to the scan lines SL of the display panel 120, and can generate a plurality of data driving voltages VDATA to the data lines DL to respectively drive the pixels in the pixel array PA Unit PX.

2 is a block diagram of a display driving circuit according to an embodiment of the invention. Please refer to Figure 1 and Figure 2 together. The display driving circuit 140 may include a gamma voltage generating circuit 242 and a data line driving circuit 244, but the invention is not limited thereto. The gamma voltage generating circuit 242 is coupled to the power voltage ELVDD', and generates a plurality of compensated gamma voltages VG_1~VG_N according to the variation of the power voltage ELVDD' and the reference voltage group VR. The data line driving circuit 244 is coupled to the gamma voltage generating circuit 242 to receive the compensated gamma voltages VG_1~VG_N, and generates and adjusts the data driving voltage VDATA according to the compensated gamma voltages VG_1~VG_N and the grayscale picture data PDATA.

Since the gamma voltage generating circuit 242 dynamically generates the compensated gamma voltage VG_1~VG_N according to the variation of the power supply voltage ELVDD' and the reference voltage group VR, and the data line driving circuit 244 generates and according to the compensated gamma voltage VG_1~VG_N and The data driving voltage VDATA is adjusted, so the display driving circuit 140 adjusts the data driving voltage VDATA based on the amount of change in the power supply voltage ELVDD' in a gamma voltage compensation manner (ie, analogy), so that the data driving voltage VDATA follows the power supply voltage ELVDD 'Change, and the display can be compensated instantly. In addition, the data driving voltage VDATA is adjusted by analogy to avoid errors caused by digitizing the voltage, so the brightness and color accuracy of the displayed image can be effectively improved.

In an embodiment of the present invention, the amount of change in the power supply voltage ELVDD' mentioned in the present invention may include a fixed amount of change and a dynamic amount of change, where the fixed amount of change may be, for example, a power supply between the power supply circuit 190 and the display panel 120 The fixed DC voltage drop difference caused by the parasitic resistance of the trace EL, and the dynamic change may be, for example, the dynamic AC voltage difference caused by the coupling effect of the parasitic capacitance between the power trace PL and the data line DL in the display panel 120 , But the invention is not limited to this.

In an embodiment of the present invention, there is a feedback control mechanism between the display driving circuit 140 and the power supply circuit 190 of FIG. 1, and the display driving circuit 140 can feedback the detected variation of the power supply voltage ELVDD' to the power supply The circuit 190 causes the power supply circuit 190 to adjust its original voltage ELVDD, so as to compensate the power supply voltage ELVDD' on the display panel 120 in real time.

In an embodiment of the invention, the amount of change in the power supply voltage ELVDD' fed back to the power supply circuit 190 may be, for example, a fixed DC voltage drop difference between the power supply voltage ELVDD' and the original voltage ELVDD (ie, the above-mentioned fixed change) , But the invention is not limited to this.

In an embodiment of the invention, the display driving circuit 140 may further include a detection circuit 246. The detection circuit 246 is coupled to the power supply voltage ELVDD' and the set voltage VSET, where the set voltage VSET is equal to the original voltage ELVDD before adjustment. The detection circuit 246 can detect the voltage difference VDF between the power supply voltage ELVDD' and the set voltage VSET (i.e., the aforementioned fixed variation). The detection circuit 246 can feedback the voltage difference VDF to the power supply circuit 190, so that the power supply circuit 190 adjusts the original voltage ELVDD accordingly, so that the power supply voltage ELVDD' at the end of the display panel 120 is equal to the set voltage VSET (that is, the original voltage ELVDD before adjustment) . In another embodiment, the detection circuit 246 may be a part of the power circuit 190.

In an embodiment of the present invention, the data line driving circuit 244 can be implemented by using an existing data line driver, and its implementation details and related operations are well known to those skilled in the art, so they will not be repeated here.

In another embodiment of the present invention, the display driving circuit 140 may further include a timing control circuit and a scanning line driving circuit, but the present invention is not limited thereto. The timing control circuit and the scanning line driving circuit can be implemented by using the existing timing controller and the scanning line driver, respectively, and the implementation details and related operations are well known to those skilled in the art, so they will not be repeated here.

FIG. 3 is a schematic circuit block diagram of a gamma voltage generating circuit according to an embodiment of the invention. Please refer to Figure 1~Figure 3 together. The gamma voltage generating circuit 242 may include a reference voltage compensation circuit 3422 and a gamma voltage output circuit 3424. The reference voltage compensation circuit 3422 is coupled to the power supply voltage ELVDD' for tracking the dynamic change of the power supply voltage ELVDD', and generates a compensation voltage group R_VG according to the dynamic change of the power supply voltage ELVDD' and the reference voltage set VR. The gamma voltage output circuit 3424 is coupled to the reference voltage compensation circuit 3422 to receive the compensation voltage group R_VG, and divides the compensation voltage group R_VG to generate a plurality of compensated gamma voltages VG_1~VG_N.

In an embodiment of the present invention, the gamma voltage output circuit 3424 may be implemented by a voltage divider circuit, where the voltage divider circuit may be, for example, a resistive voltage divider circuit or other types of voltage divider circuits, but the present invention Not limited to this.

4 is a schematic circuit diagram of a reference voltage compensation circuit according to an embodiment of the invention. Please refer to Figure 3 and Figure 4 together. In this embodiment, the reference voltage group VR includes a first reference voltage VR_H and a second reference voltage VR_L, and the compensation voltage group R_VG includes a first compensated voltage R_VGH and a second compensated voltage R_VGL. The reference voltage compensation circuit 400 includes a first compensation circuit 410 and a second compensation circuit 420.

The first compensation circuit 410 includes switches SW1 to SW2 and a capacitor C1. The first terminal of the switch SW1 receives the first reference voltage VR_H. The second end of the switch SW1 is coupled to the first node ND1. The first end of the switch SW2 receives the power supply voltage ELVDD'. The capacitor C1 is coupled between the first node ND1 and the second end of the switch SW2. The first node ND1 outputs the first compensated voltage R_VGH.

The second compensation circuit 420 includes switches SW3 to SW4 and a capacitor C2. The first terminal of the switch SW3 receives the second reference voltage VR_L. The second terminal of the switch SW3 is coupled to the second node ND2. The first end of the switch SW4 receives the power supply voltage ELVDD'. The capacitor C2 is coupled between the second node ND2 and the second end of the switch SW4. The second node ND2 outputs the second compensated voltage R_VGL.

FIG. 5 is a signal timing diagram of the reference voltage compensation circuit of FIG. 4 according to an embodiment of the invention. Please refer to Figure 4 and Figure 5 together. During the time interval PH1, the switch SW1 and the switch SW2 are turned on, so the capacitor C1 is charged, so that the voltage of the first node ND1 is the first reference voltage VR_H. Similarly, in the time interval PH1, the switch SW3 and the switch SW4 are turned on, so the capacitor C2 is charged, so that the voltage of the second node ND2 is the second reference voltage VR_L.

Then, in the time interval PH2, the switch SW1 is in an off state, and the switch SW2 is in an on state. Therefore, the dynamic change amount of the power supply voltage ELVDD' can be coupled to the first node ND1 through the capacitor C1, so that the voltage of the first node ND1 is The sum of the dynamic changes of the first reference voltage VR_H and the power supply voltage ELVDD' is used as the first compensated voltage R_VGH. In other words, the dynamic change amount of the power supply voltage ELVDD' can be immediately reflected in the first compensated voltage R_VGH.

Similarly, in the time interval PH2, the switch SW3 is in the off state, and the switch SW4 is in the on state. Therefore, the dynamic change amount of the power supply voltage ELVDD' can be coupled to the second node ND2 through the capacitor C2, so that the voltage of the second node ND2 It is the sum of the dynamic change of the second reference voltage VR_L and the power supply voltage ELVDD', and is used as the second compensated voltage R_VGL. In other words, the dynamic change amount of the power supply voltage ELVDD' can be immediately reflected in the second compensated voltage R_VGL.

It can be understood that the dynamic change amount of the power supply voltage ELVDD' is the voltage difference between the power supply voltage ELVDD' in the time interval PH2 and the power supply voltage ELVDD' in the time interval PH1. Since the dynamic change amount of the power supply voltage ELVDD' can be immediately reflected in the first compensated voltage R_VGH and the second compensated voltage R_VGL, plus the gamma voltage output circuit 3424 of FIG. 3 is the first compensated voltage R_VGH and the first 2. The compensated voltage R_VGL is divided to generate the compensated gamma voltage VG_1~VG_N, and the data line driving circuit 244 of FIG. 2 generates the data driving voltage VDATA according to the compensated gamma voltage VG_1~VG_N, so the dynamics of the power supply voltage ELVDD' The amount of change can immediately reflect the gamma voltage VG_1~VG_N and the data driving voltage VDATA after compensation.

In an embodiment of the present invention, the time interval PH1 shown in FIG. 5 may be, for example, a blank (Blanking Interval) time interval, and the time interval PH2 may be, for example, a screen display (Display Interval) time interval, but the present invention is not limited to this Wherein, the time interval PH1 may be, for example, a vertical blanking interval (Vertical Blanking Interval) or a horizontal blanking interval (Horizontal Blanking Interval). In this way, the reference voltage compensation circuit 400 can provide the first reference voltage VR_H and the second reference voltage VR_L to the first node ND1 and the second node ND2 during the blank time interval, respectively, and allow the power supply voltage ELVDD' during the screen display time interval The dynamic change amount of is immediately reflected to the first node ND1 and the second node ND2, and used as the first compensated voltage R_VGH and the second compensated voltage R_VGL, respectively. In this way, the dynamic variation of the power supply voltage ELVDD' can be instantly reflected in the compensated gamma voltages VG_1~VG_N and the data driving voltage VDATA in FIG. 2 during the screen display time interval, thereby compensating the display screen in real time.

6 is a schematic circuit diagram of a pixel unit according to an embodiment of the invention. Please refer to Figure 6. The pixel unit PX includes the transistors T1~T7, the storage capacitor CX, and the organic light emitting diode LD, that is, the pixel unit PX is a circuit structure of 7T1C, but the present invention is not limited thereto. In other embodiments of the present invention, the pixel unit PX may also be implemented using a known circuit architecture such as 2T1C, 5T2C, or 6T1C. The first end of the storage capacitor CX receives the power supply voltage ELVDD'. The first end of the transistor T1 is coupled to the second end of the storage capacitor CX. The second terminal of the transistor T1 is coupled to the reset voltage VINIT. The control terminal of the transistor T1 receives the scan driving voltage VSCAN[n-1]. The first end of the transistor T2 is coupled to the first end of the storage capacitor CX. The control terminal of the transistor T2 receives the control signal EM. The first end of the transistor T3 is coupled to the second end of the storage capacitor CX. The control receiving end of the transistor T3 scans the driving voltage VSCAN[n]. The first end of the transistor T4 is coupled to the second end of the transistor T2. The second end of the transistor T4 is coupled to the second end of the transistor T3. The control terminal of the transistor T4 is coupled to the second terminal of the storage capacitor CX. The first end of the transistor T5 is coupled to the second end of the transistor T4. The control terminal of the transistor T5 receives the control signal EM. The second end of the transistor T5 is coupled to the anode end of the organic light emitting diode LD. The first end of the transistor T6 is coupled to the first end of the transistor T4. The second terminal of the transistor T6 receives the data driving voltage VDATA. The control terminal of the transistor T6 receives the scan drive voltage VSCAN[n]. The first terminal of the transistor T7 is coupled to the reset voltage VINIT. The second end of the transistor T7 is coupled to the anode end of the organic light emitting diode LD. The control terminal of the transistor T7 receives the scan driving voltage VSCAN[n-1]. The cathode terminal of the organic light emitting diode LD is coupled to the reference voltage ELVSS.

In the driving period of the pixel unit PX, the transistors T1 and T7 can be turned on first to reset the control terminal of the transistor T4, the second terminal of the storage capacitor CX, and the organic light emitting diode LD. Then, the transistors T1 and T7 can be turned off and the transistors T3 and T6 can be turned on, so that the data driving voltage VDATA is transmitted to the control terminal of the transistor T4 and the second terminal of the storage capacitor CX through the transistors T6, T4 and T3. After that, the transistors T3 and T6 can be turned off and the transistors T2 and T5 can be turned on to transmit the power supply voltage ELVDD' to the first end of the transistor T4.

According to the characteristics of the transistor, the current Id of the transistor T4 (that is, the current flowing into the organic light-emitting diode LD) is proportional to the following formula (1), where VTH is the threshold voltage of the transistor T4. In addition, the brightness of the organic light emitting diode LD is proportional to the current Id. Therefore, when the power supply voltage ELVDD' changes, a compensated gamma voltage is generated according to the amount of change in the power supply voltage ELVDD' to adjust the data driving voltage VDATA accordingly, and the brightness of the organic light emitting diode LD can be adjusted to the correct brightness.

式(1)

Formula 1)

7 is a schematic circuit diagram of a reference voltage compensation circuit according to another embodiment of the invention, and FIG. 8 is a schematic diagram of signal timing of the reference voltage compensation circuit of FIG. 7 according to an embodiment of the invention. Please refer to Figure 3, Figure 7 and Figure 8 together. In this embodiment, the reference voltage group VR includes a first reference voltage VOS_H and a second reference voltage VOS_L, and the compensation voltage group R_VG includes a first compensated voltage R_VGH and a second compensated voltage R_VGL, where the first reference voltage VOS_H and The second reference voltage VOS_L can be set according to actual application or design requirements.

The reference voltage compensation circuit 700 includes a first adder-subtractor 710 and a second adder-subtractor 720. The first input terminal of the first adder-subtractor 710 receives the power supply voltage ELVDD'. The second input terminal of the first adder-subtractor 710 receives the first reference voltage VOS_H. The output terminal of the first adder-subtractor 710 outputs the first compensated voltage R_VGH. The first input terminal of the second adder-subtractor 720 receives the power supply voltage ELVDD'. The second input terminal of the second adder-subtractor 720 receives the second reference voltage VOS_L. The output terminal of the second adder-subtractor 720 outputs the second compensated voltage R_VGL.

It is worth mentioning that the voltage level of the first compensated voltage R_VGH can be higher or lower than the voltage level of the power supply voltage ELVDD', and the voltage level of the second compensated voltage R_VGL can be higher or lower than the power supply voltage The voltage level of ELVDD'. In detail, when the required voltage level of the first compensated voltage R_VGH is higher than the voltage level of the power supply voltage ELVDD', the first adder-subtractor 710 performs an addition operation and outputs the first compensated voltage R_VGH. On the contrary, when the required voltage level of the first compensated voltage R_VGH is lower than the voltage level of the power supply voltage ELVDD', the first adder-subtractor 710 performs a subtraction operation and outputs the first compensated voltage R_VGH. Similarly, when the required voltage level of the second compensated voltage R_VGL is higher than the voltage level of the power supply voltage ELVDD', the second adder-subtractor 720 performs an addition operation and outputs the second compensated voltage R_VGL. In contrast, when the required voltage level of the second compensated voltage R_VGL is lower than the voltage level of the power supply voltage ELVDD', the second adder-subtractor 720 performs a subtraction operation and outputs the second compensated voltage R_VGL, but The present invention is not limited to this.

It can be understood that when the power supply voltage ELVDD' rises or falls, the first compensated voltage R_VGH and the second compensated voltage R_VGL will also rise or fall accordingly. Therefore, the dynamic change amount of the power supply voltage ELVDD' can be immediately reflected in the first compensated voltage R_VGH and the second compensated voltage R_VGL. In addition, the first reference voltage VOS_H may be set to the voltage difference VDF of FIG. 2 (that is, the fixed variation of the power supply voltage ELVDD') plus the first specific voltage, and the second reference voltage VOS_L may be set to the voltage difference VDF of FIG. 2 On the second specific voltage. In this way, the fixed variation of the power supply voltage ELVDD' can also be reflected in the first compensated voltage R_VGH and the second compensated voltage R_VGL.

Since the variation (including dynamic variation and fixed variation) of the power supply voltage ELVDD' can be immediately reflected in the first compensated voltage R_VGH and the second compensated voltage R_VGL, plus the gamma voltage output circuit 3424 of FIG. 3 is The first compensated voltage R_VGH and the second compensated voltage R_VGL are divided to generate a compensated gamma voltage VG_1~VG_N, and the data line driving circuit 244 of FIG. 2 generates a data driving voltage according to the compensated gamma voltage VG_1~VG_N VDATA, so the amount of change in the power supply voltage ELVDD' can immediately reflect the gamma voltages VG_1~VG_N and the data driving voltage VDATA after compensation, so as to compensate the display image in real time.

In summary, in the display device and the display driving circuit thereof provided by the embodiments of the present invention, the gamma voltage generating circuit can dynamically generate the compensated gamma voltage according to the received power supply voltage variation and the reference voltage group And the data line drive circuit can generate and adjust the data drive voltage according to the compensated gamma voltage, so the display drive circuit is based on the amount of change in the power supply voltage to adjust the data drive in a gamma voltage compensation method (ie, analogy) The voltage makes the data driving voltage VDATA change with the power supply voltage ELVDD', and the display screen can be compensated in real time. In addition, the data driving voltage is adjusted by analogy to avoid errors caused by digitization of the voltage, so the brightness and color accuracy of the displayed image can be effectively improved. The embodiments of the present invention can also be used together with each other. Those with ordinary knowledge in the technical field can set according to actual application or design requirements.

Although the present invention has been disclosed as above with examples, it is not intended to limit the present invention. Any person with ordinary knowledge in the technical field can make some changes and modifications without departing from the spirit and scope of the present invention. The scope of protection of the present invention shall be subject to the scope defined in the appended patent application.

100: display device

120: display panel

140: Display drive circuit

190: Power circuit

242: Gamma voltage generating circuit

244: data line drive circuit

246: Detection circuit

3422: Reference voltage compensation circuit

3424: Gamma voltage output circuit

400, 700: Reference voltage compensation circuit

410: First compensation circuit

420: Second compensation circuit

710: The first addition and subtraction

720: second adder and subtracter

C1, C2: capacitor

CX: storage capacitor

DL: data cable

EL: power wiring

ELVDD: original voltage

ELVDD’: power supply voltage

ELVSS: reference voltage

EM: control signal

Id: current

LD: organic light emitting diode

ND1: the first node

ND2: second node

PA: pixel array

PDATA: Grayscale picture data

PH1, PH2: time interval

PL: power wiring

PX: pixel unit

R_VG: compensation voltage group

R_VGH: voltage after the first compensation

R_VGL: voltage after the second compensation

SL: Scan line

SW1~SW4: switch

T1~T7: Transistor

VDATA: data drive voltage

VDF: voltage difference

VG_1~VG_N: Gamma voltage after compensation

VINIT: reset voltage

VOS_H, VR_H: the first reference voltage

VOS_L, VR_L: second reference voltage

VR: Reference voltage group

VSCAN, VSCAN[n], VSCAN[n-1]: Scan drive voltage

VSET: set voltage

FIG. 1 is a schematic circuit block diagram of a display device according to an embodiment of the invention. 2 is a block diagram of a display driving circuit according to an embodiment of the invention. FIG. 3 is a schematic circuit block diagram of a gamma voltage generating circuit according to an embodiment of the invention. 4 is a schematic circuit diagram of a reference voltage compensation circuit according to an embodiment of the invention. FIG. 5 is a signal timing diagram of the reference voltage compensation circuit of FIG. 4 according to an embodiment of the invention. 6 is a schematic circuit diagram of a pixel unit according to an embodiment of the invention. 7 is a schematic circuit diagram of a reference voltage compensation circuit according to another embodiment of the invention. FIG. 8 is a signal timing diagram of the reference voltage compensation circuit of FIG. 7 according to an embodiment of the invention.

100: display device

120: display panel

140: Display drive circuit

190: Power circuit

DL: data cable

EL: power wiring

ELVDD: original voltage

ELVDD’: power supply voltage

PA: pixel array

PL: power wiring

PX: pixel unit

SL: Scan line

VDATA: data drive voltage

VSCAN: Scan drive voltage

Claims (6)

A display device includes: a display panel including a plurality of first power traces and a plurality of pixel units, wherein the pixel units are respectively coupled to a power supply voltage of the display panel through the first power traces; And a display driving circuit, coupled to the display panel, for generating a plurality of data driving voltages to drive the pixel units, wherein the display driving circuit includes: a gamma voltage generating circuit, coupled to the power supply voltage, for Generating a plurality of compensated gamma voltages according to a variation of the power supply voltage and a reference voltage group, wherein the reference voltage group includes a first reference voltage and a second reference voltage; and a data line driving circuit, coupled The gamma voltage generating circuit receives the compensated gamma voltages, and generates and adjusts the data driving voltages according to the compensated gamma voltages and a grayscale image data, wherein the gamma voltage generating circuit includes: a The reference voltage compensation circuit is coupled to the power supply voltage to track the change amount of the power supply voltage, and generates a compensation voltage set according to the change amount of the power supply voltage and the reference voltage set, wherein the compensation voltage set includes a first A compensated voltage and a second compensated voltage, the reference voltage compensation circuit includes: a first compensation circuit, including: a first switch, a first end of the first switch receives the first reference voltage, and the first The second end of a switch is coupled to a first node A second switch, the first end of the second switch receives the power supply voltage; and a first capacitor, coupled between the first node and the second end of the second switch, wherein the first node is used to Output the first compensated voltage; and a second compensation circuit, including: a third switch, the first terminal of the third switch receives the second reference voltage, and the second terminal of the third switch is coupled to a first Two nodes; a fourth switch, the first end of the fourth switch receives the power supply voltage; and a second capacitor, coupled between the second node and the second end of the fourth switch, wherein the second A node for outputting the second compensated voltage; and a gamma voltage output circuit, coupled to the reference voltage compensation circuit to receive the compensation voltage group, and dividing the compensation voltage group to generate the compensated gamma Voltage. The display device according to item 1 of the patent application scope, wherein: in a blanking interval, the first switch, the second switch, the third switch, and the fourth switch are in an on state; and In a display interval (Display Interval) time interval, the second switch and the fourth switch are in an on state, and the first switch and the third switch are in an off state. The display device as described in item 1 of the patent application range, wherein at least one of the compensated gamma voltages varies with the power supply voltage. The display device as described in item 1 of the patent application further includes: a power circuit coupled to the display panel through a second power trace and used to generate an original voltage, wherein the original voltage passes through the second power source The wiring is transmitted to the display panel to provide the power supply voltage, wherein the display driving circuit feeds back at least a part of the change amount of the power supply voltage to the power supply circuit, so that the power supply circuit adjusts the power supply according to the at least part of the change amount Original voltage. A display driving circuit for generating a plurality of data driving voltages to drive a display panel, the display driving circuit includes: a gamma voltage generating circuit for receiving a power supply voltage of the display panel, and according to a power supply voltage The amount of variation and a reference voltage group generate a plurality of compensated gamma voltages, wherein the reference voltage group includes a first reference voltage and a second reference voltage; and a data line driving circuit is coupled to the gamma voltage generating circuit to Receiving the compensated gamma voltages, and generating and adjusting the data driving voltages based on the compensated gamma voltages and a grayscale image data, wherein the gamma voltage generating circuit includes: a reference voltage compensation circuit for Tracking the amount of change in the power supply voltage, and generating a compensation voltage set according to the amount of change in the power supply voltage and the reference voltage set, wherein the compensation voltage set includes a first compensated voltage and a second compensation The compensated voltage, wherein the reference voltage compensation circuit includes: a first compensation circuit, including: a first switch, a first terminal of the first switch receives the first reference voltage, and a second terminal of the first switch is coupled Connected to a first node; a second switch, the first end of the second switch receives the power supply voltage; and a first capacitor, coupled between the first node and the second end of the second switch, wherein The first node is used to output the first compensated voltage; and a second compensation circuit includes: a third switch, the first end of the third switch receives the second reference voltage, and the third switch The two terminals are coupled to a second node; a fourth switch, the first terminal of the fourth switch receives the power supply voltage; and a second capacitor, coupled between the second node and the second terminal of the fourth switch Where the second node is used to output the second compensated voltage; and a gamma voltage output circuit coupled to the reference voltage compensation circuit to receive the compensated voltage group and divide the compensated voltage group to generate Gamma voltage after these compensations. A display device, including: A display panel includes a plurality of first power traces and a plurality of pixel units, wherein the pixel units are respectively coupled to a power voltage of the display panel through the first power traces; and a display driving circuit, The display panel is coupled to generate a plurality of data driving voltages to drive the pixel units, wherein the display driving circuit includes: a gamma voltage generating circuit, coupled to the power supply voltage, according to the power supply voltage A variation and a reference voltage group generate a plurality of compensated gamma voltages, wherein the reference voltage group includes a first reference voltage and a second reference voltage; and a data line driving circuit coupled to the gamma voltage generating circuit To receive the compensated gamma voltages, and generate and adjust the data driving voltages based on the compensated gamma voltages and a grayscale image data, wherein the gamma voltage generating circuit includes: a reference voltage compensation circuit, coupled Connected to the power supply voltage to track the amount of change of the power supply voltage, and generate a compensation voltage set according to the amount of change of the power supply voltage and the reference voltage set, wherein the compensation voltage set includes a first compensated voltage and a The second compensated voltage, the reference voltage compensation circuit includes: a first adder-subtractor, a first input terminal of the first adder-subtractor receives the power supply voltage, and a second input terminal of the first adder-subtractor receives the first A reference voltage, and the output of the first adder-subtractor outputs the first compensated voltage; and A second adder-subtractor, the first input terminal of the second adder-subtractor receives the power supply voltage, the second input terminal of the second adder-subtractor receives the second reference voltage, and the output of the second adder-subtractor The terminal outputs the second compensated voltage.

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