TWI688117B - Semiconductor light emitting device - Google Patents

Abstract

The semiconductor light-emitting device of the present invention includes: a light-emitting body including first and second semiconductor layers and a light-emitting layer provided between the first and second semiconductor layers; a substrate disposed on the second semiconductor layer side of the light-emitting body; The first metal layer electrically connected to any one of the first semiconductor layer and the second semiconductor layer between the bodies extends from between the substrate and the luminous body to the outside of the luminous body along the substrate; covers the first metal located outside the luminous body The conductive layer of the extension of the layer, which extends between the luminous body and the first metal layer and the second metal layer arranged side by side with the luminous body on the substrate, is disposed on the extended portion via the conductive layer; the luminous body includes: including the first The first surface of the surface of the semiconductor layer, the second surface including the surface of the second semiconductor layer, and the side surface including the outer edge of the first semiconductor layer; and includes a recess from the side surface toward the inside in a direction parallel to the first surface In the concave portion of the second metal layer, the side wall is connected to the side surface via a curved surface.

Description

Semiconductor light emitting device

The embodiment relates to a semiconductor light emitting device.

The semiconductor light-emitting device includes, for example, a light-emitting body formed by laminating a p-type semiconductor layer, a light-emitting layer, and an n-type semiconductor layer, and an electrode connecting the light-emitting body to an external circuit. Moreover, in the manufacturing process of the semiconductor light emitting device, it is necessary to appropriately protect the electrode from the etching of the p-type semiconductor layer, the n-type semiconductor layer, and the light-emitting layer, in order to improve the reliability of the device.

An embodiment of the present invention provides a semiconductor light emitting device with improved reliability.

A semiconductor light-emitting device of an embodiment includes a light-emitting body including a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, and light emission provided between the first semiconductor layer and the second semiconductor layer Layer; a substrate, which is arranged on the side of the second semiconductor layer of the light emitter; a first metal layer, which is electrically connected to the first semiconductor layer and the second semiconductor layer between the substrate and the light emitter One, and extending from the substrate to the light-emitting body along the substrate to the outer side of the light-emitting body; a conductive layer covering the extending portion of the first metal layer located on the outer side of the light-emitting body and extending above the light-emitting body Between the luminous body and the first metal layer; and the second metal layer, which is arranged side by side with the luminous body on the substrate, and is disposed on the extension portion via the conductive layer; the luminous body includes: the first Surface, which includes the surface of the first semiconductor layer; the second surface, which A surface including the second semiconductor layer; and a side surface including an outer edge of the first semiconductor layer; the light-emitting body includes a recessed portion recessed from the side surface toward the inside in a direction parallel to the first surface, the first 2 The metal layer is provided in the recessed portion, and the side wall of the recessed portion is connected to the side surface via a curved surface.

1: semiconductor light emitting device

1e: chip side

2: semiconductor light emitting device

3: Semiconductor light emitting device

10: Luminous body

10a: Face 1

10b: Face 2

10c: side

10cr: curved surface

10R: Depression

10Ra: Depression

10ra: Wall

10Rb: Depression

10rb: wall surface

10rc: Wall

11: n-type semiconductor layer

11a: surface

12: p-type semiconductor layer

15: light emitting layer

20: substrate

20a: upper surface

25: junction layer

25a: junction layer

25b: junction layer

27: electrode

31: Bonding pad

32: Bonding pad

33:n electrode

33c: Contact

33g: cavity

33p: Extension

35: p electrode

35c: contact

35p: Extension

37: Metal layer

39: conductive layer

39a: Part 1

39b: Part 2

40e: cutting area

41: Dielectric film

41a: opening

41c: Crack

45: Dielectric film

45a: opening

47: Dielectric film

50: non-luminous area

50a: surface

55: recess

60: light emitting area

101: substrate

103: Hard mask

WG: interval

1(a) is a plan view schematically showing the semiconductor light emitting device of the first embodiment, and (b) is a schematic cross-sectional view of the semiconductor light emitting device of the first embodiment.

2(a) is another plan view schematically showing the semiconductor light-emitting device of the first embodiment, and (b) is a schematic cross-sectional view of the main part of the semiconductor light-emitting device.

3(a) to (c) are schematic cross-sectional views showing the manufacturing process of the semiconductor light emitting device according to the first embodiment.

4(a) to (c) are schematic cross-sectional views showing the manufacturing process following FIG. 3(c).

5(a) and (b) are schematic cross-sectional views showing the manufacturing process following FIG. 4(c).

6(a) and (b) are schematic cross-sectional views showing the manufacturing process following FIG. 5(b).

7(a) and (b) are schematic cross-sectional views showing the manufacturing process following FIG. 6(b).

8(a) is a schematic cross-sectional view showing the characteristics of the semiconductor light-emitting device of the first embodiment, and (b) is a schematic cross-sectional view of the main part of the semiconductor light-emitting device of the comparative example.

9(a) and (b) are plan views schematically showing the main parts of the semiconductor light emitting device according to the first embodiment.

10(a) is a plan view schematically showing the semiconductor light emitting device of the second embodiment, and (b) and (c) are schematic cross-sectional views of the semiconductor light emitting device of the second embodiment.

[Related application]

This application has priority based on Japanese Patent Application No. 2015-122754 (application date: June 18, 2015). This application includes all contents of the basic application by referring to the basic application.

Hereinafter, the embodiment will be described with reference to the drawings. The same parts in the drawings are marked with the same numbers and their detailed descriptions are appropriately omitted, and the different parts will be described. In addition, the schema is a schematic diagram or a conceptual diagram, the relationship between the thickness and width of each part, and the ratio of the size between the parts, etc. may not be the same as the actual thing. In addition, even in the case of showing the same part, there may be cases where the sizes or ratios are different from each other according to the drawings.

In addition, the semiconductor light-emitting device described in the following embodiments is an example, and is not limited to these embodiments. In addition, the technical features described in each semiconductor light-emitting device can be commonly applied in each embodiment when they are technically applicable.

(First embodiment)

FIG. 1(a) is a plan view schematically showing the semiconductor light emitting device 1 of the first embodiment. FIG. 1(b) is a schematic cross-sectional view of the semiconductor light emitting device 1 taken along line A-A shown in FIG. 1(a). The semiconductor light-emitting device 1 is a sheet-shaped light source, and is mounted on a mounting substrate, for example.

As shown in FIG. 1( a ), the semiconductor light-emitting device 1 includes a light-emitting body 10 and a substrate 20. The luminous body 10 is provided on the substrate 20. The semiconductor light emitting device 1 has bonding pads 31 arranged side by side with the light emitting body 10 on the substrate 20.

As shown in FIG. 1( b ), the light-emitting body 10 is bonded to the substrate 20 via the bonding layer 25. The luminous body 10 includes a first semiconductor layer of a first conductivity type (hereinafter referred to as an n-type semiconductor layer 11 ), a second semiconductor layer of a second conductivity type (hereinafter referred to as a p-type semiconductor layer 12 ), and a light-emitting layer 15. The light-emitting body 10 has a structure in which an n-type semiconductor layer 11, a light-emitting layer 15, and a p-type semiconductor layer 12 are sequentially stacked. Hereinafter, the first conductivity type will be described as n-type and the second conductivity type will be described as p-type, but it is not limited thereto. The embodiment also includes a case where the first conductivity type is p-type and the second conductivity type is n-type.

The luminous body 10 has a first surface 10 a including the surface of the n-type semiconductor layer 11, a second surface 10 b including the surface of the p-type semiconductor layer 12, and a side surface 10 c including the outer edge of the n-type semiconductor layer 11. Furthermore, the light-emitting body 10 has a non-light-emitting portion 50 and a light-emitting portion 60. A step is provided between the non-light-emitting portion 50 and the light-emitting portion 60. The non-light-emitting portion 50 has a surface 50a provided at a depth from the second surface 10b to the n-type semiconductor layer 11. The light-emitting portion 60 includes an n-type semiconductor layer 11, a light-emitting layer 15, and a p-type semiconductor layer 12, and the non-light-emitting portion 50 surrounds the light-emitting region 60 in a plane parallel to the second surface 10b (see FIG. 2(a)).

The light emitted from the light-emitting layer 15 is mainly emitted to the outside of the light-emitting body 10 from the first surface 10a. The first surface 10a has a light extraction structure. The light extraction structure suppresses the total reflection of the emitted light and improves the light extraction efficiency. For example, the first surface 10a is provided with fine protrusions to be roughened.

The semiconductor light-emitting device 1 has an n-electrode 33 (first metal layer), a p-electrode 35, and a metal layer 37 on the second surface 10b side of the light-emitting body 10. The n-electrode 33 is electrically connected to the n-type semiconductor layer 11 on the surface 50 a of the non-light emitting portion 50. The p electrode 35 is electrically connected to the p-type semiconductor layer 12 on the second surface 10b. The metal layer 37 is provided on the p electrode 35. The n-electrode 33, the p-electrode 35 and the metal layer 37 preferably include a material having a high reflectance to the light emitted from the light-emitting layer 15. The n-electrode 33 contains, for example, aluminum (Al). The p electrode 35 and the metal layer 37 contain silver (Ag), for example. Furthermore, it may be a structure in which the metal layer 37 is not provided.

The semiconductor light-emitting device 1 has dielectric films 41 and 45. The dielectric film 41 covers the step difference between the non-light-emitting portion 50 and the light-emitting portion 60, and the portion on the surface 50a of the non-light-emitting portion 50 where the n-electrode 33 is not provided. The dielectric film 41 covers and protects the outer edge of the light-emitting layer 15. The dielectric film 45 covers the entire non- 光部50。 50 light section. The dielectric film 45 covers the n-electrode 33 to electrically insulate the n-electrode 33 from the substrate 20 and the bonding layer 25. The material of the dielectric film 45 may be the same as the dielectric film 41.

The metal layer 37 extends onto the dielectric film 45 and covers the dielectric films 41 and 45 between the n electrode 33 and the p electrode 35. The metal layer 37 reflects light propagating in the direction of the substrate 20 through the dielectric films 41 and 45 between the n-electrode 33 and the p-electrode 35, and returns the light toward the first surface 10a.

The bonding layer 25 is provided so as to cover the metal layer 37 and the dielectric film 45. The bonding layer 25 is, for example, a conductive layer containing a bonding metal containing solder such as gold tin (AuSn) and nickel tin (NiSn). The p-electrode 35 is electrically connected to the bonding layer 25 via the metal layer 37. In addition, the bonding layer 25 is electrically connected to the conductive substrate 20. The bonding layer 25 contains, for example, a high-melting-point metal film such as titanium (Ti) or titanium-tungsten (TiW). The high-melting-point metal film functions as a barrier film that prevents solder from diffusing to the p-electrode 35 and the metal layer 37. The electrode 27 is provided on the back side of the substrate 20. The electrode 27 is, for example, a laminated film of Ti/Pt/Au, and has a film thickness of 800 nm, for example. The electrode 27 is connected to an external circuit via a mounting substrate, for example.

In contrast, the n-electrode 33 is connected to an external circuit via a metal wire such as gold or aluminum connected to the bonding pad 31 (second metal layer). The n-electrode 33 has an extension portion 33p extending outward from the light-emitting body 10. The bonding pad 31 is disposed on the extending portion 33p via the conductive layer 39. The conductive layer 39 covers the extension 33p and extends between the light-emitting body 10 and the n-electrode 33. The conductive layer 39 extends from the bonding pad 31 in the direction of the wafer end 1e, for example, to the outside of the end of the extension portion 33p on the wafer end 1e side.

The extending portion 33p extends along the upper surface 20a of the substrate 20. The dielectric film 45 and the bonding layer 25 are interposed between the extension portion 33p and the substrate 20. The extension portion 33p is electrically insulated from the substrate 20 and the bonding layer 25 by the dielectric film 45.

2(a) is another plan view schematically showing the semiconductor light emitting device 1. FIG. Figure 2(b) Department table A schematic diagram showing a cross section taken along line B-B shown in FIG. 2(a).

FIG. 2(a) is a schematic view showing the electrode surface under the luminous body 10. FIG. The broken line shown in the figure represents the outer edge of the luminous body 10. The luminous body 10 has a recess 10R in which the side surface 10c recedes inward in a direction parallel to the second surface 10b. The n-electrode 33 is provided on the surface 50 a of the non-light emitting portion 50. The n-electrode 33 is provided so as to surround the light-emitting region 60 directly under the light-emitting body 10.

The semiconductor light-emitting device 1 has, for example, five light-emitting regions 60. A p-electrode 35 is provided on each light-emitting region 60. The light-emitting regions 60 each include the light-emitting layer 15. For example, the driving current of the semiconductor light emitting device 1 is supplied from the electrode 27 on the back side of the substrate 20. The driving current flows from the p electrode 35 electrically connected to the substrate 20 to the n electrode 33 via the light emitting layer 15. With this, the semiconductor light-emitting device 1 emits light from the five light-emitting regions 60.

The n-electrode 33 has a portion that extends to the outside of the light-emitting body 10 (extension portion 33p). The extension 33p is located in the recess 10R. The conductive layer 39 covers the entire extension 33p. In addition, the conductive layer 39 extends below the light-emitting body 10. The bonding pad 31 is disposed on the conductive layer 39. The gap W _G between the bonding pad 31 and the light-emitting body 10 is preferably 50 μm or less.

As shown in FIG. 2( b ), the n-electrode 33 is provided in contact with the n-type semiconductor layer 11 on the surface 50 a of the non-light-emitting portion 50 of the light-emitting body 10. The n-electrode 33 includes a portion that extends to the outside of the light-emitting body 10 (extension portion 33p). The extending portion 33p extends along the upper surface 20a of the substrate 20 via the dielectric film 45 and the bonding layer 25. The conductive layer 39 includes a first portion 39a covering the extended portion 33p and a second portion 39b extending between the light-emitting body 10 and the n-electrode 33. That is, when the wafer surface is viewed from above, the conductive layer 39 has a portion overlapping with the light-emitting body 10. When the wafer surface is viewed from above, the outer edge of the conductive layer 39 is located between the portion where the n-electrode 33 and the n-type semiconductor layer 11 are in contact (contact portion 33c) and the outer edge of the light-emitting body 10. The dielectric film 41 is located between the light-emitting body 10 and the conductive layer 39 and extends to the outside of the light-emitting body 10 along the conductive layer 39.

Next, a method of manufacturing the semiconductor light-emitting device 1 will be described with reference to FIGS. 3(a) to 7(b). 3(a) to 7(b) are schematic cross-sectional views sequentially showing the manufacturing process of the semiconductor light-emitting device 1.

As shown in FIG. 3( a ), an n-type semiconductor layer 11, a light-emitting layer 15 and a p-type semiconductor layer 12 are sequentially stacked on the substrate 101. In this specification, in addition to the directly connected state, the state of the layer is also included in the state of inserting other elements in the middle.

The substrate 101 is, for example, a silicon substrate or a sapphire substrate. The n-type semiconductor layer 11, the p-type semiconductor layer 12, and the light-emitting layer 15 each include a nitride semiconductor. The n-type semiconductor layer 11, the p-type semiconductor layer 12, and the light-emitting layer 15 include, for example, Al _x Ga _1-xy In _y N (x≧0, y≧0, x+y≦1).

The n-type semiconductor layer 11 includes, for example, a Si-doped n-type GaN contact layer and a Si-doped n-type AlGaN cladding layer. The Si-doped n-type AlGaN cladding layer is disposed between the Si-doped n-type GaN contact layer and the light-emitting layer 15. The n-type semiconductor layer 11 may further include a buffer layer, and the Si-doped n-type GaN contact layer is disposed between the GaN buffer layer and the Si-doped n-type AlGaN cladding layer. For example, any one of AlN, AlGaN, GaN, or a combination thereof may be used for the buffer layer.

The light emitting layer 15 has, for example, a multiple quantum well (MQW: Multiple Quantum Well) structure. In the MQW structure, for example, a plurality of barrier layers and a plurality of well layers are alternately stacked. For example, AlGaInN is used for the well layer. For example, GaInN is used for the well layer.

For the barrier layer, for example, Si-doped n-type AlGaN is used. For example, the barrier layer uses Si-doped n-type Al _0.1 Ga _0.9 N. The thickness of the barrier layer is, for example, 2 nm or more and 30 nm or less. Among the plurality of barrier layers, the barrier layer (p-side barrier layer) closest to the p-type semiconductor layer 12 may be different from other barrier layers, and may be thicker or thinner than other barrier layers.

The wavelength (peak wavelength) of the light (emitted light) emitted from the light-emitting layer 15 is, for example, 210 nm or more and 700 nm or less. The peak wavelength of the emitted light can also be greater than or equal to 370nm and less than or equal to 480nm.

The p-type semiconductor layer 12 includes, for example, an undoped AlGaN spacer layer, an Mg-doped p-type AlGaN cladding layer, an Mg-doped p-type GaN contact layer, and a high-concentration Mg-doped p-type GaN contact layer. The Mg-doped p-type GaN contact layer is disposed between the high-concentration Mg-doped p-type GaN contact layer and the light-emitting layer 15. The Mg-doped p-type AlGaN cladding layer is disposed between the Mg-doped p-type GaN contact layer and the light-emitting layer 15. The undoped AlGaN spacer layer is disposed between the Mg-doped p-type AlGaN cladding layer and the light-emitting layer 15. For example, the p-type semiconductor layer 12 includes an undoped Al _0.11 Ga _0.89 N spacer layer, an Mg-doped p-type Al _0.28 Ga _0.72 N cladding layer, an Mg-doped p-type GaN contact layer, and a high-concentration Mg-doped p-type GaN contact Floor.

In addition, in the above-mentioned semiconductor layer, the composition, composition ratio, type of impurity, impurity concentration and thickness are exemplified, and various changes can be made.

As shown in FIG. 3(b), the non-light emitting portion 50 and the light emitting portion 60 are formed. For example, a hard mask 103 is used to selectively etch and remove a part of the p-type semiconductor layer 12 and a part of the light emitting layer 15. The hard mask 103 is, for example, a silicon oxide film. The etching depth is, for example, 0.1 μm or more and 100 μm or less. The etching depth is preferably 0.4 μm or more and 2 μm or less. The non-light emitting portion 50 is formed such that the n-type semiconductor layer 11 is exposed on the surface 50a.

As shown in FIG. 3(c), a dielectric film 41 covering the upper surface of the p-type semiconductor layer 12, the step difference between the non-light emitting portion 50 and the light emitting portion 60, and the surface 50a of the non-light emitting portion 50 is formed. The dielectric film 41 is, for example, a silicon oxide film or a silicon nitride film. In addition, the dielectric film 41 has, for example, a laminated structure, or may have a structure formed by laminating a silicon oxide film and a silicon nitride film. The hard mask 103 is removed by etching before the dielectric film 41 is formed.

As shown in FIG. 4(a), the surface 50a provided on the non-light emitting portion 50 is selectively removed. The dielectric film 41 exposes the n-type semiconductor layer 11. Then, an n electrode 33 electrically connected to the n-type semiconductor layer 11 is formed. The material of the n-electrode 33 has, for example, ohmic contact with the n-type semiconductor layer 11 and high light reflectance, and includes at least one of aluminum (Al) and silver (Ag).

In addition, a conductive layer 39 is selectively formed on the dielectric film 41. The conductive layer 39 is provided near the portion (contact portion 33c) where the n-electrode 33 and the n-type semiconductor layer 11 are in contact, and covers the portion where the bonding pad 31 is to be arranged later. The n-electrode 33 includes an extension portion 33p extending on the conductive layer 39. The conductive layer 39 is, for example, titanium nitride (TiN). In addition, the conductive layer 39 may be a composite layer including at least any one of a metal layer, a conductive metal nitride layer, and a conductive metal oxide layer.

As shown in FIG. 4(b), a dielectric film 45 covering the n-electrode 33, the conductive layer 39, and the dielectric film 41 is formed. The dielectric film 45 is, for example, a silicon oxide film.

As shown in FIG. 4(c), the dielectric films 45 and 41 are selectively etched to form openings 45a and 41a. As a result, the p-type semiconductor layer 12 is exposed. At this stage, the dielectric film 41 covering the surface 50a except the portion in contact with the contact portion 33c of the n-electrode 33 and the dielectric covering the n-electrode 33, the conductive layer 39 and the dielectric film 41 remain in the non-light emitting portion 50膜45。 The film 45. Then, a p-electrode 35 electrically connected to the p-type semiconductor layer 12 is formed. The p electrode 35 contains Ag, for example.

As shown in FIG. 5( a ), a metal layer 37 is formed on the p-electrode 35. The metal layer 37 extends over the dielectric film 45, and covers the step difference between the non-light-emitting portion 50 and the light-emitting portion 60 and a portion of the surface 50a of the non-light-emitting portion 50 via the dielectric films 41 and 45. The metal layer 37 covers the dielectric films 41 and 45 between the n electrode 33 and the p electrode 35. The metal layer 37 contains Ag, for example.

Furthermore, a bonding layer 25a covering the metal layer 37 and the dielectric film 45 is formed. The bonding layer 25a includes, for example, a high-melting-point metal film containing at least any one of Ti, Pt, and Ni and a bonding metal. The bonding metal includes, for example, Ni-Sn system, Au-Sn system, Bi-Sn system, Sn-Cu system, Sn-In In the series, Sn-Ag series, Sn-Pb series, Pb-Sn-Sb series, Sn-Sb series, Sn-Pb-Bi series, Sn-Pb-Cu series, Sn-Pb-Ag series and Pb-Ag series At least any of them. The high-melting-point metal film containing at least any one of Ti, Pt, and Ni is provided between the bonding metal and the metal layer 37 and between the bonding metal and the dielectric film 45.

As shown in FIG. 5(b), the substrate 101 on which the bonding layer 25a is formed is opposed to the substrate 20. A bonding layer 25b is formed on the upper surface of the substrate 20. Moreover, the bonding layer 25b of the substrate 20 is arranged to face the bonding layer 25a of the substrate 101.

The bonding layer 25b includes, for example, a high-melting-point metal film containing at least any one of Ti, Pt, and Ni and a bonding metal. The bonding metal includes, for example, Ni-Sn series, Au-Sn series, Bi-Sn series, Sn-Cu series, Sn-In series, Sn-Ag series, Sn-Pb series, Pb-Sn-Sb series, Sn-Sb series , At least any one of Sn-Pb-Bi system, Sn-Pb-Cu system, Sn-Pb-Ag system and Pb-Ag system. The high-melting-point metal film containing at least any one of Ti, Pt, and Ni is provided between the bonding metal and the substrate 20.

As shown in FIG. 6(a), the bonding layers 25a and 25b are brought into contact and the substrate 101 and the substrate 20 are thermocompression bonded. Thereby, the bonding layers 25a and 25b are integrated to become the bonding layer 25. In addition, FIG. 6(a) shows a state in which each semiconductor layer and the substrate 101 are arranged on the substrate 20 via the bonding layer 25 by turning upside down in FIG. 5(b).

As shown in FIG. 6(b), the substrate 101 is removed. For example, when the substrate 101 is a silicon substrate, methods such as polishing and dry etching (such as RIE: Reactive Ion Etching) are used for removal. For example, when the substrate 101 is a sapphire substrate, LLO (Laser Lift Off) is used for removal. Furthermore, fine protrusions are formed on the surface 11a of the n-type semiconductor layer 11 to roughen the surface 11a. For example, the surface 11a of the n-type semiconductor layer 11 is roughened by wet processing using alkali or RIE.

As shown in FIG. 7( a ), the n-type semiconductor layer 11 is selectively removed to form the light-emitting body 10. For example, the n-type semiconductor layer 11, the light-emitting layer 15, and the p-type semiconductor layer 12 are etched in order using RIE or wet etching. At this time, a part of the dielectric film 41 is exposed around the light-emitting body 10. For the etching of the n-type semiconductor layer 11, the light-emitting layer 15, and the p-type semiconductor layer 12, for example, hot phosphoric acid is used.

The dielectric film 41 is resistant to the etchant that removes the n-type semiconductor layer 11 and protects the structure directly underneath. Furthermore, the dielectric film 41 forming the bonding pad 31 is selectively removed to expose the conductive layer 39. Then, the bonding pad 31 is formed on the conductive layer 39.

As shown in FIG. 7(b), the dielectric films 41 and 45 around the light-emitting body 10 are selectively removed to form a cut region 40e. Then, for example, the bonding layer 25 and the substrate 20 are cut using a slicer or a scriber, and the semiconductor light emitting device 1 is made into small pieces.

In the above example, in addition to the silicon oxide film, silicon nitride or silicon oxynitride may be used for the dielectric films 41 and 45. Furthermore, oxides of at least any one metal such as Al, Zr, Ti, Nb, and Hf, nitrides of at least any one of the above metals, or oxynitrides of at least any one of the above metals may also be used.

Next, the function of the conductive layer 39 will be described with reference to FIGS. 8(a) and (b). 8(a) is a schematic cross-sectional view showing the characteristics of the semiconductor light-emitting device 1, and FIG. 8(b) is a schematic cross-sectional view of the main part of the semiconductor light-emitting device 2 of the comparative example.

The n-type semiconductor layer 11, the light-emitting layer 15, and the p-type semiconductor layer 12 include, for example, internal stress caused by a difference in thermal expansion coefficient from the substrate 101 in the state of epitaxial growth. A part of this internal stress is also held by the substrate 20 in the state where the substrate 101 is removed as shown in FIG. 6(b). Moreover, when the n-type semiconductor layer 11 is selectively removed for forming the light-emitting body 10, there is a portion directly under the light-emitting body 10 and a portion where the n-type semiconductor layer 11 is removed The difference between the stresses causes cracks 41c in the dielectric film 41.

As shown in FIG. 8( a ), directly under the dielectric film 41, the conductive layer 39 extends between the light-emitting body 10 and the n-electrode 33. For the conductive layer 39, for example, a material that is resistant to the etchant used to remove the n-type semiconductor layer 11 is used. Thereby, the conductive layer 39 functions to prevent penetration of etching liquid such as hot phosphoric acid through the crack 41c.

On the other hand, in the semiconductor light-emitting device 2 shown in FIG. 8( b ), the conductive layer 39 is provided on the extension portion 33 p for forming the bonding pad 31, but does not extend under the light-emitting body 10. Furthermore, at the outer edge of the light-emitting body 10, the n-electrode 33 is located directly under the dielectric film 41. For example, it is extremely difficult to select a material that is in ohmic contact with the n-type semiconductor layer 11, has high reflectivity to the light emitted from the light-emitting layer 15, and is resistant to the etchant of the n-type semiconductor layer 11, so the n-electrode 33 uses etching resistance Lower material. Therefore, the etching solution permeated through the crack 41c will also etch the n-electrode 33. As a result, a cavity 33g is generated between the contact portion 33c of the n-electrode 33 and the extension portion 33p, the resistance between the bonding pad 31 and the n-type semiconductor layer 11 increases, and the operating voltage of the semiconductor light-emitting element 2 rises. In addition, the Al-containing metal exposed in the cavity 33g is more likely to cause ion migration due to contact with the outside atmosphere, for example.

In this way, the n-electrode 33 is protected by the etching process of the conductive layer 39 in the n-type semiconductor layer 11 in this embodiment, and the resistance between the bonding pad 31 and the n-type semiconductor layer 11 is prevented from increasing, thereby suppressing ion migration. Thereby, the manufacturing yield and reliability of the semiconductor light emitting device 1 are improved.

9(a) and (b) are plan views schematically showing the main parts of the semiconductor light emitting device 1. FIG. 9(a) and (b) show the recessed portions 10Ra and 10Rb provided with the bonding pad 31. FIG.

As shown in FIG. 9( a ), the recessed portion 10Ra is provided in the light-emitting body 10. The depressed portion 10Ra is a portion of the first surface 10a that recedes inward of the light-emitting body 10. The depression 10Ra is retracted to the side The surface 10c is further surrounded by the inner wall surface 10rc and the wall surface 10ra connected to the side surface 10c. The bonding pad 31 is located between two opposing wall surfaces 10ra. The wall surface 10ra is in contact with the side surface 10c, for example.

On the other hand, in the example shown in FIG. 9( b ), the recessed portion 10Rb is provided in the light-emitting body 10. The recessed portion 10Rb is a portion of the first surface 10a that recedes inward of the light-emitting body 10. The recessed portion 10Rb is surrounded by a wall surface 10rc receding to the inner side of the side surface 10c and a wall surface 10rb connected to the side surface 10c. The bonding pad 31 is located between two opposing wall surfaces 10rb. The wall surface 10rb is connected to the side surface 10c via the curved surface 10cr.

In the example of FIG. 9(b), for example, when the curvature radius of the curved surface 10cr is set to 30 nm, a crack 41c occurs in the dielectric film 41 directly below it (see FIG. 8(a)). On the other hand, in the example shown in FIG. 9(a), the dielectric film 41 does not crack. The example of FIG. 9(a) corresponds to the case where the radius of curvature of the curved surface 10cr is set to 0 (zero). That is, by setting the radius of curvature of the curved surface 10cr to be equal to or greater than 0 μm and less than 30 μm, the generation of cracks 41c in the dielectric film 41 can be suppressed. Thereby, the reliability of the semiconductor light emitting device 1 can be further improved.

(Second embodiment)

FIG. 10(a) is a plan view schematically showing the semiconductor light emitting device 3 of the second embodiment. 10(b) and (c) are schematic cross-sectional views of the main part of the semiconductor light emitting device 3. FIG. 10(b) shows a cross section along the line C-C shown in FIG. 10(a), and FIG. 10(c) shows a cross section along the line D-D shown in FIG. 10(a).

The semiconductor light-emitting device 3 includes a light-emitting body 10 and a substrate 20. The luminous body 10 is provided on the substrate 20. FIG. 10(a) is a top view showing the wafer surface under the luminous body 10. FIG. The broken line in FIG. 10(a) indicates the outer edge of the luminous body 10.

As shown in FIG. 10( a ), the semiconductor light-emitting device 3 includes an n-electrode 33 and a p-electrode 35 (first metal layer) provided under the light-emitting body 10. In this embodiment, the p-electrode 35 has an extension To the portion (extension 35p) outside the luminous body 10, the bonding pad 32 (second metal layer) is provided on the extension 35p. A conductive layer 39 is provided between the bonding pad 32 and the extension 35p. The conductive layer 39 has a first portion 39a covering the extended portion 35p and a second portion 39b extending between the light-emitting body 10 and the p-electrode 35.

The luminous body 10 has a plurality of recesses 55. The concave portions 55 are arranged at a distance from each other inside the p-electrode 35. The n electrodes 33 are provided in the recesses 55, respectively.

As shown in FIG. 10( b ), the light-emitting body 10 is provided on the substrate 20 via the bonding layer 25. The light-emitting body 10 includes an n-type semiconductor layer 11, a p-type semiconductor layer 12 and a light-emitting layer 15. The light emitting layer 15 is provided between the n-type semiconductor layer 11 and the p-type semiconductor layer 12. The luminous body 10 has a first surface 10 a including the surface of the n-type semiconductor layer 11, a second surface 10 b including the surface of the p-type semiconductor layer 12, and a side surface 10 c including the outer edge of the n-type semiconductor layer 11. It is preferable to provide a light extraction structure on the first surface 10a. The dielectric film 47 covers the first surface 10a and the side surface 10c. The luminous body 10 is provided with a recess 55 that reaches the n-type semiconductor layer 11 from the second surface 10b.

The n-electrode 33, the p-electrode 35, and the dielectric films 41 and 45 are provided between the light-emitting body 10 and the bonding layer 25. The dielectric film 41 covers the surface of the p-type semiconductor layer 12 and the inner surface of the recess 55. The p electrode 35 is in contact with the surface of the p-type semiconductor layer 12 at a portion where the dielectric film 41 is selectively removed. In addition, the n-electrode 33 is in contact with the n-type semiconductor layer 11 on the bottom surface of the recess 55. The dielectric film 45 covers the inner surfaces of the p-electrode 35, the dielectric film 41, and the recess 55. The dielectric film 45 electrically insulates the p-electrode 35 from the substrate 20 and the bonding layer 25. On the other hand, the bonding layer 25 extends into the recess 55 and is in contact with the n-electrode 33. The n-electrode 33 is electrically connected to the substrate 20 via the bonding layer 25.

As shown in FIG. 10(c), the p-electrode 35 has an extension portion 35p extending on the bonding layer 25 via the dielectric film 45. A bonding pad 32 is provided on the extending portion 35p via the conductive layer 39. The p-electrode 35 is electrically connected to an external circuit via, for example, a metal wire connected to the bonding pad 32.

The conductive layer 39 extends between the extension portion 35p and the dielectric film 41 to just below the light-emitting body 10. When viewed from above the wafer, the conductive layer 39 has a portion overlapping with the light-emitting body 10. When viewed from the upper surface of the wafer, the outer edge of the conductive layer 39 is located between the outer edge of the light-emitting body 10 and the contact portion 35c of the p-electrode 35. Thereby, the conductive layer 39 effectively protects the p-electrode 35, thereby improving the reliability of the semiconductor light-emitting device 3.

The embodiments have been described above with reference to specific examples. However, the embodiment is not limited to these specific examples. That is, the invention obtained by the manufacturer adding appropriate design changes to these specific examples is also included in the scope of the embodiment as long as it has the characteristics of the embodiment. The elements and their arrangement, materials, conditions, shapes, dimensions, etc. included in the above specific examples are not limited to the exemplified contents, and can be appropriately changed.

In the embodiment, the so-called "nitride semiconductor" is included in B _x In _v Al _z Ga _1-xyz N (0≦x≦1, 0≦y≦1, 0≦z≦1, x+y+z ≦1) Semiconductors of all compositions that change the composition ratios x, y, and z within their respective ranges. Furthermore, the following semiconductors are also included in "nitride semiconductors": semiconductors containing group V elements other than N (nitrogen) in the above chemical formula, and semiconductors containing various elements added to control various physical properties such as conductivity type and Furthermore, semiconductors containing various elements accidentally contained.

In the above embodiment, the expression "above" when "part A is provided on part B" is in addition to the case where part A is in contact with part B and part A is placed on part B. It is used when the location A is not in contact with the location B, but the location A is provided above the location B. In addition, “part A is provided above part B” may be applied to the case where part A and part B are reversed so that part A is below part B, or where part A and part B are side by side . The reason is that even if the semiconductor device of the embodiment is rotated, the structure of the semiconductor device does not change before and after the rotation.

Several embodiments of the present invention have been described, but these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, substitutions, and changes can be made without departing from the scope of the invention. These embodiments or changes are included in the scope or gist of the invention, and are included in the invention described in the patent application scope and its equivalent scope.

1: semiconductor light emitting device

1e: chip side

10: Luminous body

10a: Face 1

10b: Face 2

10c: side

11: n-type semiconductor layer

12: p-type semiconductor layer

15: light emitting layer

20: substrate

20a: upper surface

25: junction layer

27: electrode

31: Bonding pad

33:n electrode

33p: Extension

35: p electrode

37: Metal layer

39: conductive layer

41: Dielectric film

45: Dielectric film

50: non-luminous area

50a: surface

60: light emitting area

Claims (10)

A semiconductor light-emitting device includes a light-emitting body (10) including a first semiconductor layer (11) of a first conductivity type, a second semiconductor layer (12) of a second conductivity type, and the first semiconductor A light emitting layer (15) between the layer and the second semiconductor layer, and has a first surface (10a) including the surface of the first semiconductor layer and a second surface (10b) including the surface of the second semiconductor layer And a side surface (10c) including the outer edge of the first semiconductor layer (11); a substrate (20) disposed on the second semiconductor layer (12) side of the light emitter (10); a first metal layer ( 33), which is in electrical contact with the first semiconductor layer (11) between the substrate (20) and the luminous body (10), and from the substrate (20) and the luminous body (10) Extending along the substrate (20) to the outside of the luminous body (10); a conductive layer (39) covering the extended portion (33p) of the first metal layer (33) located outside the luminous body (10) ), and extends between the portion of the first metal layer (33) that is not in contact with the luminous body (10) and the luminous body (10); and the second metal layer (31), which is on the substrate ( 20) The light-emitting body (10) is arranged side by side, and is disposed on the extension portion (33p) via the conductive layer (39); the light-emitting body (10) has a light-emitting layer including the light-emitting layer (15) A portion, and a non-light-emitting portion provided around the light-emitting portion via a step difference from the second surface (10b) to the first semiconductor layer (11); the first metal layer (33) is located in the non-light-emitting portion The light-emitting portion is electrically connected to the first semiconductor layer (11); the conductive layer has an etching solution for removing the first semiconductor layer (11) that is The metal layer (33) is more etch resistant. The semiconductor light-emitting device according to claim 1, wherein the light-emitting body (10) further includes a recessed portion, which is recessed from the side surface (10c) toward the inside in a direction parallel to the first surface (10a); the side wall of the recessed portion It is connected to the side surface (10c) via a curved surface, and the curved surface has a radius of curvature greater than 0 microns and less than 30 microns. The semiconductor light emitting device according to claim 2, wherein the interval between the outer edge of the light emitter (10) and the second metal layer (31) is 50 microns or less. The semiconductor light-emitting device according to claim 1, wherein the conductive layer (39) includes at least any one of a metal, a metal oxide having conductivity, and a metal nitride having conductivity. The semiconductor light-emitting device according to any one of claims 1 to 4, further comprising: a dielectric film (41) provided on the light-emitting body (10) and the first metal layer (33) but not the light-emitting body (10) Between the contacting parts, the dielectric film (41) extends along the conductive layer (39) to the outside of the light-emitting body (40), and the extension portion (33p) of the first metal layer (33) The dielectric film (41) is not in contact with the outside of the luminous body (10). A semiconductor light-emitting device includes a light-emitting body (10) including a first semiconductor layer (11) of a first conductivity type, a second semiconductor layer (12) of a second conductivity type, and the first semiconductor A light emitting layer (15) between the layer and the second semiconductor layer, and has a first surface (10a) including the surface of the first semiconductor layer and a second surface (10b) including the surface of the second semiconductor layer And a side surface (10c) including the outer edge of the first semiconductor layer (11); a substrate (20) disposed on the second semiconductor layer (12) side of the light emitter (10); a first metal layer ( 35), which is in electrical contact with the second semiconductor layer between the substrate (20) and the luminous body (10), and extends from between the substrate (20) and the luminous body (10) The substrate (20) extends outward of the light emitter (10); the conductive layer (39) covers the extension (35p) of the first metal layer (35) located outside the light emitter (10), and Extending between the portion of the first metal layer (35) not in contact with the luminous body (10) and the luminous body (10); and the second metal layer (32) on the substrate (20) Arranged side by side with the luminous body (10) and on the extension portion (35p) via the conductive layer (39); the luminous body includes a recessed portion that reaches the first semiconductor layer from the second surface; the first The first semiconductor layer is electrically connected to the substrate through the recess. The conductive layer (39) is more resistant to etching than the first metal layer (35) for removing the etching solution of the first semiconductor layer (11). The semiconductor light emitting device according to claim 6, wherein the light emitting body (10) further includes a recessed portion, which is recessed from the side surface (10c) toward the inside in a direction parallel to the first surface (10a); The second metal layer (32) is provided in the recessed portion. The semiconductor light-emitting device according to claim 7, wherein the interval between the outer edge of the light-emitting body (10) and the second metal layer (32) is 50 microns or less. The semiconductor light-emitting device according to claim 6, wherein the conductive layer (39) includes at least any one of a metal, a metal oxide having conductivity, and a metal nitride having conductivity. The semiconductor light-emitting device according to any one of claims 6 to 9, further comprising: a dielectric film (41) provided on the light-emitting body (10) and the first metal layer (35) but not the light-emitting body (10) Between the contacting parts, the dielectric film (41) extends along the conductive layer (39) to the outside of the light-emitting body (40), and the extension portion (35p) of the first metal layer (35) The dielectric film (41) is not in contact with the outside of the luminous body (10).

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