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TWI687033B - Extra-high voltage gain interleaved dc/dc converter - Google Patents

Extra-high voltage gain interleaved dc/dc converter Download PDF

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Publication number
TWI687033B
TWI687033B TW108132625A TW108132625A TWI687033B TW I687033 B TWI687033 B TW I687033B TW 108132625 A TW108132625 A TW 108132625A TW 108132625 A TW108132625 A TW 108132625A TW I687033 B TWI687033 B TW I687033B
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Taiwan
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diode
switch
converter
voltage
capacitor
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TW108132625A
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Chinese (zh)
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TW202112041A (en
Inventor
楊松霈
陳信助
黃昭明
謝承道
林加耀
林資祐
陳鏡仁
方均
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崑山科技大學
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    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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  • Dc-Dc Converters (AREA)

Abstract

The invention provides extra-high voltage gain interleaved DC/DC converter, which obtains extra high-gain boost. The interleaved switch S1 and switch S2 operates as 180° out of phase that reduces input current ripple, uses lesser inductance value of input filter inductor to reduce volume thereof and prevent operating maximal conduction, the power switch comprises low voltage stress that is lower than output voltage, which can use lower rated insulation voltage MOSFET with lesser conducting resistance for cost down and conduction losses, possesses parallel connection for sharing input current and reduces current stress of energy storage device and switch element of circuit efficiently that can be applied to high power status. Further, the invention reduces loss of circuit conduction efficiently, enhance overall efficiency of converter.

Description

超高電壓增益交錯式直流轉換器Ultra-high voltage gain interleaved DC converter

本發明係有關於一種超高電壓增益交錯式直流轉換器，尤其是指一種具高升壓增益、高電力密度、低電壓應力、高功率應用及高轉換效率，而在其整體施行使用上更增實用功效特性者。The present invention relates to an ultra-high voltage gain interleaved DC converter, especially refers to a kind with high boost gain, high power density, low voltage stress, high power application and high conversion efficiency. Increasing practical efficacy characteristics.

按，對於直流升壓目的而言，理論上，操作在極高導通比的傳統升壓型〔boost〕轉換器能夠得到高電壓增益，但是實務上受到寄生元件的影響，電壓轉換比受限在約5倍以下，因此當電壓增益高達10倍左右的實務需求時，研發嶄新的高升壓轉換器拓樸是必要的。因此，於近幾年來，高升壓DC-DC轉換器是電力電子工程領域中常見的研究主題之一。For the purpose of DC boost, in theory, a traditional boost converter [boost] converter operating at a very high turn-on ratio can obtain a high voltage gain, but in practice is affected by parasitic elements, the voltage conversion ratio is limited to It is about 5 times or less, so when the practical requirement of the voltage gain is up to about 10 times, it is necessary to develop a new high-boost converter topology. Therefore, in recent years, high-boost DC-DC converters are one of the common research topics in the field of power electronics engineering.

實務上操作在極大導通比的傳統升壓型轉換器其電壓增益是有所限制，而且轉換效率不佳。另一方面，操作在極大導通比的升壓型轉換器衍生了以下問題：容易產生很大的輸入電流漣波，使得太陽能電池模組輸出端的電解電容數量必須增加，減少燃料電池的使用壽命；另一方面，輸出二極體的反向恢復問題造成嚴重的反向恢復損失及EMI雜訊問題。In practice, the voltage gain of a conventional boost converter operating at a very large turn-on ratio is limited, and the conversion efficiency is poor. On the other hand, a boost converter operating at a very high on-ratio results in the following problems: It is easy to generate large input current ripples, so that the number of electrolytic capacitors at the output of the solar cell module must be increased, reducing the life of the fuel cell; On the other hand, the reverse recovery problem of output diodes causes serious reverse recovery loss and EMI noise problems.

另，在轉換效率考量方面，由於環保意識高漲，節能減碳是各國的重要政策，轉換器的效率要求日益嚴苛，功率電子開關造成的功率損失必須善加考量。典型交錯式升壓型轉換器之功率開關與輸出二極體之電壓應力均為高壓的輸出電壓，由於高耐壓的MOSFET，一般都具有高導通電阻RDS(ON)的特性，導致較高的導通損失。In addition, in terms of conversion efficiency, due to the rising awareness of environmental protection, energy saving and carbon reduction are important policies of various countries. The efficiency requirements of converters are becoming more and more stringent. The power loss caused by power electronic switches must be carefully considered. The voltage stress of the power switch and output diode of a typical interleaved boost converter are high-voltage output voltages. Due to the high withstand voltage of MOSFETs, they generally have the characteristics of high on-resistance RDS(ON), resulting in higher Continuity loss.

緣是，發明人有鑑於此，秉持多年該相關行業之豐富設計開發及實際製作經驗，針對現有之結構及缺失再予以研究改良，提供一種超高電壓增益交錯式直流轉換器，以期達到更佳實用價值性之目的者。The reason is that in view of this, the inventors have upheld many years of rich design development and practical production experience in the related industry, and then studied and improved the existing structure and deficiencies, providing an ultra-high voltage gain interleaved DC converter, with a view to achieving better The purpose of practical value.

本發明之主要目的在於提供一種超高電壓增益交錯式直流轉換器，主要係可得到極高的升壓增益，且開關

Figure 02_image001
、開關
Figure 02_image003
以180°的相位差交錯工作，可使輸入電流漣波降低，能使用電感值較小之輸入濾波電感，降低電感的體積，及可不必操作在極大的導通比，功率開關具有低於輸出電壓的低電壓應力，可使用導通電阻較小的低額定耐壓MOSFET，降低成本與導通損失，提升整體效率，並具有並聯連接特性，可分擔輸入電流，能有效降低電路中儲能元件及開關元件之電流應力，適合應用於高功率的場合，同時能使電路導通損失有效降低，提升轉換器之整體效率，而在其整體施行使用上更增實用功效特性者。 The main purpose of the present invention is to provide an ultra-high voltage gain interleaved DC converter, which can mainly obtain extremely high boost gain and switch
Figure 02_image001
,switch
Figure 02_image003
Interleaved operation with a 180° phase difference can reduce the input current ripple, can use an input filter inductor with a smaller inductance value, reduce the size of the inductor, and can not operate at a very large conduction ratio, the power switch has a lower output voltage The low voltage stress of the low-voltage MOSFET with low on-resistance can reduce the cost and conduction loss, improve the overall efficiency, and has a parallel connection feature, which can share the input current and can effectively reduce the energy storage elements and switching elements in the circuit. The current stress is suitable for high power applications, and can effectively reduce the circuit conduction loss, improve the overall efficiency of the converter, and increase the practical efficiency of its overall implementation.

為令本發明所運用之技術內容、發明目的及其達成之功效有更完整且清楚的揭露，茲於下詳細說明之，並請一併參閱所揭之圖式及圖號：In order to make the technical content, the purpose of the invention and the effect achieved by the invention more complete and clear disclosure, it is described in detail below, and please refer to the drawings and figures disclosed:

首先，請參閱第一圖本發明之電路圖所示，本發明之轉換器（１）主要係於輸入電壓

Figure 02_image023
之正極分別連接電感
Figure 02_image025
之第一端、電容
Figure 02_image027
之負極及電感
Figure 02_image029
之第一端，而該輸入電壓
Figure 02_image023
之負極則分別連接有開關
Figure 02_image001
之第二端、開關
Figure 02_image031
之第二端及二極體
Figure 02_image033
之負極，該電感
Figure 02_image025
之第二端分別連接有二極體
Figure 02_image035
之正極及二極體
Figure 02_image037
之正極，該電容
Figure 02_image027
之正極分別連接有該二極體
Figure 02_image037
之負極、電感
Figure 02_image039
之第一端、二極體
Figure 02_image041
之負極及電感
Figure 02_image043
之第一端，該電感
Figure 02_image029
之第二端分別連接有該二極體
Figure 02_image041
之正極及二極體
Figure 02_image045
之正極，該二極體
Figure 02_image035
之負極分別連接有該電感
Figure 02_image039
之第二端、該開關
Figure 02_image001
之第一端、二極體
Figure 02_image047
之正極、電容
Figure 02_image049
之負極及電容
Figure 02_image051
之正極，該二極體
Figure 02_image045
之負極分別連接有該電感
Figure 02_image043
之第二端、該開關
Figure 02_image031
之第一端、電容
Figure 02_image053
之負極及電容
Figure 02_image055
之正極，該二極體
Figure 02_image047
之負極分別連接有該電容
Figure 02_image053
之正極及二極體
Figure 02_image057
之正極，該二極體
Figure 02_image033
之正極分別連接有該電容
Figure 02_image055
之負極及二極體
Figure 02_image059
之負極，該二極體
Figure 02_image057
之負極分別連接有該電容
Figure 02_image049
之正極及輸出阻抗
Figure 02_image061
之正極，該二極體
Figure 02_image059
之正極分別連接有該電容
Figure 02_image051
之負極及輸出阻抗
Figure 02_image063
之負極。 First, please refer to the first diagram of the circuit diagram of the present invention. The converter (1) of the present invention is mainly based on the input voltage
Figure 02_image023
The positive pole is connected to the inductor
Figure 02_image025
The first end, the capacitor
Figure 02_image027
Negative pole and inductance
Figure 02_image029
The first end, and the input voltage
Figure 02_image023
The negative pole is connected to the switch
Figure 02_image001
The second end, switch
Figure 02_image031
Second end and diode
Figure 02_image033
The negative pole of the inductor
Figure 02_image025
Diodes are connected to the second end
Figure 02_image035
Anode and diode
Figure 02_image037
The positive electrode, the capacitor
Figure 02_image027
The anode is connected to the diode
Figure 02_image037
The negative electrode, inductance
Figure 02_image039
First end, diode
Figure 02_image041
Negative pole and inductance
Figure 02_image043
The first end, the inductor
Figure 02_image029
The second end is connected to the diode
Figure 02_image041
Anode and diode
Figure 02_image045
The anode of the diode
Figure 02_image035
The negative pole is connected to the inductor
Figure 02_image039
The second end, the switch
Figure 02_image001
First end, diode
Figure 02_image047
Positive electrode, capacitor
Figure 02_image049
Negative electrode and capacitor
Figure 02_image051
The anode of the diode
Figure 02_image045
The negative pole is connected to the inductor
Figure 02_image043
The second end, the switch
Figure 02_image031
The first end, the capacitor
Figure 02_image053
Negative electrode and capacitor
Figure 02_image055
The anode of the diode
Figure 02_image047
The negative electrode is connected to the capacitor
Figure 02_image053
Anode and diode
Figure 02_image057
The anode of the diode
Figure 02_image033
The positive electrode is connected to the capacitor
Figure 02_image055
Anode and diode
Figure 02_image059
The negative electrode of the diode
Figure 02_image057
The negative electrode is connected to the capacitor
Figure 02_image049
Anode and output impedance
Figure 02_image061
The anode of the diode
Figure 02_image059
The positive electrode is connected to the capacitor
Figure 02_image051
Negative electrode and output impedance
Figure 02_image063
The negative.

而根據各開關切換與各二極體導通與否，可以將該轉換器（１）在一個切換週期

Figure 02_image064
的動作，分成四個線性階段，其各線性階段等效線性電路以及主要元件波形如下，請再一併參閱第二圖本發明之主要元件時序及波形圖所示： According to the switching of each switch and the conduction of each diode, the converter (1) can be switched in a switching cycle
Figure 02_image064
The operation is divided into four linear stages. The equivalent linear circuit and the waveforms of the main components of each linear stage are as follows. Please refer to the second figure for the timing and waveform diagram of the main components of the present invention:

預備階段［

Figure 02_image066
］：［開關
Figure 02_image001
：ON、開關
Figure 02_image003
：ON、二極體
Figure 02_image068
：ON、二極體
Figure 02_image069
：ON、二極體
Figure 02_image070
：OFF、二極體
Figure 02_image071
：OFF、二極體
Figure 02_image072
：OFF、二極體
Figure 02_image073
：OFF、二極體
Figure 02_image075
：OFF、二極體
Figure 02_image076
：OFF］：請再一併參閱第三圖本發明之預備階段等效線性電路圖所示，在預備階段時，該開關
Figure 02_image001
與該開關
Figure 02_image003
導通［ON］持續一段時間，該二極體
Figure 02_image070
、該二極體
Figure 02_image071
、該二極體
Figure 02_image072
、該二極體
Figure 02_image073
、該二極體
Figure 02_image075
、該二極體
Figure 02_image076
皆因逆向偏壓而OFF，此時該電感
Figure 02_image025
、該電感
Figure 02_image029
因跨輸入電壓
Figure 02_image023
，電流以斜率
Figure 02_image077
、
Figure 02_image079
線性上升，加上該電容
Figure 02_image027
之電壓
Figure 02_image081
使得電流以斜率
Figure 02_image083
、
Figure 02_image085
線性上升。當該開關
Figure 02_image001
由ON切換至OFF時，該二極體
Figure 02_image068
由ON切換至OFF，該二極體
Figure 02_image070
、該二極體
Figure 02_image072
、該二極體
Figure 02_image076
由OFF切換至ON，則該轉換器（１）進入在一個切換週期
Figure 02_image064
下之第一階段電路動作。 Preliminary stage
Figure 02_image066
]:[switch
Figure 02_image001
: ON, switch
Figure 02_image003
: ON, diode
Figure 02_image068
: ON, diode
Figure 02_image069
: ON, diode
Figure 02_image070
: OFF, diode
Figure 02_image071
: OFF, diode
Figure 02_image072
: OFF, diode
Figure 02_image073
: OFF, diode
Figure 02_image075
: OFF, diode
Figure 02_image076
: OFF]: Please also refer to the third figure to show the equivalent linear circuit diagram of the preparatory stage of the present invention. During the preparatory stage, the switch
Figure 02_image001
With the switch
Figure 02_image003
Turn on [ON] for a period of time, the diode
Figure 02_image070
, The diode
Figure 02_image071
, The diode
Figure 02_image072
, The diode
Figure 02_image073
, The diode
Figure 02_image075
, The diode
Figure 02_image076
Both are turned off due to reverse bias, at this time the inductance
Figure 02_image025
、The inductance
Figure 02_image029
Input voltage
Figure 02_image023
, The slope of the current
Figure 02_image077
,
Figure 02_image079
Linear rise, plus this capacitance
Figure 02_image027
Voltage
Figure 02_image081
Makes the current slope
Figure 02_image083
,
Figure 02_image085
Linear rise. When the switch
Figure 02_image001
When switching from ON to OFF, the diode
Figure 02_image068
Switch from ON to OFF, the diode
Figure 02_image070
, The diode
Figure 02_image072
, The diode
Figure 02_image076
Switch from OFF to ON, the converter (1) enters a switching cycle
Figure 02_image064
The next stage of the circuit action.

第一階段［

Figure 02_image087
］：［開關
Figure 02_image001
：OFF、開關
Figure 02_image003
：ON、二極體
Figure 02_image068
：OFF、二極體
Figure 02_image069
：ON、二極體
Figure 02_image070
：ON、二極體
Figure 02_image071
：OFF、二極體
Figure 02_image072
：ON、二極體
Figure 02_image073
：OFF、二極體
Figure 02_image075
：OFF、二極體
Figure 02_image076
：ON］：請再一併參閱第四圖本發明之第一階段等效線性電路圖所示，該開關
Figure 02_image001
已由ON切換至OFF，該二極體
Figure 02_image068
由ON切換至OFF，該二極體
Figure 02_image070
、該二極體
Figure 02_image072
、該二極體
Figure 02_image076
由OFF切換至ON，該開關
Figure 02_image089
保持為ON，此時該二極體
Figure 02_image070
因電流
Figure 02_image091
保持連續而導通，該二極體
Figure 02_image072
與做為輸出二極體之該二極體
Figure 02_image076
因電流
Figure 02_image092
保持連續而導通，且該開關
Figure 02_image001
跨壓
Figure 02_image094
被該二極體
Figure 02_image072
箝位在升壓電容電壓
Figure 02_image096
。開始對該電容
Figure 02_image053
、該電容
Figure 02_image049
作充電，此時電流
Figure 02_image092
流經該二極體
Figure 02_image072
與做為輸出二極體之該二極體
Figure 02_image076
，降低輸入端電流的提供，電感電流
Figure 02_image092
以斜率
Figure 02_image098
線性下降，電流
Figure 02_image091
則流經該二極體
Figure 02_image070
，電感電流
Figure 02_image091
以斜率
Figure 02_image100
線性下降，當該開關
Figure 02_image001
由OFF切換至ON時，則該轉換器（１）進入在一個切換週期
Figure 02_image064
下之第二階段電路動作。 The first stage[
Figure 02_image087
]:[switch
Figure 02_image001
: OFF, switch
Figure 02_image003
: ON, diode
Figure 02_image068
: OFF, diode
Figure 02_image069
: ON, diode
Figure 02_image070
: ON, diode
Figure 02_image071
: OFF, diode
Figure 02_image072
: ON, diode
Figure 02_image073
: OFF, diode
Figure 02_image075
: OFF, diode
Figure 02_image076
: ON]: Please also refer to the fourth figure, the equivalent linear circuit diagram of the first stage of the present invention, the switch
Figure 02_image001
Has been switched from ON to OFF, the diode
Figure 02_image068
Switch from ON to OFF, the diode
Figure 02_image070
, The diode
Figure 02_image072
, The diode
Figure 02_image076
Switch from OFF to ON, the switch
Figure 02_image089
Remains ON, this diode
Figure 02_image070
Due to current
Figure 02_image091
Keep continuity and conduction, the diode
Figure 02_image072
And the diode as the output diode
Figure 02_image076
Due to current
Figure 02_image092
Keep on and on, and the switch
Figure 02_image001
Cross pressure
Figure 02_image094
Diode
Figure 02_image072
Clamp on boost capacitor voltage
Figure 02_image096
. Start to the capacitor
Figure 02_image053
, The capacitor
Figure 02_image049
For charging, the current
Figure 02_image092
Flowing through the diode
Figure 02_image072
And the diode as the output diode
Figure 02_image076
, Reduce the input current supply, inductor current
Figure 02_image092
Slope
Figure 02_image098
Linear decline, current
Figure 02_image091
Then flow through the diode
Figure 02_image070
, Inductor current
Figure 02_image091
Slope
Figure 02_image100
Linear decline when the switch
Figure 02_image001
When switching from OFF to ON, the converter (1) enters a switching cycle
Figure 02_image064
The next stage of the circuit action.

第二階段［

Figure 02_image102
］：［開關
Figure 02_image001
：ON、開關
Figure 02_image003
：ON、二極體
Figure 02_image068
：ON、二極體
Figure 02_image069
：ON、二極體
Figure 02_image070
：OFF、二極體
Figure 02_image071
：OFF、二極體
Figure 02_image072
：OFF、二極體
Figure 02_image073
：OFF、二極體
Figure 02_image075
：OFF、二極體
Figure 02_image076
：OFF］：請再一併參閱第五圖本發明之第二階段等效線性電路圖所示，本階段該開關
Figure 02_image001
由OFF轉變為ON，該開關
Figure 02_image003
保持為ON，此時電路動作與預備階段相同。當該開關
Figure 02_image003
由ON切換至OFF時，則該轉換器（１）進入在一個切換週期
Figure 02_image064
下之第三階段電路動作。 second stage[
Figure 02_image102
]:[switch
Figure 02_image001
: ON, switch
Figure 02_image003
: ON, diode
Figure 02_image068
: ON, diode
Figure 02_image069
: ON, diode
Figure 02_image070
: OFF, diode
Figure 02_image071
: OFF, diode
Figure 02_image072
: OFF, diode
Figure 02_image073
: OFF, diode
Figure 02_image075
: OFF, diode
Figure 02_image076
: OFF]: Please also refer to the fifth diagram of the equivalent linear circuit diagram of the second stage of the present invention, the switch at this stage
Figure 02_image001
From OFF to ON, the switch
Figure 02_image003
Keep it ON, and the circuit operation at this time is the same as the preliminary stage. When the switch
Figure 02_image003
When switching from ON to OFF, the converter (1) enters a switching cycle
Figure 02_image064
The next stage of the circuit operation.

第三階段［

Figure 02_image104
］：［開關
Figure 02_image001
：ON、開關
Figure 02_image003
：OFF、二極體
Figure 02_image068
：ON、二極體
Figure 02_image069
：OFF、二極體
Figure 02_image070
：OFF、二極體
Figure 02_image071
：ON、二極體
Figure 02_image072
：OFF、二極體
Figure 02_image073
：ON、二極體
Figure 02_image075
：ON、二極體
Figure 02_image076
：OFF］：請再一併參閱第六圖本發明之第三階段等效線性電路圖所示，該開關
Figure 02_image003
已由ON轉變為OFF，則該二極體
Figure 02_image069
由ON切換至OFF，此時該二極體
Figure 02_image071
、該二極體
Figure 02_image073
、該二極體
Figure 02_image075
由OFF切換至ON，該開關
Figure 02_image001
保持為ON，此階段該二極體
Figure 02_image071
因電流
Figure 02_image106
保持連續而導通，該二極體
Figure 02_image073
與做為輸出二極體之該二極體
Figure 02_image075
因電流
Figure 02_image107
保持連續而導通，且該開關
Figure 02_image003
跨壓
Figure 02_image109
被該二極體
Figure 02_image073
箝位在升壓電容電壓
Figure 02_image111
。開始對該電容
Figure 02_image055
、該電容
Figure 02_image051
作充電，此時電流
Figure 02_image107
流經該二極體
Figure 02_image073
與做為輸出二極體之該二極體
Figure 02_image075
，降低輸入端電流的提供，電感電流
Figure 02_image107
以斜率
Figure 02_image113
線性下降，電流
Figure 02_image106
則流經該二極體
Figure 02_image071
，電感電流
Figure 02_image106
以斜率
Figure 02_image115
線性下降，當該開關
Figure 02_image003
由OFF切換至ON時，則該轉換器（１）進入在一個切換週期
Figure 02_image064
下之第四階段電路動作。 The third stage[
Figure 02_image104
]:[switch
Figure 02_image001
: ON, switch
Figure 02_image003
: OFF, diode
Figure 02_image068
: ON, diode
Figure 02_image069
: OFF, diode
Figure 02_image070
: OFF, diode
Figure 02_image071
: ON, diode
Figure 02_image072
: OFF, diode
Figure 02_image073
: ON, diode
Figure 02_image075
: ON, diode
Figure 02_image076
: OFF]: Please also refer to the sixth figure for the equivalent linear circuit diagram of the third stage of the present invention.
Figure 02_image003
Has changed from ON to OFF, the diode
Figure 02_image069
Switch from ON to OFF, this diode
Figure 02_image071
, The diode
Figure 02_image073
, The diode
Figure 02_image075
Switch from OFF to ON, the switch
Figure 02_image001
Keep on, this diode at this stage
Figure 02_image071
Due to current
Figure 02_image106
Keep continuity and conduction, the diode
Figure 02_image073
And the diode as the output diode
Figure 02_image075
Due to current
Figure 02_image107
Keep on and on, and the switch
Figure 02_image003
Cross pressure
Figure 02_image109
Diode
Figure 02_image073
Clamp on boost capacitor voltage
Figure 02_image111
. Start to the capacitor
Figure 02_image055
, The capacitor
Figure 02_image051
For charging, the current
Figure 02_image107
Flowing through the diode
Figure 02_image073
And the diode as the output diode
Figure 02_image075
, Reduce the input current supply, inductor current
Figure 02_image107
Slope
Figure 02_image113
Linear decline, current
Figure 02_image106
Then flow through the diode
Figure 02_image071
, Inductor current
Figure 02_image106
Slope
Figure 02_image115
Linear decline when the switch
Figure 02_image003
When switching from OFF to ON, the converter (1) enters a switching cycle
Figure 02_image064
The next stage of the circuit operation.

第四階段［

Figure 02_image117
］：［開關
Figure 02_image001
：ON、開關
Figure 02_image003
：ON、二極體
Figure 02_image068
：ON、二極體
Figure 02_image069
：ON、二極體
Figure 02_image070
：OFF、二極體
Figure 02_image071
：OFF、二極體
Figure 02_image072
：OFF、二極體
Figure 02_image073
：OFF、二極體
Figure 02_image075
：OFF、二極體
Figure 02_image076
：OFF］：請再一併參閱第七圖本發明之第四階段等效線性電路圖所示，本階段該開關
Figure 02_image003
由OFF轉變為ON，該開關
Figure 02_image001
保持為ON，此時電路動作與預備階段相同。當該開關
Figure 02_image001
由ON切換至OFF時，則該轉換器（１）進入下一階段，完成一週期
Figure 02_image064
下之電路動作。 The fourth stage [
Figure 02_image117
]:[switch
Figure 02_image001
: ON, switch
Figure 02_image003
: ON, diode
Figure 02_image068
: ON, diode
Figure 02_image069
: ON, diode
Figure 02_image070
: OFF, diode
Figure 02_image071
: OFF, diode
Figure 02_image072
: OFF, diode
Figure 02_image073
: OFF, diode
Figure 02_image075
: OFF, diode
Figure 02_image076
: OFF]: Please also refer to the seventh figure to show the equivalent linear circuit diagram of the fourth stage of the present invention.
Figure 02_image003
From OFF to ON, the switch
Figure 02_image001
Keep it ON, and the circuit operation at this time is the same as the preliminary stage. When the switch
Figure 02_image001
When switching from ON to OFF, the converter (1) enters the next stage and completes a cycle
Figure 02_image064
The next circuit operates.

據上述電路動作分析，使用IsSpice模擬軟體驗證其電路理論分析、電氣規格以及上述所及之優點，而該轉換器（１）之模擬電氣規格與元件參數設定如下表1所示： 表1電氣規格與元件參數

Figure 108132625-A0305-0001
According to the above circuit operation analysis, IsSpice simulation software is used to verify the circuit theoretical analysis, electrical specifications and advantages mentioned above, and the analog electrical specifications and component parameter settings of the converter (1) are shown in Table 1 below: Table 1 Electrical Specifications And component parameters
Figure 108132625-A0305-0001

以下將介紹輸出功率

Figure 02_image152
之下相關模擬結果。請再一併參閱第八圖本發明之模擬電路示意圖所示，模擬波形將驗正項目如下： The following will introduce the output power
Figure 02_image152
Related simulation results below. Please refer to the eighth figure again for the schematic diagram of the analog circuit of the present invention. The analog waveform verification items are as follows:

A.電氣規格驗證：輸入電壓

Figure 02_image009
、輸出電壓
Figure 02_image011
、導通比
Figure 02_image154
A. Verification of electrical specifications: input voltage
Figure 02_image009
,The output voltage
Figure 02_image011
, Turn-on ratio
Figure 02_image154

請再一併參閱第九圖本發明之開關驅動信號

Figure 02_image005
、
Figure 02_image007
與輸入電壓
Figure 02_image009
及輸出電壓
Figure 02_image011
的模擬波形圖所示，由該第九圖可知，輸入電壓
Figure 02_image156
、輸出電壓
Figure 02_image158
，滿足電氣之需求規格。 Please also refer to the ninth picture of the switch driving signal of the present invention
Figure 02_image005
,
Figure 02_image007
With input voltage
Figure 02_image009
And output voltage
Figure 02_image011
Is shown in the analog waveform diagram, from the ninth figure, the input voltage
Figure 02_image156
,The output voltage
Figure 02_image158
, To meet the electrical specifications.

B.輸入電流漣波相消：

Figure 02_image013
、
Figure 02_image160
、
Figure 02_image161
B. Input current ripple cancellation:
Figure 02_image013
,
Figure 02_image160
,
Figure 02_image161

因為該轉換器（１）以交錯180度依序導通的驅動方式操作，因此電感電流

Figure 02_image013
和
Figure 02_image160
漣波相差180度，又
Figure 02_image162
，因此
Figure 02_image013
和
Figure 02_image160
之漣波可以相消以降低輸入電流
Figure 02_image161
之漣波。請再一併參閱第十圖本發明之輸入端電流
Figure 02_image013
、
Figure 02_image015
、
Figure 02_image017
的模擬波形圖所示，可以觀察出，當電感電流漣波
Figure 02_image164
和
Figure 02_image166
約為0.8A，輸入電流漣波
Figure 02_image168
約為0.2A，輸入電流
Figure 02_image161
確實因交錯式操作，有漣波相消的性能［輸入電流
Figure 02_image161
須減去
Figure 02_image170
後再作計算］。 Because the converter (1) operates in a driving mode that is sequentially turned on by interleaving 180 degrees, the inductor current
Figure 02_image013
with
Figure 02_image160
The ripples differ by 180 degrees, and
Figure 02_image162
,therefore
Figure 02_image013
with
Figure 02_image160
The ripple can be cancelled to reduce the input current
Figure 02_image161
Ripples. Please also refer to the tenth picture of the input terminal current of the present invention
Figure 02_image013
,
Figure 02_image015
,
Figure 02_image017
The simulated waveform diagram shows that when the inductor current ripples
Figure 02_image164
with
Figure 02_image166
About 0.8A, input current ripple
Figure 02_image168
About 0.2A, input current
Figure 02_image161
Indeed due to the interleaved operation, there is a ripple cancellation performance [input current
Figure 02_image161
Minus
Figure 02_image170
After the calculation].

C.開關

Figure 02_image001
、開關
Figure 02_image003
的低電壓應力：
Figure 02_image172
及
Figure 02_image174
C. Switch
Figure 02_image001
,switch
Figure 02_image003
Low voltage stress:
Figure 02_image172
and
Figure 02_image174

因為該轉換器（１）加入升壓電容，因此開關跨壓將會被升壓電容給限制住：

Figure 02_image176
、
Figure 02_image178
，請再一併參閱第十一圖本發明之開關
Figure 02_image001
的相關模擬波形圖及第十二圖本發明之開關
Figure 02_image003
的相關模擬波形圖所示，開關的跨壓也約為100V，可知開關確實擁有遠低於輸出電壓的低電壓應力。 Because the converter (1) incorporates a boost capacitor, the switching voltage will be limited by the boost capacitor:
Figure 02_image176
,
Figure 02_image178
, Please also refer to the eleventh picture of the switch of the present invention
Figure 02_image001
The related analog waveform diagram and the twelfth figure of the switch of the present invention
Figure 02_image003
The related analog waveform diagram shows that the voltage across the switch is also about 100V, which shows that the switch does have a low voltage stress far below the output voltage.

而本發明之轉換器（１）與文獻中之高升壓比轉換器，在電壓轉換比進行比較，請參閱下表2所示，本發明之轉換器（１）具有極高的電壓轉換比： 表2參考文獻與本發明之比較表

Figure 108132625-A0305-0002
The converter (1) of the present invention is compared with the high step-up ratio converter in the literature in terms of voltage conversion ratio. Please refer to Table 2 below. The converter (1) of the invention has an extremely high voltage conversion ratio : Table 2 Comparison Table of References and the Invention
Figure 108132625-A0305-0002

請再一併參閱第十三圖本發明於匝數比

Figure 02_image019
時與文獻［1］之電壓轉換比比較曲線圖及第十四圖本發明於匝數比
Figure 02_image021
時與文獻［1］之電壓轉換比比較曲線圖所示，由於文獻［1］、文獻［2］、文獻［3］之電壓增益皆相同，取文獻［1］為代表與本發明之轉換器（１）進行比較可知，本發明之轉換器（１）具有最高之電壓增益，且當導通比
Figure 02_image185
越大時，則差距會更加明顯。 Please refer to the thirteenth figure again
Figure 02_image019
Comparison chart of the voltage conversion ratio between the time and the literature [1] and the fourteenth figure.
Figure 02_image021
The graph of the voltage conversion ratio comparison between the time and the literature [1] is shown. Since the voltage gains of the literature [1], the literature [2], and the literature [3] are all the same, the literature [1] is taken to represent the converter of the present invention. (1) By comparison, it can be seen that the converter (1) of the present invention has the highest voltage gain, and when the conduction ratio
Figure 02_image185
The larger the gap, the more obvious the gap.

參考文獻：references:

［1］W. Li, Y. Zhao, J. Wu, and X. He, ” Interleaved High Step-Up Converter with Winding-Cross-Coupled Inductors and Voltage Multiplier Cells” IEEE Transactions on Power Electronics, Vol.27, No.1, January 2012 [1] W. Li, Y. Zhao, J. Wu, and X. He, "Interleaved High Step-Up Converter with Winding-Cross-Coupled Inductors and Voltage Multiplier Cells" IEEE Transactions on Power Electronics , Vol.27, No .1, January 2012

［2］L. He, and J. Lei, ”High Step-Up Converter with Passive Lossless Clamp Circuit and Switched-Capacitor: Analysis, Design, and Experimentation” IEEE Applied Power Electronics Conference and Exposition (APEC), March 2013[2] L. He, and J. Lei, ”High Step-Up Converter with Passive Lossless Clamp Circuit and Switched-Capacitor: Analysis, Design, and Experimentation” IEEE Applied Power Electronics Conference and Exposition (APEC), March 2013

［3］K. C. Tseng, and C. C. Huang, ”High Step-Up High-Efficiency Interleaved Converter with Voltage Multiplier Module for Renewable Energy System” IEEE Transactions on Power Electronics, Vol. 61, No. 3, March 2014 [3] KC Tseng, and CC Huang, “High Step-Up High-Efficiency Interleaved Converter with Voltage Multiplier Module for Renewable Energy System” IEEE Transactions on Power Electronics , Vol. 61, No. 3, March 2014

藉由以上所述，本發明電路之組成與使用實施說明可知，本發明主要係具有下列特點：Based on the above, the composition and use of the circuit of the present invention can be seen, the present invention mainly has the following characteristics:

1.高升壓增益：本發明之轉換器可得到極高的升壓增益。1. High boost gain: The converter of the present invention can obtain extremely high boost gain.

2.高電力密度：本發明之開關

Figure 02_image001
、開關
Figure 02_image003
係以180°的相位差交錯工作，可使輸入電流漣波降低，因此可以使用電感值較小之輸入濾波電感，降低電感的體積。 2. High power density: the switch of the present invention
Figure 02_image001
,switch
Figure 02_image003
The interleaved operation with a phase difference of 180° can reduce the ripple of the input current. Therefore, an input filter inductor with a small inductance value can be used to reduce the size of the inductor.

3.低電壓應力：本發明之轉換器具高電壓增益的達成，不必操作在極大的導通比，且功率開關具有低於輸出電壓的低電壓應力，故可使用導通電阻較小的低額定耐壓MOSFET，降低成本與導通損失，提升整體效率。3. Low voltage stress: The converter of the present invention achieves high voltage gain, does not need to operate at a very large on-ratio, and the power switch has a low voltage stress lower than the output voltage, so a low rated withstand voltage with a small on-resistance can be used MOSFETs reduce costs and conduction losses, and improve overall efficiency.

4.高功率應用：本發明之轉換器由於電路架構具有並聯連接特性，故可分擔輸入電流，能有效降低電路中儲能元件及開關元件之電流應力，適合應用於高功率的場合。4. High power application: the converter of the present invention has a parallel connection characteristic, so it can share the input current, which can effectively reduce the current stress of the energy storage element and the switching element in the circuit, and is suitable for high power applications.

5.高轉換效率：本發明之轉換器具有電流分流且可選用低導通電阻MOSFET，使電路導通損失有效降低，提升轉換器之整體效率。5. High conversion efficiency: The converter of the present invention has a current shunt and a low on-resistance MOSFET can be selected to effectively reduce the conduction loss of the circuit and improve the overall efficiency of the converter.

然而前述之實施例或圖式並非限定本發明之產品結構或使用方式，任何所屬技術領域中具有通常知識者之適當變化或修飾，皆應視為不脫離本發明之專利範疇。However, the foregoing embodiments or drawings do not limit the product structure or usage of the present invention. Any appropriate changes or modifications by those with ordinary knowledge in the technical field should be regarded as not departing from the patent scope of the present invention.

綜上所述，本發明實施例確能達到所預期之使用功效，又其所揭露之具體構造，不僅未曾見諸於同類產品中，亦未曾公開於申請前，誠已完全符合專利法之規定與要求，爰依法提出發明專利之申請，懇請惠予審查，並賜准專利，則實感德便。In summary, the embodiments of the present invention can indeed achieve the expected use effect, and the specific structure disclosed by it has not only not been seen in similar products, nor has it been disclosed before application, and has fully complied with the provisions of the Patent Law To meet the requirements, I filed an application for a patent for invention according to law, and pleaded for the review, and granted the patent.

（１）:轉換器(1): Converter

第一圖：本發明之電路圖Figure 1: The circuit diagram of the present invention

第二圖：本發明之主要元件時序及波形圖Figure 2: Timing and waveform diagram of the main components of the present invention

第三圖：本發明之預備階段等效線性電路圖Figure 3: The equivalent linear circuit diagram of the preliminary stage of the present invention

第四圖：本發明之第一階段等效線性電路圖Figure 4: The equivalent linear circuit diagram of the first stage of the present invention

第五圖：本發明之第二階段等效線性電路圖Figure 5: The equivalent linear circuit diagram of the second stage of the present invention

第六圖：本發明之第三階段等效線性電路圖Figure 6: The equivalent linear circuit diagram of the third stage of the present invention

第七圖：本發明之第四階段等效線性電路圖Figure 7: The equivalent linear circuit diagram of the fourth stage of the present invention

第八圖：本發明之模擬電路示意圖Figure 8: Schematic diagram of the analog circuit of the present invention

第九圖：本發明之開關驅動信號

Figure 02_image005
、
Figure 02_image007
與輸入電壓
Figure 02_image009
及輸出電壓
Figure 02_image011
的模擬波形圖 The ninth figure: the switch driving signal of the present invention
Figure 02_image005
,
Figure 02_image007
With input voltage
Figure 02_image009
And output voltage
Figure 02_image011
Analog waveform

第十圖：本發明之輸入端電流

Figure 02_image013
、
Figure 02_image015
、
Figure 02_image017
的模擬波形圖 Figure 10: Input current of the present invention
Figure 02_image013
,
Figure 02_image015
,
Figure 02_image017
Analog waveform

第十一圖：本發明之開關

Figure 02_image001
的相關模擬波形圖 Figure 11: The switch of the present invention
Figure 02_image001
Related analog waveforms

第十二圖：本發明之開關

Figure 02_image003
的相關模擬波形圖 Figure 12: The switch of the present invention
Figure 02_image003
Related analog waveforms

第十三圖：本發明於匝數比

Figure 02_image019
時與文獻［1］之電壓轉換比比較曲線圖 Figure 13: The present invention is in turns ratio
Figure 02_image019
Comparison graph of voltage conversion ratio between time and literature [1]

第十四圖：本發明於匝數比

Figure 02_image021
時與文獻［1］之電壓轉換比比較曲線圖 Figure 14: The present invention is in turns ratio
Figure 02_image021
Comparison graph of voltage conversion ratio between time and literature [1]

(1):轉換器 (1): converter

Claims (1)

一種超高電壓增益交錯式直流轉換器，其主要係令轉換器於輸入電壓
Figure 03_image023
之正極分別連接電感
Figure 03_image025
之第一端、電容
Figure 03_image027
之負極及電感
Figure 03_image029
之第一端，而該輸入電壓
Figure 03_image023
之負極則分別連接有開關
Figure 03_image001
之第二端、開關
Figure 03_image031
之第二端及二極體
Figure 03_image033
之負極，該電感
Figure 03_image025
之第二端分別連接有二極體
Figure 03_image035
之正極及二極體
Figure 03_image037
之正極，該電容
Figure 03_image027
之正極分別連接有該二極體
Figure 03_image037
之負極、電感
Figure 03_image039
之第一端、二極體
Figure 03_image041
之負極及電感
Figure 03_image043
之第一端，該電感
Figure 03_image029
之第二端分別連接有該二極體
Figure 03_image041
之正極及二極體
Figure 03_image045
之正極，該二極體
Figure 03_image035
之負極分別連接有該電感
Figure 03_image039
之第二端、該開關
Figure 03_image001
之第一端、二極體
Figure 03_image047
之正極、電容
Figure 03_image049
之負極及電容
Figure 03_image051
之正極，該二極體
Figure 03_image045
之負極分別連接有該電感
Figure 03_image043
之第二端、該開關
Figure 03_image031
之第一端、電容
Figure 03_image053
之負極及電容
Figure 03_image055
之正極，該二極體
Figure 03_image047
之負極分別連接有該電容
Figure 03_image053
之正極及二極體
Figure 03_image057
之正極，該二極體
Figure 03_image033
之正極分別連接有該電容
Figure 03_image055
之負極及二極體
Figure 03_image059
之負極，該二極體
Figure 03_image057
之負極分別連接有該電容
Figure 03_image049
之正極及輸出阻抗
Figure 03_image061
之正極，該二極體
Figure 03_image059
之正極分別連接有該電容
Figure 03_image051
之負極及輸出阻抗
Figure 03_image063
之負極。 An ultra-high voltage gain interleaved DC converter, which mainly makes the converter input voltage
Figure 03_image023
The positive pole is connected to the inductor
Figure 03_image025
The first end, the capacitor
Figure 03_image027
Negative pole and inductance
Figure 03_image029
The first end, and the input voltage
Figure 03_image023
The negative pole is connected to the switch
Figure 03_image001
The second end, switch
Figure 03_image031
Second end and diode
Figure 03_image033
The negative pole of the inductor
Figure 03_image025
Diodes are connected to the second end
Figure 03_image035
Anode and diode
Figure 03_image037
The positive electrode, the capacitor
Figure 03_image027
The anode is connected to the diode
Figure 03_image037
The negative electrode, inductance
Figure 03_image039
First end, diode
Figure 03_image041
Negative pole and inductance
Figure 03_image043
The first end, the inductor
Figure 03_image029
The second end is connected to the diode
Figure 03_image041
Anode and diode
Figure 03_image045
The anode of the diode
Figure 03_image035
The negative pole is connected to the inductor
Figure 03_image039
The second end, the switch
Figure 03_image001
First end, diode
Figure 03_image047
Positive electrode, capacitor
Figure 03_image049
Negative electrode and capacitor
Figure 03_image051
The anode of the diode
Figure 03_image045
The negative pole is connected to the inductor
Figure 03_image043
The second end, the switch
Figure 03_image031
The first end, the capacitor
Figure 03_image053
Negative electrode and capacitor
Figure 03_image055
The anode of the diode
Figure 03_image047
The negative electrode is connected to the capacitor
Figure 03_image053
Anode and diode
Figure 03_image057
The anode of the diode
Figure 03_image033
The positive electrode is connected to the capacitor
Figure 03_image055
Anode and diode
Figure 03_image059
The negative electrode of the diode
Figure 03_image057
The negative electrode is connected to the capacitor
Figure 03_image049
Anode and output impedance
Figure 03_image061
The anode of the diode
Figure 03_image059
The positive electrode is connected to the capacitor
Figure 03_image051
Negative electrode and output impedance
Figure 03_image063
The negative.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI723931B (en) * 2020-08-04 2021-04-01 崑山科技大學 Ultra high-step-up interleaved dc/dc converter

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070216390A1 (en) * 2006-03-17 2007-09-20 Yuan Ze University High-efficiency high-voltage difference ratio bi-directional converter
CN107528472A (en) * 2016-06-22 2017-12-29 代罗半导体有限公司 A multistage switch type power converter of regulation for medium voltage control
TWI664797B (en) * 2018-04-27 2019-07-01 崑山科技大學 Dc power converter with high voltage gain

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070216390A1 (en) * 2006-03-17 2007-09-20 Yuan Ze University High-efficiency high-voltage difference ratio bi-directional converter
CN107528472A (en) * 2016-06-22 2017-12-29 代罗半导体有限公司 A multistage switch type power converter of regulation for medium voltage control
TWI664797B (en) * 2018-04-27 2019-07-01 崑山科技大學 Dc power converter with high voltage gain

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI723931B (en) * 2020-08-04 2021-04-01 崑山科技大學 Ultra high-step-up interleaved dc/dc converter

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