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TWI671260B - Patterned photovoltaic substrate with improved luminous efficiency, light emitting diode and manufacturing method thereof - Google Patents

Patterned photovoltaic substrate with improved luminous efficiency, light emitting diode and manufacturing method thereof Download PDF

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TWI671260B
TWI671260B TW108100841A TW108100841A TWI671260B TW I671260 B TWI671260 B TW I671260B TW 108100841 A TW108100841 A TW 108100841A TW 108100841 A TW108100841 A TW 108100841A TW I671260 B TWI671260 B TW I671260B
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substrate
patterned
layer
luminous efficiency
patterned structure
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TW108100841A
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TW202026233A (en
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Wen-Cheng Ke
柯文政
Chih-Yung Chiang
江智詠
Chia-Che Ho
何嘉哲
Fwu-Yih Houng
洪福益
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Kinik Company Ltd.
中國砂輪企業股份有限公司
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Priority to CN201910883516.8A priority patent/CN111430510A/en
Publication of TW202026233A publication Critical patent/TW202026233A/en

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/81Bodies
    • H10H20/819Bodies characterised by their shape, e.g. curved or truncated substrates
    • H10H20/82Roughened surfaces, e.g. at the interface between epitaxial layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/01Manufacture or treatment

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Abstract

本發明揭露一種具有提升發光效率之圖案化光電基板、發光二極體及其製作方法,而製作方法包括提供一基板;於基板表面形成一第一圖案化結構及一間隔區域;形成一第一金屬層及一第二金屬層;於第二金屬層上形成一第二圖案化結構;使第二圖案化結構向下延伸至第一金屬層及基板之部分表面;自基板上移除第一金屬層及第二金屬層,以形成具有第一圖案化結構及第二圖案化結構之基板;以一預定成長速率形成一填充層填滿於第二圖案化結構內。The present invention discloses a patterned photovoltaic substrate, a light-emitting diode, and a manufacturing method thereof with enhanced luminous efficiency. The manufacturing method includes providing a substrate; forming a first patterned structure and a space region on the substrate surface; and forming a first A metal layer and a second metal layer; forming a second patterned structure on the second metal layer; extending the second patterned structure down to a portion of the surface of the first metal layer and the substrate; removing the first from the substrate The metal layer and the second metal layer form a substrate having a first patterned structure and a second patterned structure; a filling layer is formed at a predetermined growth rate to fill the second patterned structure.

Description

具有提升發光效率之圖案化光電基板、發光二極體及其製作方法Patterned photovoltaic substrate with improved luminous efficiency, light emitting diode and manufacturing method thereof

本發明係關於一種具有提升發光效率之圖案化光電基板、發光二極體及其製作方法,尤指一種兼具有微米級第一圖案結構及次微米級第二圖案化結構之基板,及具有該基板之發光二極體,並於第二圖案化結構內設置填充層,並填平第二圖案化結構,以提升發光二極體之發光效率。The present invention relates to a patterned photovoltaic substrate, a light-emitting diode and a manufacturing method thereof with improved luminous efficiency, and more particularly to a substrate having both a micron-level first pattern structure and a sub-micron-level second patterned structure, and A light emitting diode of the substrate is provided with a filling layer in the second patterned structure and the second patterned structure is filled in order to improve the light emitting efficiency of the light emitting diode.

人類照明歷史發展至今已進入固態照明時代,發光亮度更亮、售價更低廉、壽命更長、穩定性更高..等特性需求為固態照明產業共同追求的目標。而照明市場首重發光二極體之亮度需求,一般而言,發光二極體的最大光輸出(L max)主要由外部量子效率(η ext)及最大操作電流(I max)所決定,即L maxext×I max,其中,外部量子效率(η ext)又為內部量子效率(η int)及光萃取效率(η extr)所決定,即η extint×η extr。目前一般藍光發光二極體的內部量子效率已達70%以上,然而綠光發光二極體的內部量子效率卻驟降至40%以下,因此,藉由提升內部量子效率與光萃取效率以改善發光二極體的外部量子效率或增加發光二極體的發光亮度仍存在很大空間。 The historical development of human lighting has entered the era of solid-state lighting. Brighter brightness, lower prices, longer life, higher stability, etc. are the common goals pursued by the solid-state lighting industry. In the lighting market, the brightness requirements of light-emitting diodes are the first. In general, the maximum light output (L max ) of a light-emitting diode is mainly determined by the external quantum efficiency (η ext ) and the maximum operating current (I max ), that is, L max = η ext × I max , where the external quantum efficiency (η ext ) is again determined by the internal quantum efficiency (η int ) and the light extraction efficiency (η extr ), that is, η ext = η int × η extr . At present, the internal quantum efficiency of blue light-emitting diodes has generally reached more than 70%, but the internal quantum efficiency of green light-emitting diodes has suddenly dropped to less than 40%. Therefore, the internal quantum efficiency and light extraction efficiency have been improved to improve There is still much room for the external quantum efficiency of a light emitting diode or increasing the light emitting brightness of the light emitting diode.

由於氮化鎵與藍寶石基板間之晶格不匹配程度高達16%,當以藍寶石基板作為基材,進行氮化鎵薄膜磊晶時,氮化鎵薄膜內部會存在著應力,並出現許多不同種類差排缺陷,使氮化鎵薄膜差排密度達10 9至10 10cm -2,嚴重影響磊晶薄膜品質,且缺陷通常扮演非輻射的復合中心,造成發光效率降低。因此,圖案化藍寶石基板製作技術的開發,其關鍵在於缺陷密度的降低,以實質提升氮化鎵薄膜磊晶品質及增加發光亮度。藉由氮化鎵薄膜在圖案基板側壁上成長以改變氮化鎵薄膜差排缺陷成長方向,差排缺陷將彎曲90°,使互相交錯形成堆疊錯位等消除缺陷,並且在磊晶時透過三維應力釋放減少缺陷形成,降低薄膜內部差排密度以提升晶體品質。目前研究亦指出使用圖案藍寶石基板成長之氮化鎵薄膜發現可以降低差排缺陷密度到10 8至10 9cm -2,並進一步提升發光二極體的內部量子效率及發光亮度。 Because the degree of lattice mismatch between GaN and sapphire substrate is as high as 16%, when using sapphire substrate as the substrate to perform epitaxial GaN thin film, there will be stress in the GaN thin film, and many different types will appear. Differential defect, which makes the differential discharge density of GaN film reach 10 9 to 10 10 cm -2 , which seriously affects the quality of the epitaxial film, and the defect usually acts as a non-radiative recombination center, resulting in a decrease in luminous efficiency. Therefore, the key to the development of patterned sapphire substrate manufacturing technology is to reduce the defect density in order to substantially improve the epitaxial quality of GaN thin films and increase the luminous brightness. By growing the GaN thin film on the sidewall of the pattern substrate to change the growth direction of the GaN thin film differential defect, the differential defect will be bent by 90 °, which will eliminate the defect by interlacing each other to form a stacking misalignment, and transmit three-dimensional stress during epitaxy. Releasing reduces the formation of defects and reduces the differential density within the film to improve crystal quality. Current research has also pointed out that the use of patterned sapphire substrates for the growth of GaN films has been found to reduce the density of differential defects to 10 8 to 10 9 cm -2 and further increase the internal quantum efficiency and luminous brightness of light-emitting diodes.

在最新的研究中,亦有使用次微米尺度圖案基板來成長發光二極體結構,對於同一面積之圖案基板,縮小圖案尺寸增加圖案數量將提升側向成長的有效區域面積,側向成長機制增強,造成更容易改變成長方向並形成堆疊錯位以消除差排缺陷,及大幅減低薄膜內部差排密度,同時由於圖案間距較短,易在氮化鎵磊晶時形成空洞阻擋缺陷延伸,提升氮化鎵薄膜磊晶品質。研究結果顯示,使用微米尺度圖案藍寶石基板成長之氮化鎵薄膜可以降低差排密度到10 8cm -2,如將圖案基板改成次微米尺度時,由於單位體積應力釋放程度增加,則可將差排密度降低至10 7cm -2或更低。 In the latest research, sub-micron-scale pattern substrates are also used to grow light-emitting diode structures. For pattern substrates of the same area, reducing the pattern size and increasing the number of patterns will increase the area of the effective area for lateral growth and enhance the lateral growth mechanism. As a result, it is easier to change the growth direction and form stacking misalignment to eliminate differential defects, and greatly reduce the internal differential density of the film. At the same time, due to the short pattern spacing, it is easy to form voids during the epitaxial growth of gallium nitride to prevent the extension of defects and improve the nitride. Epitaxial quality of gallium thin film. The research results show that the growth of gallium nitride films using micron-scale patterned sapphire substrates can reduce the differential density to 10 8 cm -2 . If the pattern substrate is changed to sub-micron scale, the degree of stress release per unit volume can be increased. The differential row density is reduced to 10 7 cm -2 or lower.

已知技術中,如中華民國公告專利第I396297號,係揭示一種發光二極體,包括:基板,具有微米級孔洞於其中;作為緩衝層之奈米級多孔性光子晶體結構,形成於基板之上;第一型磊晶層,形成於上述緩衝層多孔性光子晶體結構之上;發光層,形成於上述第一型磊晶層之上;第二型磊晶層,形成於上述發光層之上;第一接觸電極,形成於上述該第一型磊晶層之上;以及,第二接觸電極,形成於上述第二型磊晶層之上。In the known technology, such as the Republic of China Publication Patent No. I396297, a light-emitting diode is disclosed, including: a substrate having micron-sized holes therein; and a nano-sized porous photonic crystal structure as a buffer layer formed on the substrate. The first type epitaxial layer is formed on the porous photonic crystal structure of the buffer layer; the light emitting layer is formed on the first type epitaxial layer; the second type epitaxial layer is formed on the light emitting layer; A first contact electrode is formed on the first type epitaxial layer; and a second contact electrode is formed on the second type epitaxial layer.

另一中華民國公開專利第201251113號,係揭示一種LED基板之製造方法、LED基板及白光LED構造,主要目的係為使LED發出演色性佳之高亮度白光,該基板之反射面上係形成複數頂部呈曲面之凸起顆粒,該些凸起顆粒之底部寬度為2微米至4微米,高度為1.2微米至1.8微米,相鄰凸起顆粒之間距則為0.6微米至3微米,並使一氮化銦鎵磊晶層於通電後發出波長為380至410奈米範圍內之紫外光,紫外光經由該基板之反射面及該些凸起顆粒反射,並激發混合氧化鋅及釔鋁石榴石之螢光物質而產生紫外光之互補色光,而於相互混色後,由一封裝體散射出演色性佳之高亮度白光,而可用於照明等用途。Another published patent of the Republic of China No. 201251113 discloses a method for manufacturing an LED substrate, an LED substrate, and a white LED structure. The main purpose is to make the LED emit high-brightness white light with good color rendering. The reflective surface of the substrate forms a plurality of numbers. The convex particles with curved surfaces on the top, the width of the bottom of these convex particles is 2 micrometers to 4 micrometers, the height of 1.2 micrometers to 1.8 micrometers, and the distance between adjacent convex particles is 0.6 micrometers to 3 micrometers. The indium gallium epitaxial layer emits ultraviolet light with a wavelength in the range of 380 to 410 nanometers after being energized. The ultraviolet light is reflected by the reflective surface of the substrate and the raised particles, and excites the mixed zinc oxide and yttrium aluminum garnet. Fluorescent substances generate complementary color light of ultraviolet light, and after mixing with each other, a package body scatters high-brightness white light with good color rendering, which can be used for lighting and other purposes.

然而,上述發明二極體中,主要都是藉由單獨在基板上形成一奈米級多孔性光子晶體結構或微米級凸起顆粒以提高發光二極體之發光效率,然而,前述微米級或奈米級結構設計對於降低差排密度程度或提升發光效率的程度都仍有其本質上的限制。However, in the above-mentioned inventive diodes, a nanometer-sized porous photonic crystal structure or micron-sized convex particles are mainly formed on the substrate to improve the luminous efficiency of the light-emitting diode. However, the micron-sized or The nano-level structural design still has its inherent limitations in reducing the degree of differential row density or increasing the degree of luminous efficiency.

此外,如本案申請人申請的中華民國專利申請案第102111662號,係揭示一種光電元件的基板,提供至少一光電元件形成於該基板的一上表面,其特徵在於,該基板的該上表面具有複數個微米結構與複數個次微米結構以構成一粗糙表面,其中該些次微米結構的尺寸小於該些微米結構。藉此,可改善基板之光學漫射率,並可增進成長於基板上的磊晶薄膜材料品質,進而提升光電元件之光萃取效率,達到提升整體光電元件之發光亮度。本發明另提供一種光電元件。其中,該前案為本案申請人所提出藉由微米結構及次微米結構之組合以增進磊晶薄膜材料品質或提升整體光電元件之發光亮度。In addition, as in the Republic of China Patent Application No. 102111662 filed by the applicant of the present application, a substrate for a photovoltaic element is disclosed, and at least one photovoltaic element is provided on an upper surface of the substrate, characterized in that the upper surface of the substrate has The plurality of micro-structures and the plurality of sub-micro-structures constitute a rough surface, wherein the sizes of the sub-micro structures are smaller than the micro-structures. In this way, the optical diffusion rate of the substrate can be improved, and the quality of the epitaxial thin film material grown on the substrate can be improved, thereby improving the light extraction efficiency of the photovoltaic element and achieving the luminous brightness of the entire photovoltaic element. The invention further provides a photovoltaic element. Among them, the previous case is a combination of micro-structure and sub-micro-structure proposed by the applicant of the present application to improve the quality of the epitaxial thin film material or the luminous brightness of the overall photovoltaic device.

再者,在磊晶層覆蓋到基板的過程中,若基板上的圖案包括凹槽結構,則凹槽的深寬比例與磊晶層的磊晶速率快慢具有相對應的關係。 進一步而言,若凹槽具有較高的深寬比,亦即凹槽深度較深,寬度較小,則凹槽結構容易因為磊晶層磊晶速率較快而無法被磊晶層即時地完全覆蓋填滿;然而,若為了將磊晶層即時地完全覆蓋填滿凹槽而降低磊晶速率,將因此降低生產效能。Furthermore, during the process of covering the substrate with the epitaxial layer, if the pattern on the substrate includes a groove structure, the depth-to-width ratio of the groove has a corresponding relationship with the rate of the epitaxial layer. Further, if the groove has a high aspect ratio, that is, the groove has a deeper depth and a smaller width, the groove structure is easily unable to be completely completed by the epitaxial layer because the epitaxial layer has a faster epitaxial rate. Covering and filling; however, if the epitaxial rate is reduced in order to completely and completely fill the grooves with the epitaxial layer, the production efficiency will be reduced accordingly.

承上所述,當磊晶層無法完全覆蓋填滿基板上的凹槽結構時,將使得凹槽結構與磊晶層之間存在大量存在空隙。進一步而言,由於光線進入到不同介質時,亦即由磊晶層進入到凹槽中的空隙,全反射因而增加,因此,凹槽結構中的空隙將使得LED由發光層發出光線的行進方向改變而困在凹槽結構中,形成較差的光提取效率,亦即降低發光二極體的發光效率。As mentioned above, when the epitaxial layer cannot completely cover the groove structure on the substrate, there will be a large number of gaps between the groove structure and the epitaxial layer. Further, since light enters different media, that is, the epitaxial layer enters the gap in the groove, the total reflection is increased. Therefore, the gap in the groove structure will make the LED travel direction of light from the light emitting layer. It is trapped in the groove structure by changing, resulting in poor light extraction efficiency, that is, reducing the light emitting efficiency of the light emitting diode.

因此,目前急需發展出一種具有提升發光效率之圖案化光電基板及具有該基板之發光二極體,其可以有效降提高發光二極體之發光效率,進而提高發光二極體之應用性及價值實有其需要。Therefore, there is an urgent need to develop a patterned photovoltaic substrate with improved luminous efficiency and a light emitting diode with the substrate, which can effectively reduce and improve the light emitting efficiency of the light emitting diode, thereby improving the applicability and value of the light emitting diode. It really has its needs.

本發明之主要目的係在提供一種具有提升發光效率之圖案化光電基板及其製作方法,其可藉由基板表面之圖案化結構以及填充層填滿於其凹槽結構內,進而使發光二極體具有更穩定且更優異的發光效率及性能。The main object of the present invention is to provide a patterned photovoltaic substrate with improved luminous efficiency and a method for manufacturing the same, which can fill the groove structure with a patterned structure and a filling layer on the surface of the substrate, thereby making the light emitting diodes The body has more stable and excellent luminous efficiency and performance.

為達成上述目的,本發明係提供一種具有提升發光效率之圖案化光電基板之製作方法,其步驟包括:To achieve the above object, the present invention provides a method for manufacturing a patterned photovoltaic substrate with improved luminous efficiency. The steps include:

步驟S1:提供一基板;Step S1: providing a substrate;

步驟S2:藉由一第一蝕刻處理於該基板表面形成一第一圖案化結構及一間隔區域;Step S2: forming a first patterned structure and a space region on the surface of the substrate by a first etching process;

步驟S3:形成一第一金屬層及一第二金屬層於該基板上之該第一圖案化結構及該間隔區域表面;Step S3: forming a first metal layer and a second metal layer on the first patterned structure and the surface of the space region on the substrate;

步驟S4:藉由一第二蝕刻處理於該第二金屬層上形成一第二圖案化結構,該第二圖案化結構係位於該第一圖案化結構及該間隔區域上方之其中一者或兩者;Step S4: forming a second patterned structure on the second metal layer by a second etching process, the second patterned structure is located on one or both of the first patterned structure and the spaced region. By;

步驟S5:藉由一第三蝕刻處理使該第二圖案化結構向下延伸至該第一金屬層及該基板之部分表面;Step S5: the third patterned structure is extended downward to the first metal layer and a part of the surface of the substrate by a third etching process;

步驟S6:藉由一酸液處理以自該基板上移除該第一金屬層及該第二金屬層,以形成具有該第一圖案化結構及該第二圖案化結構之該基板;Step S6: removing the first metal layer and the second metal layer from the substrate by an acid solution to form the substrate having the first patterned structure and the second patterned structure;

以及步驟S7:以一預定成長速率形成一填充層填滿於該第二圖案化結構內。And step S7: forming a filling layer to fill the second patterned structure at a predetermined growth rate.

所述之具有提升發光效率之圖案化光電基板之製作方法,其中,該第二圖案化結構之該結構形狀係為一次微米級凹槽結構,且其深寬比介於0.3:1至20:1之間。The method for manufacturing a patterned photovoltaic substrate with improved luminous efficiency, wherein the shape of the structure of the second patterned structure is a micron-level groove structure, and its aspect ratio is between 0.3: 1 to 20: Between 1.

所述之具有提升發光效率之圖案化光電基板之製作方法,該填充層係以物理氣相沈積方式填滿於該第二圖案化結構之內。In the method for manufacturing a patterned photovoltaic substrate with improved luminous efficiency, the filling layer is filled in the second patterned structure by a physical vapor deposition method.

所述之具有提升發光效率之圖案化光電基板之製作方法,其中,該次微米級凹槽結構包括一多邊形結構。The method for manufacturing a patterned photovoltaic substrate with improved luminous efficiency, wherein the sub-micron-scale groove structure includes a polygonal structure.

所述之具有提升發光效率之圖案化光電基板之製作方法,其中,該預定成長速率介於每秒0.01至3.0奈米之間。The method for manufacturing a patterned photovoltaic substrate with improved luminous efficiency, wherein the predetermined growth rate is between 0.01 and 3.0 nanometers per second.

所述之具有提升發光效率之圖案化光電基板之製作方法,其中,該填充層所使用的材料為折射係數介於1.7~2.5之間。The method for manufacturing a patterned photovoltaic substrate with improved luminous efficiency, wherein a material used for the filling layer has a refractive index between 1.7 and 2.5.

一種具有提升發光效率之圖案化光電基板,包括:一第一圖案化結構,係為一微米級突出結構或一微米級凹槽結構;一間隔區域;一第二圖案化結構,係為一次微米級凹槽結構,並形成於該第一圖案化結構及該間隔區域上之其中一者或兩者;以及一填充層,設置於該第二圖案化結構之次微米級凹槽結構內。A patterned photovoltaic substrate with improved luminous efficiency includes: a first patterned structure, which is a micron-scale protruding structure or a micron-scale groove structure; a space region; a second patterned structure, which is a micron Level groove structure formed on one or both of the first patterned structure and the space region; and a filling layer disposed in the sub-micron level groove structure of the second patterned structure.

所述之具有提升發光效率之圖案化光電基板,其中,該第一圖案化結構或該第二圖案化結構係為圓錐狀、圓弧狀、圓柱狀、角錐狀或角柱狀。The patterned photovoltaic substrate with improved luminous efficiency, wherein the first patterned structure or the second patterned structure is conical, arc-shaped, cylindrical, pyramid-shaped, or angular-pillar-shaped.

所述之具有提升發光效率之圖案化光電基板,其中,該次微米級凹槽結構之深寬比介於0.3:1至20:1之間。The patterned photovoltaic substrate with improved luminous efficiency, wherein the aspect ratio of the sub-micron groove structure is between 0.3: 1 and 20: 1.

所述之具有提升發光效率之圖案化光電基板,其中,該填充層係選用折射係數1.7~2.5之間之材料。In the patterned photovoltaic substrate with improved luminous efficiency, the filling layer is made of a material having a refractive index between 1.7 and 2.5.

一種具有提升發光效率之圖案化光電基板之發光二極體,包括:一基板,該基板係為前述中任一項所述之具有提升發光效率之圖案化光電基板;一緩衝層,設置於該基板上;以及一光電元件,設置於該緩衝層上,且該光電元件包含:一第一半導體層、一發光層、及第二半導體層,其中,該第一半導體層係接合至該緩衝層;該發光層,夾設於該第一半導體層及該第二半導體層之間。A light emitting diode having a patterned photovoltaic substrate with improved luminous efficiency, comprising: a substrate, the substrate being the patterned photovoltaic substrate with improved luminous efficiency according to any one of the foregoing; a buffer layer provided on the substrate A substrate; and a photovoltaic element disposed on the buffer layer, and the photovoltaic element includes: a first semiconductor layer, a light-emitting layer, and a second semiconductor layer, wherein the first semiconductor layer is bonded to the buffer layer The light emitting layer is sandwiched between the first semiconductor layer and the second semiconductor layer.

所述之發光二極體,其中,更包括一第一電極及一第二電極,該第一電極及該第二電極係分別電性接合於該第一半導體層及該第二半導體層。The light-emitting diode further includes a first electrode and a second electrode, and the first electrode and the second electrode are electrically connected to the first semiconductor layer and the second semiconductor layer, respectively.

以下係藉由特定的具體實施例說明本發明之實施方式,熟習此技藝之人士可由本說明書所揭示之內容輕易地了解本發明之其他優點與功效。本發明亦可藉由其他不同的具體實施例加以施行或應用,本說明書中的各項細節亦可針對不同觀點與應用,在不悖離本發明之精神下進行各種修飾與變更。The following is a description of specific embodiments of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied by other different specific embodiments, and various details in this specification can also be modified and changed for different viewpoints and applications without departing from the spirit of the present invention.

請參考圖1及圖2A至2J,為本發明所提出之一種具有提升發光效率之圖案化光電基板之製作方法,包括以下步驟:Please refer to FIG. 1 and FIGS. 2A to 2J, which is a method for manufacturing a patterned photovoltaic substrate with improved luminous efficiency, which includes the following steps:

步驟S1:提供一基板10;在一實施例中,基板10係選用一平面表面的一藍寶石基板,或選用一平面表面的矽基板亦可(參考圖2A)。Step S1: A substrate 10 is provided. In one embodiment, the substrate 10 is a sapphire substrate with a flat surface or a silicon substrate with a flat surface (see FIG. 2A).

步驟S2:藉由第一蝕刻處理於基板10表面形成第一圖案化結構11及間隔區域12(參考圖2B);在一實施例中,第一蝕刻處理處理可為一等向性蝕刻(Isotropic etching)或一非等向性蝕刻(Anisotropic etching),其中,可為電感式偶合電漿反應性離子蝕刻法(ICP-RIE)、化學液蝕刻法、乾式蝕刻法、電漿蝕刻法、或雷射加工法。此外,等向性蝕刻可利用化學蝕刻液(例如強酸)在高溫環境下進行化學蝕刻反應,以在基板10上製作出具有一定週期性之微米級突出或凹槽結構;此外,非等向性蝕刻程序為先在基板10上形成一圖案化光阻層,再利用電感式耦合電漿反應性離子蝕刻(ICP-RIE)技術進行蝕刻,以選擇性地移除部分基板10,同樣可達到上述形成具有一定週期性之微米級突出或凹槽結構之目的。Step S2: forming a first patterned structure 11 and a space region 12 on the surface of the substrate 10 by a first etching process (refer to FIG. 2B); in an embodiment, the first etching process may be an isotropic etching (Isotropic etching) or anisotropic etching, which can be inductively coupled plasma reactive ion etching (ICP-RIE), chemical liquid etching, dry etching, plasma etching, or lightning Shooting method. In addition, isotropic etching can use a chemical etching solution (such as a strong acid) to perform a chemical etching reaction under a high temperature environment to produce a micron-level protrusion or groove structure with a certain periodicity on the substrate 10; in addition, anisotropic The etching procedure is to first form a patterned photoresist layer on the substrate 10, and then use inductively coupled plasma reactive ion etching (ICP-RIE) technology to perform etching to selectively remove part of the substrate 10, which can also achieve the above. The purpose of forming a micron-scale protrusion or groove structure with a certain periodicity.

此外,在步驟S2中,更包括提供一第一光阻層(未圖示)設置於基板10之部分表面上,使第一蝕刻處理可為選擇性地移除部分的基板10;此外,在前述本發明之一種具有提升發光效率之圖案化光電基板之製作方法中,該第一圖案化結構11可為一微米級突出結構(如圖2B所示)或一微米級凹槽結構,且間隔區域12可為一平面結構。於本發明之一態樣中,第一圖案化結構11可為一微米級突出結構,其高度為1.2微米至2微米,外徑為1微米至5微米,相鄰的該第一圖案化結構11之間距(即為該間隔區域12之長度或寬度)為0.1微米至1微米。此外,於本發明之另一態樣中,第一圖案化結構11可為一微米級凹槽結構,此部分將於後面詳細說明。In addition, in step S2, it further includes providing a first photoresist layer (not shown) disposed on a part of the surface of the substrate 10, so that the first etching process can selectively remove part of the substrate 10; In the aforementioned method for manufacturing a patterned photovoltaic substrate with improved luminous efficiency, the first patterned structure 11 may be a micron-level protruding structure (as shown in FIG. 2B) or a micron-level groove structure, and the interval The region 12 may be a planar structure. In one aspect of the present invention, the first patterned structure 11 may be a one-micron-scale protruding structure having a height of 1.2 micrometers to 2 micrometers and an outer diameter of 1 micrometer to 5 micrometers. The distance between 11 (that is, the length or width of the interval region 12) is 0.1 micrometer to 1 micrometer. In addition, in another aspect of the present invention, the first patterned structure 11 may be a micron-level groove structure, which will be described in detail later.

步驟S3:形成第一金屬層13及一第二金屬層14於基板10上的第一圖案化結構11及間隔區域12表面(參考圖2C);其中,第一金屬層13或第二屬層14之形成可藉由塗佈法、化學電鍍法、濺鍍法、蒸鍍法、陰極電弧法、或化學氣相沉積法,其中,蒸鍍法包括電子束蒸鍍法、熱蒸鍍法、高週波蒸鍍法、或雷射蒸鍍法等,本發明並未侷限於此。在此,本發明所揭露之一種具有提升發光效率之圖案化光電基板之製作方法中,第一金屬層13為至少一選擇由鈦、鉻、鉬、或二氧化矽(SiO 2)組合等所組成之群組,且第一金屬層13之厚度可為1奈米至1微米;此外,第二金屬層14為鋁,且第二金屬層14之厚度可為10奈米至100微米。而於本發明之另一態樣中,第一金屬層13則選用鈦為主。 Step S3: forming a first metal layer 13 and a second metal layer 14 on the surface of the first patterned structure 11 and the space region 12 on the substrate 10 (refer to FIG. 2C); wherein the first metal layer 13 or the second metal layer 13 14 can be formed by a coating method, a chemical plating method, a sputtering method, a vapor deposition method, a cathodic arc method, or a chemical vapor deposition method. Among them, the vapor deposition method includes an electron beam evaporation method, a thermal evaporation method, The high frequency vapor deposition method, the laser vapor deposition method, and the like are not limited thereto. Here, in a method for manufacturing a patterned photovoltaic substrate with improved luminous efficiency disclosed in the present invention, the first metal layer 13 is at least one selected from the group consisting of titanium, chromium, molybdenum, or silicon dioxide (SiO 2 ). And the thickness of the first metal layer 13 may be 1 nanometer to 1 micrometer; in addition, the second metal layer 14 is aluminum, and the thickness of the second metal layer 14 may be 10 nanometers to 100 micrometers. In another aspect of the present invention, the first metal layer 13 is mainly titanium.

步驟S4:藉由第二蝕刻處理於第二金屬層14上形成第二圖案化結構15,此第二圖案化結構15係位於第一圖案化結構11及間隔區域12上方之其中一者或兩者(參考圖2D);在一實施例中,第二蝕刻處理是使用一陽極氧化鋁處理(anodic aluminum oxide,AAO),但並不以此為限。以使用陽極氧化鋁處理來說,其包含提供一第二光阻層設置於第一圖案化結構11上方之第二金屬層14的表面,使該陽極氧化鋁處理可為選擇性地移除部分的間隔區域12上方之該第二金屬層14,因此,第二圖案化結構15可形成於間隔區域12上方之第二金屬層14,但第一圖案化結構11上方之第二金屬層14則不會具有該第二圖案化結構15。另一實施例,在前述本發明之一種具有提升發光效率之圖案化光電基板之製作方法中,於步驟S4中,更包括提供第二光阻層設置於間隔區域12上方之第二金屬層14表面,使陽極氧化鋁處理可為選擇性地移除部分的第一圖案化結構11上方之第二金屬層14,因此,第二圖案化結構15可形成於第一圖案化結構11上方之第二金屬層14,但間隔區域12上方之第二金屬層14則不會具有該第二圖案化結構15。Step S4: forming a second patterned structure 15 on the second metal layer 14 by a second etching process. The second patterned structure 15 is located on one or both of the first patterned structure 11 and the spacer region 12. (Refer to FIG. 2D); in one embodiment, the second etching process is an anodized aluminum oxide (AAO) process, but it is not limited thereto. In the case of using anodized aluminum, it includes providing a second photoresist layer on the surface of the second metal layer 14 above the first patterned structure 11, so that the anodized aluminum can be selectively removed. The second metal layer 14 above the spacer region 12, therefore, the second patterned structure 15 may be formed on the second metal layer 14 above the spacer region 12, but the second metal layer 14 above the first patterned structure 11 is It will not have the second patterned structure 15. In another embodiment, in the method for manufacturing a patterned photovoltaic substrate with improved luminous efficiency of the present invention, in step S4, the method further includes providing a second photoresist layer and a second metal layer 14 disposed above the space region 12. On the surface, the anodized aluminum treatment can selectively remove a portion of the second metal layer 14 above the first patterned structure 11. Therefore, the second patterned structure 15 can be formed on the first patterned structure 11. Two metal layers 14, but the second metal layer 14 above the spacer region 12 does not have the second patterned structure 15.

步驟S5:藉由第三蝕刻處理使第二圖案化結構15向下延伸至第一金屬層13及基板10之部分表面(參考圖2E);在此所述的第三蝕刻處理的方式可以同前述之第一蝕刻處理,在此則不再贅述。Step S5: The third patterned structure 15 is extended downward to a portion of the surface of the first metal layer 13 and the substrate 10 by a third etching process (refer to FIG. 2E); the method of the third etching process described herein may be the same The foregoing first etching process is not repeated here.

步驟S6:藉由一酸液處理以自基板10上移除第一金屬層13及第二金屬層14,以形成具有第一圖案化結構11及第二圖案化結構15之基板10(參考圖2F),而在此所指的酸液,可以使用例如草酸(H 2C 2O 4)、硫酸(H 2SO 4)、磷酸(H 3PO 4)等等,或者是依需求以及搭配處理的時間,可以多種酸液調配而成,例如,以氫氟酸:硝酸:醋酸,以比例為2:3:10調配而成,並酸洗約2分鐘。 Step S6: The first metal layer 13 and the second metal layer 14 are removed from the substrate 10 by an acid solution to form a substrate 10 having a first patterned structure 11 and a second patterned structure 15 (see FIG. 2F), and the acid solution referred to here can be used, for example, oxalic acid (H 2 C 2 O 4 ), sulfuric acid (H 2 SO 4 ), phosphoric acid (H 3 PO 4 ), etc. The time can be prepared by various acid solutions, for example, it is prepared by using hydrofluoric acid: nitric acid: acetic acid at a ratio of 2: 3: 10, and pickled for about 2 minutes.

步驟S7:以一預定成長速率形成一填充層16於第二圖案化結構15內,如圖2G與其局部放大圖2H所示。在此,填充層16可以用物理氣相沈積方式(Physical Vapor Deposition)以一預定成長速率所形成,例如濺鍍、蒸鍍的方式,將填充層16填滿於第二圖案化結構15之內,而預定成長速率則介於每秒0.01至3.0奈米之間為較佳方式。Step S7: A filling layer 16 is formed in the second patterned structure 15 at a predetermined growth rate, as shown in FIG. 2G and a partial enlargement thereof as shown in FIG. 2H. Here, the filling layer 16 may be formed by a physical vapor deposition method (Physical Vapor Deposition) at a predetermined growth rate, for example, a sputtering method or an evaporation method, and the filling layer 16 is filled in the second patterned structure 15. , And the predetermined growth rate is preferably between 0.01 and 3.0 nanometers per second.

其中,前述的第二圖案化結構15之結構形狀係為一次微米級凹槽結構,且其深寬比介於0.3:1至20:1之間。且此次微米級凹槽結構包括一多邊形結構,包括一梯形結構、一錐形結構、一弧形結構、一柱形結構或一角形結構。此外,要特別說明的是,填充層16所使用的材料不特別侷限,可選用折射係數介於1.7~2.5之間的材料為較佳的方式,例如藍寶石(折射係數1.7)、氮化鋁AlN、氮化矽SiN、二氧化矽SiO 2、氮化鈦TiN或氮化鎵(折射係數為2.5)皆可。 The shape of the aforementioned second patterned structure 15 is a one-micron-level groove structure, and its aspect ratio is between 0.3: 1 and 20: 1. And the micro-scale groove structure includes a polygonal structure, including a trapezoidal structure, a tapered structure, an arc structure, a columnar structure, or an angular structure. In addition, it should be particularly noted that the material used for the filling layer 16 is not particularly limited, and a material with a refractive index between 1.7 and 2.5 can be selected. For example, sapphire (refractive index 1.7), aluminum nitride AlN , Silicon nitride SiN, silicon dioxide SiO 2 , titanium nitride TiN or gallium nitride (refractive index is 2.5) are all acceptable.

請參考圖2I,要特別說明的是,填充層16除了充滿於第二圖案化結構15之內,此填充層16也會存在於第一圖案化結構11與間隔區域12之上。此外,也請參考圖2J,此為第二圖案化結構15的另一個實施態樣,此第二圖案化結構15的結構形狀為角錐狀之次微米級凹槽結構,在此實施例中,填充層16係選用氮化鎵材料,以每秒0.01~3.0奈米之間的預定成長速率,將第二圖案化結構15中的角椎狀的凹槽空隙填滿,據此,應用本發明所提出的具有提升發光效率之圖案化光電基板之製作方法,進一步應用於製成發光二極體的產品,透過角椎狀的次微米級凹槽結構,可提高入光量,又透過填充層16填滿於此第二圖案化結構15之內,可以避免造成光線的全反射現象,大幅度的增加出光量,進一步提高發光效率。Please refer to FIG. 2I. It should be particularly noted that in addition to the filling layer 16 being filled in the second patterned structure 15, the filling layer 16 will also exist on the first patterned structure 11 and the space region 12. In addition, please also refer to FIG. 2J. This is another embodiment of the second patterned structure 15. The structural shape of the second patterned structure 15 is a pyramid-shaped sub-micron groove structure. In this embodiment, The filling layer 16 is made of gallium nitride material, and fills the horn-shaped groove voids in the second patterned structure 15 at a predetermined growth rate between 0.01 and 3.0 nanometers per second. Based on this, the present invention is applied The proposed manufacturing method of a patterned photovoltaic substrate with improved luminous efficiency is further applied to products made of light-emitting diodes, which can penetrate the sub-micron-level groove structure of the angular cone shape, which can increase the amount of light incident and pass through the filling layer 16 Filling in the second patterned structure 15 can avoid the phenomenon of total reflection of light, greatly increase the amount of light, and further improve the luminous efficiency.

於本發明之另一實施例中,填充層16包括氮化鋁,若基板10使用藍寶石的材質,由於氮化鋁與藍寶石材質的折射係數相近,光線在進入到不同介質的臨界角可達到大約42.5度,據此,可消除光線進入到不同介質產生的全反射現象。此外,於本發明之另一實施例中,填充層16係以濺鍍或原子層沈積方法形成於基板10的第二圖案化結構15內,但是並不以此為限。In another embodiment of the present invention, the filling layer 16 includes aluminum nitride. If the substrate 10 is made of sapphire, since the refractive index of the aluminum nitride and the sapphire are similar, the critical angle of light entering different media can reach approximately 42.5 degrees, according to which the total reflection of light entering different media can be eliminated. In addition, in another embodiment of the present invention, the filling layer 16 is formed in the second patterned structure 15 of the substrate 10 by sputtering or atomic layer deposition, but it is not limited thereto.

此外,在前述本發明之一種具有提升發光效率之圖案化光電基板之製作方法中,於步驟S7之後,更包括提供一緩衝層40及一光電元件形成於該基板20上,使該基板20可結合該緩衝層40及該光電元件以形成一發光二極體30或一太陽能電池,將於後續圖3A進一步說明。In addition, in the method for manufacturing a patterned photovoltaic substrate with improved luminous efficiency of the present invention, after step S7, it further includes providing a buffer layer 40 and a photovoltaic element to be formed on the substrate 20, so that the substrate 20 can be The buffer layer 40 and the photovoltaic element are combined to form a light-emitting diode 30 or a solar cell, which will be further described in FIG. 3A later.

請參考圖2K,本發明再提出另一種實施例,為一種具有提升發光效率之圖案化光電基板20,包括: 一第一圖案化結構21,在此實施例中,第一圖案化結構21為一微米級凹槽結構;以及一間隔區域22;一第二圖案化結構25,係為一次微米級凹槽結構,形成於第一圖案化結構21及間隔區域22上之其中一者或兩者;以及一填充層26,設置於第二圖案化結構25之次微米級凹槽結構內。本實施例與前述實施例之一種具有提升發光效率之圖案化光電基板10的製作流程大致相同,除了在第一圖案化結構21之凹凸型態不同。本實施例係提供一第一光阻層(圖未顯示)設置於基板20部分表面上,使第一蝕刻處理為選擇性地移除部分的基板20,以形成具有圓錐狀之微米級凹槽結構之第一圖案化結構21及平面結構之間隔區域22;接著,並依據前述之製作流程,使第一圖案化結構21上含有複數個第二圖案化結構25,以形成具有第一圖案化結構21及第二圖案化結構25之具有提升發光效率之圖案化光電基板20,接著設置填充層26,並將第二圖案化結構25填滿填平。Please refer to FIG. 2K, another embodiment of the present invention is a patterned photovoltaic substrate 20 with improved luminous efficiency, including: a first patterned structure 21, in this embodiment, the first patterned structure 21 is A micron-level groove structure; and a space region 22; a second patterned structure 25, which is a one-time micron-level groove structure, formed on one or both of the first patterned structure 21 and the spaced region 22 And a filling layer 26 disposed in the sub-micron-level groove structure of the second patterned structure 25. This embodiment is substantially the same as the manufacturing process of a patterned photovoltaic substrate 10 with improved luminous efficiency, except that the uneven pattern of the first patterned structure 21 is different. In this embodiment, a first photoresist layer (not shown) is provided on a part of the surface of the substrate 20, so that the first etching process is to selectively remove a part of the substrate 20 to form a micron-shaped groove having a conical shape. The first patterned structure 21 of the structure and the space region 22 of the planar structure; then, according to the aforementioned manufacturing process, the first patterned structure 21 includes a plurality of second patterned structures 25 to form a first patterned structure The patterned photovoltaic substrate 20 having the structure 21 and the second patterned structure 25 with improved luminous efficiency is then provided with a filling layer 26 and the second patterned structure 25 is filled and filled.

在一實施例中,第一圖案化結構21或第二圖案化結構26係為圓錐狀、圓弧狀、圓柱狀、角錐狀或角柱狀,或者,也可以是一多邊形結構,包括一梯形結構、一錐形結構、一弧形結構、一柱形結構或一角形結構等,皆不侷限。In one embodiment, the first patterned structure 21 or the second patterned structure 26 is conical, arc-shaped, cylindrical, pyramidal, or prismatic, or it may be a polygonal structure, including a trapezoidal structure. , A tapered structure, an arc structure, a column structure or an angular structure, etc., are not limited.

要特別說明的是,第二圖案化結構26的次微米級凹槽結構之深寬比介於0.3:1至20:1之間。而填充層26係選用折射係數1.7~2.5之間之材料,例如藍寶石(折射係數1.7)或氮化鎵(折射係數為2.5)皆可。It should be particularly noted that the aspect ratio of the sub-micron-level groove structure of the second patterned structure 26 is between 0.3: 1 and 20: 1. The filling layer 26 is made of a material with a refractive index between 1.7 and 2.5, such as sapphire (refractive index 1.7) or gallium nitride (refractive index 2.5).

請參考圖3A,為本發明所提出之一種具有提升發光效率之圖案化光電基板之發光二極體30,而所述光電基板如前述之一種具有提升發光效率之圖案化光電基板20,具有一第一圖案化結構21、間隔區域22以及第二圖案化結構25,以及填充層26設置於第二圖案化結構25內或基板20上方,在此不再贅述。Please refer to FIG. 3A, which is a light-emitting diode 30 having a patterned photovoltaic substrate with improved luminous efficiency, and the photovoltaic substrate is like the aforementioned patterned photovoltaic substrate 20 with improved luminous efficiency. The first patterned structure 21, the space region 22, the second patterned structure 25, and the filling layer 26 are disposed in the second patterned structure 25 or above the substrate 20, and will not be repeated here.

一緩衝層40,設置於基板20上,其中,在如圖2H的實施例中,緩衝層40設置在所述的第一圖案化結構21、間隔區域22之上,而填充層26則填充於第二圖案化結構25與緩衝層40之間。而在如圖2I的實施例中,填充層26係分別填充於第一圖案化結構21、間隔區域22、及第二圖案化結構25之上,則緩衝層40便與填充層26相結合。A buffer layer 40 is disposed on the substrate 20. In the embodiment shown in FIG. 2H, the buffer layer 40 is disposed on the first patterned structure 21 and the space region 22, and the filling layer 26 is filled on Between the second patterned structure 25 and the buffer layer 40. In the embodiment shown in FIG. 2I, the filling layer 26 is filled on the first patterned structure 21, the space region 22, and the second patterned structure 25 respectively, and the buffer layer 40 is combined with the filling layer 26.

一光電元件,設置於此緩衝層40上,且光電元件包含:一第一半導體層51、一發光層52、及第二半導體層53,其中,第一半導體層51係接合至緩衝層40;發光層52則夾設於第一半導體層51及第二半導體層53之間。A photovoltaic element is disposed on the buffer layer 40, and the photovoltaic element includes: a first semiconductor layer 51, a light emitting layer 52, and a second semiconductor layer 53, wherein the first semiconductor layer 51 is bonded to the buffer layer 40; The light emitting layer 52 is sandwiched between the first semiconductor layer 51 and the second semiconductor layer 53.

其中,第一半導體層51及第二半導體層53為具有相對電性,例如,第一半導體層51及第二半導體層53分為P型半導體層及N型半導體層,或第一半導體層51及第二半導體層53分為N型半導體層及P型半導體層。此外,在前述本發明之一種發光二極體30中,更包括一第一電極54及一第二電極55,第一電極54及第二電極55為分別電性接合於第一半導體層51及第二半導體層53,且第一電極54及第一半導體層51或第二電極55及第二半導體層53具有相同的電性,例如,第一電極54及第一半導體層51均為正電性,第二電極55及第二半導體層53均為負電性,或者,第一電極54及第一半導體層51均為負電性,第二電極55及第二半導體層53均為正電性。此外,在前述本發明所揭露之發光二極體30中,光電元件可以為一直通式發光二極體、側通式發光二極體、或覆晶式發光二極體,本發明並未侷限於此。The first semiconductor layer 51 and the second semiconductor layer 53 are relatively electrically conductive. For example, the first semiconductor layer 51 and the second semiconductor layer 53 are divided into a P-type semiconductor layer and an N-type semiconductor layer, or the first semiconductor layer 51. And the second semiconductor layer 53 is divided into an N-type semiconductor layer and a P-type semiconductor layer. In addition, the foregoing light emitting diode 30 of the present invention further includes a first electrode 54 and a second electrode 55. The first electrode 54 and the second electrode 55 are respectively electrically bonded to the first semiconductor layer 51 and The second semiconductor layer 53 and the first electrode 54 and the first semiconductor layer 51 or the second electrode 55 and the second semiconductor layer 53 have the same electrical properties. For example, the first electrode 54 and the first semiconductor layer 51 are both positively charged. The second electrode 55 and the second semiconductor layer 53 are both negatively charged, or the first electrode 54 and the first semiconductor layer 51 are both negatively charged, and the second electrode 55 and the second semiconductor layer 53 are both positively charged. In addition, in the light-emitting diode 30 disclosed in the present invention, the photoelectric element may be a linear light-emitting diode, a side-light-emitting light-emitting diode, or a flip-chip light-emitting diode, and the present invention is not limited thereto. herein.

請參考圖3B,要特別說明的是,本發明所提出的發光二極體30,其所使用的基板20為具有一填充層26,至少設置於第二圖案化結構25內,因此,當緩衝層40設置於基板20上方時,緩衝層40與填充層26之間具有一接合部261,此接合部261可以如圖2H所示,填充層26填滿、填平於第二圖案化結構25內,然後緩衝層40將會分別與間隔區域、填充層以及第一圖案化結構結合,而接合部261則呈現平坦的結構;另一實施態樣,可以如圖2I或圖2J,填充層26除了填滿於第二圖案化結構內,也平均設置於間隔區域與第一圖案化結構之上,因此,結合部261亦呈現較平坦的結構;請參考圖3B,另一種實施態樣中,填充層26填充於第二圖案化結構25內並與緩衝層40接合時,結合部261具有一凹陷結構,特別適用於第二圖案化結構25的深寬比屬於較深的結構時,可以利用濺鍍的製程,先將第二圖案化結構25較深的空隙填充後(在此指填充層26),後續再配合MOCVD磊晶速率,控制水平與垂直的成長,使緩衝層40則接續於此填充層26之上,進而使整體結構中,避免有中空的結構產生。Please refer to FIG. 3B. It should be particularly noted that the substrate 20 used in the light-emitting diode 30 provided by the present invention has a filling layer 26 and is disposed at least in the second patterned structure 25. When the layer 40 is disposed above the substrate 20, a bonding portion 261 is provided between the buffer layer 40 and the filling layer 26. As shown in FIG. 2H, the bonding portion 261 is filled and filled in the second patterned structure 25. Inside, then the buffer layer 40 will be combined with the spacer region, the filling layer and the first patterned structure, and the joint portion 261 presents a flat structure; for another embodiment, as shown in FIG. 2I or FIG. 2J, the filling layer 26 In addition to being filled in the second patterned structure, it is evenly arranged on the gap region and the first patterned structure. Therefore, the joint portion 261 also presents a relatively flat structure; please refer to FIG. 3B. In another embodiment, When the filling layer 26 is filled in the second patterned structure 25 and bonded to the buffer layer 40, the joint portion 261 has a recessed structure, which is particularly suitable when the aspect ratio of the second patterned structure 25 belongs to a deeper structure. Sputtering process, first the second After filling the deep voids of the structure 25 (herein, the filling layer 26), the MOCVD epitaxy rate is subsequently controlled to control the horizontal and vertical growth, so that the buffer layer 40 continues on top of this filling layer 26, so that In the overall structure, avoid the occurrence of hollow structures.

此外,在前述本發明之一種發光二極體中,緩衝層40可為一氮化鎵(GaN)、氮化鋁(AlN)、氮化鋁鎵(AlGaN)、或其類似物、或其組合,用以降低該基板20(如,藍寶石基板)及該光電元件(如,發光二極體之氮化鎵磊晶層)間之晶格不匹配所造成之應力,進而達到降低光電元件內缺陷數量之目的;此外,除了利用氮化鎵磊晶層作為該光電元件以形成一發光二極體30之外,於本發明之另一態樣中,更可以選用一太陽能基板作為該光電元件以形成一太陽能電池,此時,該緩衝層40也可以為一非晶矽碳化物,同樣也可用以降低該基板20(如,藍寶石基板)及該太陽能單晶層或太陽能多晶層間之晶格不匹配所造成之應力,進而達到降低光電元件內缺陷數量之目的,且本發明並未侷限於此。In addition, in the foregoing light emitting diode of the present invention, the buffer layer 40 may be a gallium nitride (GaN), aluminum nitride (AlN), aluminum gallium nitride (AlGaN), or the like, or a combination thereof. To reduce the stress caused by the lattice mismatch between the substrate 20 (such as a sapphire substrate) and the photovoltaic element (such as a gallium nitride epitaxial layer of a light emitting diode), thereby reducing defects in the photovoltaic element In addition to using a gallium nitride epitaxial layer as the photovoltaic element to form a light emitting diode 30, in another aspect of the present invention, a solar substrate can be used as the photovoltaic element to A solar cell is formed. At this time, the buffer layer 40 can also be an amorphous silicon carbide, and can also be used to lower the lattice between the substrate 20 (such as a sapphire substrate) and the solar single crystal layer or solar polycrystalline layer. The stress caused by the mismatch further reduces the number of defects in the photovoltaic element, and the present invention is not limited to this.

據此,本發明所提出一種發光二極體30,由於其所使用的基板20是如前所述的一種具有提升發光效率之圖案化光電基板,其透過第二圖案化結構25係為一次微米級凹槽結構,可提高入光量,再者,又透過使用一預定的成長速率將填充層26填滿於此第二圖案化結構25之內,可以避免造成光線的全反射現象,大幅度的增加入光量,進一步提高發光效率,進而使整個發光二極體30具有更穩定且更優異的發光效率及性能。According to this, the light-emitting diode 30 provided by the present invention, because the substrate 20 used by it is a patterned photovoltaic substrate with improved luminous efficiency as described above, which passes through the second patterned structure 25 to be one micron The level groove structure can increase the amount of incident light. Furthermore, the filling layer 26 is filled in the second patterned structure 25 by using a predetermined growth rate, which can avoid the phenomenon of total reflection of light. Increasing the amount of incident light further improves the light emitting efficiency, so that the entire light emitting diode 30 has more stable and excellent light emitting efficiency and performance.

請參閱圖4及圖5,其係為各種範圍的光線波長在基板上不同深寬比的凹槽結構中的漫反射率(DR;diffuse reflectance)與漫穿透射(DT;diffuse transmittance)的實驗數據圖。圖6係為漫反射率、漫穿透率與深寬比的關係圖,而圖中標示的AR值即為深寬比。在圖4及圖5中可看出,當基板上沒有次微米級凹槽結構或微米級凹槽結構,而僅有藍寶石的基板(Bare)時,無論光線波長為何,偵測器偵測到的DR與DT的比率皆維持在0.2%。Please refer to FIG. 4 and FIG. 5, which are the diffuse reflectance (DR; diffuse reflectance) and diffuse transmittance (DT) of various ranges of light wavelengths in the groove structure with different aspect ratios on the substrate. Experimental data graph. Figure 6 shows the relationship between diffuse reflectance, diffuse transmittance, and aspect ratio, and the AR value marked in the figure is the aspect ratio. It can be seen in FIGS. 4 and 5 that when there is no sub-micron-level groove structure or micro-level groove structure on the substrate, and only a sapphire substrate (Bare), the detector detects The ratio of DR to DT is maintained at 0.2%.

然而,當基板上設置次微米級凹槽結構或微米級凹槽結構時,在相同的光線波長下,隨者深寬比越大,DR與DT則隨之增加,因而可有效提升LED光萃取效率。圖4亦可看出隨者深寬比越大,DR與DT亦隨之增加。However, when a sub-micron-level groove structure or a micro-level groove structure is provided on the substrate, at the same light wavelength, as the aspect ratio increases, DR and DT increase accordingly, which can effectively improve LED light extraction. effectiveness. Figure 4 also shows that the larger the aspect ratio, the higher the DR and DT.

請參閱圖7及圖8,其係為不同深寬比凹槽結構基板上成長LED結構層的電子顯微鏡側視圖。承上所述,雖然在先前技術中已揭露在基板上設置次微米級凹槽結構或微米級凹槽結構的技術特徵,且由上述內容可知隨著凹槽結構的深寬比越大,DR與DT則隨之增加。然而,在實際的磊晶製程中,若使用MOCVD的技術在基板上生成磊晶層,將遭遇到無法完全填平具有高深寬比之凹槽結構的技術瓶頸。如圖8所示,雖然具有較低深寬比(較淺)的凹槽結構比較容易填平,然而,如圖7所示,具有較高深寬比(較深)的凹槽結構將不容易填平,因此,將使得LED磊晶結構在高深寬比的奈米圖案藍寶石基板(NPSS; nanoscale-patterned sapphire substrates)中留下空隙,使得LED發出光線無法順利從藍寶石基板中導出。換句話說,即使在基板上設置有高深寬比的次微米級凹槽結構或微米級凹槽結構,然而,在無法突破現有磊晶製程的情況下,仍無法有效提升LED光萃取效率。Please refer to FIG. 7 and FIG. 8, which are side views of an electron microscope for growing an LED structure layer on a groove structure substrate with different aspect ratios. As mentioned above, although the technical features of providing a sub-micron-level groove structure or a micro-level groove structure on a substrate have been disclosed in the prior art, and from the above, it can be known that as the depth-to-width ratio of the groove structure increases, the DR And DT increased accordingly. However, in an actual epitaxial process, if an epitaxial layer is formed on a substrate using the MOCVD technology, a technical bottleneck in which the groove structure with a high aspect ratio cannot be completely filled will be encountered. As shown in FIG. 8, although a groove structure with a lower aspect ratio (lighter) is easier to fill out, as shown in FIG. 7, a groove structure with a higher aspect ratio (deeper) will not be easy to fill. Filling, therefore, will make the LED epitaxial structure leave a gap in the nanoscale-patterned sapphire substrates (NPSS; nano-patterned sapphire substrates) with high aspect ratio, so that the light emitted by the LED cannot be smoothly derived from the sapphire substrate. In other words, even if a sub-micron level groove structure or a micron-level groove structure with a high aspect ratio is provided on the substrate, the light extraction efficiency of the LED cannot be effectively improved without breaking the existing epitaxial process.

請參閱圖9、圖10及圖11,其依序為基板上之凹槽結構具有空隙的LED結構、基板上無凹槽結構的LED結構以及基板上之凹槽結構完全填平的LED結構示意圖。圖9所示即是前述具有高深寬比的凹槽結構,雖然具有越高深寬比的基板在理論上來說可提高光萃取效率,但由於此凹槽為次微米級凹槽結構或微米級凹槽結構,因此經過後續的MOCVD製程之後,其凹槽結構就會如圖9所示,在圖9中可看出,由於基板上之凹槽結構具有空隙,因此,當光線由LED的介質入射至基板上的凹槽結構時,基板上的凹槽結構係為空氣介質,其折射率為1,而基板上的LED磊晶層以氮化鎵為例,其折射率為2.5,因此,若考慮到全反射的狀況,根據光學的snell's law,LED的光線將產生23.5度的臨界角,使得光線被反射回LED的磊晶層,無法逃逸到大氣中。Please refer to FIG. 9, FIG. 10, and FIG. 11, which are LED structure diagrams in which the groove structure on the substrate has a gap, the LED structure without the groove structure on the substrate, and the LED structure with the groove structure on the substrate completely filled. . Figure 9 shows the aforementioned groove structure with a high aspect ratio. Although a substrate with a higher aspect ratio can theoretically improve the light extraction efficiency, since this groove is a sub-micron groove structure or a micron-level groove The groove structure, so after the subsequent MOCVD process, the groove structure will be as shown in Figure 9. It can be seen in Figure 9 that the groove structure on the substrate has gaps, so when light is incident from the medium of the LED When it comes to the groove structure on the substrate, the groove structure on the substrate is an air medium, and its refractive index is 1, and the LED epitaxial layer on the substrate uses gallium nitride as an example, and its refractive index is 2.5. Considering the situation of total reflection, according to the optical snell's law, the light of the LED will generate a critical angle of 23.5 degrees, so that the light is reflected back to the epitaxial layer of the LED and cannot escape to the atmosphere.

如圖10所示,為基板上無凹槽結構的實施態樣,因此,以藍寶石基板(Sapphire)為例,其折射率為1.7,氮化鎵其折射率為2.5,因此,若考慮到全反射的狀況,LED的光線將產生42.5度的臨界角。如圖11所示,為另一種凹槽結構的實施態樣,但並不以此為限,本發明所要表達的重點在於,由於其基板上的凹槽結構已經完全填平,因此,在基板上仍可保有次微米級凹槽結構或微米級凹槽結構的情況下,LED的光線仍可產生42.5度的臨界角。據此,可有效提升LED光萃取效率。換句話說,雖然具有高深寬比的NPSS對於光萃取效率有提升效益,但其前提為LED的凹槽結構必須填滿、填平。據此,透過本發明所提出的一種具有提升發光效率之圖案化光電基板,其透過第二圖案化結構係為一次微米級凹槽結構,可提高入光量,再者,又透過使用一預定的成長速率將填充層填滿於此第二圖案化結構之內,可以避免造成光線的全反射現象,大幅度的增加入光量,進一步提高發光效率,進而使整個發光二極體具有更穩定且更優異的發光效率及性能。As shown in FIG. 10, it is an embodiment of a non-groove structure on a substrate. Therefore, taking a sapphire substrate (Sapphire) as an example, its refractive index is 1.7, and gallium nitride has a refractive index of 2.5. Reflected condition, the LED light will produce a critical angle of 42.5 degrees. As shown in FIG. 11, it is another embodiment of the groove structure, but it is not limited thereto. The focus of the present invention is that the groove structure on the substrate is completely filled. In the case that the sub-micron-level groove structure or the micro-level groove structure can still be maintained on the upper surface, the LED light can still generate a critical angle of 42.5 degrees. Accordingly, the LED light extraction efficiency can be effectively improved. In other words, although NPSS with a high aspect ratio can improve the light extraction efficiency, the premise is that the groove structure of the LED must be filled and filled. According to this, a patterned photovoltaic substrate with improved luminous efficiency is proposed through the present invention. The second patterned structure is a micron-level groove structure, which can increase the amount of incident light. Furthermore, by using a predetermined The growth rate fills the filling layer within this second patterned structure, which can avoid the phenomenon of total reflection of light, greatly increase the amount of light incident, and further improve the luminous efficiency, thereby making the entire light emitting diode more stable and more stable. Excellent luminous efficiency and performance.

圖12為圖9至圖11各種基板上之凹槽結構填充態樣的LED發光效率比較圖,其中,Y軸指的是光強度,單位為mcd(毫坎德拉),標示為HAR-LED係指圖9的態樣,基板上之凹槽結構具有空隙的LED結構,標示B-LED係指圖10態樣中,基板上無凹槽結構的LED結構,以及標示為LAR-LED為圖11之態樣,基板上之凹槽結構完全填平的LED結構,可以得知,以LAR-LED的光強度最高。此外,圖9至圖11的實施態樣,係來自使用一具有平面的藍寶石基板上挖出奈米的孔洞加上微米結構的圖案後(奈米圖案藍寶石基板NPSS),所進行的實驗,當然,也是適用於複合型的基板。FIG. 12 is a comparison diagram of the luminous efficiency of LEDs filled with the groove structure on the various substrates of FIGS. 9 to 11, wherein the Y-axis refers to the light intensity, the unit is mcd (milli candela), and it is marked as HAR-LED. In the state of FIG. 9, the groove structure on the substrate has a voided LED structure. The B-LED designation refers to the LED structure without the groove structure on the substrate in the aspect of FIG. 10, and the LAR-LED is shown in FIG. 11. In aspects, the groove structure on the substrate completely fills the LED structure, and it can be known that the light intensity of the LAR-LED is the highest. In addition, the embodiment of FIGS. 9 to 11 is an experiment performed by using a planar sapphire substrate to excavate a nano hole and adding a microstructure pattern (nano pattern sapphire substrate NPSS). Also suitable for composite substrates.

上述實施例僅係為了方便說明而舉例而已,本發明所主張之權利範圍自應以申請專利範圍所述為準,而非僅限於上述實施例。The above embodiments are merely examples for the convenience of description. The scope of the claimed rights of the present invention should be based on the scope of the patent application, rather than being limited to the above embodiments.

S1、S2、S3、S4、S5、S6、S7‧‧‧步驟
10、20‧‧‧基板
30‧‧‧發光二極體
11、21‧‧‧第一圖案化結構
12、22‧‧‧間隔區域
13‧‧‧第一金屬層
14‧‧‧第二金屬層
15、25‧‧‧第二圖案化結構
16、26‧‧‧填充層
40‧‧‧緩衝層
51‧‧‧第一半導體層
52‧‧‧發光層
53‧‧‧第二半導體層
54‧‧‧第一電極
55‧‧‧第二電極
261‧‧‧接合部
S1, S2, S3, S4, S5, S6, S7‧‧‧ steps
10, 20‧‧‧ substrate
30‧‧‧light-emitting diode
11, 21‧‧‧ the first patterned structure
12, 22‧‧‧ Interval
13‧‧‧ first metal layer
14‧‧‧Second metal layer
15, 25‧‧‧ second patterned structure
16, 26‧‧‧ Filler
40‧‧‧ buffer layer
51‧‧‧First semiconductor layer
52‧‧‧Light-emitting layer
53‧‧‧Second semiconductor layer
54‧‧‧first electrode
55‧‧‧Second electrode
261‧‧‧Joint

圖1為本發明之一種具有提升發光效率之圖案化光電基板之製作方法的步驟流程圖。
圖2A至2J係本發明之具有提升發光效率之圖案化光電基板的一實施例示意圖。
圖2I為填充層之另一實施態樣。
圖2J為第二圖案化結構之另一實施態樣。
圖2K係本發明所提出之一種具有提升發光效率之圖案化光電基板之另一實施態樣。
圖3A與圖3B係本發明所提出之一種具有提升發光效率之圖案化光電基板之發光二極體。
圖4及圖5係為各種範圍的光線波長在基板上不同深寬比的凹槽結構中的漫反射率與漫穿透率的實驗數據圖。
圖6係為入射光450mm時,具凹槽結構基板之漫反射率、漫穿透率與深寬比的關係圖。
圖7及圖8係為不同深寬比之具凹槽結構基板,成長LED結構層後的電子顯微鏡圖。
圖9係為基板上之凹槽結構具有空隙的LED結構示意圖與光軌跡行進圖。
圖10係為基板上無凹槽結構的LED結構示意圖與光軌跡行進圖。
圖11係為基板上之凹槽結構完全填平的LED結構示意圖與光軌跡行進圖。
圖12為圖9至圖11各種基板上之凹槽結構填充態樣的LED發光效率比較圖。
FIG. 1 is a flowchart of steps in a method for manufacturing a patterned photovoltaic substrate with improved luminous efficiency according to the present invention.
2A to 2J are schematic diagrams of an embodiment of a patterned photovoltaic substrate with improved luminous efficiency according to the present invention.
FIG. 2I is another embodiment of the filling layer.
FIG. 2J is another embodiment of the second patterned structure.
FIG. 2K is another embodiment of a patterned photovoltaic substrate with improved luminous efficiency proposed by the present invention.
FIG. 3A and FIG. 3B are light-emitting diodes of a patterned photovoltaic substrate with improved light-emitting efficiency according to the present invention.
FIG. 4 and FIG. 5 are experimental data diagrams of diffuse reflectance and diffuse transmittance in groove structures with different aspect ratios of light wavelengths on the substrate in various ranges.
FIG. 6 is a relationship diagram of diffuse reflectance, diffuse transmittance, and aspect ratio of a substrate with a groove structure when incident light is 450 mm.
FIG. 7 and FIG. 8 are electron microscope images of the grooved structure substrate with different aspect ratios after growing the LED structure layer.
FIG. 9 is a schematic diagram of an LED structure having a groove structure on a substrate and a light track travel diagram.
FIG. 10 is a schematic diagram of a structure of an LED without a groove structure on a substrate and a light track travel diagram.
FIG. 11 is a schematic diagram of an LED structure and a light track travel diagram of a groove structure completely filled on a substrate.
FIG. 12 is a comparison diagram of the luminous efficiency of the LEDs in the filled state of the groove structure on the various substrates of FIGS.

Claims (12)

一種具有提升發光效率之圖案化光電基板之製作方法,其步驟包括:步驟S1:提供一基板;步驟S2:藉由一第一蝕刻處理於該基板表面形成一第一圖案化結構及一間隔區域;步驟S3:形成一第一金屬層及一第二金屬層於該基板上之該第一圖案化結構及該間隔區域表面;步驟S4:藉由一第二蝕刻處理於該第二金屬層上形成一第二圖案化結構,該第二圖案化結構係位於該第一圖案化結構及該間隔區域上方之其中一者或兩者;步驟S5:藉由一第三蝕刻處理使該第二圖案化結構向下延伸至該第一金屬層及該基板之部分表面;步驟S6:藉由一酸液處理以自該基板上移除該第一金屬層及該第二金屬層,以形成具有該第一圖案化結構及該第二圖案化結構之該基板;以及步驟S7:以一預定成長速率形成一填充層填滿於該第二圖案化結構內,其中,該填充層所使用的材料為折射係數介於1.7~2.5之間。A method for manufacturing a patterned photovoltaic substrate with improved luminous efficiency, the steps include: step S1: providing a substrate; step S2: forming a first patterned structure and a space region on the surface of the substrate by a first etching process Step S3: forming a first metal layer and a second metal layer on the first patterned structure and the surface of the space region on the substrate; step S4: performing a second etching process on the second metal layer A second patterned structure is formed, and the second patterned structure is located on one or both of the first patterned structure and the space region; Step S5: the second pattern is made by a third etching process The structure extends downward to the first metal layer and a part of the surface of the substrate; step S6: removing the first metal layer and the second metal layer from the substrate by an acid treatment to form the substrate having the A first patterned structure and the substrate of the second patterned structure; and step S7: forming a filling layer to fill the second patterned structure at a predetermined growth rate, wherein the material used in the filling layer is Refractive index of between 1.7 to 2.5. 如申請專利範圍第1項所述之具有提升發光效率之圖案化光電基板之製作方法,其中,該第二圖案化結構之該結構形狀係為一次微米級凹槽結構,且其深寬比介於0.3:1至20:1之間。According to the method for manufacturing a patterned photovoltaic substrate with improved luminous efficiency as described in item 1 of the scope of the patent application, wherein the structure shape of the second patterned structure is a one-micron-level groove structure, and its aspect ratio is Between 0.3: 1 and 20: 1. 如申請專利範圍第2項所述之具有提升發光效率之圖案化光電基板之製作方法,其中,該次微米級凹槽結構包括一多邊形結構。The method for manufacturing a patterned photovoltaic substrate with improved luminous efficiency as described in item 2 of the scope of the patent application, wherein the sub-micron level groove structure includes a polygonal structure. 如申請專利範圍第1項所述之具有提升發光效率之圖案化光電基板之製作方法,該填充層係以物理氣相沈積方式填滿於該第二圖案化結構之內。According to the method for manufacturing a patterned photovoltaic substrate with improved luminous efficiency as described in item 1 of the scope of the patent application, the filling layer is filled in the second patterned structure by a physical vapor deposition method. 如申請專利範圍第1或4項所述之具有提升發光效率之圖案化光電基板之製作方法,其中,該預定成長速率介於每秒0.01至3.0奈米之間。The method for manufacturing a patterned photovoltaic substrate with improved luminous efficiency as described in item 1 or 4 of the scope of the patent application, wherein the predetermined growth rate is between 0.01 and 3.0 nanometers per second. 一種具有提升發光效率之圖案化光電基板,包括:一第一圖案化結構,係為一微米級突出結構或一微米級凹槽結構;一間隔區域;一第二圖案化結構,係為一次微米級凹槽結構,並形成於該第一圖案化結構及該間隔區域上之其中一者或兩者;以及一填充層,設置於該第二圖案化結構之次微米級凹槽結構內,其中,該填充層係選用折射係數1.7~2.5之間之材料。A patterned photovoltaic substrate with improved luminous efficiency includes: a first patterned structure, which is a micron-scale protruding structure or a micron-scale groove structure; a space region; a second patterned structure, which is a micron Level groove structure formed on one or both of the first patterned structure and the space region; and a filling layer disposed in the sub-micron level groove structure of the second patterned structure, wherein The filling layer is made of a material with a refractive index between 1.7 and 2.5. 如申請專利範圍第6項所述之具有提升發光效率之圖案化光電基板,其中,該第一圖案化結構或該第二圖案化結構係為圓錐狀、圓弧狀、圓柱狀、角錐狀或角柱狀。The patterned photovoltaic substrate with improved luminous efficiency as described in item 6 of the scope of the patent application, wherein the first patterned structure or the second patterned structure is conical, arc-shaped, cylindrical, pyramidal, or Angle columnar. 如申請專利範圍第6項所述之具有提升發光效率之圖案化光電基板,其中,該次微米級凹槽結構之深寬比介於0.3:1至20:1之間。The patterned photovoltaic substrate with improved luminous efficiency as described in item 6 of the scope of the patent application, wherein the aspect ratio of the sub-micron groove structure is between 0.3: 1 and 20: 1. 一種具有提升發光效率之圖案化光電基板之發光二極體,包括:一基板,該基板係為依據申請專利範圍第6-8中任一項所述之具有提升發光效率之圖案化光電基板;一緩衝層,設置於該基板上;以及一光電元件,設置於該緩衝層上,且該光電元件包含:一第一半導體層、一發光層、及第二半導體層,其中,該第一半導體層係接合至該緩衝層;該發光層,夾設於該第一半導體層及該第二半導體層之間。A light-emitting diode having a patterned photovoltaic substrate with improved luminous efficiency, comprising: a substrate, the substrate being a patterned photovoltaic substrate with improved luminous efficiency according to any one of claims 6-8 of the scope of patent application; A buffer layer is disposed on the substrate; and a photovoltaic element is disposed on the buffer layer, and the photovoltaic element includes: a first semiconductor layer, a light emitting layer, and a second semiconductor layer, wherein the first semiconductor The layer is bonded to the buffer layer; the light emitting layer is sandwiched between the first semiconductor layer and the second semiconductor layer. 如申請專利範圍第9項所述之發光二極體,其中,更包括一第一電極及一第二電極,該第一電極及該第二電極係分別電性接合於該第一半導體層及該第二半導體層。The light-emitting diode according to item 9 of the scope of patent application, further comprising a first electrode and a second electrode, the first electrode and the second electrode are respectively electrically connected to the first semiconductor layer and The second semiconductor layer. 如申請專利範圍第9項所述之發光二極體,其中,該填充層與該緩衝層之間具有一接合部。The light-emitting diode according to item 9 of the scope of the patent application, wherein a bonding portion is provided between the filling layer and the buffer layer. 如請專利範圍第11項所述之發光二極體,其中,該接合部為具有一凹陷結構。For example, the light emitting diode according to item 11 of the patent scope, wherein the joint portion has a recessed structure.
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