[go: up one dir, main page]

TWI650605B - Array substrate and method for testing the same - Google Patents

Array substrate and method for testing the same Download PDF

Info

Publication number
TWI650605B
TWI650605B TW107101375A TW107101375A TWI650605B TW I650605 B TWI650605 B TW I650605B TW 107101375 A TW107101375 A TW 107101375A TW 107101375 A TW107101375 A TW 107101375A TW I650605 B TWI650605 B TW I650605B
Authority
TW
Taiwan
Prior art keywords
test
test group
pad
group
electrically connected
Prior art date
Application number
TW107101375A
Other languages
Chinese (zh)
Other versions
TW201932951A (en
Inventor
陳宜銘
吳彥鋒
Original Assignee
友達光電股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 友達光電股份有限公司 filed Critical 友達光電股份有限公司
Priority to TW107101375A priority Critical patent/TWI650605B/en
Application granted granted Critical
Publication of TWI650605B publication Critical patent/TWI650605B/en
Publication of TW201932951A publication Critical patent/TW201932951A/en

Links

Landscapes

  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

陣列基板包括一第一測試組、一第二測試組以及一畫素陣列。第一測試組包括第一測試墊,第一測試組之第一測試墊電性連接於第一驅動單元。第二測試組包括第一測試墊,第二測試組之第一測試墊電性連接於第二驅動單元,並分別電性連接於對應的第一測試組之第一測試墊。畫素陣列包括第一訊號線。第一訊號線電性連接於第一驅動單元與第二驅動單元之間。The array substrate includes a first test group, a second test group, and a pixel array. The first test set includes a first test pad, and the first test pad of the first test set is electrically connected to the first drive unit. The second test set includes a first test pad, and the first test pad of the second test set is electrically connected to the second drive unit, and is electrically connected to the first test pad of the corresponding first test group. The pixel array includes a first signal line. The first signal line is electrically connected between the first driving unit and the second driving unit.

Description

陣列基板及陣列基板之測試方法Array substrate and array substrate test method

本發明是有關於一種陣列基板及其測試方法,且特別是有關於一種具有第一測試組與第二測試組之陣列基板及陣列基板之測試方法。The present invention relates to an array substrate and a test method thereof, and more particularly to a test method for an array substrate and an array substrate having a first test group and a second test group.

隨著顯示面板之需求的增加,陣列基板的發展已成為主要趨勢。當陣列基板中的主動陣列區域製造完成之後,需要對此主動陣列區域中的畫素陣列進行測試,例如是電氣特性的測試,否則異常的元件將影響陣列基板的顯示效果。As the demand for display panels increases, the development of array substrates has become a major trend. After the active array area in the array substrate is manufactured, it is necessary to test the pixel array in the active array area, for example, testing of electrical characteristics, otherwise the abnormal components will affect the display effect of the array substrate.

目前仍亟需一種便於進行測試之陣列基板及陣列基板之測試方法。There is still a need for a test method for array substrates and array substrates that are easy to test.

本揭露係有關於一種陣列基板及陣列基板之測試方法。本揭露之一實施例的陣列基板包括電性連接之第一測試組之第一測試墊以及第二測試組之第一測試墊,如此僅需提供一訊號給第一測試組之第一測試墊,即可將此訊號傳送至第二測試組之第一測試墊,而能有效地進行畫素陣列之各個元件之測試。The disclosure relates to a method for testing an array substrate and an array substrate. The array substrate of one embodiment of the present disclosure includes a first test pad electrically connected to the first test group and a first test pad of the second test group, so that only one signal is needed to be provided to the first test pad of the first test group. Then, the signal can be transmitted to the first test pad of the second test group, and the components of the pixel array can be effectively tested.

根據本揭露之一實施例,提出一種陣列基板。陣列基板包括一第一測試組、一第二測試組以及一畫素陣列。第一測試組包括第一測試墊,第一測試組之第一測試墊電性連接於第一驅動單元。第二測試組包括第一測試墊,第二測試組之第一測試墊電性連接於第二驅動單元,並分別電性連接於對應的第一測試組之第一測試墊。畫素陣列包括第一訊號線。第一訊號線電性連接於第一驅動單元與第二驅動單元之間。According to an embodiment of the present disclosure, an array substrate is proposed. The array substrate includes a first test group, a second test group, and a pixel array. The first test set includes a first test pad, and the first test pad of the first test set is electrically connected to the first drive unit. The second test set includes a first test pad, and the first test pad of the second test set is electrically connected to the second drive unit, and is electrically connected to the first test pad of the corresponding first test group. The pixel array includes a first signal line. The first signal line is electrically connected between the first driving unit and the second driving unit.

根據本揭露之又一實施例,提出一種陣列基板的測試方法。方法包括下列步驟。首先,提供如上所述之陣列基板。此後,將一測試接頭與第一測試組接觸以將多個測試訊號提供至畫素陣列。According to still another embodiment of the present disclosure, a test method for an array substrate is proposed. The method includes the following steps. First, an array substrate as described above is provided. Thereafter, a test connector is contacted with the first test set to provide a plurality of test signals to the pixel array.

為了對本發明之上述及其他方面有更佳的瞭解,下文特舉實施例,並配合所附圖式詳細說明如下:In order to better understand the above and other aspects of the present invention, the following detailed description of the embodiments and the accompanying drawings

關於本文中所使用之『電性連接』,可指二或多個元件相互直接作實體或電性接觸,或是相互間接作實體或電性接觸,間接作實體或電性接觸之方式舉例為二元件間藉由中間元件作實體或電性接觸,上述中間元件可為開關(例如薄膜電晶體)或是電阻、電容等元件,而『電性連接』還可指二或多個元件相互操作或動作。The term "electrical connection" as used herein may mean that two or more elements are in direct physical or electrical contact with each other, or are indirectly in physical or electrical contact with each other. Indirect physical or electrical contact is exemplified as The two components can be physically or electrically contacted by an intermediate component. The intermediate component can be a switch (such as a thin film transistor) or a resistor, a capacitor, etc., and the "electrical connection" can also mean that two or more components operate with each other. Or action.

本揭露提供一種陣列基板及其陣列基板測試方法。本揭露之陣列基板包括電性連接於第一驅動單元的第一測試組之第一測試墊以及電性連接於第二驅動單元的第二測試組之第一測試墊,且第一測試組之第一測試墊可電性連接於第二測試組之第一測試墊,如此僅需單側提供一訊號給第一測試組之第一測試墊,而可不需額外提供測試訊號給第二測試組之第一測試墊,即可將此訊號傳送至第二測試組之第一測試墊,不會讓畫素區域之中央區域產生電力不足的問題,故能夠有效地進行畫素陣列之測試。The present disclosure provides an array substrate and an array substrate testing method thereof. The array substrate of the present disclosure includes a first test pad electrically connected to the first test group of the first driving unit and a first test pad electrically connected to the second test group of the second driving unit, and the first test group The first test pad can be electrically connected to the first test pad of the second test group, so that only one signal is provided on one side to the first test pad of the first test group, and no additional test signal is needed for the second test group. The first test pad can transmit the signal to the first test pad of the second test group, and does not cause the problem of insufficient power in the central region of the pixel region, so that the pixel array can be effectively tested.

第1圖繪示依照本揭露之一實施例的陣列基板10的上視圖。FIG. 1 is a top view of an array substrate 10 in accordance with an embodiment of the present disclosure.

請參照第1圖,陣列基板10可包括基底100、第一測試組110、第二測試組120、第三測試組130、第四測試組140、畫素陣列160以及連接結構170。第一測試組110、第二測試組120、第三測試組130、第四測試組140、畫素陣列160以及連接結構170位於基底100上。基底100例如是玻璃基底或是塑膠基底。Referring to FIG. 1 , the array substrate 10 may include a substrate 100 , a first test group 110 , a second test group 120 , a third test group 130 , a fourth test group 140 , a pixel array 160 , and a connection structure 170 . The first test group 110, the second test group 120, the third test group 130, the fourth test group 140, the pixel array 160, and the connection structure 170 are located on the substrate 100. The substrate 100 is, for example, a glass substrate or a plastic substrate.

第一測試組110包括第一測試墊112(例如是第一測試墊1121、1122…)及第二測試墊114(例如是第二測試墊1141、1142…)。第一測試組110之第一測試墊112(例如是第一測試墊1121、1122…)電性連接於第一驅動單元151。第二測試組120包括第一測試墊122(例如是第一測試墊1221、1222…) 及第二測試墊124(例如是第二測試墊1241、1242…)。第二測試組120之第一測試墊122(例如是第一測試墊1221、1222…)電性連接於第二驅動單元152,並分別電性連接於對應的第一測試組110之第一測試墊112(例如是第一測試墊1121、1122…)。亦即,第一測試組110之第一測試墊1121可電性連接於第二測試組120之第一測試墊1221,第一測試組110之第一測試墊1122可電性連接於第二測試組120之第一測試墊1222。第一測試組110與第二測試組120可分別更包括虛置測試墊(未繪示)。第三測試組130與第四測試組140可類似於第一測試組110與第二測試組120並藉由另一連接結構彼此對應的電性連接,亦即第三測試組130的測試墊分別與第四測試組140之對應的測試墊電性連接,在此不贅述。The first test set 110 includes a first test pad 112 (eg, a first test pad 1121, 1122, ...) and a second test pad 114 (eg, a second test pad 1141, 1142, ...). The first test pads 112 of the first test group 110 (for example, the first test pads 1121, 1122, ...) are electrically connected to the first driving unit 151. The second test set 120 includes a first test pad 122 (eg, a first test pad 1221, 1222...) and a second test pad 124 (eg, a second test pad 1241, 1242...). The first test pads 122 of the second test group 120 (eg, the first test pads 1221, 1222, ...) are electrically connected to the second driving unit 152 and electrically connected to the first test of the corresponding first test group 110, respectively. Pad 112 (eg, first test pads 1121, 1122...). That is, the first test pad 1121 of the first test group 110 can be electrically connected to the first test pad 1221 of the second test group 120, and the first test pad 1122 of the first test group 110 can be electrically connected to the second test. The first test pad 1222 of group 120. The first test group 110 and the second test group 120 may further include a dummy test pad (not shown). The third test group 130 and the fourth test group 140 are similar to the first test group 110 and the second test group 120 and are electrically connected to each other by another connection structure, that is, the test pads of the third test group 130 are respectively The test pads corresponding to the fourth test group 140 are electrically connected, and are not described herein.

畫素陣列160可包括第一訊號線161及第二訊號線162,為方便說明及觀察,第1圖省略繪製部分第一訊號線161及部分第二訊號線162,更省略繪製畫素結構,畫素陣列160可為本技術領域人士所周知之應用於顯示面板之薄膜電晶體畫素陣列。第一訊號線161可以是掃描線,電性連接於第一驅動單元151與第二驅動單元152之間。第一驅動單元151與第二驅動單元152可均為閘極驅動電路。舉例而言,第一驅動單元151可電性連接於第一訊號線1611與第一測試墊1121之間。第二驅動單元152可電性連接於第一訊號線1611與第一測試墊1221之間。每條第一訊號線161沿著X方向延伸,且多條第一訊號線1611、1612、1613、1614、…沿著Y方向彼此排列。第二訊號線162可以是資料線。多條第二訊號線1621、1622、1623、1624、…可分別電性連接於對應的第二測試墊1141、1142…、1241、1242、…。第二訊號線162可電性連接於第三驅動單元153(例如是源極驅動電路),第三驅動單元153可電性連接於第一電路板105(例如是軟性電路板),且第一電路板105可電性連接於第二電路板107(例如是硬式電路板)。每條第二訊號線162沿著Y方向延伸,且多條第二訊號線1621、1622、1623、1624、…沿著X方向彼此排列。X方向可垂直於Y方向。在一實施例中,每個第一測試墊112及122可透過第一驅動單元151與第二驅動單元152分別電性連接於多條第一訊號線161。每個第二測試墊114及124可分別電性連接於多條第二訊號線162。在本實施例中,第三驅動單元153、第一電路板105及第二電路板107可以設置於畫素陣列160的第一側160a。第一測試組110、第二測試組120、第三測試組130及第四測試組140可設置於顯示面板之對向基板(例如是彩色濾光板;未繪示)所欲覆蓋之範圍之外,且例如是可設置於畫素陣列160的第二側160b。第二側160b可相對於第一側160a。在其他實施例中,第一測試組110、第二測試組120、第三測試組130、第四測試組140、第三驅動單元153、第一電路板105及第二電路板107可設置於畫素陣列160的第一側160a。The pixel array 160 may include a first signal line 161 and a second signal line 162. For convenience of explanation and observation, the first picture omits the drawing of the first signal line 161 and the part of the second signal line 162, and the drawing of the pixel structure is omitted. The pixel array 160 can be a thin film transistor pixel array that is well known to those skilled in the art for use in display panels. The first signal line 161 can be a scan line electrically connected between the first driving unit 151 and the second driving unit 152. The first driving unit 151 and the second driving unit 152 may both be gate driving circuits. For example, the first driving unit 151 can be electrically connected between the first signal line 1611 and the first test pad 1121. The second driving unit 152 is electrically connected between the first signal line 1611 and the first test pad 1221. Each of the first signal lines 161 extends along the X direction, and the plurality of first signal lines 1611, 1612, 1613, 1614, . . . are arranged along the Y direction. The second signal line 162 can be a data line. The plurality of second signal lines 1621, 1622, 1623, 1624, ... can be electrically connected to the corresponding second test pads 1141, 1142, ..., 1241, 1242, ..., respectively. The second signal line 162 is electrically connected to the third driving unit 153 (for example, a source driving circuit), and the third driving unit 153 is electrically connected to the first circuit board 105 (for example, a flexible circuit board), and the first The circuit board 105 can be electrically connected to the second circuit board 107 (for example, a hard circuit board). Each of the second signal lines 162 extends in the Y direction, and the plurality of second signal lines 1621, 1622, 1623, 1624, ... are arranged along the X direction. The X direction can be perpendicular to the Y direction. In an embodiment, each of the first test pads 112 and 122 is electrically connected to the plurality of first signal lines 161 through the first driving unit 151 and the second driving unit 152 respectively. Each of the second test pads 114 and 124 can be electrically connected to the plurality of second signal lines 162, respectively. In this embodiment, the third driving unit 153, the first circuit board 105, and the second circuit board 107 may be disposed on the first side 160a of the pixel array 160. The first test group 110, the second test group 120, the third test group 130, and the fourth test group 140 may be disposed outside the range of the opposite substrate (for example, a color filter; not shown) of the display panel. And, for example, it can be disposed on the second side 160b of the pixel array 160. The second side 160b can be opposite the first side 160a. In other embodiments, the first test group 110, the second test group 120, the third test group 130, the fourth test group 140, the third driving unit 153, the first circuit board 105, and the second circuit board 107 may be disposed on The first side 160a of the pixel array 160.

連接結構170可至少連接於對應之兩個第一測試墊之間。例如,連接結構170可將第一測試組110之第一測試墊1121以及第二測試組120之第一測試墊1221電性連接,亦可將第一測試組110之第一測試墊1122以及第二測試組120之第一測試墊1222電性連接。連接結構170可包括彼此電性連接之控制墊1711、1712、導線1721、1722、1723及開關1731、1732、1733、1734。導線1721、1722、1723可由金屬所組成。開關1731、1732、1733、1734可以是薄膜電晶體。舉例而言,第一測試組110之第一測試墊1121是透過開關1731、導線1721、開關1733電性連接於第二測試組120之第一測試墊1221。第一測試組110之第一測試墊1122是透過開關1732、導線1722、開關1734電性連接於第二測試組120之第一測試墊1222。開關1731、1732、1733、1734之閘極可藉由導線1723彼此電性連接,並電性連接於控制墊1711與1712。在一實施例中,若開關訊號被施加於控制墊1711或1712,可一併開啟開關1731、1732、1733、1734,讓施加於第一測試組110之第一測試墊1121的訊號能夠藉由開關1731、導線1721及開關1733傳送給第二測試組120之第一測試墊1221,或者讓施加於第二測試組120之第一測試墊1221的訊號能夠藉由開關1733、導線1721及開關1731傳送給第一測試組110之第一測試墊1121;亦可讓施加於第一測試組110之第一測試墊1122的訊號能夠藉由開關1732、導線1722及開關1734傳送給第二測試組120之第一測試墊1222,或者讓施加於第二測試組120之第一測試墊1222的訊號能夠藉由開關1734、導線1722及開關1732傳送給第一測試組110之第一測試墊1122。在一實施例中,控制墊1713可鄰近於第三測試組130,並電性連接於第三測試組130之開關(未繪示),控制墊1714可鄰近於第四測試組140,並電性連接於第四測試組140之開關(未繪示)。控制墊1711舉例係位於第一測試組110及第三測試組130之間,控制墊1713及控制墊1714舉例係位於第三測試組130及第四測試組140之間,控制墊1712舉例係位於第四測試組140及第二測試組120之間。控制墊1713及控制墊1714與其他元件之電性連接關係可參考前述說明,在此不贅述。The connection structure 170 can be connected between at least two corresponding first test pads. For example, the connection structure 170 can electrically connect the first test pad 1121 of the first test group 110 and the first test pad 1221 of the second test group 120, or the first test pad 1122 of the first test group 110 and the The first test pads 1222 of the second test group 120 are electrically connected. The connection structure 170 can include control pads 1711, 1712, wires 1721, 1722, 1723 and switches 1731, 1732, 1733, 1734 electrically connected to each other. The wires 1721, 1722, 1723 can be composed of metal. The switches 1731, 1732, 1733, 1734 can be thin film transistors. For example, the first test pad 1121 of the first test group 110 is electrically connected to the first test pad 1221 of the second test group 120 through the switch 1731, the wire 1721, and the switch 1733. The first test pad 1122 of the first test group 110 is electrically connected to the first test pad 1222 of the second test group 120 through the switch 1732, the wire 1722, and the switch 1734. The gates of the switches 1731, 1732, 1733, and 1734 are electrically connected to each other by wires 1723 and electrically connected to the control pads 1711 and 1712. In an embodiment, if the switching signal is applied to the control pad 1711 or 1712, the switches 1731, 1732, 1733, and 1734 can be turned on together, so that the signal applied to the first test pad 1121 of the first test group 110 can be The switch 1731, the wire 1721 and the switch 1733 are transmitted to the first test pad 1221 of the second test group 120, or the signal applied to the first test pad 1221 of the second test group 120 can be passed through the switch 1733, the wire 1721 and the switch 1731. The signal is transmitted to the first test pad 1121 of the first test group 110; the signal applied to the first test pad 1122 of the first test group 110 can also be transmitted to the second test group 120 by the switch 1732, the wire 1722 and the switch 1734. The first test pad 1222 or the signal applied to the first test pad 1222 of the second test set 120 can be transmitted to the first test pad 1122 of the first test set 110 by the switch 1734, the wire 1722 and the switch 1732. In one embodiment, the control pad 1713 can be adjacent to the third test group 130 and electrically connected to the switch (not shown) of the third test group 130. The control pad 1714 can be adjacent to the fourth test group 140 and electrically The switch is connected to the fourth test group 140 (not shown). The control pad 1711 is located between the first test group 110 and the third test group 130. The control pad 1713 and the control pad 1714 are located between the third test group 130 and the fourth test group 140. The control pad 1712 is located in the example. Between the fourth test group 140 and the second test group 120. For the electrical connection relationship between the control pad 1713 and the control pad 1714 and other components, reference may be made to the foregoing description, and details are not described herein.

本揭露之一實施例提供之陣列基板10具有位於畫素陣列160之相對二側(例如是左側與右側)的第一驅動單元151及第二驅動單元152,藉由連接結構170使得第一測試組110之第一測試墊112可分別電性連接於對應的第二測試組120之第一測試墊122,故可將第一驅動單元151及第二驅動單元152之驅動訊號串連在一起。若是僅驅動對應於第一測試組110的一側進行測試時,亦即當透過第一驅動單元151傳送訊號於第一訊號線1611之一端,同樣之訊號亦可藉由連接結構170傳送至對應於第二測試組120的一側,並透過第二驅動單元152傳送至對應的第一訊號線1611之另一端,故不會有訊號衰減的問題。The array substrate 10 provided by one embodiment of the present disclosure has a first driving unit 151 and a second driving unit 152 on opposite sides (for example, the left side and the right side) of the pixel array 160, and the first test is performed by the connection structure 170. The first test pads 112 of the group 110 can be electrically connected to the first test pads 122 of the corresponding second test group 120, so that the driving signals of the first driving unit 151 and the second driving unit 152 can be connected in series. If only one side of the first test group 110 is driven for testing, that is, when the signal is transmitted through the first driving unit 151 to one end of the first signal line 1611, the same signal can also be transmitted to the corresponding interface by the connection structure 170. On one side of the second test group 120, and transmitted to the other end of the corresponding first signal line 1611 through the second driving unit 152, there is no problem of signal attenuation.

舉例而言,當施加第一測試訊號於第一測試組110之第一測試墊1121時,第一測試訊號可藉由第一驅動單元151驅動第一訊號線161(例如是1611),且第一測試訊號可藉由連接結構170傳送給第二測試組120之第一測試墊1221,再透過第二驅動單元152驅動對應的第一訊號線161(例如是1611),使得整條第一訊號線(例如是1611)皆充分獲得第一測試訊號,並傳送至畫素陣列中所對應連接的每個電晶體(未繪示)。當施加第二測試訊號於第一測試組110之第一測試墊1122時,第二測試訊號可藉由第一驅動單元151驅動第一訊號線161(例如是1612),且第二測試訊號可藉由連接結構170傳送給第二測試組120之第一測試墊1222,再透過第二驅動單元152驅動對應的第一訊號線161(例如是1612),使得整條第一訊號線(例如是1612)皆充分獲得第二測試訊號,並傳送至畫素陣列中所對應連接的每個電晶體(未繪示)。如此一來,便可避免單側驅動所造成之畫素陣列之中央區域由於推力不足而產生衰減區之問題,使得位於另一側之畫素陣列能夠正常驅動,故可確實進行陣列測試。For example, when the first test signal is applied to the first test pad 1121 of the first test group 110, the first test signal can drive the first signal line 161 (for example, 1611) by the first driving unit 151, and A test signal can be transmitted to the first test pad 1221 of the second test group 120 through the connection structure 170, and then the corresponding first signal line 161 (for example, 1611) can be driven through the second drive unit 152, so that the entire first signal is The line (for example, 1611) fully obtains the first test signal and transmits it to each of the transistors (not shown) corresponding to the connected pixels in the pixel array. When the second test signal is applied to the first test pad 1122 of the first test group 110, the second test signal can drive the first signal line 161 (for example, 1612) by the first driving unit 151, and the second test signal can be The first test pad 1222 of the second test group 120 is transmitted by the connection structure 170, and the corresponding first signal line 161 (for example, 1612) is driven by the second driving unit 152, so that the entire first signal line (for example, 1612) fully obtain the second test signal and transmit it to each transistor (not shown) corresponding to the connected pixel array. In this way, the problem that the central region of the pixel array caused by the one-sided driving has an attenuation region due to insufficient thrust can be avoided, so that the pixel array on the other side can be normally driven, so that the array test can be performed.

此外,相較於沒有設置開關及控制墊的實施例而言,本揭露之一實施例的連接結構170包括開關1731、1732、1733、1734及控制墊1711、1712,可提供訊號控制方面更多的選擇性。當陣列測試完成之後,可選擇保留導線1721、1722於基底100上,或者將導線1721、1722切除,之後再進行顯示面板的後續製程。相較於切除導線的比較例而言,保留導線1721、1722於基底100上的實施例可避免切割邊緣露出導線,而產生腐蝕的問題。In addition, the connection structure 170 of one embodiment of the present disclosure includes switches 1731, 1732, 1733, 1734 and control pads 1711, 1712, which can provide more signal control than the embodiment in which the switch and the control pad are not provided. The selectivity. After the array test is completed, the wires 1721, 1722 may be left on the substrate 100, or the wires 1721, 1722 may be cut off, and then the subsequent process of the display panel is performed. The embodiment of retaining the wires 1721, 1722 on the substrate 100 avoids the problem of corrosion causing the cut edges to expose the wires as compared to the comparative example of the cut wires.

第2圖繪示依照本揭露之又一實施例的陣列基板20的上視圖。陣列基板20類似於陣列基板10,其不同之處在於連接結構270為導線270,陣列基板20之連接結構270並不具有控制墊及開關。FIG. 2 is a top view of the array substrate 20 in accordance with still another embodiment of the present disclosure. The array substrate 20 is similar to the array substrate 10 except that the connection structure 270 is a wire 270, and the connection structure 270 of the array substrate 20 does not have a control pad and a switch.

請參照第2圖,第一測試組210、第二測試組220、第三測試組230及第四測試組240可分別類似於陣列基板10之第一測試組110、第二測試組120、第三測試組130及第四測試組140。連接結構270包括導線2721及2122。導線2721及2122可分別類似於陣列基板10之導線1721及1722。第一測試組210之第一測試墊2121電性連接於第二測試組220之第一測試墊2221。第一測試組210之第一測試墊2122電性連接於第二測試組220之第一測試墊2222。當施加第一測試訊號於第一測試組210之第一測試墊2121時,第一測試訊號可藉由第一驅動單元151驅動第一訊號線161(例如是1611),且第一測試訊號可藉由連接結構(例如是導線2721)傳送給第二測試組220之第一測試墊2221,再透過第二驅動單元152驅動對應的第一訊號線161(例如是1611),使得整條第一訊號線(例如是1611)皆充分獲得第一測試訊號,並傳送至畫素陣列中所對應連接的每個電晶體(未繪示)。當施加第二測試訊號於第一測試組210之第一測試墊2122時,第一測試訊號可藉由第一驅動單元151驅動第一訊號線161(例如是1612),且第二測試訊號可藉由連接結構(例如是導線2722)傳送給第二測試組220之第一測試墊2222,再透過第二驅動單元152驅動對應的第一訊號線161(例如是1612),使得整條第一訊號線(例如是1612)皆充分獲得第二測試訊號,並傳送至畫素陣列中所對應連接的每個電晶體(未繪示)。如此便可避免單側驅動所造成之畫素陣列之中央區域開始由於推力不足所產生之衰減區,使得另一側之畫素陣列能夠正常驅動,故可確實進行陣列測試。Referring to FIG. 2, the first test group 210, the second test group 220, the third test group 230, and the fourth test group 240 may be similar to the first test group 110, the second test group 120, and the first array substrate 10, respectively. The third test group 130 and the fourth test group 140. Connection structure 270 includes wires 2721 and 2122. The wires 2721 and 2122 can be similar to the wires 1721 and 1722 of the array substrate 10, respectively. The first test pad 2121 of the first test group 210 is electrically connected to the first test pad 2221 of the second test group 220. The first test pad 2122 of the first test group 210 is electrically connected to the first test pad 2222 of the second test group 220. When the first test signal is applied to the first test pad 2121 of the first test group 210, the first test signal can drive the first signal line 161 (for example, 1611) by the first driving unit 151, and the first test signal can be The first test pad 2221 of the second test group 220 is transmitted to the second test unit 220 by the connection structure (for example, the wire 2721), and the corresponding first signal line 161 (for example, 1611) is driven by the second drive unit 152, so that the entire first The signal line (for example, 1611) fully obtains the first test signal and transmits it to each transistor (not shown) corresponding to the connected pixel array. When the second test signal is applied to the first test pad 2122 of the first test group 210, the first test signal can be driven by the first driving unit 151 to drive the first signal line 161 (for example, 1612), and the second test signal can be The first test pad 2222 of the second test group 220 is transmitted to the second test unit 220 by the connection structure (for example, the wire 2722), and the corresponding first signal line 161 (for example, 1612) is driven by the second drive unit 152, so that the entire first The signal line (for example, 1612) sufficiently obtains the second test signal and transmits it to each of the transistors (not shown) connected to the pixel array. In this way, the central region of the pixel array caused by the one-side driving can be prevented from starting the attenuation region due to insufficient thrust, so that the pixel array on the other side can be normally driven, so that the array test can be performed.

第3A~3C圖繪示依照本揭露之一實施例的陣列基板10的測試方法的側視圖。3A-3C are side views showing a test method of the array substrate 10 in accordance with an embodiment of the present disclosure.

請參照第3A圖,提供如第1圖所示之實施例的陣列基板10。提供欲對陣列基板10進行測試的第一測試接頭310或第二測試接頭320。第一測試接頭310包括第一組測試探針312及第二組測試探針314。第二測試接頭320包括第一組測試探針322及第二組測試探針324。在本步驟中,可僅提供第一測試接頭310或僅提供第二測試接頭320。Referring to FIG. 3A, an array substrate 10 of the embodiment shown in FIG. 1 is provided. A first test joint 310 or a second test joint 320 to be tested on the array substrate 10 is provided. The first test connector 310 includes a first set of test probes 312 and a second set of test probes 314. The second test joint 320 includes a first set of test probes 322 and a second set of test probes 324. In this step, only the first test joint 310 or only the second test joint 320 may be provided.

請參照第3B圖,第一測試接頭310往陣列基板10靠近,並與第一測試組110及第三測試組130接觸,例如是將第一組測試探針312及第二組測試探針314分別接觸於第一測試組110及第三測試組130,施加多個測試訊號並提供至畫素陣列160(繪示於第1圖)。在一實施例中,第一組測試探針312提供第一測試訊號至第一測試組110之第一測試墊1121,此第一測試訊號可藉由第一驅動單元151傳送至畫素陣列160中的第一訊號線1611之一端,並可藉由連接結構170傳送至第二測試組120之第一測試墊1221,再透過第二驅動單元152傳送至對應的第一訊號線1611之另一端(繪示於第1圖)。第一組測試探針312提供第二測試訊號至第一測試組110之第一測試墊1122,此第二測試訊號可藉由第一驅動單元151傳送至畫素陣列160中的第一訊號線1612之一端,並可藉由連接結構170傳送至第二測試組120之第一測試墊1222,再透過第二驅動單元152傳送至對應的第一訊號線1612之另一端(繪示於第1圖)。Referring to FIG. 3B , the first test connector 310 approaches the array substrate 10 and is in contact with the first test group 110 and the third test group 130 , for example, the first set of test probes 312 and the second set of test probes 314 . Contacting the first test group 110 and the third test group 130 respectively, a plurality of test signals are applied and provided to the pixel array 160 (shown in FIG. 1). In an embodiment, the first test probe 312 provides the first test signal to the first test pad 1121 of the first test group 110. The first test signal can be transmitted to the pixel array 160 by the first driving unit 151. One end of the first signal line 1611 can be transmitted to the first test pad 1221 of the second test group 120 through the connection structure 170, and then transmitted to the other end of the corresponding first signal line 1611 through the second drive unit 152. (pictured in Figure 1). The first test probe 312 provides a second test signal to the first test pad 1122 of the first test group 110. The second test signal can be transmitted to the first signal line in the pixel array 160 by the first driving unit 151. One end of 1612 can be transmitted to the first test pad 1222 of the second test group 120 through the connection structure 170, and then transmitted to the other end of the corresponding first signal line 1612 through the second drive unit 152 (shown on the first Figure).

在本實施例中,陣列基板10可包括連接結構170,連接結構170可包括彼此電性連接之控制墊1711、1712、導線1721、1722、1723及開關1731、1732、1733、1734(繪示於第1圖中)。在一實施例中,第一測試接頭310可提供一開關訊號於控制墊1711或1713,一併開啟開關1731、1732、1733、1734,使導線1721可電性連接對應之兩個第一測試墊(例如是1121及1221)之間。在其他實施例中,陣列基板之連接結構可為至少一導線,並不包括控制墊及開關(如第2圖之陣列基板20),第一測試接頭310僅透過第一組測試探針312及第二組測試探針314提供測試訊號於第一測試組及第三測試組,並不會提供開關訊號於陣列基板。In this embodiment, the array substrate 10 can include a connection structure 170, and the connection structure 170 can include control pads 1711, 1712, wires 1721, 1722, 1723, and switches 1731, 1732, 1733, 1734 electrically connected to each other (shown in Figure 1). In one embodiment, the first test connector 310 can provide a switching signal to the control pad 1711 or 1713, and simultaneously turn on the switches 1731, 1732, 1733, and 1734, so that the wire 1721 can be electrically connected to the corresponding two first test pads. (for example, between 1121 and 1221). In other embodiments, the connection structure of the array substrate may be at least one wire, and does not include a control pad and a switch (such as the array substrate 20 of FIG. 2). The first test connector 310 only passes through the first set of test probes 312 and The second set of test probes 314 provides test signals to the first test group and the third test set, and does not provide switching signals to the array substrate.

請參照第3C圖,若不使用第一測試接頭310進行測試,可利用第二測試接頭320往陣列基板靠近10,並與第二測試組120及第四測試組140接觸,例如是將第一組測試探針322及第二組測試探針324分別接觸於第四測試組140及第二測試組120,施加多個測試訊號並提供至畫素陣列160(繪示於第1圖)。在一實施例中,第二組測試探針324提供第三測試訊號至第二測試組120之第一測試墊1221,此第三測試訊號可藉由第二驅動單元152傳送至畫素陣列160中的第一訊號線1611之一端,並可透過連接結構170傳送至第一測試組110之第一測試墊1121,再透過第一驅動單元151傳送至對應的第一訊號線1611之另一端(繪示於第1圖)。第二組測試探針324提供第四測試訊號至第二測試組120之第一測試墊1222,此第四測試訊號可藉由第二驅動單元152傳送至畫素陣列160中的第一訊號線1612之一端,並可透過連接結構170傳送至第一測試組120之第一測試墊1122,再透過第一驅動單元151傳送至對應的第一訊號線1612之另一端(繪示於第1圖)。Referring to FIG. 3C, if the first test connector 310 is not used for testing, the second test connector 320 can be used to approach the array substrate 10 and contact the second test group 120 and the fourth test group 140, for example, the first The set of test probes 322 and the second set of test probes 324 are in contact with the fourth test set 140 and the second test set 120, respectively, and a plurality of test signals are applied and provided to the pixel array 160 (shown in FIG. 1). In one embodiment, the second set of test probes 324 provides a third test signal to the first test pad 1221 of the second test set 120. The third test signal can be transmitted to the pixel array 160 by the second drive unit 152. One end of the first signal line 1611 can be transmitted to the first test pad 1121 of the first test group 110 through the connection structure 170, and then transmitted to the other end of the corresponding first signal line 1611 through the first drive unit 151 ( Shown in Figure 1). The second set of test probes 324 provides a fourth test signal to the first test pad 1222 of the second test group 120. The fourth test signal can be transmitted to the first signal line in the pixel array 160 by the second driving unit 152. One end of 1612 can be transmitted to the first test pad 1122 of the first test group 120 through the connection structure 170, and then transmitted to the other end of the corresponding first signal line 1612 through the first drive unit 151 (shown in FIG. 1 ).

在本實施例中,第二測試接頭320可提供一開關訊號於控制墊1712或1714,一併開啟開關1731、1732、1733、1734,使導線1722可電性連接對應之兩個第一測試墊(例如是1122及1222)之間(繪示於第1圖中)。在其他實施例中,陣列基板之連接結構可為至少一導線,並不包括控制墊及開關(如第2圖之陣列基板20),第二測試接頭320僅透過第一組測試探針322及第二組測試探針324提供測試訊號於第二測試組及第四測試組,並不會提供開關訊號於陣列基板。In this embodiment, the second test connector 320 can provide a switching signal to the control pad 1712 or 1714, and simultaneously open the switches 1731, 1732, 1733, and 1734, so that the wires 1722 can be electrically connected to the corresponding two first test pads. (for example, between 1122 and 1222) (shown in Figure 1). In other embodiments, the connection structure of the array substrate can be at least one wire, and does not include a control pad and a switch (such as the array substrate 20 of FIG. 2). The second test connector 320 only passes through the first set of test probes 322 and The second set of test probes 324 provide test signals to the second test set and the fourth test set and do not provide switching signals to the array substrate.

本揭露之一實施例提供陣列基板及其測試方法。本揭露之一實施例之陣列基板具有第一驅動單元及第二驅動單元,藉由將第一測試組之第一測試墊分別電性連接於對應的第二測試組之第一測試墊,故可將第一驅動單元及第二驅動單元之驅動訊號串連在一起。當進行單側驅動時,另一側之驅動單元亦可同時傳送訊號,如此便可避免單側驅動所造成之畫素陣列之中央區域開始由於推力不足所產生之衰減區,使得另一側之畫素陣列能夠正常驅動,故可確實進行陣列測試。One embodiment of the present disclosure provides an array substrate and a test method therefor. The array substrate of one embodiment of the present invention has a first driving unit and a second driving unit. The first test pads of the first test group are electrically connected to the first test pads of the corresponding second test group. The driving signals of the first driving unit and the second driving unit may be connected in series. When the single-side driving is performed, the driving unit on the other side can also transmit signals at the same time, so that the central region of the pixel array caused by the one-side driving can be prevented from starting the attenuation region due to insufficient thrust, so that the other side The pixel array can be driven normally, so the array test can be performed.

本揭露之一實施例提供陣列基板之測試方法。本揭露之一實施例之陣列基板之測試方法,藉由將第一測試組之第一測試墊分別電性連接於對應的第二測試組之第一測試墊,故可將第一驅動單元及第二驅動單元之驅動訊號串連在一起,在進行測試動作時,可僅利用單個測試接頭與第一測試組110及/或第三測試組130接觸而不需與第四測試組140或第二測試組120接觸,或是僅利用單個測試接頭與第四測試組140及/或第二測試組120接觸而不需與第一測試組110及第三測試組130接觸,如此一來,避免使用多個測試接頭無法同時下針的問題,另一方面,可大幅減少測試步驟及時間,加快測試速度。One embodiment of the present disclosure provides a method of testing an array substrate. The method for testing an array substrate according to an embodiment of the present invention, wherein the first test pad of the first test group is electrically connected to the first test pad of the corresponding second test group, respectively, The driving signals of the second driving unit are connected together, and when the testing operation is performed, only the single test connector can be used to contact the first test group 110 and/or the third test group 130 without being associated with the fourth test group 140 or the first test group. The two test groups 120 are in contact, or only the single test connector is used to contact the fourth test group 140 and/or the second test group 120 without contacting the first test group 110 and the third test group 130, thus avoiding The problem of not being able to simultaneously lower the needle with multiple test joints, on the other hand, can greatly reduce the test steps and time and speed up the test.

綜上所述,雖然本發明已以實施例揭露如上,然其並非用以限定本發明。本發明所屬技術領域中具有通常知識者,在不脫離本發明之精神和範圍內,當可作各種之更動與潤飾。因此,本發明之保護範圍當視後附之申請專利範圍所界定者為準。In conclusion, the present invention has been disclosed in the above embodiments, but it is not intended to limit the present invention. A person skilled in the art can make various changes and modifications without departing from the spirit and scope of the invention. Therefore, the scope of the invention is defined by the scope of the appended claims.

10、20‧‧‧陣列基板10, 20‧‧‧ array substrate

100‧‧‧基底 100‧‧‧Base

105‧‧‧第一電路板 105‧‧‧First board

107‧‧‧第二電路板 107‧‧‧Second circuit board

110‧‧‧第一測試組 110‧‧‧First Test Group

112、122、212、222、1121、1122…、1221、1222…、2121、2122…、2221、2222…‧‧‧第一測試墊 112, 122, 212, 222, 1121, 1122, ..., 1221, 1222, ..., 2121, 2122, ..., 2221, 2222...‧‧‧ first test pad

114、1141、1142…、124、1241、1242…‧‧‧第二測試墊 114, 1141, 1142..., 124, 1241, 1242...‧‧‧second test pad

120‧‧‧第二測試組 120‧‧‧Second test group

130‧‧‧第三測試組 130‧‧‧The third test group

140‧‧‧第四測試組 140‧‧‧Fourth Test Group

151‧‧‧第一驅動單元 151‧‧‧First drive unit

152‧‧‧第二驅動單元 152‧‧‧Second drive unit

153‧‧‧第三驅動單元 153‧‧‧3rd drive unit

160‧‧‧畫素陣列 160‧‧‧ pixel array

160a‧‧‧第一側 160a‧‧‧ first side

160b‧‧‧第二側 160b‧‧‧ second side

161、1611、1612、1613、1614…‧‧‧第一訊號線 161, 1611, 1612, 1613, 1614...‧‧‧ first signal line

162、1621、1622、1623、1624…‧‧‧第二訊號線 162, 1621, 1622, 1623, 1624...‧‧‧second signal line

170‧‧‧連接結構 170‧‧‧ Connection structure

310‧‧‧第一測試接頭 310‧‧‧First test connector

320‧‧‧第二測試接頭 320‧‧‧Second test connector

312、322‧‧‧第一組測試探針 312, 322‧‧‧First set of test probes

314、324‧‧‧第二組測試探針 314, 324‧‧‧Second test probes

1711、1712、1713、1714‧‧‧控制墊 1711, 1712, 1713, 1714‧‧‧ control pads

1721、1722、1723‧‧‧導線 1721, 1722, 1723‧‧‧ wires

1731、1732、1733、1734‧‧‧開關 1731, 1732, 1733, 1734‧‧ switch

第1圖繪示依照本揭露之一實施例的陣列基板的上視圖。 第2圖繪示依照本揭露之又一實施例的陣列基板的上視圖。 第3A~3C圖繪示依照本揭露之一實施例的陣列基板的測試方法的側視圖。FIG. 1 is a top view of an array substrate in accordance with an embodiment of the present disclosure. FIG. 2 is a top view of an array substrate according to still another embodiment of the present disclosure. 3A-3C are side views showing a test method of an array substrate according to an embodiment of the present disclosure.

Claims (5)

一種陣列基板,包括:一第一測試組,該第一測試組包括多個第一測試墊,該第一測試組之該些第一測試墊電性連接於一第一驅動單元;一第二測試組,該第二測試組包括多個第一測試墊,該第二測試組之該些第一測試墊電性連接於一第二驅動單元並分別電性連接於對應的該第一測試組之該些第一測試墊;一畫素陣列,該畫素陣列包括一第一訊號線,該第一訊號線電性連接於該第一驅動單元與該第二驅動單元之間;以及一連接結構,該連接結構至少連接於對應之兩個該第一測試墊之間,其中該連接結構包括彼此電性連接之一控制墊、一導線及一開關,其中對應之兩個該第一測試墊中之一者位於該開關以及該第一驅動單元與該第二驅動單元中之一者之間,其中該控制墊位於該第一測試組及該第二測試組之間。 An array substrate includes: a first test group, the first test set includes a plurality of first test pads, the first test pads of the first test set are electrically connected to a first drive unit; a test group, the second test set includes a plurality of first test pads, the first test pads of the second test set are electrically connected to a second drive unit and electrically connected to the corresponding first test group The first test pad; a pixel array, the pixel array includes a first signal line, the first signal line is electrically connected between the first driving unit and the second driving unit; and a connection a structure, the connection structure is connected between at least two corresponding first test pads, wherein the connection structure comprises one control pad electrically connected to each other, a wire and a switch, wherein the two first test pads are corresponding One of the switches is located between the switch and one of the first drive unit and the second drive unit, wherein the control pad is located between the first test group and the second test group. 如申請專利範圍第1項所述之陣列基板,其中該第一測試組及該第二測試組更分別包括多個第二測試墊;該畫素陣列更包括多個第二訊號線,該些第二訊號線分別電性連接於對應的該些第二測試墊,其中該第一測試組、該第二測試組及該控制墊均位於該畫素陣列之同一側。 The array substrate of claim 1, wherein the first test group and the second test group further comprise a plurality of second test pads; the pixel array further comprises a plurality of second signal lines, The second signal line is electrically connected to the corresponding second test pads, wherein the first test group, the second test group and the control pad are all located on the same side of the pixel array. 如申請專利範圍第1項所述之陣列基板,其中該控制墊、該導線及該開關均位於該畫素陣列之同一側。 The array substrate of claim 1, wherein the control pad, the wire and the switch are located on the same side of the pixel array. 一種陣列基板之測試方法,包括: 提供如申請專利範圍第1項所述之陣列基板;以及將一測試接頭與該第一測試組接觸以將多個測試訊號提供至該畫素陣列。 A method for testing an array substrate, comprising: Providing an array substrate as described in claim 1; and contacting a test connector with the first test group to provide a plurality of test signals to the pixel array. 如申請專利範圍第4項所述之方法,更包括:提供一開關訊號至該控制墊以開啟該開關,使該導線電性連接於對應之兩個第一測試墊之間。 The method of claim 4, further comprising: providing a switching signal to the control pad to turn on the switch to electrically connect the wire between the corresponding two first test pads.
TW107101375A 2018-01-15 2018-01-15 Array substrate and method for testing the same TWI650605B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW107101375A TWI650605B (en) 2018-01-15 2018-01-15 Array substrate and method for testing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW107101375A TWI650605B (en) 2018-01-15 2018-01-15 Array substrate and method for testing the same

Publications (2)

Publication Number Publication Date
TWI650605B true TWI650605B (en) 2019-02-11
TW201932951A TW201932951A (en) 2019-08-16

Family

ID=66213942

Family Applications (1)

Application Number Title Priority Date Filing Date
TW107101375A TWI650605B (en) 2018-01-15 2018-01-15 Array substrate and method for testing the same

Country Status (1)

Country Link
TW (1) TWI650605B (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20080075714A (en) * 2007-02-13 2008-08-19 삼성전자주식회사 Display board
TW200941063A (en) * 2008-03-20 2009-10-01 Chunghwa Picture Tubes Ltd Active device array substrate
CN106157858A (en) * 2016-08-31 2016-11-23 深圳市华星光电技术有限公司 The test circuit of the gate driver circuit of display panels and method of work thereof
CN106526918A (en) * 2016-12-16 2017-03-22 惠科股份有限公司 Display substrate and test method thereof
CN106782256A (en) * 2015-11-18 2017-05-31 上海和辉光电有限公司 A kind of display device with panel test circuit

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20080075714A (en) * 2007-02-13 2008-08-19 삼성전자주식회사 Display board
TW200941063A (en) * 2008-03-20 2009-10-01 Chunghwa Picture Tubes Ltd Active device array substrate
CN106782256A (en) * 2015-11-18 2017-05-31 上海和辉光电有限公司 A kind of display device with panel test circuit
CN106157858A (en) * 2016-08-31 2016-11-23 深圳市华星光电技术有限公司 The test circuit of the gate driver circuit of display panels and method of work thereof
CN106526918A (en) * 2016-12-16 2017-03-22 惠科股份有限公司 Display substrate and test method thereof

Also Published As

Publication number Publication date
TW201932951A (en) 2019-08-16

Similar Documents

Publication Publication Date Title
CN107680481B (en) display device
US10775953B2 (en) In-cell touch display device and methods for testing and manufacturing the same
CN103761935B (en) Display panel
WO2018107612A1 (en) Display substrate and test method thereof
CN106095198B (en) A kind of touch control display apparatus, touch-control display panel and its driving method
WO2016019605A1 (en) Liquid crystal panel detection circuit
CN204577067U (en) A kind of array base palte and display panel
CN101359671B (en) Active array substrate, liquid crystal display panel and method for manufacturing liquid crystal display panel
CN102788946B (en) Transistor characteristic testing structure and testing method using transistor characteristic testing structure
CN101527305A (en) Active element array substrate
CN106652859A (en) Display panel and manufacturing method thereof, display apparatus, and display test method
TWI650605B (en) Array substrate and method for testing the same
TWI383235B (en) Active device array substrate
CN101546774A (en) Active element array substrate
US20160291085A1 (en) Active device array substrate
TWI741721B (en) Conductivity test structure, thin film transistor substrate and display panel
CN101621057B (en) Active assembly array base plate
KR20050006521A (en) Liquid crystal display and test method thereof
TWI387802B (en) Acitve device array substrate and liquid crystal display panel
JP5350475B2 (en) Electronic equipment
TWI421568B (en) Active array substrate, liquid crystal dislay panel and method for manufacturing the liquid crystal dislay panel
US11906835B2 (en) Touch display panel and display device
TWI393942B (en) Active device array substrate
TWI763086B (en) Thin film transistor substate and liquid crystal display panel
KR100529562B1 (en) Liquid Crystal Display with Multiple Repair Lines