TWI647735B - Modeling to establish ion energy associated with the plasma system - Google Patents

Abstract

Disclose systems and methods that determine ion energy. One of the methods includes detecting the output of a generator to identify the generator output complex voltage and current (V & I). The generator is coupled to an impedance matching circuit and the impedance matching circuit is coupled to an electrostatic chuck (ESC). The method further includes from the generator output complex V & I to determine a projected complex V & I at a point along a path, the path being between an output of a model of the impedance matching circuit and a model of the ESC. The step of determining the projection complex V & I is performed using a model of at least one part of the part. The method includes applying the projected complex V & I as a function input to map the projected complex V & I to a wafer bias at the ESC model and determine ion energy from the wafer bias.

Description

Use modeling to establish ion energy associated with plasma systems

The present invention relates to the use of modeling to determine the ion energy associated with a plasma system.

In a system using a plasma, a plasma system is generated in a plasma chamber to perform various steps such as etching, cleaning, deposition, etc. on a wafer. Plasma is monitored and controlled to control the effectiveness of various steps. For example, the plasma is monitored using a bias compensation device for measuring the electrostatic chuck bias in the plasma chamber and a voltage probe provided at the output of the impedance matching circuit for measuring radio frequency (RF) voltage. The plasma is controlled by controlling the amount of RF power supplied to the plasma chamber.

However, the use of bias compensation devices and voltage probes to monitor and control the performance of the steps does not provide satisfactory results. Also, monitoring wafer bias and RF voltages can be expensive and time consuming.

The embodiment described in the present invention is to solve the above problems.

Embodiments of the present invention provide a device, method, and computer program using modeling to determine ion energy associated with a plasma system. It should be understood that embodiments of the present invention may be implemented in many ways as a method, apparatus, system, hardware, or method on a computer-readable medium. Several embodiments will be described below.

A method for determining ion energy is disclosed in some embodiments. The method includes, when a radio frequency (RF) generator is coupled to a plasma chamber through an impedance matching circuit, identifying a first complex voltage and current at an output of the radio frequency generator. The impedance matching circuit has an input coupled to the output of the radio frequency generator and an output coupled to an RF transmission line. The method further includes generating an impedance matching model based on the electronic components defined in the impedance matching circuit, the impedance matching model having an input and an output. The input of the impedance matching model receives the first complex voltage and current. The impedance matching model has one or more components. The method includes transmitting the first complex voltage and current through the elements of the impedance matching model to determine a second complex voltage and current. The method includes: obtaining a peak voltage; determining a wafer bias based on the second complex voltage and current; and determining the ion energy based on the wafer bias and the peak voltage.

A plasma system that determines ion energy is disclosed in various embodiments. The plasma system includes an RF generator for generating a radio frequency (RF) signal. The RF generator is associated with a voltage and current probe. The voltage and current probe is used to measure a first complex voltage and current at an output of the RF generator. The plasma system further includes an impedance matching circuit coupled to the RF generator and a plasma chamber coupled to the impedance matching circuit through an RF transmission line. The impedance matching circuit has an input coupled to the output of the RF generator and an output coupled to the RF transmission line. The plasma system includes a processor coupled to the RF generator. The processor is used for identifying the first complex voltage and current and generating an impedance matching model based on the electronic components defined in the impedance matching circuit. The impedance matching model has an input and an output, and the input of the impedance matching model receives the first complex voltage and current. The impedance matching model has one or more components. The processor is further configured to transmit the first complex voltage and current through the elements of the impedance matching model to determine a second complex voltage and current; obtain a peak voltage; and determine a crystal based on the second complex voltage and current. Circular bias; and determining the ion energy based on the wafer bias and the peak voltage.

Reveal a computer system that determines the energy of ions. The computer system includes a processor for identifying a radio frequency (RF) generator at an output of an RF generator when the radio frequency (RF) generator is coupled to a plasma chamber through an impedance matching circuit. A complex voltage and current. The impedance matching circuit has an input coupled to the output of the radio frequency generator and an output coupled to an RF transmission line. The processor is further configured to generate an impedance matching model based on the electronic components defined in the impedance matching circuit. The impedance matching model has an input and an output. The input of the impedance matching model receives the first complex voltage and current. The impedance matching model has one or more components. The processor is configured to: transmit the first complex voltage and current through the elements of the impedance matching model to determine a second complex voltage and current; obtain a peak voltage; determine a crystal based on the second complex voltage and current Circular bias; and determining the ion energy based on the wafer bias and the peak voltage. The computer system includes a memory coupled to the processor and the memory system is used to store the ion energy.

Some advantages of the above embodiments include that the ion energy can be determined without coupling a voltage probe to the output of the impedance matching circuit and without using a bias compensation device to measure the wafer bias. Voltage probes and bias compensation circuits can be expensive. In contrast, the ion energy can be determined without coupling a voltage probe to the output of the impedance matching circuit and without using a bias compensation circuit. The absence of voltage probes and bias compensation circuits can save costs, time, and effort associated with voltage probes and bias compensation circuits.

In addition, the voltage probe and the bias compensation circuit may malfunction or fail to operate during the manufacturing, processing, and cleaning of the substrate. In contrast, voltage and current probes that follow preset guidelines are more reliable and accurate than voltage probes. When used with model circuits, they can determine radio frequency (RF) voltages, and RF voltages are used to determine wafer bias Pressure. Ion energy is determined based on wafer bias and RF voltage. The ion energy provided by the RF voltage and wafer bias determined by the voltage and current probe is more accurate than the ion energy provided by the electrostatic chuck bias determined by the voltage measured by the voltage probe.

Other aspects of the invention will become apparent with reference to the following drawings and detailed description thereof.

102‧‧‧Method

104‧‧‧Impedance matching model

106‧‧‧ steps

107‧‧‧ steps

110‧‧‧Voltage and Current (VI) Probe

111‧‧‧Voltage and Current (VI) Probe

112‧‧‧known load

113‧‧‧RF transmission line

114‧‧‧Impedance matching circuit

115‧‧‧Impedance matching circuit

119‧‧‧step

122‧‧‧Impedance matching circuit

123‧‧‧System

125‧‧‧ESC model

126‧‧‧System

128‧‧‧System

130‧‧‧host system

131‧‧‧workpiece

134‧‧‧ Plasma Room

135‧‧‧ Plasma Room

142‧‧‧RF rod

144‧‧‧RF band

146‧‧‧Support

148‧‧‧column

150‧‧‧cable

151‧‧‧ insulator

152‧‧‧cable

153‧‧‧Enter

155‧‧‧Enter

161‧‧‧RF transmission model

162‧‧‧Storage Hardware Unit (HU)

163‧‧‧cable model

165‧‧‧cable model

168‧‧‧Processor

169‧‧‧ parts

171‧‧‧System

172‧‧‧ parts

173‧‧‧parts

175‧‧‧ Plasma Room

176‧‧‧Circuit Model

177‧‧‧ESC

178‧‧‧System

179‧‧‧up electrode

180‧‧‧Circuit

181‧‧‧RF transmission line

183‧‧‧ Top surface

185‧‧‧communication device

189‧‧‧communication device

189‧‧‧ insulator

191‧‧‧cable

192‧‧‧ESC

193‧‧‧cable

194‧‧‧Edge Ring (ER)

195‧‧‧parts

196‧‧‧Heating element

197‧‧‧ parts

198‧‧‧Heating element

199‧‧‧RF rod

200‧‧‧ system

201‧‧‧ESC

202‧‧‧Filter

204‧‧‧ Power

206‧‧‧ Power

208‧‧‧Filter

210‧‧‧channel and belt model

211‧‧‧column model

213‧‧‧Digital pulse signal

215‧‧‧RF signal

216‧‧‧model

217‧‧‧System / Cable

218‧‧‧model

219‧‧‧System

220‧‧‧RF generator

221‧‧‧RF signal

222‧‧‧parameter controller

224‧‧‧parameter controller

226‧‧‧Digital Signal Processor (DSP)

228‧‧‧Driver

230‧‧‧ amplifier

231‧‧‧output

232‧‧‧Drive and Amplifier System (DAS)

233‧‧‧Communication device

236‧‧‧System

238‧‧‧Voltage and current probe

250‧‧‧System

251‧‧‧node

253‧‧‧Capacitor

255‧‧‧Enter

257‧‧‧node

259‧‧‧output

261‧‧‧node

262‧‧‧Workware

263‧‧‧upper surface

264‧‧‧up electrode

265‧‧‧node

269‧‧‧Capacitor

283‧‧‧ output

285‧‧‧Enter

287‧‧‧RF transmission line

293‧‧‧node

297‧‧‧output

300‧‧‧circuit

302‧‧‧Channel and Band Model

304‧‧‧node

310‧‧‧Circuit

312‧‧‧column and ESC model

313‧‧‧Inductance

316‧‧‧Capacitor

318‧‧‧node

330‧‧‧System

332‧‧‧Voltage Probe

334‧‧‧Host System

336‧‧‧Noise or Signal Decision Module

340‧‧‧Method / Wafer Bias Generator

341‧‧‧step

342‧‧‧step

343‧‧‧step

351‧‧‧Method

353‧‧‧path

355‧‧‧system

357‧‧‧step

359‧‧‧step

361‧‧‧step

363‧‧‧Method

365‧‧‧step

367‧‧‧step

369‧‧‧step

380‧‧‧Enter HU

382‧‧‧Output HU

384‧‧‧Input / Output (I / O) interface

386‧‧‧I / O interface

388‧‧‧Network Interface Controller (NIC)

390‧‧‧Bus

393‧‧‧Bus

Embodiments of the present invention can be understood with reference to the following drawings and descriptions thereof.

FIG. 1 is a block diagram of a determination system according to an embodiment of the present invention. The determination system is used to determine an output of an impedance matching model, an output of a component of a radio frequency (RF) transmission model, and an electrostatic chuck (ESC) model. The variable at the output.

FIG. 2 is a flowchart of a determination method according to an embodiment of the present invention. The determination method is used to determine the complex voltage and current at the output of the components of the RF transmission model.

FIG. 3A is a block diagram of a system for explaining an impedance matching circuit according to an embodiment of the present invention.

FIG. 3B is a circuit diagram of an impedance matching model according to an embodiment of the present invention.

FIG. 4 shows a system for explaining an RF transmission line according to an embodiment of the present invention.

5A is a block diagram of a system for explaining a circuit model of an RF transmission line according to an embodiment of the present invention.

FIG. 5B shows a circuit and a band model for explaining an RF transmission model according to an embodiment of the present invention.

FIG. 5C shows a circuit for explaining channel and band models according to an embodiment of the present invention.

FIG. 6 shows a circuit for explaining a pillar and an ESC model according to an embodiment of the present invention.

FIG. 7 is a block diagram of a plasma system according to an embodiment of the present invention. The plasma system includes a filter for determining variables.

FIG. 8A shows a system for explaining a filter model capable of improving variable accuracy according to an embodiment of the present invention.

FIG. 8B shows a system for explaining a filter model according to an embodiment of the present invention.

FIG. 9 is a block diagram of a system according to an embodiment of the present invention. The system uses voltage and current probes to measure variables at the output of the RF generator of the system of FIG. 1.

FIG. 10 is a block diagram of a system according to an embodiment of the present invention. In this system, voltage and current probes and communication devices are located outside the RF generator.

FIG. 11 is a block diagram of a system according to an embodiment of the present invention, in which the values of variables determined using the system of FIG. 1 are used.

FIG. 12A is a diagram according to an embodiment of the present invention, which illustrates the variables measured by the probes at the nodes in the system of FIG. 1 and the method of FIG. 2 when the x MHz RF generator is turned on. The relevance of the determining variable.

FIG. 12B is a diagram according to an embodiment of the present invention. This diagram illustrates the variables measured by the probes at the nodes in the system of FIG. 1 and the method of FIG. 2 when the y MHz RF generator is turned on. The relevance of the determining variable.

FIG. 12C is a diagram according to an embodiment of the present invention. This diagram illustrates the variables measured by the probes at the nodes in the system of FIG. 1 and the method of FIG. 2 when the z MHz RF generator is turned on. The relevance of the determining variable.

13 is a flowchart of a method according to an embodiment of the present invention. This method is used to determine a wafer bias at a model node of an impedance matching model, a radio frequency (RF) transmission model, or an electrostatic chuck (ESC) model. .

FIG. 14 is a state diagram illustrating a wafer bias generator for generating a wafer bias according to an embodiment of the present invention.

15 is a flowchart of a method according to an embodiment of the present invention. This method is used to determine a wafer bias at a point on a path between an impedance matching model and an ESC model.

FIG. 16 is a block diagram of a system according to an embodiment of the present invention. The system is used to determine a wafer bias at a node of a model.

FIG. 17 is a flowchart of a method according to an embodiment of the present invention. This method is used to determine a wafer bias at a model node of the system of FIG. 1.

FIG. 18 is a block diagram of a system according to an embodiment of the present invention. The system is used to explain the method of determining the wafer bias using the method of FIG. advantage.

FIG. 19A shows an embodiment diagram according to an embodiment of the present invention, which illustrates the voltage measured by a voltage probe at a node in the plasma system of FIG. 1 when the y MHz and z MHz RF generators are turned on. The correlation between the variables and the variables determined for the corresponding model node output using the method of Figures 2, 13, 15, or 17.

FIG. 19B is an embodiment diagram according to an embodiment of the present invention, which illustrates the voltage measured by a voltage probe at a node in the plasma system of FIG. 1 when the x MHz and z MHz RF generators are turned on. The correlation between the variables and the variables determined for the corresponding model node output using the method of Figures 2, 13, 15, or 17.

FIG. 19C is an embodiment diagram according to an embodiment of the present invention, which illustrates the variables measured by the voltage probes at the nodes in the plasma system of FIG. 1 when the x and y MHz RF generators are turned on. Correlation with the variables determined for the corresponding model node outputs using the method of Figures 2, 13, 15, or 17.

FIG. 20A is a diagram according to an embodiment of the present invention, which is used to explain the relationship between the following when the x MHz RF generator is turned on: the wiring wafer bias measured by the sensor device, The model bias determined by the method of FIG. 13, 15 or 17 and the error in the model bias.

FIG. 20B is a diagram according to an embodiment of the present invention, which is used to explain the correlation between the following when the y MHz RF generator is turned on: the wiring wafer bias measured by the sensor device, The model bias determined by the method of FIG. 13, 15 or 17 and the error in the model bias.

FIG. 20C is a diagram according to an embodiment of the present invention, which is used to explain the relationship between the following when the z MHz RF generator is turned on: the wiring wafer bias measured by the sensor device, The model bias determined by the method of FIG. 13, 15 or 17 and the error in the model bias.

FIG. 20D is a diagram according to an embodiment of the present invention, which is used to explain the correlation between the following when the x and y MHz RF generators are turned on: wiring wafer bias measured using a sensor device Pressure, model bias determined using the method of Figures 13, 15 or 17, and errors in model bias.

FIG. 20E is a diagram according to an embodiment of the present invention, which is used to explain the correlation between the following when the x and z MHz RF generators are turned on: the wiring wafer bias measured by the sensor device Pressure, model bias determined using the method of Figures 13, 15 or 17, and errors in model bias.

FIG. 20F is a diagram according to an embodiment of the present invention, which is used to explain the correlation between the following when y and z MHz RF generators are turned on: wiring wafer bias measured by a sensor device Pressure, model bias determined using the method of Figures 13, 15 or 17, and errors in model bias.

FIG. 20G is a diagram according to an embodiment of the present invention, which is used to explain the correlation between the following when the x, y, and z MHz RF generators are turned on: a wiring crystal measured using a sensor device Circular bias, model bias determined by the method of Figures 13, 15 or 17, and errors in model bias.

FIG. 21 is a block diagram of a host system of the system of FIG. 1 according to an embodiment of the present invention.

Figure 22 shows the function to determine ion energy from wafer bias and peak amplitude.

The following examples illustrate systems and methods that use models to determine the ion energy associated with a plasma system. Obviously, embodiments of the invention may be practiced without some or all of these specific details. In other cases, the known processing steps will not be described in detail so as not to unnecessarily obscure the focus of the present invention.

FIG. 1 is a block diagram of an embodiment of the system 126. The system 126 is used to determine the output of the component 173 at the output of the impedance matching model 104 and the component 173 of the RF transmission model 161 (which is a model of the RF transmission line 113) such as a model node The output at the N1m and the electrostatic chuck (ESC) model 125 is a variable at the model node N6m. Examples of variables include complex voltage, complex current, complex voltage and current, complex power, ion energy, and wafer bias. )Wait. The RF transmission line 113 has an output such as a node N2. The voltage and current (VI) probe 110 measures the output of the x MHz RF generator such as the complex voltage and current V _xMHz , I _xMHz and Φ _xMHz at the node N3 as the first complex voltage and current. It should be noted that V _xMHz represents the voltage amplitude, I _xMHz represents the current amplitude and Φx represents the phase between V _xMHz and I _xMHz . It should be noted that V _xMHz represents the voltage amplitude, I _xMHz represents the current amplitude and Φx represents the phase between V _xMHz and I _xMHz . The impedance matching model 104 has an output such as a model node N4m.

In addition, the voltage and current probe 111 measures the output of the y MHz RF generator such as the complex voltage and current V _yMHz , I _yMHz, and Φ _yMHz at the node N5. It should be noted that V _yMHz represents the voltage amplitude, I _yMHz represents the current amplitude and Φ _yMHz represents the phase between V _yMHz and I _yMHz .

In some embodiments, a node is an input to a device, an output from a device, or a point within a device. The device referred to herein will be explained below.

In various embodiments, the voltage amplitude includes zero-to-peak amplitude or peak-to-peak amplitude or root mean square (RMS) amplitude of one or more RF values of an RF signal. In some embodiments, the current amplitude includes zero-to-peak amplitude or peak-to-peak amplitude or RMS amplitude of one or more RF values of an RF signal. In several embodiments, the power amplitude is the product of the voltage amplitude, the current amplitude, and the phase between the current amplitude and the voltage amplitude.

Examples of x MHz include 2 MHz, 27 MHz, and 60 MHz. Examples of y MHz include 2 MHz, 27 MHz, and 60 MHz. x MHz is different from y MHz. For example, when x MHz is 2 MHz, y MHz is 27 MHz or 60 MHz. When x MHz is 27 MHz, y MHz is 60 MHz.

Examples of each of the voltage and current probes 110 and 111 include voltage and current probes that follow predetermined criteria. An example of the preset criteria includes standards followed by the association for sensor development standards. Another example of preset criteria includes the standards of the National Institute of Standards and Technology (NIST). As shown, the voltage and current probes 110 or 111 are corrected according to the NIST standard. In this illustration, the voltage and current probes 110 or 111 are coupled to an open circuit, a short circuit, or a known load to correct the voltage and current probes 110 or 111 to conform to the NIST standard. The voltage and current probes 110 or 111 are first coupled to an open circuit, then they are coupled to a short circuit, and then they are coupled to a known load to correct the voltage and current probes based on the NIST standard. The voltage and current probes 110 or 111 are coupled in any order with known loads, open circuits, and short circuits to correct the voltage and current probes 110 or 111 according to the NIST standard. Examples of known loads include a 50 ohm load, a 100 ohm load, a 200 ohm load, an electrostatic load, a direct current (DC) load, a resistor, and the like. As shown, each voltage and current probe 110 and 111 is calibrated according to NIST-traceable standards.

The voltage and current probe 110 is coupled to the output of the x MHz RF generator such as node N3. The output of the x MHz RF generator, such as node N3, is coupled to the input 153 of the impedance matching circuit 114 through the cable 150. In addition, the voltage and current probe 111 is coupled to the output of the y MHz RF generator, such as a node. N5. The output of the y MHz RF generator, such as node N5, is coupled to another input 155 of the impedance matching circuit 114 through a cable 152.

The output of the impedance matching circuit 114 is coupled to the input of the RF transmission line 113 such as the node N4. The RF transmission line 113 includes a component 169 and another component 195. The input of the component 169 is the input of the RF transmission line 113. The output of block 169, such as node N1, is coupled to the input of block 195. The output of component 195, such as node N2, is coupled to plasma chamber 175. The output of the block 195 is the output of the RF transmission line 113. Examples of the component 169 include an RF cylinder and an RF strap. The RF column is coupled to the RF band. Examples of the component 195 include an RF rod and / or a support such as a pillar or the like to support the plasma chamber 175.

The plasma chamber 175 includes an electrostatic chuck (ESC) 177, an upper electrode 179, and other components (not shown) such as an upper dielectric ring surrounding the upper electrode 179, an upper electrode extension member surrounding the upper dielectric ring, and an under ESC 177 The lower dielectric ring of the electrode, the lower electrode extension surrounding the lower dielectric ring, the upper plasma exclusion zone (PEZ) ring, the lower PEZ ring, and the like. The upper electrode 179 faces and faces the ESC 177. A work piece 131 such as a semiconductor wafer or the like is supported on the upper surface 183 of the ESC 177. The upper surface 183 contains the output N6 of the ESC 177. The work piece 131 is located on the output N6. Various steps such as chemical vapor deposition, cleaning, deposition, sputtering, etching, ion implantation, photoresist stripping, etc. are performed on the work piece 131 during manufacturing. Build integrated circuits such as special application integrated circuits (ASIC), programmable logic devices (PLD), etc. on the work piece 131, and the integrated circuits are used for various electronic devices such as mobile phones, tablets, smart phones, computers, Laptops, network devices, etc. Each of the lower electrode and the upper electrode 179 is made of a metal such as aluminum, aluminum alloy, copper, or the like.

In one embodiment, the upper electrode 179 includes a hole coupled to a central gas feed (not shown). The central gas feed receives one or more processing gases from a gas supply source (not shown). Examples of the processing gas include an oxygen-containing gas such as O ₂ . Other examples of the processing gas include a fluorine-containing gas such as tetrafluoromethane (CF ₄ ), sulfur hexafluoride (SF ₆ ), hexafluoroethane (C ₂ F ₆ ), and the like. The upper electrode 179 is grounded. The ESC 177 is coupled to an x MHz RF generator and a y MHz RF generator through an impedance matching circuit 114.

When the processing gas is supplied between the upper electrode 179 and the ESC 177 and when the x MHz RF generator and / or the y MHz RF generator supplies the RF signal to the ESC 177 through the impedance matching circuit 114 and the RF transmission line 113, the processing gas will It is ignited to generate plasma in the plasma chamber 175.

When the x MHz RF generator generates the RF signal and provides the RF signal to the ESC 177 through the node N3, the impedance matching circuit 114 and the RF transmission line 113, and when the y MHz generator generates the RF signal through the node N5, the impedance matching circuit 114 and When the RF transmission line 113 provides the RF signal to the ESC 177, the voltage and current probe 110 measures the complex voltage and current at the node N3 and the voltage and current probe 111 measures the complex voltage and current at the node N5.

The corresponding voltage and current probes 110 and 111 provide the plurality of voltages and currents measured by the voltage and current probes 110 and 111 to the storage hardware unit (HU) of the host system 130 through the corresponding communication devices 185 and 189. ) 162 for storage. For example, the communication device 185 and the cable 191 provide the plurality of voltages and currents measured by the voltage and current probe 110 to the host system 130 and the communication device 189 and the cable 193 provide the voltage and current probe 111 to the host system 130. The measured complex voltages and currents are provided to the host system 130. Examples of communication devices include Ethernet devices that can convert data to and from Ethernet packets, Ethernet devices that control automation technology (EtherCAT), and serial interfaces that transmit data in a serial manner. Devices, parallel interface devices that transfer data in parallel, universal serial bus (USB) interface devices, etc.

Examples of the host system 130 include computers such as desktop computers, notebook computers, tablet computers, and the like. As shown, the host system 130 includes a processor and a storage HU 162. The processor used in this article can be a central processing unit (CPU), a microprocessor, a special application integrated circuit (ASIC), a programmable logic device (PLD), and the like. Examples of storage HU include read-only memory (ROM), random access memory Memory (RAM) or a combination thereof. The storage HU may be a flash memory, a redundant array of storage disks (RAID), a hard disk, and the like.

The impedance matching model 104 is stored in the storage HU 162. The impedance matching model 104 and the impedance matching circuit 114 have similar characteristics, such as capacitance, inductance, complex power, complex voltage and current, and the like. For example, the impedance matching model 104 has the same number of capacitors and / or inductances as in the impedance matching circuit 114, and the capacitors and / or inductances in the impedance matching model 104 are in the same manner as in the impedance matching circuit 114, such as series, parallel And so on. For illustration, when the impedance matching circuit 114 includes a capacitor coupled in series with an inductor, the impedance matching model 104 also includes a capacitor coupled in series with an inductor.

For example, the impedance matching circuit 114 includes one or more electronic components and the impedance matching model 104 includes a design such as a computer-generated model of the impedance matching circuit 114. The computer-generated model is generated by the processor based on input signals input by the user through the input hardware unit. The input signals include signals related to the electronic components included in the model, such as capacitors and inductors, and the manner in which these electronic components are coupled to each other, such as series and parallel related signals. As another example, the impedance matching circuit 114 includes hardware electronic components and hardware connections between the electronic components, and the impedance matching model 104 includes software representing the hardware electronic components and hardware connections. As another example, the impedance matching model 104 is designed by a software program and the impedance matching circuit 114 is fabricated on a printed circuit board. Electronic components as used herein may include resistors, capacitors, inductors, connections between resistors, connections between inductors, connections between capacitors, and / or connections between resistors, combinations of inductance and capacitance.

Similarly, the cable model 163 and the cable 150 have similar characteristics, and the cable model 165 and the cable 152 have similar characteristics. For example, the inductance of the cable model 163 is the same as the inductance of the cable 150. As another example, the cable model 163 is a computer-generated model of the cable 150 and the cable model 165 is a computer-generated model of the cable 152.

Similarly, the RF transmission model 161 and the RF transmission line 113 have similar characteristics. For example, the RF transmission model 161 and the RF transmission line 113 have the same number of resistors, capacitors, and / or inductors. The resistors, capacitors, and / or inductors of the RF transmission model 161 are connected to each other in a manner such as series or parallel. The connection method in the transmission line 113 is the same. For further explanation, when the RF transmission line 113 includes a capacitor coupled in parallel with the inductor, the RF transmission model 161 also includes a capacitor coupled in parallel with the inductor. As yet another example, the RF transmission line 113 includes one or more electronic components and the RF transmission model 161 includes a design such as a computer-generated model of the RF transmission line 113.

In some embodiments, the RF transmission model 161 is a computer-generated impedance transformation that involves characteristics of components such as capacitors, inductors, resistors, combinations thereof, such as the calculation of capacitance, resistance, and inductance values, and connections between components. Such as series, parallel and other decisions.

Based on the complex voltage and current received from the voltage and current probe 110 through the cable 191 and the characteristics of the components such as inductance and capacitance in the impedance matching model 104 such as capacitance and inductance, the processing of the host system 130 The device can calculate the output of the impedance matching model 104 such as the complex voltage and current V, I and Φ at the model node N4m such as the second complex voltage and current. The plurality of voltages and currents at the model node N4m are stored in the storage HU 162 of the host system 130 and / or another storage HU such as a compact disc or flash memory. The complex numbers V, I, and Φ include a voltage amplitude V, a current amplitude I, and a phase Φ between the voltage and the current.

The output of the impedance matching model 104 is coupled to the input of the RF transmission model 161 stored in the storage hardware unit 162. The impedance matching model 104 also has an input such as the node N3m, which is used to receive the complex voltage and current measured at the node N3.

The RF transmission model 161 includes a component 173, another component 197, and an output N2m coupled to the model node N6m through the ESC model 125. The ESC model 125 is a model of the ESC 177. E.g, The characteristics of the ESC model 125 are similar to those of the ESC 177. For example, the ESC model 125 and the ESC 177 have the same inductance value, capacitance value, resistance value, or a combination thereof.

The input of the component 173 is the input of the RF transmission model 161. The output of block 173 is coupled to the input of block 197. The characteristics of the component 173 are similar to those of the component 169, and the characteristics of the component 197 are similar to those of the component 195.

Based on the complex voltages and currents measured at the model node N4m, the processor of the host system 130 can calculate the output of the component 173 of the RF transmission model 161 such as the complex voltages and currents V, I, and Φ at the model node N1m. Three complex voltages and currents. The plurality of voltages and currents determined at the model node N1m are stored in the storage HU 162 of the host system 130 and / or another storage HU such as a compact disc, a flash memory, or the like.

In several embodiments, in addition to determining the third complex voltage and current, the processor of the host system 130 may be based on the complex voltage and current at the output of the impedance matching model 104 and the inputs and components 173 between the RF transmission model 161 The characteristics of the element between the internal points are used to calculate the point in the component 173 such as the complex voltage and current at a node such as the intermediate complex voltage and current V, I, and Φ, or use the intermediate complex voltage and current to determine the third complex number instead. Voltage and current.

In different embodiments, in addition to determining the third complex voltage and current, the processor of the host system 130 may be based on the complex voltage and current at the output of the impedance matching model 104 and the inputs and components 197 between the RF transmission model 161 The characteristics of the components within the point are used to calculate the complex voltage and current at a point in the component 197 such as the intermediate complex voltage and current such as the intermediate complex voltage and current V, I, and Φ, or use the intermediate complex voltage and current to determine the third complex voltage. With current.

It should be noted that in some embodiments, the complex voltage and current at the output of the impedance matching model 104 are based on the complex voltage and current at the output of the x MHz RF generator, the component characteristics of the cable model 163, and the impedance matching model 104 Calculated by the characteristics.

It should be further noted that although two generators are shown coupled to an impedance matching circuit 114, in one embodiment, any number of RF generators such as a single generator, three generators, etc. may be coupled by an impedance matching circuit To the plasma chamber 175. For example, a 2MHz generator, a 27MHz generator, and a 60MHz generator may be coupled to the plasma chamber 175 through two impedance matching circuits. For example, although the complex voltages and currents measured at node N3 are used in the above embodiments, in different embodiments, the complex voltages and currents measured at node N5 can also be used in the above embodiments. .

FIG. 2 is a flowchart of an embodiment of a method 102 for determining the complex voltage and current at the output of the RF transmission model component 173 (FIG. 1). The method 102 is executed by a processor (FIG. 1) of the host system 130. In step 106, the complex voltage and current such as the first complex voltage and current measured at the node N3 are identified from the storage HU 162 (FIG. 1). For example, it is determined that the first complex voltage and current are received from the voltage and current probe 110 (FIG. 1). As another example, based on the identification data of the voltage and current probe 110 stored in the storage HU 162 (FIG. 1), a first complex voltage and current related to the identification data is determined.

In step 107, an impedance matching model 104 (FIG. 1) is generated based on the electronic components of the impedance matching circuit 114 (FIG. 1). For example, the user provides the connection between the electronic components of the impedance matching circuit 114 and the characteristics of the electronic components to the processor of the host system 130 through an input hardware unit coupled to the host system 130. After receiving the connection and characteristics, the processor generates components having the same characteristics as the electronic components of the impedance matching circuit 114 and generates the same connection between the components as the connection between the electronic components.

The input of the impedance matching model 163, such as the node N3m, receives the first complex voltage and current. For example, the processor of the host system 130 accesses, for example, the first complex voltage and current from the storage HU 162 and provides the first complex voltage and current to the input of the impedance matching model 104 to process the first complex voltage and current.

In step 116, the input of the first complex voltage and current from the impedance matching model 104, such as node N3m (FIG. 1), is transmitted through one or more components of the impedance matching model 104 (FIG. 1), and the output of the impedance matching model 104 is The node N4m (FIG. 1) determines the second complex voltage and current at the output of the impedance matching model 104. For example, referring to FIG. 3B, when a 2 MHz RF generator is turned on such as operated, powered, and coupled to an impedance matching circuit 114 such as a plasma system 126, based on the capacitance value of capacitor 253, based on the capacitance value of capacitor C5, Enter the first complex voltage and current received at 255 to determine the complex voltage and current Vx1, Ix1, and Φx1 at node 251, such as the intermediate node, if the voltage amplitude Vx1, the current amplitude Ix1, and the phase between the complex voltage and current are included The middle complex voltage and current of Φx1. In addition, the complex voltage and current Vx2, Ix2, and Φx2 at the node 257 are determined based on the complex voltage and current Vx1, Ix1, and Φx1, and based on the inductance value of the inductance L3. The complex voltage and current Vx2, Ix2, and Φx2 include a voltage amplitude Vx2, a current amplitude Ix2, and a phase Φx2 between the voltage and the current. When the 27MHz RF generator and the 60MHz RF generator are turned off, such as not operating, not supplying power, and decoupling from the impedance matching circuit 114, it is determined that the complex voltage and current V2, I2, and Φ2 are the second complex voltage and current at output 259. 259 is an example of the output of the impedance matching model 104 (Figure 1), such as the model node N4m (Figure 1). The complex voltage and current V2, I2, and Φ2 are determined based on the complex voltage and current Vx2, Ix2, and Φx2, and the inductance value of the inductor L2. The complex voltage and current V2, I2, and Φ2 include a voltage amplitude V2, a current amplitude I2, and a phase Φ2 between the voltage and the current. When the 27MHz RF generator and the 60MHz RF generator are turned off, such as not operating, not supplying power, and decoupling from the impedance matching circuit 114, it is determined that the complex voltage and current V2, I2, and Φ2 are the second complex voltage and current at output 259. 259 is an example of the output of the impedance matching model 104 (Figure 1), such as the model node N4m (Figure 1). The complex voltage and current V2, I2, and Φ2 are determined based on the complex voltage and current Vx2, Ix2, and Φx2, and the inductance value of the inductor L2. The complex voltage and current V2, I2, and Φ2 include a voltage amplitude V2, a current amplitude I2, and a phase Φ2 between the voltage and the current.

Similarly, when the 27MHz RF generator is on and the 2MHz and 60MHz RF generators are off, the output 259 is determined based on the complex voltage and current received at node 261 and the characteristics of inductor LPF2, capacitor C3, capacitor C4, and inductor L2. The complex voltage and current V27, I27 and Φ27. The complex voltage and current V27, I27, and Φ27 include a voltage amplitude V27, a current amplitude I27, and a phase Φ27 between the voltage and the current. The complex voltage and current received at node 261 are the same as the complex voltage and current measured at node N5 (Figure 1). When both the 2MHz and 27MHz RF generators are turned on and the 60MHz RF generator is turned off, the complex voltage and current V2, I2, Φ2, V27, I27, and Φ27 are examples of the second complex voltage and current. Also, similarly, when the 60MHz RF generator is on and both the 2MHz and 27MHz RF generators are off, based on the complex voltage and current received at node 265 and the inductance LPF1, capacitor C1, capacitor C2, inductor L4, capacitor 269 And the characteristics of the inductor L1 to determine the complex voltage and current V60, I60, and Φ60 at the output 259. The complex voltage and current V60, I60, and Φ60 include a voltage amplitude V60, a current amplitude I60, and a phase Φ60 between the voltage and the current. When 2MHz, 27MHz and 60MHz RF generators are all turned on, the complex voltage and current V2, I2, Φ2, V27, I27, Φ27, V60, I60 and Φ60 are examples of the second complex voltage and current.

In step 117, the RF transmission model 161 (FIG. 1) is generated based on the electronic components of the RF transmission line 113 (FIG. 1). For example, the user provides the connection between the electronic components of the RF transmission line 113 and the characteristics of the electronic components to the processor of the host system 130 through an input device coupled to the host system 130. After receiving the connection and characteristics, the processor generates components having the same characteristics as the electronic components of the RF transmission line 113 and generates the same connection between the components as the connection between the electronic components.

In step 119, the second complex voltage and current are transmitted from the input of the RF transmission model 113 through one or more components of the RF transmission model part 173 to the output of the RF transmission model part 173 such as the model node N1m (Fig. 1) to determine A third complex voltage and current at the RF transmission model part 173. For example, referring to FIG. 5B, when the 2MHz RF generator is turned on and the 27MHz and 60MHz RF generators are turned off, the inductance value of the L _channel based on the inductance value, the capacitance value of the C _channel based on the capacitance value, and the complex voltage and current V2, I2, and Φ2 (Figure 3B) to determine the complex voltage and current Vx4, Ix4, and Φx4 at node 293, such as the intermediate node, such as the intermediate complex voltage and current, where the complex voltage and current V2, I2, and Φ2 (Figure 3B) are the second complex voltage Example with current. It should be noted that the L _channel is the inductance value of the computer-generated model of the RF channel and the C _channel is the capacitance value of the RF channel model. In addition, the complex voltages and currents V21, I21, and Φ21 at the output 297 of the channel and band model 210 are determined based on the complex voltages and currents Vx4, Ix4, and Φx4 and based on the inductance value of the inductance L _band . The output 297 is an example of the output of the component 173 (Fig. 1), such as the model node N1m (Fig. 1). It should be noted that the L- _band is the inductance of a computer-generated model of the RF band. When the 2MHz RF generator is turned on and the 27MHz and 60MHz RF generators are turned off, the complex voltage and current V21, I21, and Φ21 are determined as the third complex voltage and current at the output 297.

Similarly, when the 27MHz RF generator is turned on and the 2MHz and 60MHz RF generators are turned off, based on the complex voltage and current V27, I27, and Φ27 (Figure 3B) at the output 259 and the inductance value L _channel , capacitance value C _channel, and inductance The value of the L _band determines the complex voltage and current V271, I271, and Φ271 at the output 297. When both the 2MHz and 27MHz RF generators are on and the 60MHz RF generator is off, the complex voltage and current V21, I21, Φ21, V271, I271, and Φ271 are examples of the third complex voltage and current.

Also, similarly, when the 60MHz RF generator is powered and the 2MHz and 27MHz RF generators are not powered, based on the complex voltage and current V60, I60, and Φ60 (Figure 3B) and the inductance value L _channel received at node 259 The characteristics of the capacitance value C _channel and the inductance value L _band determine the complex voltage and current V601, I601, and Φ601 at the output 297. When the 2MHz, 27MHz, and 60MHz RF generators are all turned on, the complex voltages and currents V21, I21, Φ21, V271, I271, Φ271, V601, I601, and Φ601 are examples of the third complex voltage and current. The method 102 ends after step 119.

FIG. 3A is a block diagram illustrating an embodiment of a system 123 of the impedance matching circuit 122. The impedance matching circuit 122 is an example of the impedance matching circuit 114 (FIG. 1). The impedance matching circuit 122 includes a series connection between electronic components and / or a parallel connection between electronic components.

FIG. 3B is a circuit diagram of an embodiment of the impedance matching model 172. The impedance matching model 172 is an example of the impedance matching model 104 (FIG. 1). As shown, the impedance matching model 172 includes resistors having capacitance values C1 to C9 and inductances having inductance values LPF1, LPF2, and L1 to L4. It should be noted that the manner in which the inductors and / or resistors are coupled to each other in FIG. 3B is merely an example. For example, the inductors and / or resistors shown in FIG. 3B may be coupled to each other in a series and / or parallel manner. Also, in some embodiments, the impedance matching model 172 includes a different number of resistors and / or a different number of inductors than in FIG. 3B.

FIG. 4 shows an embodiment of a system 178 for explaining an RF transmission line 181. The RF transmission line 181 is an example of the RF transmission line 113 (FIG. 1). The RF transmission line 181 includes a post 148 such as a channel. An insulator 151 and an RF rod 142 are provided in the hollow portion of the pillar 148. The combination of the post 148 and the RF rod 142 is an example of the component 169 (FIG. 1) of the RF transmission line 113 (FIG. 1). The RF transmission line 181 is fixed to the impedance matching circuit 114 by bolts B1, B2, B3, and B4. In one embodiment, the RF transmission line 181 is fixed to the impedance matching circuit 114 by any number of bolts. In some embodiments, the RF transmission line 181 may be fixed to the impedance matching circuit 114 using any other form of connecting member such as an adhesive, a screw, or the like, instead of the bolt.

The RF transmission rod 142 is coupled to the output of the impedance matching circuit 114. In addition, the RF band 144 (also referred to as an RF key) is coupled to the RF rod 142 and the RF rod 199, and a part thereof is located in the support member 146 such as a pillar. The support 146 containing the RF rod 199 is an example of a component 195 (FIG. 1). In one embodiment, the combination of the post 148, the RF rod 142, the RF band 144, the support 146, and the RF rod 199 forms an RF transmission line 181, which is an example of the RF transmission line 113 (FIG. 1). The support 146 provides support for the plasma chamber. The support 146 is an ESC 177 connected to the plasma chamber. RF signal from x MHz generator by The cable 150, the impedance matching circuit 114, the RF rod 142, the RF band 144, and the RF rod 199 are provided to the ESC 177.

In one embodiment, the ESC 177 includes a heating element and an electrode on an upper portion of the heating element. In one embodiment, the ESC 177 includes a heating element and a lower electrode. In one embodiment, the ESC 177 includes a lower electrode and a heating element such as a coil embedded in a hole formed in the lower electrode. In some embodiments, the electrodes are made of a metal such as aluminum, copper, or the like. It should be noted that the RF transmission line 181 supplies an RF signal to the lower electrode of the ESC 177.

FIG. 5A is a block diagram illustrating an embodiment of a system 171 of the circuit model 176 of the RF transmission line 113 (FIG. 1). For example, the circuit model 176 includes inductors and / or resistors, connections between inductors, connections between resistors, and / or connections between inductors and resistors. Examples of connections include series and / or parallel connections. The circuit model 176 is an example of the RF transmission model 161 (FIG. 1).

FIG. 5B shows an embodiment of a circuit 180 for explaining the channel and band model 210, which is an example of the component 173 (FIG. 1) of the RF transmission model 161 (FIG. 1). The circuit 180 includes an impedance matching model 172 and a channel and band model 210. The channel and band model 210 includes an inductance L _channel and an L _band and a capacitance C _channel . It should be noted that the inductance value L _channel represents the inductance value of the post 148 (FIG. 4) and the RF rod 142, and the capacitance value C _channel represents the capacitance value of the post 148 and the RF rod 142. The inductance value L _band represents the inductance value of the RF band 144 (FIG. 4).

In one embodiment, the channel and band model 210 includes any number of inductors and / or any number of resistors. In this embodiment, the channel and band model 210 includes any means of coupling a capacitor to another capacitor, coupling a capacitor to an inductor, and / or coupling an inductor to another inductor such as series, parallel, and the like.

FIG. 5C shows an embodiment of a circuit 300 for explaining the channel and band model 302. The channel and band model 302 is an example of the component 173 (FIG. 1) of the RF transmission model 161 (FIG. 1). Channel and belt The model 302 is coupled to the impedance matching model 172 through an output 259. The channel and band model 302 includes an inductor having an inductance value of 20 nanoHenries (nH) and a resistor having capacitance values of 15 picofarads (pF), 31pF, 15.5pF, and 18.5pF. The channel and band model 302 is coupled to the RF column through node 304, and the RF column is coupled to ESC 177 (Figure 1). The RF column is an example of the component 195 (FIG. 1).

It should be noted that in some embodiments, the inductance and resistors of the channel and band model 302 have other values. For example, a 20nH inductor has an inductance value between 15 and 20nH or between 20 and 25nH. As another example, two or more inductors of the channel and the band model 302 have different inductance values. As another example, a 15 pF capacitor has a capacitance value between 8 pF and 25 pF, a 31 pF capacitor has a capacitance value between 15 pF and 45 pF, a 15.5 pF capacitor has a capacitance value between 9 pF and 20 pF, and a 18.5 pF capacitor has a capacitance value between 10 pF Capacitance value to 27pF.

In various embodiments, any number of inductors may be included in the channel and band model 302, and any number of resistors may be included in the channel and band model 302.

FIG. 6 shows an embodiment of a circuit 310 for explaining a pillar and an ESC model 312. The pillar and the ESC model 312 are a combination of an inductor 314 and a capacitor 316. The column and ESC model 312 includes a column model and an ESC model, and the ESC model is an example of the ESC model 125 (FIG. 1). The cylinder model is an example of part 197 (FIG. 1) of the RF transmission model 161 (FIG. 1). Column and ESC model 312 and component 195 have similar characteristics to ESC 177 (Figure 1). For example, the pillar and ESC model 312 has the same resistance value as the combination of component 195 and ESC 177. As another example, the pillar and ESC model 312 has the same inductance value as the combination of component 195 and ESC 177. As yet another example, the pillar and ESC model 312 has the same capacitance value as the combination of component 195 and ESC 177. As yet another example, the pillar and ESC model 312 has the same inductance value, resistance value, capacitance value, or a combination thereof as the combination of component 195 and ESC 177.

The column and ESC model 312 is coupled to the channel and band model 302 through a node 318. Node 318 is an example of model node N1m (Figure 1).

It should be noted that in some embodiments, an inductor with an inductance value other than 44 nanohenry (nH) is used in the post and ESC model 312. For example, use an inductor with an inductance between 35nH and 43.9nH or between 45.1nH and 55nH. In different embodiments, a capacitor having a capacitance other than 550 pF is used. For example, a capacitor having a capacitance value between 250 and 550 pF or between 550 and 600 pF is used instead of the 550 pF capacitor.

The processor (FIG. 1) of the host system 130 calculates the combined impedance such as the model 172, the channel and band model 302, and the combined impedance of the column and ESC model 312. The processor of the host system 130 uses the combined impedance and the complex voltage and current determined at the model node 318 as inputs to calculate the complex voltage and impedance at the node N6m. It should be noted that the output of the column and ESC model 312 is the model node N6m.

FIG. 7 is a block diagram of an embodiment of a system 200 for determining variables. The system 200 includes a plasma chamber 135 which further includes an ESC 201 and has an input 285. Plasma chamber 135 is an example of plasma chamber 175 (FIG. 1), and ESC 201 is an example of ESC 177 (FIG. 1). The ESC 201 includes a heating element 198. The ESC 201 is surrounded by an edge ring (ER) 194. ER 194 contains a heating element 196. In one embodiment, the ER 194 promotes a uniform etch rate and reduces etch rate drift near the edges of the work piece 131 supported by the ESC 201.

The power source 206 supplies power to the heating element 196 through the filter 208 to heat the heating element 196, and the power source 204 supplies power to the heating element 198 through the filter 202 to heat the heating element 198. In one embodiment, a single power source provides power to both the heating elements 196 and 198. The filter 208 filters a predetermined frequency of the power signal received from the power source 206, and the filter 202 filters the predetermined frequency of the power signal received from the power source 204.

The heating element 198 is heated by the power signal received from the power source 204 to maintain the electrodes of the ESC 201 at a desired temperature, thereby further maintaining the environment in the plasma chamber 135 at a desired temperature. temperature. In addition, the heating element 196 is heated by a power signal received from the power source 206 to maintain the ER 194 at a desired temperature, thereby further maintaining the environment in the plasma chamber 135 at a desired temperature.

It should be noted that in one embodiment, ER 194 and ESC 201 may include any number of heating elements as well as any type of heating elements. For example, the ESC 201 may include an inductive heating element or a metal plate. In one embodiment, each of the ESC 201 and the ER 194 includes one or more cooling elements such as one or more tubes through which cold water or the like is passed to maintain the plasma chamber 135 at a desired temperature.

It should be further noted that in one embodiment, the system 200 includes any number of filters. For example, power supplies 204 and 206 are coupled to ESC 201 and ER 194 through a single filter.

FIG. 8A shows an embodiment of a system 217 for explaining the filters 202 and 208 (FIG. 7). The filters 202 and 208 (FIG. 7) can improve the accuracy of the variable. The system 217 includes a channel and band model 210 coupled to a model 216 through a column model 211, and the model 216 includes resistors and / or inductors and connections between the filters 202 and 208. The model 216 is stored in storage HU 162 (FIG. 1) and / or another storage HU. The resistors and / or inductors of the model 216 are coupled to each other in, for example, parallel, series, or a combination thereof. The model 216 represents the capacitance and / or inductance of the filters 202 and 208.

In addition, the system 217 includes a column model 211, which is a computer-generated model of the RF rod 199 (FIG. 4) and the support 146 (FIG. 4). The pillar model 211 and the RF rod 199 have similar characteristics to the electronic components of the support 146. The column model 211 includes one or more capacitors, one or more inductors, connections between inductors, connections between capacitors, and / or connections between a combination of capacitors and inductors.

The processor (FIG. 1) of the host system 130 calculates the combined impedance such as the total impedance of the model 216, the channel and band model 210, and the column model 211. The combined impedance provides the complex voltage and impedance at node N2m. Because the model 216 and the channel and band model 210 are included in determining the variable at the node N2m, the accuracy of the variable is improved. It should be noted that the output of the model 216 is the model node N2m.

FIG. 8B shows an embodiment of a system 219 for explaining the models of filters 202 and 208 (FIG. 7). The models of filters 202 and 208 (FIG. 7) can improve the accuracy of variables. The system 219 includes a channel and band model 210 and a model 218 coupled in parallel with the channel and band model 210. Model 218 is an example of model 216 (FIG. 8A). The model 218 includes an inductance L _filter , and the inductance L _filter represents a combined inductance value of the filters 202 and 208. The model 218 further includes a capacitance C _filter , and the capacitance C _filter represents the combined capacitance of the filters 202 and 208.

FIG. 9 is a block diagram of one embodiment of a system 236. The system 236 uses a voltage and current probe 238 to measure a variable at the output 231 of the RF generator 220. Output 231 is an example of node N3 (Figure 1) or node N5 (Figure 1). The RF generator 220 is an example of an x MHz generator or a y MHz generator (Figure 1). The host system 130 generates a digital pulse signal 213 having two or more states and provides it to a digital signal processor (DSP) 226. In one embodiment, the digital pulse signal 213 is a transistor-transistor logic (TTL) signal. Examples of states include an on state and an off state, a state with a digital value of 1 and a state with a digital value of 0, a high state and a low state, and the like.

In another embodiment, a clock oscillator such as a quartz crystal oscillator is used instead of the host system 130 to generate an analog clock signal. The analog clock signal can be converted into a digital signal similar to the digital pulse signal 213 by an analog-to-digital converter. Signal.

The digital pulse signal 213 is sent to the DSP 226. The DSP 226 receives the digital pulse signal 213 and recognizes the state of the digital pulse signal 213. For example, the DSP 226 determines that the digital pulse signal 213 has a value of a first amplitude such as 1, a high state amplitude, etc. in the first set of time periods and a value of a second amplitude such as 0, a low state amplitude in the second set of time periods Wait. The DSP 226 determines that the digital pulse signal 213 has a state S1 during a first set of time periods and a state S0 during a second set of time periods. Examples of state S0 include a low state, a state with a value of 0, and an off state. Examples of the state S1 include a high state, a state with a value of 1, and an on state. As yet another example, the DSP 226 sends a digital pulse signal The amplitude of 213 is compared with the pre-stored value to determine that the amplitude of the digital pulse signal 213 is greater than the pre-stored value during the first set of time periods and that the amplitude of the digital pulse signal 213 during the second set of time periods is not greater than the pre-stored value. . In an embodiment using a clock oscillator, the DSP 226 receives an analog clock signal from the clock oscillator, converts the analog signal into a digital form, and then recognizes two states S0 and S1.

When a state is identified as S1, the DSP 226 provides the power value P1 and / or the frequency value F1 to the parameter controller 222. When the state is identified as S0, the DSP 226 provides the power value P0 and / or the frequency value F0 to the parameter controller 224. Examples of parameter controllers used to modulate frequency include automatic frequency tuners (AFT).

It should be noted that the parameter controller 222, the parameter controller 224, and the DSP 226 are all part of the control system 187. For example, the parameter controller 222 and the parameter controller 224 are logic blocks such as tuning loops, etc., which are part of a computer program executable by the DSP 226. In some embodiments, the computer program is embodied by a non-transitory computer-readable medium such as a storage HU.

In one embodiment, a controller such as a hardware controller, ASIC, PLD, etc. is used instead of the parameter controller. For example, a hardware controller is used instead of the parameter controller 222 and another hardware controller is used instead of the parameter controller 224.

After receiving the power value P1 and / or the frequency value F1, the parameter controller 222 provides the power value P1 and / or the frequency value F1 to the driver 228 of the drive and amplifier system (DAS) 232. Examples of the driver include a power driver, a current driver, a voltage driver, a transistor, and the like. The driver 228 generates an RF signal having a power value P1 and / or a frequency value F1 and provides the RF signal to the amplifier 230 of the DAS 232.

In one embodiment, the driver 228 generates an RF signal having a driving power value and / or a driving frequency value. The driving power value is a function of the power value P1 and the driving frequency value is a function of the frequency value F1. For example, the driving power value is within a few watts of the power value P1, such as within 1 to 5 watts, and the driving frequency value is within a few Hz, such as 1 to 5 Hz, of the frequency value F1.

The amplifier 230 amplifies an RF signal having a power value P1 and / or a frequency value F1 and generates an RF signal 215 corresponding to the RF signal received from the driver 228. For example, the RF signal 215 has a higher amount of power than the power value P1. As another example, the RF signal 215 has the same amount of power as the power value P1. The RF signal 215 is transmitted to the ESC 177 (FIG. 1) through the cable 217 and the impedance matching circuit 114.

The cable 217 is an example of the cable 150 or the cable 152 (FIG. 1). For example, when the RF generator 220 is an example of an x MHz RF generator (Figure 1), the cable 217 is an example of the cable 150, and when the RF generator 220 is an example of a y MHz RF generator (Figure 1), The cable 217 is an example of the cable 152.

When the power value P1 and / or the frequency value F1 are provided to the DAS 232 through the parameter controller 222 and the RF signal 215 is generated, the voltage and current probe 238 measures the variable at the output 231 of the cable 217 value. The voltage and current probe 238 is an example of the voltage and current probe 110 or the voltage and current probe 111 (FIG. 1). The voltage and current probe 238 sends the value of the variable to the host system 130 through the communication device 233, so that the host system 130 can execute the method 102 (FIG. 3) and methods 340, 351, and 363 (FIG. 13, 15) And 17). The communication device 233 is an example of the communication device 185 or 189 (FIG. 1). The communication device 233 uses a protocol such as Ethernet, Ethernet Control Automation Technology (EtherCAT), Universal Serial Bus (USB), serial, parallel, packet, decapsulation, etc. The data of the probe 238 is transmitted to the host system 130. In various embodiments, the host system 130 includes a communication device, and the communication device can apply a protocol applied by the communication device 233. For example, when the communication device 233 applies a packet protocol, the communication device of the host system 130 applies a decapsulation protocol. As another example, when the communication device 233 applies the serial transmission protocol, the communication device of the host system 130 applies the serial transmission protocol.

Similarly, after receiving the power value P0 and / or the frequency value F0, the parameter controller 224 provides the power value P0 and / or the frequency value F0 to the driver 228. The driver 228 generates an RF signal having a power value P0 and / or a frequency value F0 and provides the RF signal to the amplifier 230.

In one embodiment, the driver 228 generates an RF signal having a driving power value and / or a driving frequency value. The driving power value is a function of the power value P0 and the driving frequency value is a function of the frequency value F0. For example, the driving power value is within a few watts of the power value P0, such as within 1 to 5 watts, and the driving frequency value is within a few Hz, such as 1 to 5 Hz, of the frequency value F0.

The amplifier 230 amplifies an RF signal having a power value P0 and / or a frequency value F0 and generates an RF signal 221 corresponding to the RF signal received from the driver 228. For example, the RF signal 221 has a higher amount of power than the power value P0. As another example, the RF signal 221 has the same amount of power as the power value P0. The RF signal 221 is transmitted to a known load 112 (FIG. 2) through a cable 217 and an impedance matching circuit 114.

When the power value P0 and / or the frequency value F0 are provided to the DAS 232 through the parameter controller 222 and the RF signal 221 is generated, the voltage and current probe 238 measures the value of the variable at the output 231. The voltage and current probe 238 sends the value of the variable to the host system 130, so that the host system 130 can execute the method 102 (FIG. 2), method 340 (FIG. 13), method 351 (FIG. 15), or method 363 (FIG. 17).

It should be noted that in one embodiment, the voltage and current probes 238 are decoupled from the DSP 226. In some embodiments, a voltage and current probe 238 is coupled to the DSP 226. It should be further noted that the RF signal 215 generated during the state S1 and the RF signal 221 generated during the state S0 are both part of the combined RF signal. For example, the RF signal 215 is a part of the combined RF signal, and the RF signal 221 is another part of the combined RF signal. The power of the RF signal 215 is higher than the RF signal 221.

FIG. 10 is a block diagram of an embodiment of the system 250. In the system 250, the voltage and current probe 238 and the communication device 233 are located outside the RF generator 220. In Figure 1, voltage and current The probe 110 is located in the x MHz RF generator to measure a variable at the output of the x MHz RF generator. The voltage and current probe 238 is located outside the RF generator 220 to measure a variable at the output 231 of the RF generator 220. The voltage and current probe 238 is, for example, coupled to the output 231 of the RF generator 220.

FIG. 11 is a block diagram of one embodiment of a system 128 in which the system 126 of FIG. 1 is used to determine the value of a variable. The system 128 includes an m MHz RF generator, an n MHz RF generator, an impedance matching circuit 115, an RF transmission line 287, and a plasma chamber 134. The plasma chamber 134 is similar to the plasma chamber 175.

It should be noted that, in an embodiment, the x MHz RF generator of FIG. 2 is similar to an m MHz RF generator and the y MHz RF generator of FIG. 2 is similar to an n MHz RF generator. For example, x MHz is equal to m MHz and y MHz is equal to n MHz. As another example, an x MHz generator has a similar frequency to an m MHz generator and a y MHz generator has a similar frequency to an n MHz generator. An example of a similar frequency is that x MHz is in a range such as kHz or Hz of a frequency of m MHz. In some embodiments, the x MHz RF generator of FIG. 2 is not similar to the m MHz RF generator and the y MHz RF generator of FIG. 2 is not similar to the n MHz RF generator.

It should be noted that in different embodiments, the type of sensor used in each of the m MHz and n MHz RF generators is different from each of the x MHz and y MHz RF generators The type of sensor used in. For example, use a non-NIST-compliant sensor in an m MHz RF generator. As another example, a voltage sensor that only measures voltage is used in an m MHz RF generator.

It should be further noted that, in one embodiment, the impedance matching circuit 115 is similar to the impedance matching circuit 114 (FIG. 1). For example, the impedance of the impedance matching circuit 114 is equal to the impedance of the impedance matching circuit 115. As another example, the impedance of the impedance matching circuit 115 is in a range such as the impedance matching circuit. 10-20% of the impedance of 114. In some embodiments, the impedance matching circuit 115 is not similar to the impedance matching circuit 114.

The impedance matching circuit 115 includes electronic components such as inductors, resistors, etc. so that the impedance of the power source coupled to the impedance matching circuit 115 matches the impedance of the load coupled to the circuit 115. For example, the impedance matching circuit 115 enables impedance sources coupled to the impedance matching circuit 115 (such as m MHz RF generators, n MHz RF generators, cables that couple m MHz and n MHz RF generators to the impedance matching circuit 115, etc. The combination) impedance matches the impedance of a load (such as a combination of plasma chamber 134, RF transmission line 287, etc.).

It should be noted that in one embodiment, the RF transmission line 287 is similar to the RF transmission line 113 (FIG. 1). For example, the impedance of the RF transmission line 287 is the same as the impedance of the RF transmission line 113. As another example, the impedance of the RF transmission line 287 is in a range such as 10-20% of the impedance of the RF transmission line 113. In different embodiments, the RF transmission line 287 is not similar to the RF transmission line 113.

Plasma chamber 134 contains ESC 192, upper electrode 264, and other components (not shown) such as an upper dielectric ring surrounding upper electrode 264, an upper electrode extension surrounding upper dielectric ring, and a lower dielectric surrounding lower electrode of ESC 192. Rings, lower electrode extensions surrounding the lower dielectric ring, upper plasma exclusion zone (PEZ) ring, lower PEZ ring, etc. The upper electrode 264 faces and faces the ESC 192. The work piece 262 such as a semiconductor wafer is supported on the upper surface 263 of the ESC 192. Each of the ESC 192 upper electrode 264 and the lower electrode is made of metal such as aluminum, aluminum alloy, copper, and the like.

In one embodiment, the upper electrode 264 includes a hole, and the hole is coupled to a central gas feeding member (not shown). The central gas feed receives one or more processing gases from a gas supply source (not shown). The upper electrode 264 is grounded. The ESC 192 is coupled to an m MHz RF generator and an n MHz RF generator through an impedance matching circuit 115.

When the processing gas is supplied between the upper electrode 264 and the ESC 192 and when the m MHz RF generator and / or the n MHz RF generator supplies power to the ESC 192 through the impedance matching circuit 115, the processing gas is ignited and the electricity The plasma chamber 134 generates a plasma.

It should be noted that the system 128 does not have probes for measuring variables at the output 283 of the impedance matching circuit 115, a point on the RF transmission line 287, or ESC 192, such as measurement equipment, voltage and current probes, and voltage probes. Needle etc. The values of the variables at the model nodes N1m, N2m, N4m, and N6m are used to determine whether the system 128 operates as expected.

In various embodiments, the system 128 does not have a wafer bias sensor such as an in-situ direct current (DC) probe and related hardware for measuring wafer bias at the ESC 192. Cost savings can be achieved by not using wafer bias sensors and related hardware.

It should also be noted that in one embodiment, the system 128 includes any number of RF generators coupled to an impedance matching circuit.

Figures 12A, 12B, and 12C show the embodiments of Figures 268, 272, and 275. Figures 268, 272, and 275 illustrate the use of a voltage probe to output the impedance matching circuit 114 in the system 126 (Figure 1) as measured at node N4. The correlation between the voltages such as the RMS voltage, the peak voltage, and the voltage determined by the method 102 (Figure 2) at the corresponding model node output, such as the node N4m, such as the peak voltage. 12A, 12B, and 12C are examples of FIGS. 270, 274, and 277. FIGS. 270, 274, and 277 illustrate the use of a current probe at the output of the system 126 (FIG. 1) such as the current measured at node N4. Correlation between the square root (RMS) current and the current determined by the method 102 (FIG. 2) at the corresponding output such as the node N4m, such as the RMS current.

The voltage determined by the method 102 is plotted on the x-axis of each of the graphs 268, 272, and 275, and the voltage measured by the voltage probe is plotted on the y-axis of each of the graphs 268, 272, and 275. Similarly, the current determined by the method 102 is plotted on the x-axis of each of the graphs 270, 274, and 277, and the current measured by the current probe is plotted on the y-axis of each of the graphs 270, 274, and 277. .

When the x MHz RF generator is turned on and both the y MHz RF generator and the z MHz RF generator, such as the 60MHz RF generator, are turned off, the voltage is plotted in Figure 268. Also, when the y MHz RF generator is turned on and both the x MHz and z MHz RF generators are turned off, the voltage is plotted in FIG. 272. Also, when the z MHz RF generator is on and both the x MHz and y MHz RF generators are off, the voltage is plotted in Figure 275.

Similarly, the current is plotted in graph 270 when the x MHz RF generator is on and both the y MHz RF generator and the z MHz RF generator are off. Also, when the y MHz RF generator is on and the x MHz and z MHz RF generators are off, the current is plotted in FIG. 274. In addition, when the z MHz RF generator is turned on and both the x MHz and y MHz RF generators are turned off, the current is plotted in FIG. 277.

As can be seen in each of the graphs 268, 272, and 275, there is an approximately linear correlation between the voltage plotted on the y-axis of the graph and the voltage plotted on the x-axis of the graph. Similarly, it can be seen in each of the graphs 270, 274, and 277 that there is an approximately linear correlation between the current plotted on the y-axis of the graph and the current plotted on the x-axis of the graph.

FIG. 13 is a flowchart of an embodiment of a method 340. The method 340 is used to determine the bias of the model nodes of the plasma system 126 (FIG. 1) such as the model node N4m, the model node N1m, the model node N2m, and the model node N6m. Pressure. In these examples, the wafer bias is present on a surface of the ESC 177 (FIG. 1) such as the upper surface 183 and / or on a surface of the work piece 131 (FIG. 1) as the upper surface.

It should be further noted that the model nodes N1m and N2m are both located on the RF transmission model 161 (Figure 1) and the model node N6m is located on the ESC model 125 (Figure 1). The method 340 is performed by a processor (FIG. 1) of the host system 130. In method 340, step 106 is performed.

Also, in step 341, one or more models corresponding to one or more devices such as the impedance matching circuit 114, the RF transmission line 113, the ESC 177, a combination thereof, etc., such as the impedance matching model 104, RF, are generated. Transmission model 161, ESC model 125 (FIG. 1), combinations thereof, and the like. For example, the characteristics of the generated ESC model 125 are similar to those of the ESC 177 (FIG. 1).

In step 343, the complex voltages and currents identified in step 106 are transmitted through one or more elements of one or more models to determine the complex voltages and currents at the output of one or more models. For example, the second complex voltage and current are determined from the first complex voltage and current. As another example, the second complex voltage and current are determined from the first complex voltage and current, and the third complex voltage and current are determined from the second complex voltage and current. As still another example, the second complex voltage and current are determined from the first complex voltage and current, the third complex voltage and current are determined from the second complex voltage and current, and the third complex voltage and current are transmitted through RF transmission. The component 197 of the model 161 (FIG. 1) determines the fourth complex voltage and current at the model node N2m. In this example, the fourth complex voltage and current are determined by the impedance of the element that passes the third complex voltage and current through the component 197. As yet another example, the RF transmission model 161 provides an algebraic conversion function, and the processor of the host system 130 executes the algebraic conversion function to measure the complex number measured at one or more output locations of one or more RF generators. Voltage and current are translated into electrical nodes along the RF transmission model 161 such as model node N1m, model node N2m, and so on.

As another example of step 343, the second complex voltage and current are determined from the first complex voltage and current, the third complex voltage and current are determined from the second complex voltage and current, and the fourth complex voltage and current are determined from The third complex voltage and current determine that the fourth complex voltage and current are transmitted through the ESC model 125 to determine the fifth complex voltage and current at the model node N6m. In this example, the fifth complex voltage and current are determined by passing the fourth complex voltage and current through the impedance of components such as resistors, inductors, etc. of the ESC model 125.

In step 342, the wafer bias at the output of one or more models is determined based on the voltage amplitude of the complex voltage and current at the output, and the voltage of the complex voltage and current at the output. Current amplitude and the power amplitude of the complex voltage and current at the output. For example, the wafer bias is determined based on the voltage amplitude of the second complex voltage and current, the current amplitude of the second complex voltage and current, and the power amplitude of the second complex voltage and current. To further illustrate, when the x MHz RF generator is on and both the y MHz and z MHz RF generators are off, the processor (Figure 1) of the host system 130 determines the wafer bias at model node N4m (Figure 1). Is the sum of the first product, the second product, the third product, and a constant. In this description, the first product is the product of the first coefficient and the voltage amplitude of the second complex voltage and current, the second product is the product of the second coefficient and the current amplitude of the second complex voltage and current, and the third product is the first product The product of the square root of the three coefficients and the root mean square of the second complex voltage and power amplitude of the current.

For example, the power amplitude is the power amplitude of the transmitted power, and the transmitted power is determined by the processor of the host system 130 as the difference between the forward power and the reflected power. Forward power is the power supplied by one or more RF generators of the system 126 (FIG. 1) to the plasma chamber 175 (FIG. 1). The reflected power is the power reflected from the plasma chamber 175 back to one or more RF generators of the system 126 (FIG. 1). For example, the power amplitude of the complex voltage and current is determined by the processor of the host system 130 as the product of the complex voltage and current current amplitude and the complex voltage and current voltage amplitude. In addition, each of the coefficients and constants used to determine the wafer bias is a positive number or a negative number. As another example of determining wafer bias, when the x MHz RF generator is on and the y MHz and z MHz RF generators are off, the wafer bias at the model node is represented by the following formula: ax * Vx + bx * Ix + cx * sqrt (Px) + dx, where "ax" is the first coefficient, "bx" is the second coefficient, "dx" is a constant, and "Vx" is the voltage amplitude of the complex voltage and current at the model node "Ix" is the current amplitude of the complex voltage and current at the model node, and "Px" is the power amplitude of the complex voltage and current at the model node. It should be noted that “sqrt” is a square root operation performed by the processor of the host system 130. In some embodiments, the power amplitude Px is the product of the current amplitude Ix and the voltage amplitude Vx.

In different embodiments, the coefficient used to determine the wafer bias is determined by the processor (FIG. 1) of the host system 130 based on the projection method. In the projection method, wafer bias sensors such as wafer bias pins At a time equal to the first time, wafer bias on one surface of the ESC 177, such as the top surface 183 (FIG. 1), is measured. In the projection method, the voltage amplitude, current amplitude, and power amplitude at a model node in the plasma system 126 are determined based on the complex voltage and current measured at the output of the RF generator. For example, the processor of the host system 130 transmits the complex voltage and current measured at the node N3 (FIG. 1) at the first time to a model node such as a model node N4m, a model node N1m, a model node N2m, or a model node N6m ( Figure 1) and so on to determine the complex voltage and current at the model nodes at the first time. The voltage amplitude and the current amplitude are obtained by the processor of the host system 130 from the complex voltage and current at the model node at the first time. The power amplitude is calculated by the processor of the host system 130 as the product of the current amplitude and the voltage amplitude at the first time.

Similarly, in the example, the complex voltage and current at node N3 are measured for one or more additional times, and the measured complex voltage and current are transmitted to determine the one or more additional times at the model node. For example, the complex voltage and current at the model node N4m, the model node N1m, the model node N2m, and the model node N6m. In addition, for the one or more additional times, a complex voltage and current determined from the one or more additional times captures a voltage amplitude, a current amplitude, and a power amplitude. The processor of the host system 130 applies mathematical functions such as partial least squares, linear regression, etc. to the voltage amplitude, current amplitude, power amplitude, and measured wafer bias at the first time and one or more additional times, To determine the coefficients ax, bx, cx and the constant dx.

As another example of step 342, when the y MHz RF generator is on and the x MHz and z MHz RF generators are off, the wafer bias is determined by the following: ay * Vy + by * Iy + cy * sqrt (Py ) + dy, where "ay" is the coefficient, "by" is the coefficient, "dy" is the constant, "Vy" is the voltage amplitude of the second complex voltage and current, and "Iy" is the current amplitude of the second complex voltage and current "Py" is the power amplitude of the second complex voltage and current. The power amplitude Py is the product of the current amplitude Iy and the voltage amplitude Vy. As another example of step 342, when the z MHz RF generator is on and the x MHz and y MHz RF products are When the generator is closed, the wafer bias is determined by the following: az * Vz + bz * Iz + cz * sqrt (Pz) + dz, where "az" is a coefficient, "bz" is a coefficient, and "dz" is a constant "Vz" is the voltage amplitude of the second complex voltage and current, "Iz" is the current amplitude of the second complex voltage and current, and "Pz" is the power amplitude of the second complex voltage and current. The power amplitude Pz is the product of the current amplitude Iz and the voltage amplitude Vz.

As another example of step 342, when both the x MHz and y MHz RF generators are turned on and the z MHz RF generator is turned off, the wafer bias is the first product, the second product, the third product, the fourth product, the first product Sum of five products, sixth product, and a constant. The first product is the product of the first coefficient and the voltage amplitude Vx, the second product is the product of the second coefficient and the current amplitude Ix, the third product is the product of the third coefficient and the square root of the power amplitude Px, and the fourth product is fourth The product of the coefficient and the voltage amplitude Vy, the fifth product is the product of the fifth coefficient and the current amplitude Iy, and the sixth product is the product of the sixth coefficient and the square root of the power amplitude Py. When both the x MHz and y MHz RF generators are on and the z MHz RF generator is off, the wafer bias is represented by the following formula: axy * Vx + bxy * Ix + cxy * sqrt (Px) + dxy * Vy + exy * Iy + fxy * sqrt (Py) + gxy, where "axy", "bxy", "cxy", "dxy", "exy", "fxy", "dxy", "exy" and "fxy" are And "gxy" is constant.

As another example of step 342, when both the y MHz and z MHz RF generators are turned on and the x MHz RF generator is turned off, the wafer bias is determined by the following formula: ayz * Vy + byz * Iy + cyz * sqrt (Py) + dyz * Vz + eyz * Iz + fyz * sqrt (Pz) + gyz, where "ayz", "byz", "cyz", "dyz", "eyz" and "fyz" are coefficients and "gyz" "Is constant. As another example of step 342, when both the x MHz and z MHz RF generators are turned on and the y MHz RF generator is turned off, the wafer bias is determined by the following formula: axz * Vx + bxz * Ix + cxz * sqrt (Px) + dxz * Vz + exz * Iz + fxz * sqrt (Pz) + gxz, where "axz", "bxz", "cxz", "dxz", "exz" and "fxz" are coefficients and gxz Is constant.

As another example of step 342, when the x MHz, y MHz, and z MHz RF generators are all turned on, the wafer bias is determined as the first product, the second product, the third product, the fourth product, and the fifth product. , The sixth product, the seventh product, the eighth product, the ninth product, and a constant sum. The first product is the product of the first coefficient and the voltage amplitude Vx, the second product is the product of the second coefficient and the current amplitude Ix, the third product is the product of the third coefficient and the square root of the power amplitude Px, and the fourth product is fourth The product of the coefficient and the voltage amplitude Vy, the fifth product is the product of the fifth coefficient and the current amplitude Iy, the sixth product is the product of the sixth coefficient and the square root of the power amplitude Py, and the seventh product is the product of the seventh coefficient and the voltage amplitude Vz The product, the eighth product is the product of the eighth coefficient and the current amplitude Iz, and the ninth product is the product of the ninth coefficient and the square root of the power amplitude Pz. When the x MHz, y MHz, and z MHz RF generators are turned on, the wafer bias is represented by the following formula: axyz * Vx + bxyz * Ix + cxyz * sqrt (Px) + dxyz * Vy + exyz * Iy + fxyz * sqrt (Py) + gxyz * Vz + hxyz * Iz + ixyz * sqrt (Pz) + jxyz, where "axyz", "bxyz", "cxyz", "dxyz", "exyz", "fxyz", "gxyz "," Hxyz "and" ixyz "are coefficients and" jxyz "are constants.

As another example of determining wafer bias at the output of one or more models, the wafer bias at model node N1m is determined by the processor of host system 130 based on the voltage and current amplitude determined at model node N1m. Decide. For further explanation, the second complex voltage and current are transmitted along the component 173 (FIG. 1) to determine the complex voltage and current at the model node N1m. The manner in which the complex voltage and current at the model node N1m is determined from the second complex voltage and current is similar to the manner in which the second complex voltage and current is determined from the first complex voltage and current. For example, based on the characteristics of the components of the component 173, a second complex voltage and current is transmitted along the component 173 to determine the complex voltage and current at the model node N1m.

Based on the complex voltage and current determined at the model node N1m, the processor of the host system 130 determines the wafer bias at the model node N1m. For example, the crystal at model node N1m The manner in which the circular bias determines the complex voltage and current from the model node N1m is similar to the way that the wafer bias at the model node N4m determines the second complex voltage and current. To illustrate, when the x MHz RF generator is on and the y MHz and z MHz RF generators are off, the processor of the host system 130 (Figure 1) determines that the wafer bias at model node N1m is the first product and the second product Of the third product and a constant. In this example, the first product is the product of the first coefficient and the complex voltage and current voltage amplitude at the model node N1m, and the second product is the product of the second coefficient and the complex voltage and current amplitude of the current at the model node N1m The third product is the product of the square root of the third coefficient and the square root of the complex voltage and current power amplitude at the node N1m of the model. When the x MHz RF generator is on and the y MHz and z MHz RF generators are off, the wafer bias of model node N1m is represented by the formula: ax * Vx + bx * Ix + cx * sqrt (Px) + dx, Where "ax" is the first coefficient, "bx" is the second coefficient, "cx" is the third coefficient, "dx" is a constant, "Vx" is the voltage amplitude at the model node N1m, and "Ix" is the model node N1m The current amplitude at the location "Px" is the power amplitude at the model node N1m.

Similarly, wafer bias ay * Vy + by * Iy + cy * sqrt (Py) can be determined based on the complex voltage and current at model node N1m and based on which of the x MHz, y MHz, and z MHz RF generators is turned on. + dy, az * Vz + bz * Iz + cz * sqrt (Pz) + dz, axy * Vx + bxy * Ix + cxy * sqrt (Px) + dxy * Vy + exy * Iy + fxy * sqrt (Py) + gxy, axz * Vx + bxz * Ix + cxz * sqrt (Px) + dxz * Vz + exz * Iz + fxz * sqrt (Pz) + gxz, ayz * Vy + byz * Iy + cyz * sqrt (Py) + dyz * Vz + eyz * Iz + fyz * sqrt (Pz) + gyz and axyz * Vx + bxyz * Ix + cxyz * sqrt (Px) + dxyz * Vy + exyz * Iy + fxyz * sqrt (Py) + gxyz * Vz + hxyz * Iz + ixyz * sqrt (Pz) + jxyz.

As another example of determining wafer bias at the output of one or more models, the wafer bias at model node N2m is determined by the processor of host system 130 based on the voltage and current amplitude at model node N2m The decision is made in a similar way to the wafer bias at the model node N1m based on the voltage and current amplitude at the model node N1m. For further explanation, the decision mode The wafer bias at node N2m is ax * Vx + bx * Ix + cx * sqrt (Px) + dx, ay * Vy + by * Iy + cy * sqrt (Py) + dy, az * Vz + bz * Iz + cz * sqrt (Pz) + dz, axy * Vx + bxy * Ix + cxy * sqrt (Px) + dxy * Vy + exy * Iy + fxy * sqrt (Py) + gxy, axz * Vx + bxz * Ix + cxz * sqrt (Px) + dxz * Vz + exz * Iz + fxz * sqrt (Pz) + gxz, ayz * Vy + byz * Iy + cyz * sqrt (Py) + dyz * Vz + eyz * Iz + fyz * sqrt (Pz) + gyz and axyz * Vx + bxyz * Ix + cxyz * sqrt (Px) + dxyz * Vy + exyz * Iy + fxyz * sqrt (Py) + gxyz * Vz + hxyz * Iz + ixyz * sqrt (Pz ) + jxyz.

As another example of determining wafer bias at the output of one or more models, the wafer bias at model node N6m is determined by the processor of host system 130 based on the voltage and current amplitude at model node N6m. The decision is made in a similar way to the wafer bias at the model node N2m based on the voltage and current amplitude at the model node N2m. For further explanation, the wafer bias at model node N6m is determined as ax * Vx + bx * Ix + cx * sqrt (Px) + dx, ay * Vy + by * Iy + cy * sqrt (Py) + dy , Az * Vz + bz * Iz + cz * sqrt (Pz) + dz, axy * Vx + bxy * Ix + cxy * sqrt (Px) + dxy * Vy + exy * Iy + fxy * sqrt (Py) + gxy, axz * Vx + bxz * Ix + cxz * sqrt (Px) + dxz * Vz + exz * Iz + fxz * sqrt (Pz) + gxz, ayz * Vy + byz * Iy + cyz * sqrt (Py) + dyz * Vz + eyz * Iz + fyz * sqrt (Pz) + gyz and axyz * Vx + bxyz * Ix + cxyz * sqrt (Px) + dxyz * Vy + exyz * Iy + fxyz * sqrt (Py) + gxyz * Vz + hxyz * Iz + ixyz * sqrt (Pz) + jxyz.

It should be noted that in some embodiments, the wafer bias is stored in storage HU 162 (FIG. 1).

The state diagram of FIG. 14 illustrates an embodiment of a wafer bias generator 340 implemented in the host system 130 (FIG. 1). When the x MHz, y MHz, and z MHz RF generators are all turned off, the wafer bias at model nodes such as model nodes N4m, N1m, N2m, N6m (Figure 1), etc. is zero or minimum. When the x MHz, y MHz, or z MHz RF generator is turned on and the rest of the x MHz, y MHz, and z MHz RF generators are turned off, the wafer bias generator 340 decides on a model node such as the model node N4m, The wafer bias at N1m, N2m, N6m, etc. is the sum of the first product a * V, the second product b * I, the third product c * sqrt (P), and a constant d, where V is the sum at the model node The voltage amplitude of the complex voltage and current, I is the current amplitude of the complex voltage and current, P is the power amplitude of the complex voltage and current, a is a coefficient, b is a coefficient, c is a coefficient, and d is a constant. In different embodiments, the power amplitude at the model node is the product of the current amplitude at the model node and the voltage amplitude at the model node. In some embodiments, the power amplitude is the amplitude of the delivered power.

When both of the x MHz, y MHz, and z MHz RF generators are turned on and the remainder of the x MHz, y MHz, and z MHz RF generators are turned off, the wafer bias generator 340 decides on a model node such as a model The wafer bias at nodes N4m, N1m, N2m, N6m, etc. are the first product a12 * V1, the second product b12 * I1, the third product c12 * sqrt (P1), the fourth product d12 * V2, and the fifth product The sum of e12 * I2, the sixth product f12 * sqrt (P2) and a constant g12, where: "V1" is the voltage amplitude of the complex voltage and current at the model node, which is achieved by making the first in the RF generator The voltage transmission measured at the output of an open RF generator is determined; "I1" is the current amplitude of the complex voltage and current, which is obtained by making the first open RF generator in the RF generator. "P1" is the power amplitude of the complex voltage and current, which is determined by the product of V1 and I1; "V2" is the complex voltage and current at the node of the model Voltage amplitude, which is measured by the voltage measured at the output of the second RF generator that is turned on in the RF generator. Determined; "I2" is the current amplitude of the complex voltage and current, which is determined by the current transmission measured at the output location of the second turned-on RF generator in the RF generator; "P2" is Power amplitude, which is determined by the product of V1 and I1; each of "a12", "b12", "c12", "d12", "e12", and "f12" is a coefficient, and "g12" is a constant .

When the x MHz, y MHz, and z MHz RF generators are all turned on, the wafer bias generator 340 determines the wafer bias at model nodes such as model nodes N4m, N1m, N2m, N6m, etc. as First product a123 * V1, second product b123 * I1, third product c123 * sqrt (P1), fourth product d123 * V2, fifth product e123 * I2, sixth product f123 * sqrt (P2), seventh The sum of the product g123 * V3, the eighth product h123 * I3, the ninth product i123 * sqrt (P3), and a constant j123, where: "V1" is the voltage amplitude of the complex voltage and current at the model node. It is determined by the voltage transmission measured at the first output location of the RF generator; "I1" is the current amplitude of the complex voltage and current, which is achieved by using the first output location of the RF generator Determined by the measured current transmission; "P1" is the power amplitude of the complex voltage and current, which is determined by the product of V1 and I1; "V2" is the voltage amplitude of the complex voltage and current at the model node, It is determined by the voltage transmission measured at the output of the second one in the RF generator; "I2" is the current amplitude of the complex voltage and current, which is made by the second in the RF generator Determined by the measured current transmission at the output location; "P2" is the power amplitude of the complex voltage and current , Which is determined by the product of V2 and I2; "V3" is the voltage amplitude of the complex voltage and current at the node of the model, which is the voltage measured by the third output in the RF generator Transmission is determined; "I3" is the current amplitude of the complex voltage and current, which is determined by the current transmission measured at the output of the third RF generator; "P3" is the complex voltage and current Power amplitude, which is determined by the product of V3 and I3; "a123", "b123", "c123", "d123", "e123", "f123", "g123", "h123" and "i123" Each is a coefficient, and "j123" is a constant.

FIG. 15 is a flowchart of an embodiment of method 351. Method 351 is used to determine the wafer bias at a point along path 353 (FIG. 16). Path 353 is between model node N4m (FIG. 16) and ESC. Model 125 (Figure 16). The description of FIG. 15 refers to FIG. 16, which is a block diagram of an embodiment of a system 355 for determining a wafer bias at an output of a model.

In step 357, the output of the x MHz, y MHz, or z MHz RF generator is detected to identify the generator output complex voltage and current. For example, the voltage and current probe 110 (Figure 1) Complex voltage and current at point N3 (Figure 1). In this example, the host system 130 (FIG. 1) receives a plurality of voltages and currents from the voltage and current probe 110 through the communication device 185 (FIG. 1), so that it can be stored in the storage HU 162 (FIG. 1). Also, in an example, the processor of the host system 130 recognizes a plurality of voltages and currents from the storage HU 162.

In step 359, the processor of the host system 130 uses the generator to output complex voltages and currents to determine the projected complex voltages and currents at one point along a path 353 between the model node N4m and the model node N6m. The path 161 extends from the model node N4m to the model node N6m. For example, the fifth complex voltage and current is determined by the complex voltage and current measured at the output of the x MHz RF generator, y MHz RF generator, or z MHz RF generator. As another example, the complex voltage and current measured at the node N3 or the node N5 are transmitted through the impedance matching model 104 to determine the complex voltage and current at the model node N4m (FIG. 1). In this example, the complex voltage and current at the model node N4m are transmitted through one or more elements of the RF transmission model 161 (Fig. 16) and / or one or more elements of the ESC model 125 (Fig. 16) to Determines the complex voltage and current at one point on path 353.

In step 361, the processor of the host system 130 takes the projected complex voltage and current determined at a point on the path 353 as input as a function to map the projected complex voltage and current to the ESC model 125 (FIG. 15). Wafer bias value at node N6m. For example, when the x MHz, y MHz, or z MHz RF generator is on, the wafer bias at model node N6m is determined as the first product a * V, the second product b * I, and the third product c * sqrt ( P) and a constant d, where “V” is the voltage amplitude of the projected complex voltage and current at the model node N6m, “I” is the current amplitude of the projected complex voltage and current at the model node N6m, and “P” "" Is the power amplitude of the projected complex voltage and current at the model node N6m, while "a", "b", and "c" are coefficients, and "d" is a constant.

As another example, when both of the x MHz, y MHz, and z MHz RF generators are turned on and the remaining one of the x MHz, y MHz, and z MHz RF generators is turned off, the wafer at model node N6m The bias system is determined as the first product a12 * V1, the second product b12 * I1, the third product c12 * sqrt (P1), the fourth product d12 * V2, the fifth product e12 * I2, and the sixth product f12 * sqrt ( P2) and the constant g12, where: "V1" is the voltage amplitude at the model node N6m, which is the result of the first of the two open RF generators; "I1" is the current at the model node N6m Amplitude, which is the result of the first person of the open RF generator; "P1" is the power amplitude at the model node N6m, which is the result of the first person of the open RF generator; "V2" is the model node The voltage amplitude at N6m is the result of the second one of the turned-on RF generator; "I2" is the current amplitude at the model node N6m, which is the result of the second of the turned-on RF generator; "P2" Is the power amplitude at the model node N6m, which is the result of the second one of the turned-on RF generator; "a12", "b12", "c12", "d12 , "E12" and "f12" is a coefficient, "g12" is a constant.

As another example, when all of the x MHz, y MHz, and z MHz RF generators are turned on, the wafer bias at the model node N6m is determined to be the first product a123 * V1 and the second product b123 * I1. , Third product c123 * sqrt (P1), fourth product d123 * V2, fifth product e123 * I2, sixth product f123 * sqrt (P2), seventh product g123 * V3, eighth product h123 * I3, first The sum of the nine products i123 * sqrt (P3) and the constant j123, where "V1", "I1", "P1", "V2", "I2", and "P2" have been explained in the previous example. The definition is as follows: "V3" is the voltage amplitude at the model node N6m, which is the result of the third of the three open RF generators; "I3" is the current amplitude at the model node N6m, which is the open RF The result of the third party of the generator; "P3" is the power amplitude at the model node N6m, which is the result of the third party of the turned-on RF generator; "a123", "b123", "c123", "d123" "", "E123", "f123", "g123", "h123", and "i123" are coefficients, and "j123" is a constant.

As another example, the function used to determine the wafer bias is the sum of the eigenvalue and the constant. Eigenvalues include amplitudes such as amplitudes V, I, P, V1, I1, P1, V2, I2, P2, V3, I3, P3, and so on. Eigenvalues also include coefficients such as coefficients a, b, c, a12, b12, c12, d12, e12, f12, a123, b123, c123, d123, e123, f123, g123, h123, i123, and so on. Examples of the constant include a constant d, a constant g12, a constant j123, and the like.

It should be noted that the coefficients of the eigenvalues and the constants of the eigenvalues include data from empirical models. For example, a wafer bias sensor is used to measure wafer bias multiple times at ESC 177 (Figure 1). Also, in this example, for the wafer bias measured multiple times, the complex voltage and current at one point along the path 353 (FIG. 16) are determined in the following manner: The complex voltage and current are derived from multiple RF Generators such as one or more nodes of x MHz RF generator, y MHz RF generator, z MHz RF generator, etc., such as one or more nodes N3, N5, etc. by models such as impedance matching model 104, model components 173. One or more of the RF transmission model 161 and the ESC model 125 (Fig. 1) arrive at this point on the path 353 (Fig. 16). Also, in this example, the processor of the host system 130 applies statistical methods such as partial least squares method, regression method, etc. to the measured wafer bias and to the complex voltages and currents extracted from that point. Voltage amplitude, current amplitude and power amplitude to determine the coefficient of the characteristic value and the constant of the characteristic value.

In different embodiments, the function used to determine the wafer bias is characterized by the sum of the values representing the physical characteristics of the path 353. The physical characteristics of the path 353 are derived values from test data such as empirical model data. Examples of the physical characteristics of the path 353 include capacitance values, inductance values, combinations thereof, and the like of the elements on the path 353. As mentioned above, the capacitance and / or inductance of the components on path 353 will affect the voltage and current empirically determined by the projection method at one point on path 353, and will therefore affect the coefficients of the eigenvalues and the constants of the eigenvalues .

In some embodiments, the function used to determine the wafer bias is a polynomial.

FIG. 17 is a flowchart of an embodiment of a method 363 for determining a wafer bias at a model node of the system 126 (FIG. 1). The description of FIG. 17 refers to FIGS. 1 and 16. The method 363 is executed by a processor (FIG. 1) of the host system 130. In step 365, the host system 130 receives one or more complex voltages and currents from one or more communication devices of the generator system. The generator system includes an x MHz RF generator, a y MHz RF generator, and a z MHz RF generator. One or more of them. For example, the communication device 185 (FIG. 1) receives the complex voltage and current measured at the node N3. As another example, the communication device 189 (FIG. 1) receives the complex voltage and current measured at the node N5. As still another example, the complex voltage and current measured at the node N3 and the complex voltage and current measured at the node N5 are received. It should be noted that the output of the generator system includes one or more of the output nodes of nodes N3, N5, and z MHz RF generator.

In step 367, based on one or more of the complex voltages and currents at the output of the generator system, a projected complex voltage and current is determined along a path such as path 353 (FIG. 16), path 353 (FIG. 16) ) Is between the impedance matching model 104 and the ESC model 125 (FIG. 16). For example, the complex voltage and current at the output of the generator system are projected by the impedance matching model 104 (FIG. 16) to determine the complex voltage and current at the model node N4m. As another example, the complex voltage and current at the output of the generator system are projected by the impedance matching model 104 (Figure 16) and the component 173 (Figure 1) of the RF transmission model 161 to determine the model node N1m (Figure 1). Complex voltage and current at 1). As yet another example, the complex voltage and current at the output of the generator system are projected by the impedance matching model 104 and the RF transmission model 161 to determine the complex voltage and current at the model node N2m (Figure 1). As another example, the complex voltage and current at the output of the generator system are projected through the impedance matching model 104 and the RF transmission model 161 and the ESC model 125 to determine the complex voltage and current at the model node N6m (Figure 1). Current.

In step 369, the projected complex numbers V and I are used as inputs for a function to calculate the wafer bias at a point along the path 353. For example, when the x MHz, y MHz, or z MHz RF generator is on and the remainder of the x MHz, y MHz, and z MHz RF generator is off, the wafer bias at this point is determined by a function, which is Is the sum of the first product a * V, the second product b * I, the third product c * sqrt (P), and the constant d, where "V" is the voltage amplitude of the projected complex voltage and current at that point, " "I" is the current amplitude of the projected complex voltage and current at that point, "P" is the power amplitude of the projected complex voltage and current at that point, "a", "b", and "c" are coefficients and " "d" is a constant.

As another example, when both of the x MHz, y MHz, and z MHz RF generators are turned on and the remaining one of the x MHz, y MHz, and z MHz RF generators is turned off, the wafer bias at that point The pressure system is determined as the first product a12 * V1, the second product b12 * I1, the third product c12 * sqrt (P1), the fourth product d12 * V2, the fifth product e12 * I2, and the sixth product f12 * sqrt (P2 ) And the constant g12, where: "V1" is the voltage amplitude at this point, which is the result of the first of the two RF generators turned on; "I1" is the current amplitude at this point, which is The result of the first one in the turned-on RF generator; "P1" is the power amplitude at that point, which is the result of the first one in the turned-on RF generator; "V2" is the voltage amplitude at that point, which is The result of the second of the two RF generators turned on; "I2" is the current amplitude at that point, which is the result of the second of the RF generators turned on; "P2" is the power amplitude at that point, It is the result of the second of the turned-on RF generators; "a12", "b12", "c12", "d12", "e12", and "f12" are coefficients, and "g12" is a constant.

As another example, when all of the x MHz, y MHz, and z MHz RF generators are turned on, the wafer bias at this point is determined as the first product a123 * V1, the second product b123 * I1, the first product Triple product c123 * sqrt (P1), fourth product d123 * V2, fifth product e123 * I2, sixth product f123 * sqrt (P2), seventh product g123 * V3, eighth product h123 * I3, ninth product The sum of i123 * sqrt (P3) and the constant j123, where V1, I1, P1, V2, I2, and P2 have been described in the previous embodiment, and the definitions of others are as follows Bottom: V3 is the voltage amplitude at this point, which is the result of the third person in the turned-on RF generator; "I3" is the current amplitude at this point, which is the result of the third person in the turned-on RF generator ; "P3" is the power amplitude at this point, which is the result of the third person in the turned-on RF generator; "a123", "b123", "c123", "d123", "e123", "f123", "G123", "h123", and "i123" are coefficients, and "j123" is a constant.

FIG. 18 is a block diagram of an embodiment of the system 330. The system 330 is used to illustrate using the method 340 (FIG. 13), the method 351 (FIG. 15), or the method 363 (FIG. 17) instead of using the voltage probe 332 such as a voltage sensor. Tester, etc. to determine the advantages of wafer bias.

The voltage probe 332 is coupled to the node N1 to determine the voltage at the node N1. In some embodiments, the voltage probe 332 is coupled to another node such as node N2, N4, etc. to determine the voltage at this other node. The voltage probe 332 includes a complex circuit such as an RF distribution circuit, a filter circuit 1, a filter circuit 2, a filter circuit 3, and the like.

In addition, the x MHz and y MHz RF generators are coupled to a host system 334 including a noise or signal determination module 336. It should be noted that the module may include a processor, an ASIC, a PLD, software executed by the processor, or a combination thereof.

The voltage probe 332 measures the voltage amplitude, and the host system 334 uses this voltage amplitude to determine the wafer bias. The module 336 determines whether the voltage amplitude measured by the voltage probe 332 is a signal or noise. After determining that the voltage amplitude measured by the voltage probe 332 is a signal, the host system 334 determines the wafer bias.

Compared to system 330, system 126 (FIG. 1) is less expensive and saves time and effort. The system 330 includes a voltage probe 332, but the system 126 need not include a voltage probe 332. To determine wafer bias, it is not necessary to couple the voltage probes to nodes N4, N1, or N2 of the system 126. In the system 126, the wafer bias is based on the impedance matching model 104, the RF transmission model 161, and / or the ESC model 125 (Fig. 1) The decision. Also, the system 330 includes the module 336, but the system 126 need not include the module 336. There is no need to waste time and energy to judge the complex voltage and current as signals or noise. The host system 130 (FIG. 1) does not need to make such a judgment.

Figures 19A, 19B, and 19C show the embodiments of Figures 328, 332, and 336. Figures 328, 332, and 336 are used to illustrate the voltage measured by the voltage probe at the output of component 195 (Figure 1), such as node N1. For example, the correlation between the peak voltage and the like and the voltage such as the peak voltage determined by the method 102 (FIG. 2) at the corresponding model node output such as the node N1m is linear correlation. In each of the graphs 328, 332, and 336, the measured voltage system is plotted on the y-axis and the voltage system determined by the method 102 is plotted on the x-axis.

19A, 19B, and 19C show the embodiments of FIGS. 330, 334, and 338. FIGS. 330, 334, and 338 are used to illustrate the crystal measured by the wafer bias probe at the output N6 (FIG. 1). The correlation between the circular bias voltage and the wafer bias voltage determined by method 340 (Figure 13), method 351 (Figure 15), or method 363 (Figure 17) at the corresponding model node output, such as node N6m, is as a linear correlation. Sex, etc. In each of FIGS. 330, 334, and 338, the wafer bias measured with the wafer bias probe is plotted on the y-axis and the wafer bias determined by method 340, method 351, or method 363 is used. The pressure system is plotted on the x-axis.

When the y MHz and z MHz RF generators are on and the x MHz RF generator is off, the voltage and wafer bias are plotted in graphs 328 and 330. Also, when the x MHz and z MHz RF generators are turned on and the y MHz RF generator is turned off, the voltage and wafer bias are plotted in Figures 332 and 334. Also, when the x MHz and y MHz RF generators are on and the z MHz RF generator is off, the voltages are plotted in Figures 336 and 338.

Fig. 20A shows an embodiment of Figs. 276 and 278, and Figs. 276 and 278 are used to illustrate the correlation between the following three: using sensor equipment such as measuring equipment, probes, sensors, wafer bias detection Pin Bias Measured by Pin, etc., Using Method 340 (Figure 13), Method 351 (Figure 15), or 363 (Figure 17) The model wafer bias determined and the error in the model bias. The wiring wafer bias shown in Figure 276 is measured at a point such as the node of the RF transmission line 113, the node on the upper surface 183 (Figure 1) of the ESC 177, and the model bias shown in Figure 276. Corresponding model nodes on the path 353 (Fig. 16) are determined such as model node N4m, model node N1m, model node N2m, and model node N6m (Fig. 1). The wiring wafer bias is plotted along the y-axis in Figure 276, and the model bias is plotted along the x-axis in Figure 276.

When the x MHz RF generator is on and the y MHz and z MHz RF generators are off, the wiring wafer bias and model bias are plotted in Figure 276. In addition, the model bias of Figure 276 is determined using the following equation: a2 * V2 + b2 * I2 + c2 * sqrt (P2) + d2, where "*" represents multiplication, "sqrt" represents the square root, and "V2" represents the The voltage at one point on path 353 (Figure 16), "I2" represents the current at that point, "P2" represents the power at that point, "a2" is the coefficient, "b2" is the coefficient, and "c2" is The coefficient and "d2" are constant.

Figure 278 plots the error at this point on the y-axis and the model bias at that point on the x-axis. The error at this point is the error in the model bias at that point. Model errors are errors in the model bias such as variation and standard deviation. When the x MHz RF generator is on and the y MHz and z MHz RF generators are off, the model error and the model bias are plotted in Figure 278.

FIG. 20B shows an embodiment of FIGS. 280 and 282. FIGS. 280 and 282 are used to explain the wiring wafer bias, which is determined by using method 340 (FIG. 13), method 351 (FIG. 15) or method 363 (FIG. 17) Correlation between model bias and errors in model bias. Figures 280 and 282 are similar to those in Figures 276 and 278 (Figure 20A), except that 280 and 282 are plotted with the y MHz RF generator turned on and x and z MHz RF generators turned off. the way. In addition, the model bias of Figures 280 and 282 is determined using the following equation: a27 * V27 + b27 * I27 + c27 * sqrt (P27) + d27, where "V27" represents a point along path 353 (Figure 16) The voltage amplitude at the point, "I27" represents the point Current amplitude, "P27" represents the power amplitude at that point, "a27" is a coefficient, "b27" is a coefficient, "c27" is a coefficient, and "d27" is a constant.

FIG. 20C shows one embodiment of FIGS. 284 and 286. FIGS. 284 and 286 are used to explain the wiring wafer bias, which is determined by using method 340 (FIG. 13), method 351 (FIG. 15), or method 363 (FIG. 17) Correlation between model bias and errors in model bias. Figures 284 and 286 are plotted similar to Figures 276 and 278 (Figure 20A), except that Figures 284 and 286 are drawn with the z MHz RF generator turned on and x MHz and y MHz RF generator turned off. the way. In addition, the model bias of Figures 284 and 286 is determined using the following equation: a60 * V60 + b60 * I60 + c60 * sqrt (P60) + d60, where "V60" represents a point along the path 353 (Figure 16) The voltage amplitude at the point, "I60" represents the current amplitude at that point, "P60" represents the power amplitude at that point, "a60" is a coefficient, "b60" is a coefficient, "c60" is a coefficient, and "d60" is a constant .

FIG. 20D shows an embodiment of FIGS. 288 and 290. FIGS. 288 and 290 are used to explain the wiring wafer bias, the method determined by using method 340 (FIG. 13), method 351 (FIG. 15), or method 363 (FIG. 17) Correlation between model bias and errors in model bias. Figures 288 and 290 are plotted similar to Figures 276 and 278 (Figure 20A), except that the x MHz and y MHz RF generators are turned on and the z MHz generator is turned off. . In addition, the model bias of Figures 288 and 290 is determined using the following equation: a227 * V2 + b227 * I2 + c227 * sqrt (P2) + d227 * V27 + e227 * I27 + f227 * sqrt (P27) + g227, where "A227", "b227" and "c227", "d227", "e227" and "f227" are coefficients, and "g227" is a constant.

FIG. 20E shows one embodiment of FIGS. 292 and 294. FIGS. 292 and 294 are used to explain the wiring wafer bias, which is determined by using method 340 (FIG. 13), method 351 (FIG. 15), or method 363 (FIG. 17). Correlation between model bias and errors in model bias. Except that Figures 292 and 294 are plotted with the x MHz and z MHz RF generators turned on and y MHz generators turned off, the plots of Figures 292 and 294 The format is similar to that of Figures 276 and 278 (Figure 20A). In addition, the model bias of Figures 292 and 294 is determined by the following equation: a260 * V2 + b260 * I2 + c260 * sqrt (P2) + d260 * V60 + e260 * I60 + f260 * sqrt (P60) + g260, where "A260", "b260", "c260", "d260", "e260", and "f260" are coefficients, and "g260" is a constant.

FIG. 20F shows one embodiment of FIGS. 296 and 298. FIGS. 296 and 298 are used to explain the wiring wafer bias, which is determined by using method 340 (FIG. 13), method 351 (FIG. 15), or method 363 (FIG. 17). Correlation between model bias and errors in model bias. Figures 296 and 298 are plotted similar to Figures 276 and 278 (Figure 20A) except that y and z MHz RF generators are turned on and x MHz generator is turned off. . In addition, the model bias of Figures 296 and 298 is determined by the following equation: a2760 * V27 + b2760 * I27 + c2760 * sqrt (P27) + d2760 * V60 + e2760 * I60 + f2760 * sqrt (P60) + g2760, where "A2760", "b2760", "c2760", "d2760", "e2760", "f2760" are coefficients, and "g2760" is a constant.

FIG. 20G shows an embodiment of FIGS. 302 and 304. FIGS. 302 and 304 are used to explain the wiring wafer bias, which is determined by using method 340 (FIG. 13), method 351 (FIG. 15), or method 363 (FIG. 17). Correlation between model bias and errors in model bias. Except that FIGS. 302 and 304 are drawn with the x MHz, y MHz, and z MHz RF generators turned on, the drawing manner of FIGS. 302 and 304 is similar to the drawing manner of FIGS. 276 and 278 (FIG. 20A). In addition, the model bias of Figures 302 and 304 is determined by the following equation: a22760 * V2 + b22760 * I2 + c22760 * sqrt (P2) + d22760 * V27 + e22760 * I27 + f22760 * sqrt (P27) + g22760 * V60 + h22760 * I60 + i22760 * sqrt (P60) + j22760, among which "a22760", "b22760", "c22760", "d22760", "e22760", "f22760", "g22760", "h22760", "i22760" Is a coefficient, and "j22760" is a constant.

FIG. 21 is a block diagram of an embodiment of the host system 130. The host system 130 includes a processor 168, a storage HU 162, an input HU 380, an output HU 382, an input / output (I / O) interface 384, I / O interface 386, network interface controller (NIC) 388, and bus 392. The processor 168, the storage HU 162, the input HU 380, the output HU 382, and the I / O interface 384, the I / O interface 386, and the NIC 388 are coupled to each other through the bus 392. Examples of the input HU 380 include a mouse, a keyboard, a stylus, and the like. Examples of the output HU 382 include a display, a speaker, or a combination thereof. Examples of the display include a liquid crystal display, a light emitting diode display, a cathode tube, a plasma display, and the like. Examples of the NIC 388 include a network interface card, a network adapter, and the like.

Examples of I / O interfaces include interfaces that provide matching between hardware coupled to the interface. For example, the I / O interface 384 converts signals received from the input HU 380 into a form, amplitude, and / or speed that matches the bus 392. As another example, the I / O interface 386 converts signals received from the bus 392 into a form, amplitude, and / or speed that matches the output HU 382.

It should be noted that in some embodiments, the wafer bias is used to determine the clamping voltage used to clamp the work piece 131 (FIG. 1) to the ESC 177 (FIG. 1). For example, when there is no wafer bias in the plasma chamber 175 (FIG. 1), the two electrodes in the ESC 177 have voltages with opposite polarities but equivalent amplitudes to clamp the work piece 131 to the ESC 177. In an example, when the plasma chamber 175 (FIG. 1) has a wafer bias, the voltage amplitudes supplied to the two electrodes are different to compensate for the existing wafer bias. In various embodiments, the wafer bias is used to compensate the bias at ESC 177 (Figure 1).

It should also be noted that instead of using voltage to compensate for the bias at ESC 177, using three parameters such as current amplitude, voltage amplitude, and phase between current and voltage to determine wafer bias can better determine wafer bias. . For example, compared to the relationship between the RF voltage and the nonlinear plasma domain, the wafer bias calculated using the three parameters has a stronger correlation with the nonlinear plasma domain. As another example, the wafer bias calculated using the three parameters is more accurate than the wafer bias determined using the voltage probe.

FIG. 22 shows an embodiment of a function for explaining self-wafer bias and peak amplitude to determine ion energy. The ion energy is determined by the processor 168 of the host system 130 (Figure 21) Implemented. For example, the ion energy is calculated as the sum of the wafer bias at the model node N6m such as the model bias multiplied by the coefficient "C1" and the peak amplitude of the voltage of one or more RF generators multiplied by the coefficient "C2". Examples of the coefficient "C1" include negative real numbers, and examples of the coefficient "C2" include positive real numbers.

In different embodiments, the coefficient "C1" is a positive real number. In different embodiments, the coefficient "C1" is a negative real number. The coefficients "C1" and "C2", wafer bias, and peak amplitude are all stored in the storage HU 162 (Fig. 21). Examples of peak amplitude include peak-to-peak amplitude and zero-to-peak amplitude.

In some embodiments, the peak amplitude used to determine the ion energy is captured by the processor 168 of the host system 130 from the complex voltage and current at the model node N6m (FIG. 1). In different embodiments, the peak amplitude used to determine the ion energy is captured by the processor 168 of the host system 130 from the complex voltage and current at the model node N2m or the model node N1m or the model node N4m (FIG. 1).

In different embodiments, the peak amplitude used to calculate the ion energy is measured by a voltage and current probe. One end of the voltage and current probe is coupled to node N1 or node N2 (Figure 1) or node N6 (Figure 1). 1) The other end is coupled to the processor 168. The voltage and current probes coupled to node N1 or node N2 or node N6 are able to distinguish the frequencies of the x MHz and y MHz RF generators.

In some embodiments, both the peak amplitude used to determine the ion energy and the wafer bias are taken from a model node. For example, the peak amplitude used to determine the ion energy is extracted from the complex voltage and current at the model node N6m, and the wafer bias used to determine the ion energy is calculated at the model node N6m. As another example, the peak amplitude used to determine the ion energy is extracted from the complex voltage and current at the model node N2m, and the wafer bias used to determine the ion energy is calculated at the model node N2m.

In different embodiments, the peak amplitude used to determine the ion energy is extracted from the complex voltage and current at the first model node, and the wafer bias used to determine the ion energy is at the second non-first model node. Decision at the model node. For example, the peak amplitude used to determine the ion energy is derived from the model The complex voltage and current at node N6m are extracted, and the wafer bias used to determine the ion energy is calculated at model node N2m. As another example, the peak amplitude used to determine the ion energy is extracted from the complex voltage and current at the model node N2m, and the wafer bias used to determine the ion energy is calculated at the model node N6m.

In several embodiments, the peak amplitude used to calculate the ion energy is one or more of one or more of the x MHz and y MHz RF generators (Figure 1), such as node N3, node N5, etc. (Figure 1) At the voltage. In embodiments where a complex RF generator is used, such as x MHz and y MHz RF generators, the peak voltage is measured by a voltage and current probe coupled at one end to node N3 and at the other end to processor 168, and The processor 168 calculates an algebraic combination of peak voltages at the output such as sum, average, etc. to calculate the peak amplitude used to calculate the ion energy. Examples of voltage and current probes coupled to any of nodes N3 and N5 include NIST probes.

In some embodiments, the root-mean-square amplitude is used instead of the peak amplitude.

In some embodiments, the ion energy is determined by the processor 168 of the host system 130 as a function of the wafer bias and the RF voltage amplitudes Vx, Vy, Vz, etc. used to calculate the wafer bias. For example, the processor of the host system 130 determines the ion energy as: Ei = (-1/2) Vdc + (1/2) Vpeak

Where Ei is the ion energy, Vdc is the wafer bias, and Vpeak is the voltage used to calculate the zero to peak value of the wafer bias. Vpeak is a peak voltage such as voltage Vx, Vy or Vz.

In various embodiments, the ion energy is the energy formed in the plasma of the plasma chamber.

In some embodiments, when the complex RF generator is turned on, the Vpeak used to calculate the wafer bias is the voltage of the RF generator with the lowest frequency among all RF generators. For example, Vpeak is equal to Vx. In different embodiments, when the complex RF generator is turned on, the Vpeak is the voltage of the RF generator with the highest frequency of all RF generators. For example, Vpeak is equal to Vz. In different embodiments, when the complex RF generator is turned on, the Vpeak used to calculate the ion energy is the voltage of the RF generator whose frequency is between the lowest frequency and the highest frequency. For example, Vpeak is equal to Vy. In several embodiments, Vpeak is the statistical value of the peak RF voltage of the turned-on RF generator, such as the median, average, and other peak voltages. The ion energy calculated in this way eliminates the need to use expensive voltage probe equipment to measure Vpeak and does not require the use of a bias compensation circuit to measure wafer bias. The voltage probe used to measure Vpeak may be inaccurate. An example of a bias compensation circuit is a silicon carbide plug. Utilizing the ion energy determined by various embodiments of the present invention results in a low mean time between failures (MTBF).

It should be noted that in some embodiments, the value of the ion energy is stored in the storage HU 162.

It should also be noted that although the above steps refer to a parallel plate plasma chamber, such as a capacitive coupling plasma chamber, etc., in some embodiments, the above steps can be applied to other types of plasma, such as those including inductively coupled plasma (ICP). Reaction chamber, transformer-coupled plasma (TCP) reaction chamber, conductor equipment, dielectric equipment, plasma chamber including electron cyclotron resonance (ECR) reaction chamber, etc. For example, an x MHz RF generator and a y MHz RF generator are coupled to an inductor in the ICP plasma chamber.

It should also be noted that although the above steps are performed by the processor (FIG. 1) of the host system 130, in some embodiments, the steps may be performed by one or more processors of the host system 130, or multiple Multiple processors of the host system execute.

It should be noted that although the above-mentioned embodiment is about supplying the RF signal to the lower electrode of ESC 177 (Figures 1 and 8) and the lower electrode of ESC 192 (Figure 11) and the upper electrodes 179 and 264 (Figures 1 and 11) Ground, but in several embodiments, RF signals are provided to the upper electrodes 179 and 264 and the lower electrodes of the ESC 177 and 192 are grounded.

The embodiments described herein can be implemented using a variety of computer system configurations including hand-held hardware units, microprocessor systems, microprocessor systems or programmable consumer electronics devices, mini computers, hosts, etc. . The embodiments described herein may also be implemented in a decentralized computing environment where tasks are performed by a plurality of remote processing hardware units linked via a network.

In view of the above embodiments, it should be understood that the embodiments can perform various computer execution steps involving data stored in a computer system. These steps require physical manipulation of physical quantities. Any of the steps described forming part of an embodiment are useful mechanical steps. The embodiments are also related to a hardware unit or device that performs these steps. Devices can be constructed specifically for special purpose computers. When a computer is defined as a special-purpose computer, in addition to being able to run for special purposes, the computer can also perform other processing, program execution, or other sub-programs that are not special-purpose. In some embodiments, the steps may be performed by a selectively activated general-purpose computer or may be configured by one or more computer programs stored in computer memory, cache memory, or obtained from a network. When the data is obtained from the network, the data can be processed by other computers on the network, such as cloud computing resources.

One or more embodiments may be made into computer-readable codes on a non-transitory computer-readable medium. A non-transitory computer-readable medium may be any data storage hardware unit that can store data and can subsequently be read by a computer system. Examples of non-transitory computer-readable media include hard disks, network-attached storage (NAS), ROM, RAM, compact disc-ROM (CD-ROM), recordable CD (CD-R), and rewritable CD (CD-RW), magnetic tape, and other optical and non-optical storage hardware units. Non-transitory computer-readable media may include computer-readable physical media that are dispersed in network-coupled computer systems, so computer-readable codes are stored and executed in a decentralized manner.

Although the method steps in the flowcharts of FIG. 2, FIG. 13, FIG. 15, and FIG. 17 are described in a specific order, it should be understood that as long as the overall steps of the method can be performed in a desired manner, other steps can be performed between the steps. Idle steps or steps that can be adjusted to occur slightly different times, or The steps are assigned to a system that allows processing steps to be performed at different intervals related to the processing, or the steps may be performed in a different order than shown in the illustration.

One or more features from any embodiment may be combined with one or more features of any other embodiment without departing from the scope of the various embodiments described herein.

In order that those skilled in the art can clearly understand the present invention, the foregoing embodiments have been described in detail. It should be understood that certain changes and modifications may be made within the scope of the accompanying patent application. Therefore, these embodiments should be considered as illustrative and not restrictive, and the embodiments are not limited to the details described herein, and they can be modified within the scope and equivalents of the scope of the accompanying application.

Claims (23)

A method for determining ion energy, the method includes the following steps: when a radio frequency (RF) generator is coupled to a plasma chamber through an impedance matching circuit, receiving a voltage and current from a voltage and current probe; A first complex voltage and current measured by a probe at an output of the radio frequency generator, wherein the voltage and current probes are coupled to the output of the radio frequency generator, wherein the radio frequency generator's the The output is coupled to an input of the impedance matching circuit via a radio frequency cable, and the impedance matching circuit has an output coupled to an RF transmission line; an impedance matching model is generated based on the electronic components defined in the impedance matching circuit, The impedance matching model has an input and an output. The input of the impedance matching model receives the first complex voltage and current. The impedance matching model has one or more components. The first complex voltage and current are transmitted through the impedance. Match the one or more components of the model to determine a second complex voltage and current; obtain a peak voltage; based on the second complex voltage and current Given a wafer bias voltage; and determining the ion energy on the wafer bias voltage and the peak voltage. For example, the method for determining ion energy in the first item of the patent application, wherein the wafer bias is based on the voltage amplitude of the second complex voltage and current, the current amplitude of the second complex voltage and current, and the second complex voltage. And the power amplitude of the current, wherein determining the wafer bias includes: calculating the power amplitude based on the voltage amplitude and the current amplitude; and calculating a sum of a first product, a second product, a third product, and a constant, where the first A product is the product of the voltage amplitude and a first coefficient, the second product is the product of the current amplitude and a second coefficient, and the third product is the product of the square root of the power amplitude and a third coefficient. For example, the method for determining the ion energy of the first patent application range, wherein the RF generator includes a 2 megahertz RF generator, a 27 megahertz RF generator, or a 60 megahertz RF generator . For example, the method for determining ion energy in the first item of the patent application scope further includes: generating an RF transmission model based on a circuit element defined in the RF transmission line. The RF transmission model has an input and an output. The input is coupled to the output of the impedance matching model, and the RF transmission model has an RF transmission model portion, wherein the wafer bias is determined at the output of the RF transmission model portion. For example, the method for determining the ion energy of the scope of the patent application further includes: generating an RF transmission model based on the electronic components defined in the RF transmission line. The RF transmission model has an input and an output. The input is coupled to the output of the impedance matching model, where the wafer bias is determined at the output of the RF transmission model. For example, the method for determining ion energy in the fifth item of the patent application, wherein the electronic components of the RF transmission line include a capacitor, an inductor, or a combination thereof, and the RF transmission model includes one or more components, wherein the RF transmission model includes The one or more components have characteristics similar to those of the electronic components of the RF transmission line. For example, the method for determining the ion energy of the scope of the patent application, wherein the voltage and current probes are calibrated according to a preset criterion and are located inside the RF generator. For example, the method for determining the ion energy of item 7 of the patent application scope, wherein the preset criterion is a standard. For example, the method for determining the ion energy of item 8 of the patent application, wherein the standard is the National Standards and Technology Bureau (NIST) standard, and the voltage and current probes are coupled with an open circuit, a short circuit, or a load to The voltage and current probes are calibrated to comply with the NIST standard. For example, the method for determining ion energy in the first item of the patent application range, wherein the second complex voltage and current include a voltage value, a current value, and a phase between the voltage value and the current value. For example, the method for determining the ion energy of the scope of patent application, wherein the one or more components of the impedance matching model include a capacitor, an inductor, or a combination thereof, wherein the electronic components of the impedance matching circuit include a capacitor, an inductor Or a combination thereof, wherein the characteristics of the one or more components of the impedance matching model are similar to those of the electronic components of the impedance matching circuit. For example, the method for determining the ion energy of the first patent application range, wherein the wafer bias is used in a system, and the system includes an RF transmission line but excludes voltage probes on the RF transmission line. For example, the method for determining the ion energy of the scope of the patent application further includes: generating an RF transmission model based on the electronic components defined in the RF transmission line. The RF transmission model has an input and an output. The input system is coupled to the output of the impedance matching model; and an electrostatic chuck model is generated based on the characteristics of an electrostatic chuck (ESC) of the plasma chamber, the ESC model has an input, and the input system of the ESC model Coupling to the output of the RF transmission model, where the wafer bias is determined at the output of the ESC model. For example, the method for determining ion energy in the first item of the patent application, wherein the one or more elements include a plurality of elements, and the first complex voltage and current are transmitted from the input of the impedance matching model through the plurality of elements. The step of reaching the output of the impedance matching model to determine the second complex voltage and current includes: based on the first complex voltage and current, and the impedance matching between the input coupled to the impedance matching model and an intermediate node The characteristics of one or more of the plurality of components determine the intermediate complex voltage and current of the intermediate node in the impedance matching model; and based on the intermediate complex voltage and current, and coupled to the intermediate node to match the impedance The characteristics of the impedance matching model between the output of the model and one or more of the plurality of elements determine the second complex voltage and current. For example, the method for determining ion energy in the first item of the patent application scope further includes: generating an RF transmission model based on a circuit element defined in the RF transmission line. The RF transmission model has an input and an output. The input is coupled to the output of the impedance matching model, wherein the RF transmission model includes an RF channel model and an RF band model, and the RF channel model is coupled to the RF band model. For example, the method for determining ion energy in the first item of the patent application, wherein determining the ion energy includes: calculating a first product of the wafer bias and a coefficient; calculating a second product of the peak voltage and a coefficient; and calculating the The sum of the first product and the second product. For example, the method for determining the ion energy in the first item of the patent application, wherein the step of obtaining the peak voltage includes capturing the peak voltage from the second complex voltage and current. For example, the method for determining ion energy of item 17 of the application, wherein the step of obtaining the peak voltage includes receiving a measured value of the peak voltage. A plasma system for determining ion energy includes: a radio frequency (RF) generator for generating a radio frequency (RF) signal, the RF generator is related to a voltage and current probe, wherein the voltage and current probe system An output coupled to the RF generator to measure a first complex voltage and current at the output of the RF generator; an impedance matching circuit coupled to the RF generator, wherein the output of the RF generator is An RF cable is coupled to an input of the impedance matching circuit; a plasma chamber is coupled to the impedance matching circuit through an RF transmission line, and the impedance matching circuit has an input coupled to the output of the RF generator And an output coupled to the RF transmission line; and a processor coupled to the RF generator, the processor is configured to: receive the first complex voltage and current from the voltage and current probe; based on the impedance matching An electronic component defined in the circuit generates an impedance matching model having an input and an output, and the input of the impedance matching model receives the first complex voltage and current, and the impedance matching Type has one or more elements; passing the first complex voltage and current through the one or more elements of the impedance matching model to determine a second complex voltage and current; obtaining a peak voltage; based on the second complex voltage and The current determines a wafer bias; and determines the ion energy based on the wafer bias and the peak voltage. For example, a plasma system that determines the energy of an ion in the scope of patent application No. 19, wherein the RF generator is used to operate at a frequency of 2 megahertz or 27 megahertz or 60 megahertz. For example, the plasma system for determining ion energy of item 19 of the patent application, wherein the processor is configured to: calculate a first product of a coefficient and the wafer bias voltage; calculate a second product of a coefficient and the peak voltage; And calculate the sum of the first product and the second product. A computer system for determining ion energy. The computer system includes a processor for detecting a voltage and current when a radio frequency (RF) generator is coupled to a plasma chamber through an impedance matching circuit. The pin receives a first complex voltage and current measured by the voltage and current probe at an output of the radio frequency generator, wherein the output of the radio frequency generator is coupled to an input of the impedance matching circuit, and the impedance matching The circuit has an output coupled to an RF transmission line; an impedance matching model is generated based on the electronic components defined in the impedance matching circuit, the impedance matching model has an input and an output, and the input of the impedance matching model receives the A first complex voltage and current, the impedance matching model having one or more elements; transmitting the first complex voltage and current through the one or more elements of the impedance matching model to determine a second complex voltage and current; obtaining a A peak voltage; determining a wafer bias based on the second complex voltage and current; and determining the ion energy based on the wafer bias and the peak voltage And a memory device coupled to the processor and configured to store the ion energy. For example, the computer system for determining ion energy according to item 22 of the patent application, wherein the processor is configured to: calculate a first product of the wafer bias voltage and a coefficient; calculate a second product of the peak voltage and a coefficient; and Calculate the sum of the first product and the second product.