TWI646759B - Charge and discharge pump circuit and control method thereof - Google Patents

Abstract

A charge and discharge pump circuit and a control method thereof. The charging and discharging pump circuit includes a first flying capacitor, a second flying capacitor, and a timing controller. The first flying capacitor is connected in parallel with the second flying capacitor. The timing controller is electrically connected to the first flying capacitor and the second flying capacitor in parallel. The timing controller controls the first flying capacitor with a first timing control signal, and controls the second flying capacitor with a second timing control signal. The first timing control signal is different from the second timing control signal. .

Description

Charge-discharge pump circuit and control method thereof

The invention relates to an electronic circuit and a control method thereof, and in particular to a charge-discharge pump circuit and a control method thereof.

With the development of display technology, various display panels are constantly being introduced. In the display panel, a negative analog voltage (negative AVDD) needs to be provided for driving.

Generally speaking, the negative analog voltage can be realized by two combination circuits. The first combination circuit is a combination of a boost circuit and a buck-boost circuit. The second This combination circuit is a combination of a boost circuit and a charge-discharge pump circuit.

Because the cost of the charge and discharge pump circuit is low, the second combination circuit is more widely used. However, charge and discharge pump circuits often cause larger Ripples, in turn, are more likely to form crosstalk phenomena in heavy-load display panels or large-sized and high-resolution panels, which seriously affects picture quality.

The invention relates to a charge-discharge pump circuit and a control method thereof, which use a plurality of flying capacitors to alternately perform a charge-discharge operation, so that the overall charging interval is shortened, and the ripple of negative analog voltage can be reduced. Ripple, thereby avoiding crosstalk, so as to maintain good picture quality.

According to a first aspect of the present invention, a charge-discharge pump circuit is provided. The charging and discharging pump circuit includes a first flying capacitor, a second flying capacitor, and a timing controller. The first flying capacitor is connected in parallel with the second flying capacitor. The timing controller is electrically connected to the first flying capacitor and the second flying capacitor in parallel. The timing controller controls the first flying capacitor with a first timing control signal, and controls the second flying capacitor with a second timing control signal. The first timing control signal is different from the second timing control signal. .

According to a second aspect of the present invention, a method for controlling a charge-discharge pump circuit is proposed. The charging pump circuit includes a first flying capacitor and a second flying capacitor, and the first flying capacitor is connected in parallel with the second flying capacitor. The control method includes the following steps: controlling the first flying capacitor with a first timing control signal. At a second timing The control signal controls the second flying capacitor, and the first timing control signal is different from the second timing control signal.

In order to have a better understanding of the above and other aspects of the present invention, the following specific examples are described in detail below in conjunction with the accompanying drawings:

100, 400‧‧‧charge and discharge pump circuit

110‧‧‧First flying capacitor

120‧‧‧Second flying capacitor

150‧‧‧sequence controller

151‧‧‧The first controller

152‧‧‧Second controller

161‧‧‧The first switch

162‧‧‧Second switch

163‧‧‧Third switch

164‧‧‧Fourth switch

430‧‧‧Third flying capacitor

453‧‧‧Third controller

465‧‧‧Fifth switch

466‧‧‧ sixth switch

IN‧‧‧Input

A, B‧‧‧ points

C41, C42, C51, C52, C53, C101, C102, C103, C141, C142, C143, C144‧‧‧ curves

CY1, CY2, CY4 ‧‧‧ cycles

OUT‧‧‧output

RP4, RP5, RP10, RP14‧‧‧ surge

S210, S220, S610, S620, S630, S640, S650‧‧‧ steps

SR‧‧‧Signal input

sw‧‧‧ switch signal

During T1, T2‧‧‧

T21, T31, T41‧‧‧First charging period

T22, T32, T42‧‧‧First discharge period

T23, T33, T43‧‧‧Second charging period

T24, T34, T44‧‧‧Second discharge period

T45‧‧‧The third charging period

T46‧‧‧The third discharge period

ts11, ts21, ts31, ts41 ‧‧‧ the first timing control signal

ts12, ts22, ts32, ts42‧‧‧Second timing control signal

ts43‧‧‧third timing control signal

FIG. 1 is a schematic diagram of a charge-discharge pump circuit according to an embodiment of the present invention.

FIG. 2 is a flowchart of a control method of a charge-discharge pump circuit according to an embodiment of the present invention.

FIG. 3 is a schematic diagram of a first timing control signal and a second timing control signal according to an embodiment of the present invention.

FIG. 4 shows the charging and discharging curves of the first flying capacitor and the output terminal for charging and discharging operation only through the first timing control signal.

FIG. 5 shows the charging and discharging curves of the first flying capacitor, the second flying capacitor, and the output terminal through the first timing control signal and the second timing control signal for charging and discharging at the same time.

FIG. 6 is a flowchart of a control method of a charge-discharge pump circuit according to another embodiment of the present invention.

FIG. 7 illustrates the operation of the first mode.

FIG. 8 illustrates the operation of the second mode.

FIG. 9 is a schematic diagram of a first timing control signal and a second timing control signal according to another embodiment of the present invention.

FIG. 10 shows the charging and discharging curves of the first flying capacitor, the second flying capacitor, and the output terminal, which are charged and discharged simultaneously through the first timing control signal and the second timing control signal.

FIG. 11 is a schematic diagram of a first timing control signal and a second timing control signal according to another embodiment of the present invention.

FIG. 12 is a schematic diagram of a charge-discharge pump circuit according to another embodiment of the present invention.

FIG. 13 is a schematic diagram of a first timing control signal, a second timing control signal, and a third timing control signal according to an embodiment of the present invention.

Figure 14 shows the first flying capacitor, the second flying capacitor, the third flying capacitor, and the output terminal charging and discharging at the same time through the first timing control signal, the second timing control signal, and the third timing control signal. curve.

Please refer to FIG. 1, which illustrates a schematic diagram of a charge-discharge pump circuit 100 according to an embodiment of the present invention. The charging and discharging pump circuit 100 includes a first flying capacitor 110, a second flying capacitor 120, a timing controller 150, a first controller 151, a second controller 152, a first switch 161, and a second The switch 162, a third switch 163, and a fourth switch 164. The first flying capacitor 110 is connected in parallel with the second flying capacitor 120. The timing controller 150 is electrically connected to the first flying capacitor 110 and the second flying capacitor in parallel. 120. The first flying capacitor 110 and the second flying capacitor 120 are coupled to the same input terminal IN, and the first flying capacitor 110 and the second flying capacitor 120 are coupled to the same output terminal OUT to provide a negative AVDD.

The first flying capacitor 110, the first switch 161, and the second switch 162 constitute a first-stage circuit, and the second flying capacitor 120, the third switch 163, and the fourth switch 164 constitute a second-stage circuit. Each of the first flying capacitor 110 and the second flying capacitor 120 can perform charging and discharging operations. In this embodiment, the first flying capacitor 110 and the second flying capacitor 120 can alternately perform charging and discharging operations, so that the overall charging interval is shortened, and the ripple of the negative analog voltage can be reduced, thereby avoiding interference ( crosstalk) phenomenon to maintain good picture quality.

Please refer to FIG. 2 and FIG. 3. FIG. 2 shows a flowchart of a control method of a charge-discharge pump circuit 100 according to an embodiment of the present invention, and FIG. 3 shows a first embodiment of the first embodiment of the present invention. A schematic diagram of a timing control signal ts11 and a second timing control signal ts12. In step S210, the timing controller 150 controls the first flying capacitor 110 with a first timing control signal ts11. After receiving the first timing control signal ts11, the first controller 151 synchronously controls the first switch 161 and the second switch 162 according to the first timing control signal ts11. For example, when the first timing control signal ts11 is at a high level during the period T1, the first controller 151 synchronously cuts the first switch 161 and the second switch 162 to point B, so that the first flying capacitor 110 pairs the output terminal. OUT for charging. When the first timing control signal ts11 is at a low level during the period T2, the first controller 151 switches the first switch 161 and the second switch 162 to point A synchronously to discharge the output terminal OUT.

In step S220, the timing controller 150 controls the second flying capacitor 120 with a second timing control signal ts12. After receiving the second timing control signal ts12, the second controller 152 synchronously controls the third switch 163 and the fourth switch 164 according to the second timing control signal ts12. For example, when the second timing control signal ts12 is at a high level during the period T2, the second controller 152 switches the third switch 163 and the fourth switch 164 to point B synchronously, so that the second flying capacitor 120 pairs the output terminal OUT Charge it. When the second timing control signal ts12 is at a low level during the period T1, the second controller 152 switches the third switch 163 and the fourth switch 164 to point A synchronously to discharge the output terminal OUT.

The above steps S210 and S220 can be performed simultaneously. The first timing control signal ts11 in step S210 is different from the second timing control signal ts12 in step S220. As shown in FIG. 3, the first timing control signal ts11 is opposite to the second timing control signal ts12. That is, when the first flying capacitor 110 charges the output terminal OUT during the period T1, the second flying capacitor 120 discharges the output terminal OUT during the period T1; the first flying capacitor 110 charges the output terminal OUT during the period T2. During discharge, the second flying capacitor 120 charges the output terminal OUT during a period T2.

Please refer to FIG. 4, which shows the charging and discharging curves of the first flying capacitor 110 and the output terminal OUT that are only charged and discharged through the first timing control signal ts11. Curve C41 is the charge and discharge curve of the first flying capacitor 110, and curve C42 is the charge and discharge curve of the output terminal OUT. As shown by curve C41, the first flying capacitor 110 performs a charging operation in one cycle CY1. As shown by curve C42, the output OUT is at A surge RP4 will be formed in a cycle CY1. When this surge RP4 is too large, the analog voltage (AVDD) will have a significant ripple.

Please refer to FIG. 5, which shows the charging and discharging curves of the first flying capacitor 110, the second flying capacitor 120, and the output terminal OUT, which are charged and discharged simultaneously through the first timing control signal ts11 and the second timing control signal ts12. Curve C51 is the charge and discharge curve of the first flying capacitor 110, curve C52 is the charge and discharge curve of the second flying capacitor 120, and curve C53 is the charge and discharge curve of the output terminal OUT. As shown by the curve C51, the first flying capacitor 110 performs a charging operation in one cycle CY1. As shown by curve C51, the second flying capacitor 120 also performs a charging operation in the same cycle CY1. Therefore, as shown by the curve C53, the output terminal OUT will form two smaller surges RP5 in one cycle CY1, and the reduced surges RP5 may make the ripple of the analog voltage (AVDD) inconspicuous.

Through the above embodiment, the charge and discharge pump circuit 100 can alternately charge and discharge through the first flying capacitor 110 and the second flying capacitor 120, so that the overall charging interval is shortened, and the ripple of the negative analog voltage can be reduced. , Thereby avoiding crosstalk, so as to maintain good picture quality.

The above embodiments can effectively improve the crosstalk phenomenon for a heavy-duty display panel or a large-sized and high-resolution panel. When a light-load, small-size or low-resolution panel is used, only the first timing control signal ts11 can be used by switching.

Please refer to FIG. 1 and FIG. 6. FIG. 6 shows a flowchart of a control method of the charge-discharge pump circuit 100 according to another embodiment of the present invention. In step S610, the charge and discharge pump circuit 100 receives a switching signal sw through a signal input terminal SR. In step S620, the timing controller 150 switches the charge / discharge pump circuit 100 between a first mode and a second mode according to the switching signal sw.

Please refer to FIG. 7, which shows the operation diagram of the first mode. When the charge and discharge pump circuit 100 is in the first mode, the flow proceeds to step S630 and step S640. The timing controller 150 activates the first timing control signal ts11 and the second timing control signal ts12 to control the signal ts11 and The second timing control signal ts12 controls the first flying capacitor 110 and the second flying capacitor 120, respectively.

Please refer to FIG. 8, which shows the operation diagram of the second mode. When the charge and discharge pump circuit 100 is in the second mode, the flow proceeds to step S650, and the timing controller 150 only activates the first timing control signal ts11 to control the first flying capacitor 110 according to the first timing control signal ts11.

In this way, the charge and discharge pump circuit 100 can be switched between the first mode and the second mode according to the characteristics of the display panel, so as to be widely applicable to various types of display panels.

Please refer to FIG. 9, which illustrates a schematic diagram of a first timing control signal ts21 and a second timing control signal ts22 according to another embodiment of the present invention. In this embodiment, a first charging period T21 of one of the first timing control signals ts21 is greater than a first discharging period T22, and a second charging period T23 of one of the second timing control signals ts22 is greater than a second discharging period T24.

As shown in FIG. 9, the ratio of the first charging period T21 to the first discharging period T22 is two, and the ratio of the second charging period T23 to the second discharging period T24 is two. The first charging period T21 covers a second discharging period T24, and the second charging period T23 covers a first discharging period T22. The first charging period T21 is the same length as the second charging period T23, and the first discharging period T22 is the same length as the second discharging period T24.

Please refer to FIG. 10, which shows the charging and discharging curves of the first flying capacitor 110, the second flying capacitor 120, and the output terminal OUT, which are simultaneously charged and discharged through the first timing control signal ts21 and the second timing control signal ts22. Curve C101 is the charge and discharge curve of the first flying capacitor 110, curve C102 is the charge and discharge curve of the second flying capacitor 120, and curve C103 is the charge and discharge curve of the output terminal OUT. As shown by the curve C101, the first flying capacitor 110 performs a charging operation in one cycle CY2. As shown by curve C102, the second flying capacitor 120 also performs a charging operation in the same cycle CY2.

The initial charging time of the first flying capacitor 110 and the second flying capacitor 120 are different. Therefore, as shown by the curve C103, the output terminal OUT will form three smaller surges RP10 in one cycle CY2. The reduced surges RP10 can make the ripple of the analog voltage (AVDD) inconspicuous.

Through the above embodiment, the charge and discharge pump circuit 100 can alternately charge and discharge through the first flying capacitor 110 and the second flying capacitor 120, so that the overall charging interval is shortened, and the ripple of the negative analog voltage can be reduced. , Thereby avoiding crosstalk, so as to maintain good picture quality.

Please refer to FIG. 11, which illustrates a schematic diagram of a first timing control signal ts31 and a second timing control signal ts32 according to another embodiment of the present invention. In this embodiment, a first charging period T31 of one of the first timing control signals ts31 is shorter than a first discharging period T32, and a second charging period T33 of one of the second timing control signals ts32 is shorter than a second discharging period T34.

As shown in FIG. 11, the ratio of the first charging period T31 to the first discharging period T32 is 2/3, and the ratio of the second charging period T33 to the second discharging period T34 is 2/3. The first discharge period T32 covers a second charging period T33, and the second discharge period T34 covers a first charging period T31. The first charging period T31 is the same length as the second charging period T33, and the first discharging period T32 is the same length as the second discharging period T34.

The charge and discharge pump circuit 100 of the above embodiment is described by taking two flying capacitors (a first flying capacitor 110 and a second flying capacitor 120) as an example. However, the number of flying capacitors is not limited to two, and the number of flying capacitors can also be increased to three or more. Please refer to FIG. 12, which illustrates a schematic diagram of a charge-discharge pump circuit 400 according to another embodiment of the present invention. In this embodiment, the charge and discharge pump circuit 400 further includes a third flying capacitor 430, a third controller 453, a fifth switch 465 and a sixth switch 466. The third flying capacitor 430 is connected in parallel with the first flying capacitor 110 and the second flying capacitor 120. The timing controller 150 controls the third flying capacitor 430 through the third controller 453 with a third timing control signal ts43.

In this embodiment, the third timing control signal ts43 is different from the first timing control signal ts41 and different from the second timing control signal ts42. Please refer to 13 is a schematic diagram illustrating a first timing control signal ts41, a second timing control signal ts42, and a third timing control signal ts43 according to an embodiment of the present invention. As shown in FIG. 13, one of the first timing control signals ts41 has a first charging period T41 greater than a first discharging period T42, and one of the second timing control signals ts42 has a second charging period T43 greater than a second discharging period T44. A third charging period T45 of one of the third timing control signals ts43 is greater than a third discharging period T46. The ratio of the first charging period T41 to the first discharging period T42 is 2, the ratio of the second charging period T43 to the second discharging period T44 is 2, and the ratio of the third charging period T45 to the third discharging period T46 is 2.

In addition, the first charging period T41 covers the second discharging period T44 and the third discharging period T46, the second charging period T43 covers the first discharging period T42 and the third discharging period T46, and the third charging period T45 covers the first discharging period T42 and The second discharge period T44. The first charging period T41, the second charging period T43, and the third charging period T45 are equal in length, and the first discharging period T42, the second discharging period T44, and the third charging period T46 are equal in length.

Please refer to FIG. 14, which shows the first flying capacitor 110, the second flying capacitor 120, the first flying capacitor 110, and the charging and discharging operation through the first timing control signal ts41, the second timing control signal ts42, and the third timing control signal ts43 at the same time. Charge and discharge curves of the three flying capacitors 430 and the output terminal OUT. Curve C141 is the charge and discharge curve of the first flying capacitor 110, curve C142 is the charge and discharge curve of the second flying capacitor 120, curve C143 is the charge and discharge curve of the third flying capacitor 430, and curve C144 is the charge and discharge curve of the output OUT. As shown by the curve C141, the first flying capacitor 110 performs a charging operation in one cycle CY4. As shown by curve C142, the second flying capacitor 120 CY4 also performs a charging operation in the same cycle. As shown by the curve C143, the third flying capacitor 430 also performs a charging operation in the same cycle CY4. Therefore, as shown by the curve C144, the output terminal OUT will form three smaller surges RP14 within a period CY4, and the reduced surges RP14 may make the ripple of the analog voltage (AVDD) inconspicuous.

Through the above embodiment, the charging and discharging pump circuit 400 can perform the charging and discharging operations in turn through the first flying capacitor 110, the second flying capacitor 120, and the third flying capacitor 430, so that the overall charging interval is shortened, and the negative analog voltage can be reduced Ripple, thereby avoiding crosstalk, so as to maintain good picture quality.

In summary, although the present invention has been disclosed as above with the embodiments, it is not intended to limit the present invention. Those with ordinary knowledge in the technical field to which the present invention pertains can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be determined by the scope of the attached patent application.

Claims (33)

A charge-discharge pump circuit includes: a first flying capacitor; a second flying capacitor; the first flying capacitor is connected in parallel with the second flying capacitor; a timing controller; Is connected in parallel to the first flying capacitor and the second flying capacitor, the timing controller controls the first flying capacitor with a first timing control signal, and controls the second flying with a second timing control signal A capacitor, the first timing control signal is different from the second timing control signal; and a signal input terminal for providing a switching signal, the timing controller switches the charging and discharging pump circuit to a first according to the switching signal Between the mode and a second mode, in the first mode, the timing controller activates the first timing control signal and the second timing control signal. In the second mode, the timing controller starts only the first Timing control signal. The charge and discharge pump circuit according to item 1 of the scope of patent application, wherein the first timing control signal is opposite to the second timing control signal. The charge and discharge pump circuit according to item 1 of the scope of patent application, wherein one of the first timing control signals has a first charging period less than a first discharging period, and one of the second timing control signals has a second charging period less than A second discharge period. The charge-discharge pump circuit according to item 3 of the scope of patent application, wherein the ratio of the first charging period to the first discharging period is 2/3, and the ratio of the second charging period to the second discharging period is 2 / 3. The charge and discharge pump circuit according to item 3 of the scope of patent application, wherein the first discharge period covers the second charging period, and the second discharge period covers the first charging period. The charge-discharge pump circuit according to item 3 of the scope of patent application, wherein the first charging period is equal to the second charging period, and the first discharging period is equal to the second discharging period. The charge and discharge pump circuit according to item 1 of the scope of patent application, wherein one of the first timing control signals has a first charging period greater than a first discharging period, and one of the second timing control signals has a second charging period greater than A second discharge period. The charge-discharge pump circuit according to item 7 of the scope of patent application, wherein a ratio of the first charging period to the first discharging period is 2 and a ratio of the second charging period to the second discharging period is 2. The charge-discharge pump circuit according to item 7 of the scope of patent application, wherein the first charging period covers the second discharging period, and the second charging period covers the first discharging period. The charge-discharge pump circuit according to item 7 of the scope of the patent application, wherein the first charging period is equal to the second charging period, and the first discharging period is equal to the second discharging period. The charge and discharge pump circuit according to item 1 of the scope of the patent application, wherein the first flying capacitor and the second flying capacitor are coupled to the same input terminal, and the first flying capacitor and the second flying capacitor are coupled to Same output. The charge-discharge pump circuit described in item 1 of the scope of patent application, further includes: a third flying capacitor, connected in parallel with the first flying capacitor and the second flying capacitor, and the timing controller is controlled by a third timing The signal controls the third flying capacitor, and the third timing control signal is different from the first timing control signal and different from the second timing control signal. The charge and discharge pump circuit according to item 12 of the scope of patent application, wherein one of the first timing control signals has a first charging period greater than a first discharging period, and one of the second timing control signals has a second charging period greater than In a second discharging period, a third charging period of one of the third timing control signals is longer than a third discharging period. The charge-discharge pump circuit according to item 13 of the scope of patent application, wherein the ratio of the first charging period to the first discharging period is 2 and the ratio of the second charging period to the second discharging period is 2. The ratio of the third charging period to the third discharging period is two. The charge-discharge pump circuit according to item 13 of the scope of patent application, wherein the first charging period covers the second discharging period and the third discharging period, and the second charging period covers the first discharging period and the third discharging period. During the discharging period, the third charging period covers the first discharging period and the second discharging period. The charge and discharge pump circuit according to item 13 of the scope of patent application, wherein the first charging period, the second charging period, and the third charging period are equal in length, the first discharging period, the second discharging period, and the The third charging period is of equal length. The charge and discharge pump circuit according to item 1 of the scope of patent application, further comprising: a first controller connected to the timing controller, the first controller being used to receive the first timing control signal; a second A controller connected to the timing controller, the second controller for receiving the second timing control signal; a first switch connected to a first terminal of the first flying capacitor and the first controller; a first Two switches connected to a second end of the first flying capacitor and the first controller, the first controller synchronously controlling the first switch and the second switch according to the first timing control signal; a third A switch connected to a third terminal of the second flying capacitor and the second controller; and a fourth switch connected to a fourth terminal of the second flying capacitor and the second controller, the second control The controller synchronously controls the third switch and the fourth switch according to the second timing control signal. A control method for a charge-discharge pump circuit. The charge-pump circuit includes a first flying capacitor and a second flying capacitor. The first flying capacitor is connected in parallel with the second flying capacitor. The control method includes: controlling the first flying capacitor with a first timing control signal; controlling the second flying capacitor with a second timing control signal; the first timing control signal is different from the second timing control signal Providing a switching signal; and switching the charge and discharge pump circuit between a first mode and a second mode according to the switching signal; in the first mode, activating the first timing control signal and the second timing The control signal activates only the first timing control signal in the second mode. The control method of the charge-discharge pump circuit according to item 18 of the scope of patent application, wherein the first timing control signal is opposite to the second timing control signal. The method for controlling a charge-discharge pump circuit according to item 18 of the scope of patent application, wherein one of the first timing control signals has a first charging period less than a first discharging period, and one of the second timing control signals has a second The charging period is shorter than a second discharging period. The method for controlling a charge-discharge pump circuit according to item 20 of the scope of patent application, wherein a ratio of the first charging period to the first discharging period is 2/3, and a ratio of the second charging period to the second discharging period The ratio is 2/3. According to the control method of the charge-discharge pump circuit according to item 20 of the scope of patent application, wherein the first discharge period covers the second charging period, and the second discharge period covers the first charging period. The method for controlling a charge-discharge pump circuit according to item 20 of the scope of the patent application, wherein the first charging period is equal to the second charging period, and the first discharging period is equal to the second discharging period. The method for controlling a charge-discharge pump circuit according to item 18 of the scope of patent application, wherein one of the first timing control signals has a first charging period greater than a first discharging period, and one of the second timing control signals has a second The charging period is longer than a second discharging period. The control method of the charge and discharge pump circuit according to item 24 of the scope of patent application, wherein the ratio of the first charging period to the first discharging period is 2 and the ratio of the second charging period to the second discharging period is 2. The method for controlling a charge-discharge pump circuit according to item 24 of the scope of patent application, wherein the first charging period covers the second discharging period, and the second charging period covers the first discharging period. According to the method for controlling a charge-discharge pump circuit according to item 24 of the scope of the patent application, wherein the first charging period is equal to the second charging period, and the first discharging period is equal to the second discharging period. The control method of the charge-discharge pump circuit according to item 18 of the scope of the patent application, wherein the charge-discharge pump circuit further includes a third flying capacitor, the third flying capacitor, the first flying capacitor and the second flying capacitor. The capacitors are connected in parallel, and the control method further includes controlling the third flying capacitor with a third timing control signal, which is different from the first timing control signal and different from the second timing control signal. The control method for a charge-discharge pump circuit according to item 28 of the scope of patent application, wherein one of the first timing control signals has a first charging period greater than a first discharging period, and one of the second timing control signals has a second The charging period is greater than a second discharging period, and one of the third timing control signals has a third charging period greater than a third discharging period. The control method of the charge-discharge pump circuit according to item 29 of the scope of the patent application, wherein the ratio of the first charging period to the first discharging period is 2 and the ratio of the second charging period to the second discharging period is 2. The ratio of the third charging period to the third discharging period is two. The method for controlling a charge-discharge pump circuit according to item 29 of the scope of the patent application, wherein the first charging period covers the second discharging period and the third discharging period, and the second charging period covers the first discharging period and The third discharging period and the third charging period include the first discharging period and the second discharging period. The control method of the charge-discharge pump circuit according to item 29 of the scope of patent application, wherein the first charging period, the second charging period, and the third charging period are equal in length, and the first discharging period and the second discharging The period is equal to the third charging period. The method for controlling a charge-discharge pump circuit according to item 18 of the scope of patent application, wherein a first end of one of the first flying capacitors is connected to a first switch, and a second end of the first flying capacitor is connected to a A second switch, a third end of the second flying capacitor is connected to a third switch, a fourth end of the second flying capacitor is connected to a fourth switch, and the first timing control signal is used to control the first The step of flying capacitors synchronously controls the first switch and the second switch according to the first timing control signal, and the step of controlling the second flying capacitors with the second timing control signal is synchronous control according to the second timing control signal The third switch and the fourth switch.