TWI520365B - Methods to pattern diffusion layers in solar cells and solar cells made by such methods - Google Patents

Description

Patterning method of diffusion layer of solar cell and solar cell made by the method

The present invention relates generally to the fabrication of semiconductor devices, and more particularly to a method of patterning a diffusion layer of a semiconductor device, and further to solar cells.

Some of the treatment options and architectures are disclosed in the Patent Cooperation Treaty Application No. PCT/US2008/002058 entitled "Solar Cells with Textured Surfaces", filed on February 15, 2008, by Emanuel M. Sachs, James F .Bredt, MIT, designated state-owned United States, and also claims to apply under US Patent Provisional Application Nos. 60/901, 511 (filed on February 15, 2007) and 61/011, 933 (January 23, 2007) Priority. Both the Patent Cooperation Treaty application and the second US patent provisional application are incorporated herein by reference. The technology disclosed in these applications is collectively referred to herein as self aligned cell (SAC) technology.

For conventional Si wafer-based solar cells, wafers with minimal B (boron) doping have a thin layer of P (phosphorus) dopant that diffuses to the top surface of the cell to form an emitter region, where A permanent electric field is generated to separate the charge generated by the light. The benefit of high P concentration is that it allows for some types of metallization to have low contact resistance, to help the Ni plating solution be directly plated on the Si surface, to reduce frontal metallization and to penetrate the diffusion region and thus to short or shunt the device. It also establishes a conductive surface layer that allows electrons to move along the surface toward the metallized conductor with little resistance loss.

However, high P concentrations and deep emitters also have disadvantages. Short-wavelength light tends to be absorbed very strongly into a thin layer near this diffusion region at the top of the wafer, and the high P-doping level detracts from the electronic quality of the material, so that the charge carriers are more susceptible to defects before they can be collected. combination. In this way, short wavelengths or blue light that are strongly absorbed near the surface contribute less to the photocurrent of the device, which is typically referred to as a poor blue response of the battery. In addition, in high performance battery designs, the quality of the topmost surface can be important and affect the device's open circuit voltage. With a higher surface P concentration, it is more challenging to obtain good surface passivation with a front dielectric layer.

In order to achieve both the benefits of high and low dopant concentrations with few disadvantages, selective emitters can be used. As used herein, a selective emitter is a patterned diffusion layer. Under the metallization region, although there is a high dopant concentration (such as P) for low contact resistance and a wide metallization process window, in most other areas of the surface area, there is a low concentration for the battery. Higher voltage and current. Only a very small percentage of Si solar cell manufacturers currently utilize selective emitters, which is a difficult obstacle due to the additional processing steps and process complexity required to create patterned diffusion. A general method of producing a selective emitter involves at least two high temperature diffusion steps, and it is difficult to calibrate the screen printed metal layer to a heavily diffused pattern.

While selective emitters are the most commonly disclosed paradigm for Si solar cells to pattern diffusion layers, there are other examples. So-called semiconductor finger technology is known to form a deep diffusion line with no metal on top and perpendicular to a typical metal finger. These semiconductor fingers reduce series resistance losses in the emitter and allow regions without such semiconductor fingers The domain diffusion is slightly mild to improve the blue reaction, and to improve the minority carrier lifetime of Si by better absorbing impurities from these deep diffusion regions and surrounding regions. By deep diffusion, it is generally given that a sufficiently large area is used to measure the sheet resistance with a four-point probe, and the sheet resistance is less than about 50 ohms per square unit, preferably about 20 and about 35 ohms per square unit. between.

Known methods of providing selective emitters have disadvantages. They require special calibration steps to place the dopants for more highly doped regions where the metallization is subsequently followed. Therefore, multiple masks must be used, or the mask positioning should be maintained between steps, or the patterning step for doping should be additionally aligned to another patterning step for metallization. Another disadvantage of known treatment methods for selective emitters is that there are at least two high temperature processing steps, each with its accompanying preparation, cooling time, and the like. Want to complete all high temperature processing in a single step, thereby streamlining the processing, reducing processing time, etc.

With regard to the fact that the emitter is selectively located underneath the metallization region, the known manner of providing so-called semiconductor fingers requires two high temperature heating steps, as well as patterning lines perpendicular to conventional metal fingers. This requires some sort of precise patterning, which must be by screen printing or some other technique. This technique has drawbacks. It would be advantageous to be able to provide such an enhanced doped pattern without the use of conventional patterns and two high temperature steps.

Therefore, there is a need for a self-calibrating selective emitter method whereby dopants are accurately provided at locations where metallization is desired without the need for additional masking or screen or other patterning steps and/or calibration steps. There is a further need for a method that can provide a metallized liquid in a relatively highly doped, identical position that is relatively easy, reliable, and reproducible, which will become a selective shot. Polar area. There is a further need for a method that can provide such a selective emitter with a more highly doped region, using only a single high temperature processing step. The high temperature processing step as used herein refers to a step of combining at a temperature or at a different temperature for a sufficiently long time at a temperature or at a temperature to change the diffusion profile of the dopant. While there may be other processing steps that do not significantly change the diffusion profile of the dopant during lower or shorter temperatures, only one high temperature step of changing the profile should be required.

Similarly, where the patterned diffusion layer is not under the metallization region, such as the so-called semiconductor fingers being perpendicular to conventional metal fingers, it is desirable to provide such enhanced deep doping without the need for complex patterning. The method of the step, and further the need to provide such enhanced deep doping using only a single high temperature processing step.

A more detailed summary is provided below before applying for a patent. here The disclosed innovations are directed to various methods of utilizing a SAC architecture for doping that uses the architecture to direct deposition and application of materials that dope the substrate, or to deposit and apply materials that retard substrate doping. Some of the innovations disclosed herein are directed to providing such dopings as regions that will become metallized and for conducting current. The dopant can be processed directly into the trench provided for this purpose. Metallization is then provided to the same trench, so metallization is automatically calibrated to the deeper doped regions. Alternatively, the material that blocks the diffusion can be provided at the non-trench location, and the dopant can be provided less accurately over the entire wafer surface, thereby resulting in a complete region with only the unblocked diffuser. Doping dose. The SAC architecture also exposes textured surfaces (e.g., pitted or grooved surfaces) for the light absorbing regions of the battery to avoid or minimize the amount of light energy that is reflected off. The light-harvesting region can also be treated with dopants in the trenches to create deep-emitted polar lines (similar to semiconductor fingers) in the trenches. Alternatively, the material that blocks the diffusion can be treated into the grooves or pits, leaving the tips above the ridges between the grooves or pits exposed, thereby being deeper or more pronounced in subsequent steps. Doping. Alternatively, it may alternatively be provided to provide additional trenches or other continuous paths via other texture (eg, pit) fields, and dopants may be provided for additional trenches to pass through the light-harvesting texture (eg, pit) field And later became a deep shot line.

A method of utilizing a self-calibrating battery (SAC) architecture for doping is to use the architecture to direct deposition and application of material of the doped substrate, or to deposit and apply a material that blocks or retards the substrate being doped. Some innovations provide fingers that are doped to become metallized and that conduct current. The dopant can be processed directly into the trench provided for this purpose. Alternatively, the material that retards diffusion can be provided at the non-trench location, and the dopant can be provided less accurately over the entire wafer surface, thereby resulting in a complete doping dose for only the region of the non-blocking dopant. The SAC architecture also includes a grooved or pitted surface for the light absorbing region of the cell to avoid or minimize the amount of light energy that is reflected off. The light-harvesting region can also be treated with dopants in the trench to create a semiconductor emitter line in the trench. Alternatively, the material that blocks the diffusion can be treated into the trench leaving the tip above the ridge between the trenches exposed, thereby being subjected to deeper or more significant doping in subsequent steps. Similarly, in the case of light-harvesting pits, the material that blocks the diffusion can The treatment is done into the pits, leaving the upper edge between the pits exposed, thereby being subjected to deeper doping.

A specific aspect of the method preferred is a method of providing a patterned diffusion layer to a solar cell, comprising the steps of: providing a semiconductor wafer; providing a trench to the semiconductor wafer; dispensing a dopant liquid into the trench; applying The high temperature is to heat the wafer during which the dopant is diffused into the wafer; and the metallization material containing the liquid is dispensed into the trench; thereby creating a patterned diffusion layer at the metallization location.

In an advantageous version of this embodiment, either or both of the step of dispensing the dopant and the step of dispensing the metallization material can be performed via a capillary tube that can directly contact the wafer.

For robust variations of this particular aspect, the trenches are provided in groups of at least two adjacent trenches, and the metallized material is distributed to at least one (possibly two or more) of any single group of trenches. In the trench.

Typically, limited availability dopants can be provided using spraying, misting, or printing a liquid containing dopants.

Alternatively or additionally, dopants with limited availability can be deposited by sputtering, evaporation, plasma enhanced chemical vapor deposition, vacuum chemical vapor deposition or atmospheric pressure chemical vapor deposition. And provide.

During the step of applying a high temperature to diffuse the dopant into the wafer, the wafer is exposed to a dopant gas (eg, POCl ₃ or BBr ₃ ).

Another important aspect of the method is a method of providing a patterned diffusion layer to a solar cell, comprising the steps of: providing a semiconductor wafer; Providing a trench to the semiconductor wafer; providing a material that blocks diffusion in a non-trench region of the wafer rather than a trench; providing dopants to the entire surface of the wafer; applying a high temperature to heat the wafer during which diffusion Doping into the wafer; and dispensing a metallized material comprising the liquid into the trench; thereby creating a patterned diffusion layer at the metallization location.

Another embodiment provides a liquid dopant to the trench prior to providing a material that retards diffusion.

The dopant can be provided by spraying, misting or printing a liquid containing the dopant.

Alternatively or additionally, the dopant can be provided by depositing a dopant glass using sputtering, evaporation, plasma enhanced chemical vapor deposition, vacuum chemical vapor deposition or atmospheric pressure chemical vapor deposition.

In particular aspects of the material used for blocking diffusion at high temperature is applied during the diffusion step was doped into the wafer in the exposure of the wafer to a doping gas (e.g., POCl ₃ or BBr ₃₎ is also useful. Furthermore, one or both of the step of dispensing the dopant and the step of dispensing the metallization material can be performed via a capillary tube that can directly contact the wafer.

Yet another advantageous embodiment of the present invention is a method of providing a patterned diffusion layer to a solar cell, comprising the steps of: providing a semiconductor wafer; providing a trench to the semiconductor wafer; providing a dopant liquid into the trench Providing a material that blocks diffusion over the entire surface of the wafer, including trenches; diffuses dopants into the wafer at high temperatures; and distributes metallized material containing liquid into the trenches, thereby creating a metallization location Patterned diffusion layer.

If the dopant is provided on the entire surface, it can use any of the above Method to provide.

A particularly attractive aspect of the present invention is a method of providing a patterned diffusion layer to a solar cell, comprising the steps of: providing a semiconductor wafer; providing a concave textured region to the semiconductor wafer, as compared to a flat surface The wafer is formed to form a light-harvesting characteristic of the enhanced wafer; a trench is provided on the wafer for metallization; and in the concave textured region, a trench is provided on the wafer, the trench and the trench for metallization Intersected for deep shots; provided dopants to trenches for deep shots; heated wafers at high temperatures during which dopants are diffused into the wafer; and dispensed with liquids The metallization material is passed into a trench for metallization; thereby creating a patterned diffusion layer that intersects the metallization location.

It is useful to provide a dopant to the trench for metallization prior to the heating step, thereby creating a patterned diffusion layer that is also in the metallization location.

The liquid is dispensed via a capillary tube that can directly contact the wafer, and at least one of the following steps can be performed: providing dopants to the trenches for the deeper polar lines; dispensing the metallized material comprising the liquid to the metallization In the trench; and providing dopants to the trench for metallization. The concave texture can be a pit or a groove, or some other structure.

In a particular aspect discussed above, a limited availability dopant can be provided that can be sprayed, misted, or printed with a dopant-containing liquid, or deposited with a dopant-containing glass. For this, you can use any of the methods discussed.

Another embodiment of the invention is a solar cell comprising: a germanium-based wafer that is doped; a trench for metallization having less than about a width of 60 microns and a depth greater than about 3 microns; metallization in the trench that extends no more than about 15 microns along the surface of the wafer to either side of the individual trench; doping of the underlying metallization The doping on the wafer surface rather than the underlying region of the metallization trench is deep; and a semi-continuous glass layer at the interface between the metallization and the deeper doped germanium.

The trench width can be less than about 45 microns, or even narrower than 30 microns.

Advantageously, the metallization extends no more than about 10 microns to either side of the individual trenches.

The specific aspect further includes a deep shot polar line region that intersects the metallization in the trench, the deep shot polar line region also including a region that is present on the wafer surface rather than under the metallization trench and The doping of the deep-element polar line region is also deeply doped.

Advantageously, the battery further includes a concave textured region on the semiconductor wafer that is compared to the flat surface of the wafer to form a light-harvesting characteristic of the enhanced wafer. The concave texture may include pits, grooves, or both.

In all of the major variations disclosed herein, the wafer is a p-type semiconductor substrate, the dopant is thus used to produce an n ⁺ type semiconductor, and the diffusion layer includes a solar cell emitter, depending on the particular aspect in which it is useful. Alternatively, the wafer may be a p-type semiconductor substrate, the dopants are thus used to produce a p ⁺ type semiconductor, and the diffusion layer comprises the back surface field of the solar cell. Another related aspect of the wafer includes an n-type semiconductor, the dopant is thus used to produce an n ⁺ -type semiconductor, and the diffusion layer includes a back-field region.

Many of the techniques and aspects of the present invention have been described herein. Those skilled in the art will appreciate that many of these techniques can be used with other disclosed techniques. Even if they are not specifically described as being used together. For example, dopants can be dispensed and positioned using SAC technology, and the workpiece can then be processed in any suitable manner, whether or not described herein. Similarly, materials that retard diffusion can be deposited and positioned using SAC techniques, and the dopants can be subsequently applied in any suitable manner, whether or not described herein. The material that blocks the diffusion can be deposited everywhere or at a specific location, as guided by the SAC architecture. One or more applications of the material that retards diffusion may be provided, each time being tied to a different location, as guided by the architecture. Similarly, dopants can be applied, diffused, and then more dopants can be applied again for another purpose, while being oriented by the SAC architecture.

The disclosure discloses and discloses more than one invention. Although the invention is set forth in the scope of the patent application and the related documents, it is not only as claimed, but also as developed during the review of any patent application based on this disclosure. The inventors intend to claim that all of the various inventions achieve the limits allowed by the prior art, as determined subsequently. The features described herein are not essential to every invention disclosed herein. Accordingly, the inventors intend not to be limited to the scope of any such patent application.

Certain combinations of hardware or groups of steps are referred to herein as inventions. However, this is not an admission that any such combination or group is necessarily a patentable individual invention, especially in terms of the number of inventions or the unity of invention examined in a patent application. The specific aspects of the invention are intended to be described in a short form.

A summary is presented here. It is emphasized that this summary is provided to comply with regulatory requirements that will allow reviewers and other searchers to quickly identify the subject of technical disclosure. The summary presented later is not intended to interpret or limit the scope or meaning of the request, as promised by the provisions of the Patent Office.

The discussion that follows should be understood as illustrative and should not be construed as limiting. Although the present invention has been particularly shown and described with reference to the preferred embodiments of the invention, it will be understood that range.

Corresponding structures, materials, acts, equivalents of all means of function or step function terms in the following claims, as claimed, are intended to be combined with other claimed elements and include any structure, material or action to perform the And other functions.

Some additional processing schemes and architectures are disclosed in U.S. Patent Provisional Application Serial No. 61/124,607, entitled "Metalization of Self-Calibrating Battery Architectures", filed on April 18, 2008, filed by Emanuel M. Sachs, James F.Bredt, Andrew Gabor. Further processing schemes and architectures are disclosed in U.S. Patent Provisional Application Serial No. 61/201,577, entitled "Patterning Method for Diffusion Layer of Solar Cells", filed on December 12, 2008, filed by Andrew Gabor, Richard L. Wallace. This case is a formal application based on these two provisional applications, and it is hereby based on the interests and priorities of each. Both are complete and are hereby incorporated by reference.

The present disclosure describes a method of forming a selective emitter that is compatible with SAC technology.

In short, the concept of SAC involves forming trenches and other features in the surface of the Si wafer that allow subsequent processing steps involving dispensing the solution into the trench for the following operations: etching dielectric, catalyst application, deposition Metal, masking subsequent processing activities.

Some treatments for providing a liquid-containing material to a surface are discussed in U.S. Patent Provisional Application Serial No. 61/204,382 entitled "Using a Capillary Distribution Tube to Distribute a Liquid Containing Material to a Patterned Surface", filed on January 6, 2009 . This case is complete and is hereby incorporated by reference. The technology disclosed in this case is referred to herein as capillary dispensing technology. It is expressly stated that this capillary dispensing technique and the provisional application describing it are not prior art to the invention described and claimed herein. Briefly, liquids, slurries, pastes, and other liquids with materials are deposited in trenches on the surface of the substrate, such as germanium wafers that will be used to form photovoltaic solar cells. Under pressure, through a fine dispensing capillary, liquid can be dispensed into the grooves, which will form thin metallized finger-like elements, while the dispensing capillary is mechanically guided and follows the surface configuration/surface texture on the substrate surface. calibration. The dispensing capillary mechanically walks in the groove, much like a sound recording phonograph stylus. The dispensing capillary can be small enough to stop in the groove, while the groove side walls provide constraints when walking. Alternatively, the dispensing capillary can be larger than the groove and can ride on the top edge of the groove, but mechanical calibration is still achieved. The dispensing capillary is typically further maintained in the trench by capillary action of the dispensing liquid itself. The dispensing capillary can be elastically loaded into the groove. The introducer feature guides the dispensing capillary into the groove. Capillary Non-circular cross sections (eg, elliptical, lobed) can enhance the travel following the groove. Multiple dispensing capillaries can be used, each assigned to a separate groove for individual fingers. Multiple wafers can be processed in one line. The acceleration and deceleration of time spent at the beginning and end of travel is reduced. A plurality of wafers may be disposed on a surface of a drum having a plurality of flat faces, and the drums are continuously rotated. As individual wafers traverse, the dispensing capillary can traverse parallel to the drum axis while moving in and out to provide lift.

The innovations discussed herein involve dispensing a dopant-containing liquid into the metallization trench pattern and/or applying a retarded diffusion material outside of the metallization trench region to improve via forming a selective emitter here. The performance of the device. New aspects of self-calibration are thereby achieved by using the same trenches to facilitate dispensing and/or constraining the materials used to distribute and constrain the dopants of the metallization material and retard the diffusion.

The innovations disclosed herein include, but are not limited to, the following formations: (1) selective emitters with deeper diffusion under the metallized regions with good contact resistance and good blue response; (2) deep Shoot the grid line. Known techniques for providing selective emitters require calibration of the metal layer in the heavily diffused pattern and require at least two high temperature steps, while the general SAC's reduced architecture allows itself to achieve a selective emitter with minimal additional Processing and complexity. It is not necessary to maintain two different individuals of the same pattern aligned with each other, but only one high temperature step is required. This method is self-calibrating.

Similarly, the SAC architecture can be used more cost-effectively to provide deeper polar lines than other processing schemes, such as perpendicular to conventional metal fingers (pointing in the same way as so-called semiconductor fingers) .

A typical basic processing sequence for a SAC process (without any patterned diffusion layer) may involve: depositing a resist and possible patterning; etching trenches/features; diffusing dopants (such as P) to form an emitter (for example, , in a POCl ₃ tubular furnace, or after dispensing a liquid dopant in a belt furnace); removing the back side emitter and etching the front side P glass; depositing SiN on the front side; depositing a dielectric layer on the back side to form The back metal contacts and fires, dispenses an etching solution to the front metallization trench to remove SiN; distributes the catalyst solution to the trenches; distributes the Ni solution to the trench; sinters; and electroplates (possibly photoinduced) Into the trench. If electroless, other techniques can be used to provide metal to the trench, such as a metal powder paste or ink, such as Ag (silver) and glass frit or Ag organometallic with liquid glass chemistry. When such a paste or ink is used, the metal deposited by this technique can be used to form only a thin seed layer, such that additional metal is plated on top of the fired seed layer to deposit the overall metal. The innovations disclosed herein with respect to patterned diffusion layers are not limited to any particular method of providing metallization to the trenches, and any compatible metallization technique can be used.

Selective emitter

The process immediately described below is schematically illustrated with reference to Figures 1A, 1B, 1C, and 1D, which show that the workpiece is in a different process stage, and Figure 2 shows a typical process step. In step 252, trenches 104 are provided on wafer 101 for subsequent metallization. A liquid 102 comprising a dopant (e.g., P) is dispensed into the trenches 104 to be used for metallization. In step 254, a subsequent single high temperature thermal step or P dopant 102 may be diffused most heavily into the trench regions 104 to provide a deeper diffusion region 105 that will become a selective emitter. Although the dopant P liquid may be, but is not limited to, phosphoric acid, a sol gel solution (eg, Filmtronics P508), or a solution containing a PO compound (eg, P ₂ O ₅ ). Phosphorus glass is then etched away in step 256 using, for example, hydrofluoric acid using known techniques. As shown in FIG. 1D, in step 257, the display metallization 107 is provided within the trench 104 and aligned with the deeper diffused region 105. Typically, although other processing steps may occur prior to metallization step 257, they need not be discussed to explain the innovations disclosed herein.

As mentioned previously, capillary dispensing technology can be used to dispense a liquid containing dopants into the trench. Figure 3 shows schematically an enlarged portion of a workpiece 340, such as a tantalum wafer that will become a partial solar cell. Surface 342 is textured with a light-harvesting (also referred to herein as reduced reflection) surface configuration, such as overlapping hemispherical dimples or grooves as shown herein. The mechanical guidance of the dispensing capillary 360 is accomplished by at least two mechanisms, both of which involve interaction with the grooves 356. This specific aspect will be used to demonstrate the general principles. According to the first guiding mechanism, the dispensing capillary 360 mechanically follows the groove, much like the recording stylus commonly used prior to the advancement of magnetic and digital media. In some cases, as shown in Figure 3, the dispensing capillary 360 is small enough that it rests directly on the bottom of the groove 356, while the sidewall 359 of the groove provides tracking.

In other examples (not shown), the dispensing capillary 360 is larger than the size of the processing trench and therefore rides over the top edge of the trench, but mechanical calibration is still achieved. According to the second guiding mechanism, the dispensing capillary 360 is further maintained to the groove by the capillary action of the dispensing liquid 364 itself. The mechanical tracking of the distribution capillary in the groove is governed by the elastic loading of the capillary Auxiliary. Elastic loading can be accomplished using the elasticity of the dispensing capillary 360 itself. Capillary dispensing technology is more fully described in the aforementioned U.S. Patent Provisional Application Serial No. 61/204,382.

The dopant liquid can be dispensed directly into the trenches to be used for the fine metallization fingers, or the liquid can be dispensed into the wider bus bar region and then dispersed into the finger grooves 104 by capillary forces. . Subsequent high temperature processing (in step 254), a dopant gas (eg, a gas of P or P compound) from filling trenches 104 can travel across the wafer surface to slightly dope surrounding region 106 to form a selectivity Shooting pole. The metallized liquid can be provided to the same trench 104 by a similar capillary dispensing method or any other suitable method.

Thus, in areas where selective emitters are required, i.e., immediately at the location 104 to be metallized, the desired doping is automatically provided without the need for a special masking or alignment process. Additional doping activity occurs in the trench in a self-calibrating manner where metallization will take place. Furthermore, metallization is also automatically provided to the desired area in a self-calibrating manner. Thus, the metallization 107 and selective emitter 105 regions are automatically calibrated to each other in a self-calibrating manner. This is essentially a triple self-calibration: the selective emitter 105 is calibrated to the desired location 104, the metallization 107 is calibrated to the desired location 104, and the selective emitter 105 is calibrated to the metallization 107.

Furthermore, the non-trenched regions 106 may also be diffused with additional dopants, such as P, which are carried out, for example, by POCl ₃ in a furnace (eg a tubular furnace or other suitable furnace), or by spraying or otherwise Coating a dopant-containing liquid to the entire cell surface, or depositing a dopant glass layer by a dry vacuum or non-vacuum process (eg, atmospheric pressure chemical vapor deposition sputtering, evaporation, plasma enhanced chemical vapor deposition) . These dopant layers or dopant glass layers can have suitable thicknesses and suitable dopant concentrations to represent an infinite source of dopants for diffusion into the wafer. Alternatively, the thickness of the layer can be limited and/or the concentration of dopants in the layer can be limited. These deposition methods can also produce layers with limited availability of dopants compared to infinite dopant availability. The layers will diffuse dopants into the wafer more slowly.

All of the steps of using such an applied dopant are similarly performed, typically prior to the high temperature step of changing the diffusion profile of the wafer. The dopant gas assist (for example, by POCl ₃ here) is slightly different, except that the wafer is heated to a high enough to change the dopant diffusion profile (if any dopant is present) Only after the temperature is applied. The dopants available from POCl ₃ are then diffused into the wafer, and even though the dopant provided by POCl ₃ may have high availability, the POCl ₃ band is introduced by the dopant prior to introduction of the heavily diffused trench region. To a greater degree of freedom, this means that it can still be slightly doped into the non-trenched regions by selecting a lower POCl ₃ exposure temperature and/or a shorter time during the POCl ₃ exposure and subsequent introduction steps. In general, relatively limited availability of dopants, low or low concentrations, provided by glass formed by dopants distributed into the trenches or exposed to long and/or high flow POCl ₃ The dopant source constitutes a relatively limited availability dopant for doping. As used herein and in the scope of the patent application, dopants of limited availability are used to mean low or low concentrations, or other sources of dopants of similar limited availability. Variables that can control the relative diffusion depth of the trench and non-trench regions include: species of dopant source, dopant concentration and dispensed volume, time-temperature profile, atmosphere during diffusion, and flow and pressure, The point at which the additional dopant activity is introduced in the heat distribution profile history.

Thus, there are a number of different ways to provide limited availability of dopants for solar cell applications, which can be grouped into different categories. The first category involves applying to the wafer as a liquid source prior to heating the wafer to high temperatures. Examples include: a mixture of phosphoric acid and water; a mixture of boric acid and water; phosphoric acid mixed with a non-aqueous solution for increased viscosity for printing; boric acid mixed with a non-aqueous solution for increased viscosity for printing; A sol-gel system of Si, B and Si, Ga and Si, As and Si, or Al and Si, which are sold by Filmtronics. Later in the high temperature furnace, these react with the Si wafer and oxygen to form a glass layer, and the dopants are diffused into the wafer by the glass layer. The second category involves the application of a dopant glass layer prior to heating the wafer to a high temperature. Examples include depositing a dopant glass layer comprising P, B, Ga, As, or Al by atmospheric pressure chemical vapor deposition, vacuum chemical vapor deposition, plasma enhanced chemical vapor deposition, or sputtering. Later in the high temperature furnace, the dopant diffuses from the glass into the wafer. The third category includes application in a high temperature vacuum furnace. Examples include passing N ₂ gas through a liquid source of POCl ₃ or BBr ₃ to generate bubbles, vapor transporting dopants from adjacent ceramic targets containing dopants (as is common in the semiconductor industry), from the first The material-like material vapor-transport dopant layer (the first type of material has been applied to a sacrificial wafer or other flat substrate placed adjacent to the solar cell wafer). The dopant reacts with the Si wafer and oxygen to form a glass layer, and the dopant diffuses from the glass layer into the wafer.

In step 255, in the POCl ₃ assisted method, it is schematically shown in the flow chart of FIG. 2, as an alternative to the dashed box step, the high temperature processing step is first performed in the tube without POCl ₃ flow, During this time the dopant diffuses into the trench and then spreads everywhere after POCl ₃ begins to flow (in step 255).

In step 253, in the case of a mist or spray diffusion assisting technique, as shown in the schematic of the dashed box step schematically shown in FIG. 2, a high concentration dopant P liquid is dispensed into the trench (and optionally After drying, a limited availability of dopant liquid is provided throughout, for example by misting or spraying or printing (in step 253) or one of the other mentioned transfer techniques. The high temperature treatment in the furnace causes a change in the dopant diffusion profile. Non-P dopants may be provided by fogging, spraying, printing or gas, such as boron from BBr ₃ gas, boron from boric acid solution, or boron or aluminum or arsenic or gallium from, for example, sol-condensation sold by Filmtronics. Glue source.

All of these changes can encompass only a single high temperature step during which the diffusion profile is altered. There is no need for a second high temperature step, but only one heating step is required to facilitate a significant change in the diffusion profile. However, it is of course possible to use two or more steps of high temperature diffusion profile change.

The following process is illustrated with reference to Figures 4A-4E, which show that the workpiece is in a different process stage, while Figure 5 shows a typical process step. In the first described process, in step 550, wafer 401 is provided with trenches 404 for subsequent metallization. In step 552, the diffusion-dispensing material 407 is distributed to region 406 where it is desired to have minimal diffusion. The motivation for applying a material that retards diffusion includes better control of the degree of doping of the non-metallized regions 406. For example, the unprotected non-metallized regions 406 may be unintentionally doped with dopants from the side of the metallization trench that are transported to the vapor phase. Such doping may not be ideal, perhaps because the doping is more than desired or uneven across the wafer surface. The diffusion retarding material 407 may either reduce such unwanted gas phase doping effects and/or allow other dopant sources to provide doping with better control under the diffusion layer. Examples of materials that retard diffusion include, but are not limited to, sol-gel cerium oxide systems, such as those sold by Filmtronics and Honeywell; and commercially available diffusion barrier pastes that adjust their viscosity, such as Ferro 99-001 Or Merck SiO ₂ SolarResist ink.

As shown with reference to Figure 4B, by the texture of the wafer, i.e., the edge 409 of the trench 404 (where metallization (407 of Figure 4E) is to be reached), the material liquid 411 that blocks the diffusion is automatically self-aligned to the desired The place. As explained in the aforementioned SAC patent application, if the surface energy of the liquid and surface is properly selected, the liquid can stop its flow along the surface at the flow barrier due to capillary forces, such as at the corners or edges 409. Thus, the diffusion-dispersing material liquid 411 can be deposited in a substantially but inaccurate position, such as at the center of the span between the two trenches 404, and it can flow outward toward each trench to stop at the trench edge 409. Instead of flowing into the groove, the groove is not the place you want. Thus, in step 553, the entire wafer can accept a dopant source, and the region of trench 404 can be doped to a desired extent 405 as desired, and automatically at the desired location, meaning trench 404. Without any special patterning techniques or equipment (such as masks) or precise dispensing of liquid dopants. Similarly, a metallized liquid can be supplied to the trench 404 to cause the metallization layer 407 to be exactly where it is, i.e., in the trench 404, and to be accurately aligned to the deeper doped selective emitter region 405. Metallization 407 can be provided in any suitable manner, such as the capillary dispensing method discussed above.

In the above discussion of the use of a retarded diffuser (blocking diffusion material 411), there are a number of variations using diffusion assist. According to an alternative shown in Figure 5, a limited availability of dopant is provided in step 553, such as by fogging, spraying, printing, or other techniques discussed above. The workpiece then undergoes a high temperature step 554 in the furnace, thereby changing the diffusion profile of the dopant, and the dopant diffuses into the region protected by the material 411 that is not retarded, such as trench 404. In step 556, a glass comprising dopant phosphorus is formed which is subsequently etched away with the material that blocks the diffusion. In step 558, metallization is provided within the trench where the deeper doped regions are located.

Instead of using the alternative method of misting, spraying, etc. in step 553, POCl ₃ is used to assist 555. The high temperature step 554 begins with an atmosphere without any dopants. During the high temperature step, POCl ₃ assist is then provided in step 555 at a later stage of this single high temperature step.

Alternatively, as shown in FIGS. 6A-6F and FIG. 7, in step 750, a trench for metallization is provided after the wafer 601, if the dopant 602 (eg, P liquid) is first dispensed (in steps) From 751 to the metallization trench 604, it may not be necessary to pattern the material that retards diffusion as at 411 of Figure 4B. Instead, as shown in FIG. 6C, the diffusion resistant material 611 may be provided (in step 752) over the entire surface of the wafer 601. The dopant 602 present in the trench 604 underneath the diffusion resistant material 611 will still allow diffusion to occur in the trench, resulting in a heavily diffused region 605. The liquid dopant is applied (in step 753) to the top of the material 611 that retards diffusion or POCl ₃ assists (in step 755) or dopant glass 608 can be formed everywhere, while the dopant is slightly diffused Between the grooves. It is also possible to dry the dopant liquid, reduce the volume of dopant liquid 603 as shown in Figure 6B, then place wafer 601 in a high temperature environment (in step 754), or skip the drying step. It is believed that the surface tension will maintain liquid positioning and will dry out when it enters a high temperature environment. As with the metallization layer 407 shown in FIG. 4E above, the metallized ink 607 can be deposited on the trench 604 and thus self-aligned to the heavily diffused region 605.

With respect to all of these specific aspects of the material that retards diffusion, the 756 phosphor glass is then etched away leaving the state shown in Figure 6F. In step 758, metallization is provided to the trench.

If each finger does not use a single metallization trench 604, instead instead as shown with reference to Figures 8A-8D, three or more trenches 804, 804', 804" are provided for each finger. It is also advantageous that three or more trenches are provided with liquid dopants 802, 802', 802", respectively, which are applied in a manner similar to that described above and below with respect to a single trench, thus accepting The heavily diffused layers 806, 806', 806" are shown in Figure 8C. The metal 816 is intended to be deposited only in the central trench 804. Each finger 816 has a wider, heavily diffused region 806, 806', 806 around it. The advantage is that the process window is relaxed such that if the metal 816 is inadvertently deposited on the outside of the desired trench, such as the side trench 804' or 804" or portions thereof, the deep emitter 806' outside the central trench 804, 806" will prevent the metal from being shorted via a shallow emitter. Although The resistance loss of the emitter is also reduced by this practice, but at the cost of more current loss due to the poor blue response of the wider heavily diffused region.

It is also important to note that, in general, dopant liquids are typically distributed in metallized trenches and only in metallized trenches (except where they are also assigned to light-harvesting trenches, discussed later) . In other words, the methods disclosed herein are significantly different from any process that can dispense dopant liquids indiscriminately throughout. Thus, there is nowhere else if the liquid is dispensed into individual metallized trenches or in a grouped metallization trench (as described above in connection with Figure 8A) in the light-harvesting trench.

For industry standard solar cells without trenches for metallization, the microstructure of the metallized regions typically includes sintered metal particles, and a semi-continuous layer of molten glass frit at the interface between the metal and the doped germanium. Articles made with known grooves for metallized trenches, for example, fabricated by a buried grid approach, will have a plated solid metal at the interface. SAC and capillary dispensing technology provide the ability to deposit metallized ink into extremely narrow trenches. Known techniques involving mask plating have been used to fabricate fully plated cells that allow deposition of plated metal on unmasked narrow trench regions. This is a region in which Ni is selectively deposited from the bath and is only covered by the SiN film. This selectivity does not exist for depositions of metallized inks composed of metal particles and/or metal organic metals mixed with glass frits and/or liquid glass chemicals. For example, if you want to provide a wafer trench with a width of less than about 50 microns, the minimum of known ink deposition techniques (eg, screen printing, pad printing, inkjet printing, direct write nozzle dispensing, etc.) Line width and calibration done is not enough to place the ink in the trench The ink is also deposited outside the trench area in an undesired manner.

Metallization to such narrow trenches is provided in the manner described herein. The methods disclosed herein can maintain any area that overflows beyond the edge of the trench to about 15 or even about 10 microns. This is true even if the trench is less than about 45 microns or even about 30 microns wide. By way of example, the first metallization ink is distributed into a seed layer that can typically overflow a trench that is between 0 and about 8 microns wide. Additional metal is then plated onto the seed layer, which causes the metallization lines to grow in height and the width of each side to grow by the same amount. For example, typically about 7-8 microns of metal is plated. Thus, starting with a 30 micron wide trench and having a depth of between about 3 microns and 20 microns, with a 3 micron overflow and a 7 micron plateout, which results in a final spill of 10 microns per side, total It is 30+10+10=50 micron width. Thus, not only is there disclosed a method of producing a SAC cell having a selective emitter, but a solar cell product made using a metallized ink in a metallized seed layer is also disclosed herein.

For the observer, the appearance of the fully plated cell may be similar to that of the battery according to the innovations disclosed herein, and the metallized ink seed layer is plated to the same solar cell as the fully plated buried grid process. thickness. However, in the microscopic analysis and / or composition analysis based on the innovation of the battery interface made here, that is, between the metal and the crucible, a semi-continuous layer of glass is found in the variation of the SAC battery, but Not found in fully plated batteries.

Deep shot

The discussion of the above selective emitters is about trenches that are intended to be metallized. 104 (Fig. 1A), 404 (Fig. 4A). The related method deals with other surface textures, including another type of groove that promotes light harvesting or absorption, as described in the aforementioned SAC Tech patent application.

Figures 9A-9D show sections of the workpiece along the line A-A of Figure 9B-II at different stages of the process. Figures 9B-II show top views of the workpiece at the stage shown in Figure 9B. Figures 9D-II show top views of the workpiece after the stage shown in Figure 9D, which is also after the diffusion step. The stage shown in Figures 9D-II is after the front side metallization has been applied. Figure 10 shows a typical process step and several variations shown as alternatives.

In step 1050, the trench 912 can be provided on some or all of the light absorbing surface 900 of the cell and can be used for texturing to improve light harvesting (reducing reflection). The grooves 912 are interlaced with the ridges 913. A metallized trench is also provided while providing a trench that reduces reflection, or at another time. In step 1052, liquid dopant 914 may be dispensed into portions of the light-harvesting trenches 912 to form deep-shot polar lines. The dopant can also be distributed to the metallization trench.

The high temperature step 1054 creates a deep diffusion along these smaller trenches, with dopants being dispensed, and a deep shot polar line that leads to a trench where metal fingers will later be formed. Metallized fingers 916 are provided to metallization trenches 904 as shown in Figures 9D-II.

There are several variations in the order of the steps to produce the deep shot line 918 with the connection metallization 916. These are similar to those described above. The first can have a single high temperature, changing the profile of the diffusion profile without other doping stages. (Although there may be additional high temperature doping stages, these are not demonstrated.) The second is assisted with POCl ₃ . The third is aided by the use of deposited dopants.

The single step method shown in the flow chart of Figure 10 includes a step 1050 of providing a metallized trench to the wafer and providing a trench that reduces reflection. The method further includes the step 1052 of dispensing dopants (e.g., P liquid) into the metallization trenches 904 and into certain light-harvesting trenches 912 that can be used for the deep-emission grid lines 918. The high temperature, process step 1054 of changing the diffusion profile is then carried out in a furnace (the gas is slightly doped with a non-metallized trench region) such that the entire surface is exposed to at least a small amount of dopant 919.

As shown in Figure 10, the POCl ₃ assisted method encompasses the same steps, followed by an alternative step of diffusion step 1055 POCl ₃ (as indicated by the dashed line) to slightly dope between the deep shot polar lines Area. As also shown in FIG. 10, another alternative, the method of depositing dopants shown in dashed lines, includes a limited availability of dopant liquid at deposition step 1053, followed by a single elevated temperature in the furnace. Process step 1054. In step 1056, metallization is provided in the metallization trench.

Another method, shown in the flow chart of Figure 12, uses a material that retards diffusion (rather than a dopant) in a concave light-harvesting recess, such as a trench, which is provided in step 1250 as described above. The methods exemplified in Figures 11A-11D show the cross-section of the workpiece along the line A-A of Figure 11B-II at different stages of the process. Figure 11B-II shows a plan view of the workpiece of Figure 11B. Figures 11D-II show the workpiece after the stage of Figure 11D, which is also after diffusion. Figures 11D-II show the workpiece after the front side metallization has been applied. Figure 12 shows a typical process step.

Step 1250 provides metallization and light-harvesting trenches. In step 1252, the diffusion-blocking material 1107 can be applied to a light-harvesting texture depression (eg, a trench) 1112), and the wafer is subsequently processed such that the recessed region at the bottom of the trench 1112 is filled with the material 1107 that blocks the diffusion while exposing the ridge 1113. The material that blocks the diffusion is dried (this step is not shown). The dopant in step 1253 is then provided throughout (discussed later), including the exposed ridge 1113, which undergoes deeper diffusion during the subsequent high temperature change of the diffusion profile (step 1254) (illustratively by layer 1119) Point out). The groove region does not accept deep diffusion because the material that blocks the diffusion avoids it. In any P diffusion step typical of Si solar cells, a phosphite glass (P glass) layer is formed on the Si surface, which layer is typically removed from the solution containing hydrofluoric acid (step 1256) to provide a display. The state of Figures 11D and 11D-II. For the example of a material that retards diffusion as described herein, not only does the P glass need to be etched, but also the material that blocks the diffusion needs to be removed prior to the next processing step.

After the high temperature processing step 1254, the heavier doped higher ridge regions 1113 form a deep shot polar line 1118 that leads to a region 1104 that will be later metallized by step 1258 (Fig. 11D-II). Metallization 1116 applies step 1258 to metallization trench 1104 at a later stage (Fig. 11D-II).

In the innovations discussed above, this particular aspect can be implemented in several variations, all of which are shown in the flow chart of Figure 12, with certain steps indicated as alternatives. An alternative is to utilize deposited dopants. The other uses POCl ₃ diffusion assist.

After the diffusion inhibiting material is applied 1252 and dried, a full strength dopant can be provided throughout, such as by misting, spraying or printing in step 1253. Subsequent high temperature, step 1254 of changing the dopant diffusion profile, establishes deep emitter doping.

The POCl ₃ assisted method is also similar. After the material of diffusion blocking drying, high-temperature treatment step 1254 may be selectively occurs first in the tubular furnace, and then POCl ₃ diffusion in step 1255. The ridge 1113 and the metallized trench thus accept deep diffusion of P in step 1254 where the high temperature changes the diffusion profile.

Deep shot polar line path

The specific aspect just described utilizes the SAC architecture to place the deep shot line 1119 perpendicular to the metallized fingers 1116 and uses light trapping grooves to help guide the various liquid materials in the process. As already mentioned, other light-harvesting textures are also used, such as pits or pits arranged in a pattern, such as a honeycomb pattern. This light-harvesting texture can also be used in a self-calibrating manner to provide deep-shooting polar line activity. Co-pending U.S. Patent Provisional Application No. 61/201,595, entitled "Wedge Embossing Patterning of Irregular Surfaces", Application on December 12, 2008, and Co-licensed Patent Cooperation Treaty Application No. PCT/ US2009 (the serial number has not been specified), the same date delivery of the quick mail label EM355266258US, titled "Wedge imprinting of irregular surfaces", applicants Benjamin F.Polito, Holly G.Gates, Emanuel M.Sachs, 1366 Technology Corporation, Massachusetts Institute of Technology, Attorney Docket No. 1366-0012 PCT, designated US, describes a method of making such a pitted, grooved surface. Provisional Application No. 61/201,595 and the Patent Cooperation Treaty application (serial number not yet specified), Agent File No. 1366-0012 PCT, are hereby incorporated by reference.

As illustrated with reference to the flow chart of FIG. 13 and FIG. 14, the efficient process will include the steps of providing a surface texture to wafer 1440 in step 1350, which will include both trenches for metallization and capture. Light Texture, the latter is a groove or a pit 1442 as shown, or something else. In general, pits provide better light harvesting than trenches. Advantageous specific aspects use pits to capture light. Additionally provided is a trench 1418 in the pit 1442 field that is used for the deep shot polar line path and is shown perpendicular to the metallized finger trench 1456. (It is also possible to use the ridges between the pits to provide a deeper polar line path, as explained below.) These three nominal textures may all be provided in one step 1350, or in two or more steps, Same or different. Next, in step 1352, the material that retards diffusion can be provided in a region that is not used for metallization trenches 1456 or deep emitter paths 1418, and in the illustrated example, regions of pits 1442 are provided. Because of the texture, a material that provides liquid retardation diffusion is provided in the pit region that will flow across the region covered by the pit, but will stop at the edge of the trench providing metallized fingers 1456 and deep emitter lines 1418. Therefore, the method utilizes the self-calibration principle discussed in the SAC technology patent.

According to an alternative, in step 1353, a full concentration of dopant can then be provided throughout, for example by fogging, spraying or printing. This step is followed by a high temperature heating step 1354 which diffuses the dopant into the exposed areas of the wafer, namely metallization line 1456 and deep shot line 1418. The glass from the dopant and the material that blocks the diffusion are etched in step 1356. Finally, in step 1358, a metallization material is provided to the metallization trenches 1456. The metallized material can be provided by a capillary dispensing tube 1460 as discussed in the capillary dispensing technique of the aforementioned U.S. Patent Application Serial No. 61/204,382.

In a specific alternative aspect, as an alternative to the dashed box, no dopant is provided to the surface prior to heating, and instead POCl _{3 is provided} to the furnace atmosphere during high temperature step 1354.

Alternatively, the dopant can also be provided by such a capillary distribution tube, as shown in FIG. 14, in this case, there is no need to block the diffusion material, because the dopant is only provided to the desired one. Limited area.

The above discussion refers to areas of deep diffusion under metallization to achieve selective emitters. A recent discussion is about deep diffusion regions that are not under metallization. It is possible to provide deep diffusion only in the area under the metallization, or only in the light-harvesting feature, or in the two regions. When provided in two regions, it is most efficient to provide dopants in the same step for diffusion in these two regions. This may be accomplished by, for example, masking certain portions of the light-harvesting region with a material that blocks diffusion, and then non-masked light-harvesting features (eg, emitter lines) during the POCl ₃ diffusion step and The metallized trenches simultaneously do the same degree of diffusion.

This method then utilizes the efficiency provided by the self-calibrating cell architecture, meaning that the location where the dopant and the diffusion-diffusing material run away is assigned by geometry without the need for complicated masking or alignment steps. Furthermore, the material that blocks the diffusion can actually be provided in a single step. Furthermore, only a high temperature, step of changing the diffusion profile is required, a patterned diffusion layer under the metallization can be established, and a patterned diffusion layer associated with the light-harvesting region is also established. Of course, an extra high temperature step can be performed, but only once.

The specific method steps for using the light-harvesting dimples and using the light-harvesting grooves, as schematically illustrated in the flow chart of Figure 12, are similar.

The wafer is provided with a plurality of overlapping pits that can be arranged in a variety of patterns. Honeycomb patterns have been found to be very useful. The liquid material that blocks the diffusion is supplied to the pit, and the wafer is subsequently processed, such that the bottom region of the pit is filled with the material that blocks the diffusion while exposing the peripheral edge ridges for subsequent high temperature processing steps. The bottom region of the pit accepts a deeper diffusion, which is the same as the ridge between the trenches to accept such deeper diffusion. For example, in the example discussed above with respect to FIG. 12, after applying a material that retards diffusion, the wafer can accept the application of dopants, such as by fogging, spraying, or printing. The wafer is then placed in the furnace and subjected to high temperatures, such that the diffusion profile of the dopant changes, and the upper edge is converted into a deep emitter grid path that is covered by a material that is not retarded by diffusion. The entire area of the hood. The shape of this path will depend on the shape of the pit and the volume of the pit covered by the material that blocks the diffusion. Alternatively, the dopant may be applied prior to heating or may be replaced by exposure to POCl ₃ in the furnace.

Next, look at the arrangement variations of the light-harvesting trenches 912 (Fig. 9); there are at least two general variations with respect to the metallization trenches 904. Certain light-harvesting trenches 912 may be hydraulically coupled to metallization trenches 904 and/or to each other such that liquid provided to the metallization trenches also travels to the coupled light-harvesting trenches, as shown in Figures 9B-II. Alternatively, some or all of the light-harvesting grooves 912 may be hydraulically isolated from any other grooves and may be independently filled. If the light-harvesting grooves are hydraulically coupled to some other light-harvesting groove or metallized groove, all of the coupling grooves can be filled by dispensing liquid into the coupling grooves and contribute to fluid flow. For isolated configurations, each isolated trench must have liquid dispensed directly to it.

The dispensing step can be performed by a capillary, as discussed by the individual light-harvesting grooves 912 discussed above. Or it is contemplated that portions of the light-harvesting grooves 912 may be hydraulically coupled together to allow dispensing 1052 and flowing dopant P solution 914 from one light-harvesting trench to another light-harvesting trench, and Metallization trenches 904 are dispensed to separate. These light-harvesting trenches 912 are smaller in size than the metallization trenches 904, and thus may be somewhat challenging in achieving liquid 914 flow along the smaller trenches 912.

One disadvantage of the isolation configuration is that there will be a small gap at location 915 (Fig. 9D-II), which is located in the texture trench 904 for metallized fingers 916 and for the deep shot grid 918. Between the light-harvesting grooves 912. Thus, although current may have to pass through the short high resistance region at location 915 to the metal fingers 916, most of the benefits should still be achieved. (Figure 9D-II does not show such a problematic gap, only showing if it exists there.) The percentage of the absorption region that can be advantageously covered by the deep-diffused deep-shooting polar line will be 1 Between 50%.

The general practice of these selective diffusions may be applied to other battery configurations, such as back contact of fingers. Similarly, as patterned deep emitter lines can help carry current to the metal fingers on the front surface, as shown in Figure 15, the patterned back surface field line 1571 of the wafer can also be used to help carry current The metal grid structure to the back side, as shown with reference to FIG. 16, is intended to include a bus bar 1673 and a finger 1675. Typically, the bus bar can be predominantly Ag (silver) and the fingers can be Al (aluminum) or predominantly Ag.

The innovations disclosed herein may be applied to diffusion of non-P dopants such as As, Ga, B or Al. Phosphorus or arsenic dopants can also be used to form the back field region The domain contacts the substrate on the n-type wafer substrate. Alternatively, boron, gallium or aluminum dopants may be similarly used to form an emitter on the n-type substrate and a back-field contact to the substrate on the p-type wafer substrate. Furthermore, the deep emitter concept achieved by the patterned barrier layer may be applied to surfaces where the pattern is not a trench and a honeycomb, such as an isotexture. Furthermore, the metalized seed layer type applied to the deep diffusion trench of the selective emitter SAC architecture or a material that may be a non-plated metal, such as Ni, is as previously described. Some examples include pastes or inks of metal powders and glass frits, such as Ag, such as those sold by Dupont, Ferro, or organometallic mixtures of metals and glass chemicals. These practices may be applied to other electronic devices that want to selectively diffuse with minimal masking and processing steps.

While specific and specific features have been shown and described, it will be understood by those skilled in the art that various changes and modifications can be made without departing from the broad scope. All matters contained in the above description and shown in the drawings are intended to be interpreted as illustrative and not restrictive.

101‧‧‧ wafer

102‧‧‧Liquid

104‧‧‧ trench

105‧‧‧Deep diffusion area

106‧‧‧ (lightly doped) surrounding area

107‧‧‧metallization

250~257‧‧‧Processing steps to selectively apply dopants to the workpiece wafer

340‧‧‧Workpiece

342‧‧‧ surface

356‧‧‧ trench

359‧‧‧ side wall

360‧‧‧Distribution capillary

364‧‧‧Distribution of liquid

401‧‧‧ wafer

404‧‧‧ trench

405‧‧‧Selective polar region

406‧‧‧Regional (non-metallized area)

407‧‧‧Dissipative diffusion material (metallization layer)

409‧‧‧ edge

411‧‧ ‧ materials that block diffusion

550~558‧‧‧Processing steps for selectively applying dopants to the workpiece wafer

601‧‧‧ wafer

602‧‧‧Doped liquid

603‧‧‧Reduced volume of dopant liquid

604‧‧‧Metalized trench

605‧‧‧Severe diffusion area

607‧‧‧metallized ink

608‧‧‧Doped glass

611‧‧ ‧ materials that block diffusion

750~758‧‧‧Processing steps for selectively applying dopants to the workpiece wafer

802, 802', 802" ‧ ‧ liquid dopants

804, 804', 804" ‧ ‧ trench

806, 806', 806" ‧ ‧ ‧ heavy diffusion layer

816‧‧‧Metal

900‧‧‧Light absorbing surface

904‧‧‧metallized trench

912‧‧‧ trench

913‧‧‧ ridge

914‧‧‧Liquid dopants

915‧‧‧ position

916‧‧‧Metalized fingers

918‧‧‧Deep shot line

919‧‧‧Dopings

1050~1056‧‧‧Processing steps to form the basic method of deep shots

1104‧‧‧metallized trench

1107‧‧‧ Materials that block diffusion

1112‧‧‧ trench

1113‧‧‧ ridge

1116‧‧‧Metalized fingers

1118‧‧‧Deep shot line

1119‧‧‧Deep diffusion layer

1250~1258‧‧‧Processing steps for applying the basic method of deep shots

1350~1358‧‧‧Processing steps for the basic method of forming a selective emitter region

1418‧‧‧ trench

1440‧‧‧ wafer

1442‧‧‧ pit

1456‧‧‧metallized trench

1460‧‧‧Capillary distribution tube

1571‧‧‧ patterned back field lines

1673‧‧‧Electric strip

1675‧‧‧ fingers

The invention is disclosed and claimed herein with reference to the appended claims and drawings, in which: FIGS. 1A-1D are different stages of the process of selectively applying dopants to a workpiece wafer. Schematic cross-sectional view; Figure 2 is a schematic flow diagram of several typical process steps for selectively applying dopants to a workpiece wafer, showing basic sequence and alternative steps; Figure 3 is a schematic representation of a semiconductor wafer having a light-harvesting pit field having two grooves, and a capillary tube dispensing a liquid containing the material to one of the grooves; FIGS. 4A-4E are cross-sections of the workpiece wafer at different stages of the process of selectively applying the dopant Schematic, the process uses a material that blocks diffusion at a particular non-trench location, and the dopants are distributed substantially everywhere; Figure 5 is a typical process step for selectively applying dopants to the workpiece wafer. A schematic flow diagram of a material that blocks diffusion is applied to a particular non-trench location, and dopants are distributed throughout; the basic method is shown here, and several alternative changes are shown, one for use. POCl _{3 is} assisted, and the other is assisted by deposited dopants; FIGS. 6A-6F are schematic cross-sectional views of the workpiece wafer at different stages of the process of selectively applying dopants to the trenches, which are then substantially a material that blocks diffusion; Figure 7 is a schematic flow diagram of several typical process steps for selectively applying dopants to a workpiece wafer, applying dopants to the trenches, and then substantially everywhere A material that blocks diffusion; the basic method is shown here, and several alternative changes are shown, one using POCl ₃ and the other using deposited dopants; Figures 8A, 8B, 8C, 8D Shows a specific aspect of the innovation in which three or more trenches are used for each metallized finger; Figures 9A, 9B, 9C, and 9D are different stages of the process of applying a deep shot polar line to a workpiece wafer. A cross-sectional schematic view along line AA of Figure 9B-II (next) using a dopant distribution method; Figures 9B-II are schematic plan views of a workpiece wafer to be applied using a dopant distribution method The emitter grid is at the stage shown in Figure 9B; Figure 9D-II is shown in Figure 9B-II. A schematic plan view of a workpiece wafer that has been implanted using a dopant distribution method, after that shown in Figure 9D, after diffusion, after front metallization has been applied; Figure 10 is a deep polar line A schematic flow diagram of several typical process steps for dispensing a dopant into a trench and then diffusing the dopant into the trench; also showing two alternatives, one using POCl ₃ and the other Use mist or spray assist to provide a limited source of dopant availability to be slightly doped everywhere; Figures 11A-11D are the process of applying a deep shot of the workpiece wafer with parallel light-harvesting trenches A schematic cross-sectional view of a different process stage, along line AA of FIG. 11B-II (next), using a method of retarding the diffusion material; FIG. 11B-II is a plan view of the workpiece wafer, which is to be used for retarding diffusion The method of material is applied to the deep shot line, as shown in the stage shown in FIG. 11B; and FIG. 11D-II is a plan view of the workpiece wafer shown in FIG. 11B-II, which has been used to block the diffusion material. Applying a deep shot line, as shown in Figure 11D After the segment, after the diffusion, after the front metallization has been applied; Figure 12 is a schematic flow diagram of several typical process steps for applying the basic method of deep-element grid lines, using materials that retard diffusion; also showing two alternatives The method, one using POCl ₃ assist and the other using deposited dopant assist; Figure 13 is a schematic flow diagram of several typical process steps for forming a basic method of selective emitter regions, wherein the deep shot grid uses block Diffused material; FIG. 14 schematically shows a semiconductor wafer having a pit field for light harvesting, three groove fingers for metallization, and two for the deep shot line perpendicular to the former An auxiliary groove, and the capillary distributes one of the liquid containing the material to the deep emitter trench; FIG. 15 schematically shows in plan view the back side of the wafer after forming the p+ back field line; FIG. 16 schematically shows FIG. The wafer shown is further printed and/or deposited with the metal fingers and the back side of the metal bus bar.

250~257‧‧‧Processing steps to selectively apply dopants to the workpiece wafer

Claims (61)

A method of providing a patterned diffusion layer to a solar cell, comprising the steps of: a. providing a semiconductor wafer; b. providing a trench to the semiconductor wafer; c. dispensing a dopant liquid into the trench; d. Applying a high temperature to heat the wafer during which the dopant is diffused into the wafer; and e. dispensing a metallized material comprising the liquid into the trench; thereby creating a patterned diffusion layer at the metallization location. The method of claim 1, wherein the step of dispensing the dopant comprises: dispensing the dopant via the capillary. The method of claim 2, wherein the capillary directly contacts the wafer. The method of claim 1, wherein the step of dispensing the metallized material comprises dispensing the metallized material via a capillary. The method of claim 4, wherein the capillary directly contacts the wafer. The method of claim 2, wherein the step of dispensing the metallized material comprises: dispensing the metallized material via a capillary. The method of claim 1, wherein the trench is provided in a group of at least two adjacent trenches, and wherein the step of dispensing the metallized material into the trench comprises: dispensing the metallized material to any single group At least one groove in the groove. The method of claim 7, wherein the step of dispensing the metallized material comprises dispensing the metallized material to at least a portion of the trenches of any single group of trenches. The method of claim 7, wherein the at least two adjacent trenches comprise three trenches. The method of claim 1, wherein the wafer comprises a p-type semiconductor substrate, the dopant is thus used to produce an n ⁺ -type semiconductor, and the diffusion layer comprises a solar cell emitter. The method of claim 1, wherein the wafer comprises a p-type semiconductor substrate, the dopant is thus used to produce a p ⁺ -type semiconductor, and the diffusion layer comprises a back surface field region of the solar cell. The method of claim 1, wherein the wafer comprises an n-type semiconductor substrate, the dopant is thus used to produce a p ⁺ -type semiconductor, and the diffusion layer comprises a solar cell emitter. The method of claim 1, wherein the wafer comprises an n-type semiconductor, the dopant is thus used to produce an n ⁺ -type semiconductor, and the diffusion layer comprises a back field region. The method of claim 1, wherein the step of diffusing the dopant into the wafer further comprises the step of providing a limited availability of dopant to the wafer. The method of claim 14, wherein the step of providing a dopant of limited availability comprises: using a method selected from the group consisting of spraying, misting, printing a liquid comprising a dopant. For example, the method of claim 14 of the patent scope provides limited The step of using a dopant includes depositing a dopant using a method selected from the group consisting of sputtering, evaporation, plasma enhanced chemical vapor deposition, vacuum chemical vapor deposition, atmospheric pressure chemical vapor deposition. glass. The method of claim 1, further comprising the step of exposing the wafer to the dopant gas during the step of applying a high temperature to diffuse the dopant into the wafer. The method of claim 17, wherein the doping gas is selected from the group consisting of POCl ₃ and BBr ₃ . A method of providing a patterned diffusion layer to a solar cell, comprising the steps of: a. providing a semiconductor wafer; b. providing a trench to the semiconductor wafer; c. providing a material for retarding diffusion to a non-ditch of the wafer a groove region rather than a trench; d. providing a dopant to the entire wafer surface; e. applying a high temperature to heat the wafer during which the dopant is diffused into the wafer; and f. dispensing a metal containing the liquid The material is introduced into the trench; thereby creating a patterned diffusion layer at the metallization location. The method of claim 19, wherein the step of providing a dopant comprises: providing a liquid dopant to the trench prior to the step of providing a material that retards diffusion. The method of claim 19, wherein the wafer comprises a p-type semiconductor substrate, the dopant is thus used to produce an n ⁺ -type semiconductor, and the diffusion layer comprises a solar cell emitter. The method of claim 19, wherein the wafer comprises a p-type semiconductor substrate, the dopant is thus used to produce a p ⁺ -type semiconductor, and the diffusion layer comprises a back surface field region of the solar cell. The method of claim 19, wherein the wafer comprises an n-type semiconductor substrate, the dopant is thus used to produce a p ⁺ -type semiconductor, and the diffusion layer comprises a solar cell emitter. The method of claim 19, wherein the wafer comprises an n-type semiconductor, the dopant is thus used to produce an n ⁺ -type semiconductor, and the diffusion layer comprises a back surface field. The method of claim 19, wherein the step of providing a dopant to the surface of the wafer comprises: using a method selected from the group consisting of spraying, misting, printing a liquid comprising a dopant. The method of claim 19, wherein the step of providing a dopant to the surface of the wafer comprises: using a sputtering, vapor deposition, plasma enhanced chemical vapor deposition, vacuum chemical vapor deposition, atmospheric pressure chemical vapor phase A method of depositing a group of deposits to deposit a dopant glass. The method of claim 19, wherein the step of providing a dopant to the surface of the wafer comprises the step of exposing the wafer to the dopant gas during the heating step. The method of claim 27, wherein the doping gas is selected from the group consisting of POCl ₃ and BBr ₃ . The method of claim 20, wherein the step of providing a liquid dopant to the trench comprises: dispensing the dopant via the capillary. The method of claim 29, wherein the step of dispensing the dopant comprises: dispensing the dopant via a capillary that directly contacts the wafer. The method of claim 19, wherein the step of dispensing the metallized material comprises dispensing the metallized material via a capillary. The method of claim 29, wherein the step of dispensing the metallized material comprises dispensing the metallized material via a capillary that directly contacts the wafer. A method of providing a patterned diffusion layer to a solar cell, comprising the steps of: a. providing a semiconductor wafer; b. providing a trench to the semiconductor wafer; c. providing a dopant liquid into the trench; d. Providing a material that blocks diffusion over the entire surface of the wafer, including trenches; e. diffusing dopants into the wafer at high temperatures; and f. distributing metallized material comprising liquid into the trench; thereby The position creates a patterned diffusion layer. The method of claim 33, wherein the wafer comprises a p-type semiconductor substrate, the dopant is thus used to produce an n ⁺ -type semiconductor, and the diffusion layer comprises a solar cell emitter. The method of claim 33, wherein the wafer comprises a p-type semiconductor substrate, the dopant is thus used to produce a p ⁺ -type semiconductor, and the diffusion layer comprises a back surface field region of the solar cell. The method of claim 33, wherein the wafer comprises an n-type semiconductor substrate, the dopant is thus used to produce a p ⁺ -type semiconductor, and the diffusion layer comprises a solar cell emitter. The method of claim 33, wherein the wafer comprises an n-type semiconductor, the dopants, for example, produce an n ⁺ type semiconductor, and the diffusion layer comprises a back surface field. The method of claim 33, further comprising the step of providing dopants across the surface of the wafer. The method of claim 38, wherein the step of providing dopants to the entire wafer surface comprises: using a method selected from the group consisting of spraying, misting, and printing a liquid comprising dopants. The method of claim 38, wherein the step of providing a dopant to the entire wafer surface comprises: using a sputtering, vapor deposition, plasma enhanced chemical vapor deposition, vacuum chemical vapor deposition, atmospheric pressure chemical gas. A method of grouping of phase deposits to deposit dopant glass. The method of claim 38, wherein the step of providing dopants to the entire wafer surface comprises: exposing the wafer to the dopant gas during the heating step. The method of claim 41, wherein the dopant gas is selected from the group consisting of POCl ₃ and BBr ₃ . A method of providing a patterned diffusion layer to a solar cell, comprising the steps of: a. providing a semiconductor wafer; b. providing a concave textured region on the semiconductor wafer, the wafer being formed in comparison to the flat surface Enhance the light harvesting characteristics of the wafer; c. providing a trench to the wafer for metallization; d. providing a trench in the recessed textured region, the trench intersecting the trench for metallization for deep shot polar lines e. providing dopants to the trenches for the deeper polar lines; f. heating the wafers at high temperatures during which the dopants are diffused into the wafer; and g. dispensing the metallized material comprising the liquid Into the trench for metallization; thereby creating a patterned diffusion layer that intersects the metallization location. The method of claim 43, wherein prior to the heating step, further comprising the step of providing a dopant to the trench for metallization, thereby producing a patterned diffusion layer also located at the metallization location. The method of claim 44, wherein the liquid is dispensed via a capillary to perform at least one of: providing a dopant to the trench for the deeper polar line; dispensing the metallized material comprising the liquid to the metal In the trench; and providing dopants to the trench for metallization. The method of claim 45, wherein the capillary directly contacts the wafer. The method of claim 43, wherein the concave texture comprises a pit field. The method of claim 43, wherein the concave texture comprises a plurality of grooves. The method of claim 43, wherein the step of diffusing the dopant into the wafer further comprises the step of providing limited The dopant is used to the wafer. The method of claim 49, wherein the step of providing a dopant of limited availability comprises: using a method selected from the group consisting of spraying, misting, printing a liquid comprising a dopant. The method of claim 49, wherein the step of providing a dopant of limited availability comprises: using a sputtering, vapor deposition, plasma enhanced chemical vapor deposition, vacuum chemical vapor deposition, atmospheric pressure chemical vapor phase A method of depositing a group of deposits to deposit a dopant glass. The method of claim 43, further comprising the step of exposing the wafer to the dopant gas during the step of diffusing the dopant into the wafer. The method of claim 52, wherein the doping gas is selected from the group consisting of POCl ₃ and BBr ₃ . A solar cell comprising: a. a germanium-based wafer that is doped; b. a trench for metallization having a width of less than about 60 microns and a depth of greater than about 3 microns; c. trench Metallization, which extends no more than about 15 microns along the wafer surface to either side of the individual trenches; d. metallization underlying doping, which is present on the wafer surface rather than under the metallization trench The doping of the region is also deep; and e. a semi-continuous glass layer at the interface between the metallization and the deeper doped ruthenium. Such as the solar cell of the 54th patent application, wherein the trench The width is less than about 45 microns. A solar cell according to claim 54 wherein the groove width is less than about 30 microns. A solar cell according to claim 54 wherein the metallization extends no more than about 10 microns to either side of the individual trenches. The solar cell of claim 54, further comprising: a deep shot polar line region intersecting the metallization in the trench, the deep shot polar line region also including than being present on the wafer surface rather than The doping of the underlying regions of the metallization trench and the doping of the non-deep polar grid region are also deep. The solar cell of claim 58 further comprising: a concave textured region of the semiconductor wafer, the wafers of the planar surface being formed to form a light-harvesting characteristic of the enhanced wafer. A solar cell according to claim 59, wherein the concave texture comprises a pit. A solar cell according to claim 59, wherein the concave texture comprises a plurality of grooves.