TWI513012B - Solar cell with hetrojunction and a manufacturing method thereof - Google Patents
Solar cell with hetrojunction and a manufacturing method thereof Download PDFInfo
- Publication number
- TWI513012B TWI513012B TW103141810A TW103141810A TWI513012B TW I513012 B TWI513012 B TW I513012B TW 103141810 A TW103141810 A TW 103141810A TW 103141810 A TW103141810 A TW 103141810A TW I513012 B TWI513012 B TW I513012B
- Authority
- TW
- Taiwan
- Prior art keywords
- semiconductor
- transparent conductive
- amorphous germanium
- solar cell
- conductive layer
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title claims description 8
- 239000004065 semiconductor Substances 0.000 claims description 248
- 229910052732 germanium Inorganic materials 0.000 claims description 108
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 108
- 210000004027 cell Anatomy 0.000 claims description 66
- 238000005253 cladding Methods 0.000 claims description 46
- 238000000034 method Methods 0.000 claims description 35
- 210000005056 cell body Anatomy 0.000 claims description 26
- 239000000758 substrate Substances 0.000 claims description 26
- 238000001704 evaporation Methods 0.000 claims description 8
- 230000008020 evaporation Effects 0.000 claims description 8
- 230000000295 complement effect Effects 0.000 claims description 5
- 238000010891 electric arc Methods 0.000 claims description 4
- 238000004544 sputter deposition Methods 0.000 claims description 4
- 238000007738 vacuum evaporation Methods 0.000 claims description 4
- 238000004891 communication Methods 0.000 claims description 3
- 230000001788 irregular Effects 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 8
- 238000006243 chemical reaction Methods 0.000 description 7
- 238000005229 chemical vapour deposition Methods 0.000 description 5
- 238000003698 laser cutting Methods 0.000 description 5
- 101000701286 Pseudomonas aeruginosa (strain ATCC 15692 / DSM 22644 / CIP 104116 / JCM 14847 / LMG 12228 / 1C / PRS 101 / PAO1) Alkanesulfonate monooxygenase Proteins 0.000 description 4
- 101000983349 Solanum commersonii Osmotin-like protein OSML13 Proteins 0.000 description 4
- 101000983338 Solanum commersonii Osmotin-like protein OSML15 Proteins 0.000 description 4
- 238000002835 absorbance Methods 0.000 description 3
- 230000031700 light absorption Effects 0.000 description 3
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 2
- 239000000969 carrier Substances 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
Landscapes
- Photovoltaic Devices (AREA)
Description
本發明係關於一種異質接面太陽能電池及其製造方法,尤指一種利用第一圖樣化透明導電層之第一延伸包覆部包覆第一非晶矽半導體層以增加光電轉換效率之異質接面太陽能電池及其製造方法。The present invention relates to a heterojunction solar cell and a method of fabricating the same, and more particularly to a heterojunction in which a first amorphous germanium semiconductor layer is coated with a first extended cladding portion of a first patterned transparent conductive layer to increase photoelectric conversion efficiency. Surface solar cell and its manufacturing method.
請參閱第一圖,第一圖係顯示先前技術之異質接面矽晶太陽能電池剖面示意圖。如圖所示,一異質接面矽晶太陽能電池PA100包含一太陽能電池本體PA1、一透明導電層PA2、一第一電極PA3以及一第二電極PA4。太陽能電池本體PA1包含一矽晶半導體層PA11、一第一本質非晶矽半導體層PA12、一第一非晶矽半導體層PA13、一第二本質非晶矽半導體層PA14以及一第二非晶矽半導體層PA15。Please refer to the first figure. The first figure shows a schematic cross-section of a prior art heterojunction twin solar cell. As shown, a heterojunction twinned solar cell PA100 includes a solar cell body PA1, a transparent conductive layer PA2, a first electrode PA3, and a second electrode PA4. The solar cell body PA1 includes a twinned semiconductor layer PA11, a first intrinsic amorphous germanium semiconductor layer PA12, a first amorphous germanium semiconductor layer PA13, a second intrinsic amorphous germanium semiconductor layer PA14, and a second amorphous germanium. Semiconductor layer PA15.
第一本質非晶矽半導體層PA12與第二本質非晶矽半導體層PA14係分別形成於矽晶半導體層PA11之兩面上,而第一非晶矽半導體層PA13與第二非晶矽半導體層PA15則分別形成在第一本質非晶矽半導體層PA12與第二本質非晶矽半導體層PA14上,最後透明導電層PA2 再整個形成在第一非晶矽半導體層PA13與第二非晶矽半導體層PA15外圍。而第一電極PA3與第二電極PA4是分別設置在透明導電層PA2的兩側,以用來收集電流。The first intrinsic amorphous germanium semiconductor layer PA12 and the second intrinsic amorphous germanium semiconductor layer PA14 are respectively formed on both sides of the twinned semiconductor layer PA11, and the first amorphous germanium semiconductor layer PA13 and the second amorphous germanium semiconductor layer PA15 Formed on the first intrinsic amorphous germanium semiconductor layer PA12 and the second intrinsic amorphous germanium semiconductor layer PA14, respectively, and finally the transparent conductive layer PA2 Further, it is entirely formed on the periphery of the first amorphous germanium semiconductor layer PA13 and the second amorphous germanium semiconductor layer PA15. The first electrode PA3 and the second electrode PA4 are respectively disposed on both sides of the transparent conductive layer PA2 for collecting current.
其中,為了避免上下兩側的透明導電層PA2產生短路,通常會在透明導電層PA2的第一絕緣處PA21與第二絕緣處PA22利用雷射切割的方式,使透明導電層PA2分割成兩個部份,而第一電極PA3與第二電極PA4便可分別收集載子而不會產生漏電流。In order to avoid short circuit of the transparent conductive layer PA2 on the upper and lower sides, the transparent conductive layer PA2 is generally divided into two by laser cutting at the first insulating portion PA21 and the second insulating portion PA22 of the transparent conductive layer PA2. In part, the first electrode PA3 and the second electrode PA4 can collect carriers separately without generating leakage current.
請參閱第二圖,第二圖係顯示先前技術之另一異質接面矽晶太陽能電池平面示意圖。如圖所示,一異質接面矽晶太陽能電池PA200之構造與上述之異質接面矽晶太陽能電池PA100相似,但為了避免上下兩側的透明導電層因在側邊接觸而產生漏電流的情形,異質接面矽晶太陽能電池PA200上下兩側的透明導電層PA2a在形成時,都是直接利用遮罩遮蔽的方式,使異質接面矽晶太陽能電池PA200之太陽能電池本體PA1a之邊緣露出而不被透明導電層PA2a所覆蓋,因此透明導電層PA2a並無法從太陽能電池本體PA1a之邊緣電性接觸。Please refer to the second figure, which shows a schematic plan view of another heterojunction twin solar cell of the prior art. As shown in the figure, the structure of a heterojunction twinned solar cell PA200 is similar to that of the above-described heterojunction twin solar cell PA100, but in order to avoid leakage currents of the transparent conductive layers on the upper and lower sides due to contact at the side. When the transparent conductive layer PA2a on the upper and lower sides of the heterojunction twinned solar cell PA200 is formed, the mask is shielded directly, and the edge of the solar cell body PA1a of the heterojunction twinned solar cell PA200 is exposed without The transparent conductive layer PA2a is not covered by the edge of the solar cell body PA1a.
承上所述,習知的方式雖可以有效地避免上下兩層的透明導電層PA2a在邊緣互相接觸,但也損失了側邊的吸光率,導致光電轉換效率漸少,因此如何在避免側邊漏電流的同時提高整體受光面積,一直是本領域待解決的問題。As described above, the conventional method can effectively prevent the upper and lower transparent conductive layers PA2a from contacting each other at the edges, but also loses the side absorbance, resulting in a decrease in photoelectric conversion efficiency, so how to avoid the side edges Increasing the overall light-receiving area while leaking current has been a problem to be solved in the field.
有鑒於在先前技術中,現有的異質接面太陽能電池雖然 可以在透明導電層形成後,利用雷射切割製程來分割出兩部分的透明導電層,但卻會因此增加製程上的成本,然而,雖然可以在形成透明導電層時,利用遮罩的方式避免太陽能電池本體的邊緣被透明導電層覆蓋,進而避免透明導電層在側邊產生漏電流,但此方式卻會損失吸光率,降低太陽能電池的光電轉換效率。In view of the prior art, existing heterojunction solar cells are After the transparent conductive layer is formed, a two-part transparent conductive layer can be separated by a laser cutting process, but the cost in the process can be increased. However, although a transparent conductive layer can be formed, a mask can be used to avoid The edge of the solar cell body is covered by the transparent conductive layer, thereby preventing the transparent conductive layer from generating leakage current on the side, but this method loses the light absorption rate and reduces the photoelectric conversion efficiency of the solar cell.
緣此,本發明之主要目的係提供一異質接面太陽能電池及其製造方法,不僅不需要另外以雷射切割製程來分割出兩塊透明導電層,亦可形成光吸收率較高的太陽能電池。Accordingly, the main object of the present invention is to provide a heterojunction solar cell and a method of fabricating the same, which not only does not need to separately separate two transparent conductive layers by a laser cutting process, but also can form a solar cell with high light absorption rate. .
承上所述,本發明為解決習知技術之問題所採用之必要技術手段係提供一種異質接面太陽能電池,包含一太陽能電池本體、一第一圖樣化透明導電層以及一第二圖樣化透明導電層。太陽能電池本體包含一半導體基板、一第一本質非晶矽半導體層、一第一非晶矽半導體層、一第二本質非晶矽半導體層以及一第二非晶矽半導體層。半導體基板係具有相對設置之一第一表面與一第二表面,且半導體基板摻雜有一第一半導體。第一本質非晶矽半導體層係設置於第一表面上。第一非晶矽半導體層係設置於第一本質非晶矽半導體層上,並摻雜有一第二半導體。第二本質非晶矽半導體層係設置於第二表面上。第二非晶矽半導體層係設置於第二本質非晶矽半導體層上,並摻雜有一第三半導體。In view of the above, the present invention provides a heterojunction solar cell for solving the problems of the prior art, comprising a solar cell body, a first patterned transparent conductive layer, and a second patterned transparent Conductive layer. The solar cell body comprises a semiconductor substrate, a first intrinsic amorphous germanium semiconductor layer, a first amorphous germanium semiconductor layer, a second intrinsic amorphous germanium semiconductor layer and a second amorphous germanium semiconductor layer. The semiconductor substrate has a first surface and a second surface disposed opposite to each other, and the semiconductor substrate is doped with a first semiconductor. The first intrinsic amorphous germanium semiconductor layer is disposed on the first surface. The first amorphous germanium semiconductor layer is disposed on the first intrinsic amorphous germanium semiconductor layer and doped with a second semiconductor. The second intrinsic amorphous germanium semiconductor layer is disposed on the second surface. The second amorphous germanium semiconductor layer is disposed on the second intrinsic amorphous germanium semiconductor layer and doped with a third semiconductor.
第一圖樣化透明導電層係形成於第一非晶矽半導體層上,並具有複數個第一延伸包覆部,第一延伸包覆部係 部分地包覆住第一非晶矽半導體層之邊緣。第二圖樣化透明導電層係形成於第二非晶矽半導體層上,且該第二圖樣化透明導電層與該第一圖樣化透明導電層之間係圍構出複數個相互連通之邊緣曝露區,藉以使該第一圖樣化透明導電層與該第二圖樣化透明導電層藉由該些相互連通之邊緣曝露區互相絕緣。The first patterned transparent conductive layer is formed on the first amorphous germanium semiconductor layer and has a plurality of first extended cladding portions, and the first extended cladding portion is The edge of the first amorphous germanium semiconductor layer is partially covered. The second patterned transparent conductive layer is formed on the second amorphous germanium semiconductor layer, and the plurality of interconnected edges are exposed between the second patterned transparent conductive layer and the first patterned transparent conductive layer. a region, wherein the first patterned transparent conductive layer and the second patterned transparent conductive layer are insulated from each other by the interconnected edge exposure regions.
如上所述,藉由第一圖樣化透明導電層所具有的複數個第一延伸包覆部部分地包覆住第一非晶矽半導體層之邊緣,可有效的增加太陽能電池本體的光吸收率,意即被第一延伸包覆部所包覆的太陽能電池本體之邊緣亦可吸收光線並產生光電轉換,進而增加電流的輸出。As described above, the first plurality of first extending cladding portions of the first patterned transparent conductive layer partially cover the edges of the first amorphous germanium semiconductor layer, thereby effectively increasing the light absorptivity of the solar cell body. That is, the edge of the solar cell body covered by the first extended cladding portion can also absorb light and generate photoelectric conversion, thereby increasing the output of current.
由上述之必要技術手段所衍生之一附屬技術手段為,邊緣曝露區之形狀為長方形、正方形、弧形、不規則形、環形或其組合。An auxiliary technical means derived from the above-mentioned necessary technical means is that the shape of the edge exposure zone is a rectangle, a square, an arc, an irregular shape, a ring shape or a combination thereof.
由上述之必要技術手段所衍生之一附屬技術手段為,第二圖樣化透明導電層具有複數個第二延伸包覆部,第二延伸包覆部係部分地包覆住第二非晶矽半導體層之邊緣。藉此可相對的增加太陽能電池本體吸光率。較佳者,第一延伸包覆部係與第二延伸包覆部交錯排列。An auxiliary technical means derived from the above-mentioned technical means is that the second patterned transparent conductive layer has a plurality of second extended cladding portions, and the second extended cladding portion partially covers the second amorphous germanium semiconductor The edge of the layer. Thereby, the solar cell body absorbance can be relatively increased. Preferably, the first extended cladding portion is staggered with the second extended cladding portion.
由上述之必要技術手段所衍生之一附屬技術手段為,第一圖樣化透明導電層之邊緣與第二圖樣化透明導電層之邊緣圖樣為互補。An auxiliary technical means derived from the above-mentioned necessary technical means is that the edge of the first patterned transparent conductive layer is complementary to the edge pattern of the second patterned transparent conductive layer.
由上述之必要技術手段所衍生之一附屬技術手段為,第一半導體係為一第一型半導體,第二半導體與第三半導體其中一者為第一型半導體,另一者為一第二型半導 體。較佳者,第一型半導體為N型半導體,第二型半導體為P型半導體;或者,第一型半導體為P型半導體,第二型半導體為N型半導體。An auxiliary technical means derived from the above-mentioned necessary technical means is that the first semiconductor system is a first type semiconductor, one of the second semiconductor and the third semiconductor is a first type semiconductor, and the other is a second type. Semi-guide body. Preferably, the first type semiconductor is an N type semiconductor, and the second type semiconductor is a P type semiconductor; or the first type semiconductor is a P type semiconductor, and the second type semiconductor is an N type semiconductor.
本發明為解決習知技術之更採用另一必要技術手段,其係提供一種異質接面太陽能電池的製作方法,包括以下步驟:步驟(a),製備一半導體基板,半導體基板摻雜有一第一半導體;步驟(b),於半導體基板之一第一表面上形成一第一本質非晶矽半導體層;步驟(c),於第一本質非晶矽半導體層上形成一第一非晶矽半導體層,且第一非晶矽半導體層摻雜有一第二半導體;步驟(d),於半導體基板之一第二表面上形成一第二本質非晶矽半導體層;步驟(e),於第二本質非晶矽半導體層上形成一第二非晶矽半導體層,其中第二非晶矽半導體層摻雜有第三半導體;步驟(f),於第一非晶矽半導體層之表面形成一第一圖樣化透明導電層,且第一圖樣化透明導電層具有複數個包覆第一非晶矽半導體層邊緣之第一延伸包覆部;步驟(g),於第二非晶矽半導體層上形成一第二圖樣化透明導電層,且第二圖樣化透明導電層與第一圖樣化透明導電層之間係圍構出複數個相互連通之邊緣曝露區,藉以使第一圖樣化透明導電層與第二圖樣化透明導電層藉由相互連通之邊緣曝露區互相絕緣。其中需特別說明的是,步驟(c)與步驟(d)的順序是可以對調的。The present invention further provides a method for fabricating a heterojunction solar cell, which comprises the following steps: step (a), preparing a semiconductor substrate, the semiconductor substrate doped with a first a semiconductor; step (b), forming a first intrinsic amorphous germanium semiconductor layer on a first surface of the semiconductor substrate; and (c) forming a first amorphous germanium semiconductor on the first intrinsic amorphous germanium semiconductor layer a layer, and the first amorphous germanium semiconductor layer is doped with a second semiconductor; in step (d), a second intrinsic amorphous germanium semiconductor layer is formed on a second surface of the semiconductor substrate; and step (e) is in the second Forming a second amorphous germanium semiconductor layer on the intrinsic amorphous germanium semiconductor layer, wherein the second amorphous germanium semiconductor layer is doped with a third semiconductor; and step (f) forming a first surface on the first amorphous germanium semiconductor layer Forming a transparent conductive layer, and the first patterned transparent conductive layer has a plurality of first extended cladding portions covering edges of the first amorphous germanium semiconductor layer; and step (g) is on the second amorphous germanium semiconductor layer Form a second picture The transparent conductive layer is formed, and a plurality of interconnected edge exposure regions are formed between the second patterned transparent conductive layer and the first patterned transparent conductive layer, so that the first patterned transparent conductive layer and the second patterned The transparent conductive layer is insulated from each other by edge contact regions that are in communication with each other. It should be particularly noted that the order of step (c) and step (d) can be reversed.
由上述之必要技術手段所衍生之一附屬技術手段為,第一圖樣化透明導電層與第二圖樣化透明導電層係透過一真空蒸鍍製程、一電弧放電蒸鍍製程、一脈衝雷射蒸鍍 製程或一濺鍍製程所形成。An auxiliary technical means derived from the above-mentioned technical means is that the first patterned transparent conductive layer and the second patterned transparent conductive layer are passed through a vacuum evaporation process, an arc discharge evaporation process, and a pulsed laser evaporation. plating A process or a sputtering process is formed.
由上述之必要技術手段所衍生之一附屬技術手段為,步驟(f)在第一非晶矽半導體層之表面形成第一圖樣化透明導電層時,係透過遮罩或半導體基板支架遮擋住第一非晶矽半導體層之部分表面,進而形成第一延伸包覆部。An auxiliary technical means derived from the above-mentioned technical means is that when the first patterned transparent conductive layer is formed on the surface of the first amorphous germanium semiconductor layer, the step (f) is blocked by the mask or the semiconductor substrate holder. A portion of the surface of the amorphous germanium semiconductor layer, thereby forming a first extended cladding portion.
由上述之必要技術手段所衍生之一附屬技術手段為,步驟(g)在第二非晶矽半導體層之表面形成第二圖樣化透明導電層時,係透過遮罩或半導體基板支架遮擋第二非晶矽半導體層之部分表面,進而形成複數個第二延伸包覆部,且第二延伸部係與第一延伸部係交錯地排列。An auxiliary technical means derived from the above-mentioned technical means is that when step (g) forms a second patterned transparent conductive layer on the surface of the second amorphous germanium semiconductor layer, the second or second semiconductor transparent substrate is shielded by the mask or the semiconductor substrate holder. A portion of the surface of the amorphous germanium semiconductor layer further forms a plurality of second extended cladding portions, and the second extension portions are alternately arranged with the first extension portions.
由上述之必要技術手段所衍生之一附屬技術手段為,第一半導體係為一第一型半導體,第二半導體與第三半導體其中一者為第一型半導體,另一者為一第二型半導體。較佳者,第一型半導體為N型半導體,第二型半導體為P型半導體;或者,第一型半導體為P型半導體,第二型半導體為N型半導體。An auxiliary technical means derived from the above-mentioned necessary technical means is that the first semiconductor system is a first type semiconductor, one of the second semiconductor and the third semiconductor is a first type semiconductor, and the other is a second type. semiconductor. Preferably, the first type semiconductor is an N type semiconductor, and the second type semiconductor is a P type semiconductor; or the first type semiconductor is a P type semiconductor, and the second type semiconductor is an N type semiconductor.
本發明所採用的具體實施例,將藉由以下之實施例及圖式作進一步之說明。The specific embodiments of the present invention will be further described by the following examples and drawings.
PA100、PA200‧‧‧異質接面矽晶太陽能電池PA100, PA200‧‧‧ Heterojunction twinned solar cells
PA1、PA1a‧‧‧太陽能電池本體PA1, PA1a‧‧‧ solar cell body
PA11‧‧‧矽晶半導體層PA11‧‧‧crystalline semiconductor layer
PA12‧‧‧第一本質非晶矽半導體層PA12‧‧‧First essential amorphous germanium semiconductor layer
PA13‧‧‧第一非晶矽半導體層PA13‧‧‧First amorphous germanium semiconductor layer
PA14‧‧‧第二本質非晶矽半導體層PA14‧‧‧Second intrinsic amorphous germanium semiconductor layer
PA15‧‧‧第二非晶矽半導體層PA15‧‧‧Second amorphous germanium semiconductor layer
PA2、PA2a‧‧‧透明導電層PA2, PA2a‧‧‧ transparent conductive layer
PA3‧‧‧第一電極PA3‧‧‧ first electrode
PA4‧‧‧第二電極PA4‧‧‧second electrode
100、100a、100b、100c‧‧‧異質接面太陽能電池100, 100a, 100b, 100c‧‧‧ heterojunction solar cells
1、1a、1b、1c‧‧‧太陽能電池本體1, 1a, 1b, 1c‧‧‧ solar cell body
11‧‧‧半導體基板11‧‧‧Semiconductor substrate
111‧‧‧第一表面111‧‧‧ first surface
112‧‧‧第二表面112‧‧‧ second surface
12‧‧‧第一本質非晶矽半導體層12‧‧‧First essential amorphous germanium semiconductor layer
13‧‧‧第一非晶矽半導體層13‧‧‧First amorphous germanium semiconductor layer
14‧‧‧第二本質非晶矽半導體層14‧‧‧Second intrinsic amorphous germanium semiconductor layer
15‧‧‧第二非晶矽半導體層15‧‧‧Second amorphous germanium semiconductor layer
2、2a、2b、2c‧‧‧第一圖樣化透明導電層2, 2a, 2b, 2c‧‧‧ first patterned transparent conductive layer
21、21a、21b、21c‧‧‧第一延伸包覆部21, 21a, 21b, 21c‧‧‧ first extension cladding
3、3a、3b、3c‧‧‧第二圖樣化透明導電層3, 3a, 3b, 3c‧‧‧ second patterned transparent conductive layer
31、31a、31b、31c‧‧‧第二延伸包覆部31, 31a, 31b, 31c‧‧‧ second extension cladding
ER1‧‧‧第一邊緣曝露區ER1‧‧‧First edge exposure area
ER2‧‧‧第二邊緣曝露區ER2‧‧‧Second edge exposure area
第一圖係顯示先前技術之異質接面矽晶太陽能電池剖面示意圖;第二圖係顯示先前技術之另一異質接面矽晶太陽能電池平面示意圖;第三圖係顯示本發明第一較佳實施例所提供異質接面太 陽能電池之平面示意圖;第四圖係顯示本發明第一較佳實施例所提供異質接面太陽能電池之另一平面示意圖;第五圖係顯示第三圖之A-A剖面示意圖;第六圖係顯示第三圖之B-B剖面示意圖;第七圖係顯示本發明第二較佳實施例所提供之異質接面太陽能電池之平面示意圖;第八圖係顯示本發明第二較佳實施例所提供之異質接面太陽能電池之另一平面示意圖;第九圖係顯示本發明第三較佳實施例所提供之異質接面太陽能電池之平面示意圖;第十圖係顯示本發明第三較佳實施例所提供之異質接面太陽能電池之另一平面示意圖;第十一圖係顯示本發明第四較佳實施例所提供之異質接面太陽能電池之平面示意圖;以及第十二圖係顯示本發明第四較佳實施例所提供之異質接面太陽能電池之另一平面示意圖。The first figure shows a schematic cross-sectional view of a heterojunction twin solar cell of the prior art; the second figure shows a schematic plan view of another heterojunction twin solar cell of the prior art; the third figure shows the first preferred embodiment of the present invention. The heterojunction provided by the example is too FIG. 4 is a schematic plan view showing a solar cell of a heterojunction according to a first preferred embodiment of the present invention; FIG. 5 is a schematic cross-sectional view showing a cross-sectional view of the AA of the third embodiment; FIG. 7 is a schematic plan view showing a BB cross-section of a third embodiment; FIG. 7 is a plan view showing a heterojunction solar cell according to a second preferred embodiment of the present invention; and FIG. 8 is a view showing a second preferred embodiment of the present invention. Another schematic plan view of a heterojunction solar cell; a ninth diagram showing a schematic view of a heterojunction solar cell provided by a third preferred embodiment of the present invention; and a tenth diagram showing a third preferred embodiment of the present invention Another schematic plan view of a heterojunction solar cell provided; FIG. 11 is a plan view showing a heterojunction solar cell according to a fourth preferred embodiment of the present invention; and a twelfth aspect showing the fourth aspect of the present invention Another schematic plan view of a heterojunction solar cell provided by the preferred embodiment.
請參閱第三圖至第六圖,第三圖係顯示本發明第一較佳實施例所提供異質接面太陽能電池之平面示意圖;第四圖係顯示本發明第一較佳實施例所提供異質接面太陽能電池之另一平面示意圖;第五圖係顯示第三圖之A-A剖面示意圖;第六圖係顯示第三圖之B-B剖面示意圖。Please refer to the third to sixth figures. The third figure shows a schematic plan view of the heterojunction solar cell provided by the first preferred embodiment of the present invention. The fourth figure shows the heterogeneity provided by the first preferred embodiment of the present invention. Another schematic plan view of the junction solar cell; the fifth diagram shows the AA cross-section of the third diagram; and the sixth diagram shows the BB cross-section of the third diagram.
如第三圖及第四圖所示,一種異質接面太陽能電池100 包含一太陽能電池本體1、一第一圖樣化透明導電層2以及一第二圖樣化透明導電層3。As shown in the third and fourth figures, a heterojunction solar cell 100 The invention comprises a solar cell body 1, a first patterned transparent conductive layer 2 and a second patterned transparent conductive layer 3.
太陽能電池本體1包含一半導體基板11、一第一本質非晶矽半導體層12、一第一非晶矽半導體層13、一第二本質非晶矽半導體層14以及一第二非晶矽半導體層15。半導體基板係11具有相對設置之一第一表面111與一第二表面112,且半導體基板11摻雜有一第一半導體。其中,第一半導體係為一第一型半導體,且在本實施例中,第一型半導體例如是N型半導體。The solar cell body 1 includes a semiconductor substrate 11, a first intrinsic amorphous germanium semiconductor layer 12, a first amorphous germanium semiconductor layer 13, a second intrinsic amorphous germanium semiconductor layer 14, and a second amorphous germanium semiconductor layer. 15. The semiconductor substrate 11 has a first surface 111 and a second surface 112 disposed opposite to each other, and the semiconductor substrate 11 is doped with a first semiconductor. The first semiconductor is a first type semiconductor, and in the embodiment, the first type semiconductor is, for example, an N type semiconductor.
第一本質非晶矽半導體層12係設置於第一表面111上。第一非晶矽半導體層13係設置於第一本質非晶矽半導體層12上,並摻雜有一第二半導體。其中,第二半導體係為一第二型半導體,且在本實施例中,第二型半導體例如是P型半導體。The first intrinsic amorphous germanium semiconductor layer 12 is disposed on the first surface 111. The first amorphous germanium semiconductor layer 13 is disposed on the first intrinsic amorphous germanium semiconductor layer 12 and doped with a second semiconductor. The second semiconductor is a second type semiconductor, and in the embodiment, the second type semiconductor is, for example, a P type semiconductor.
第二本質非晶矽半導體層14係設置於第二表面112上。第二非晶矽半導體層15係設置於第二本質非晶矽半導體層14上,並摻雜有一第三半導體。其中,第三半導體係為第一型半導體,在本實施例中為N型半導體The second intrinsic amorphous germanium semiconductor layer 14 is disposed on the second surface 112. The second amorphous germanium semiconductor layer 15 is disposed on the second intrinsic amorphous germanium semiconductor layer 14 and doped with a third semiconductor. Wherein, the third semiconductor is a first type semiconductor, which is an N type semiconductor in this embodiment.
第一圖樣化透明導電層2係形成於第一非晶矽半導體層13上,並具有複數個第一延伸包覆部21,第一延伸包覆部21係部分地包覆住第一非晶矽半導體層13與第二非晶矽半導體層15之邊緣。The first patterned transparent conductive layer 2 is formed on the first amorphous germanium semiconductor layer 13 and has a plurality of first extended cladding portions 21 partially covering the first amorphous portion The edges of the germanium semiconductor layer 13 and the second amorphous germanium semiconductor layer 15.
第二圖樣化透明導電層3係形成於第二非晶矽半導體層15上,並具有複數個第二延伸包覆部31,第二延伸包覆部31係部分地包覆住第一非晶矽半導體層13與第二非 晶矽半導體層15之邊緣。The second patterned transparent conductive layer 3 is formed on the second amorphous germanium semiconductor layer 15 and has a plurality of second extended cladding portions 31 partially covering the first amorphous portion矽 semiconductor layer 13 and second non The edge of the germanium semiconductor layer 15.
承上所述,第一延伸包覆部21與第二延伸包覆部31係交錯地排列,且第一圖樣化透明導電層2之邊緣與第二圖樣化透明導電層3之邊緣係互補但不互相連接,進而使第二圖樣化透明導電層3與該第一圖樣化透明導電層2之間圍構出複數個相互連通之邊緣曝露區,而複數個邊緣曝露區更可區分為複數個第一邊緣曝露區ER1與複數個第二邊緣曝露區ER2,第一邊緣曝露區ER1是由第一延伸包覆部21其中相鄰二者與第二延伸包覆部31其中位於第一延伸包覆部21相鄰二者間之一者所圍構而成,第二邊緣曝露區ER2是由第二延伸包覆部21其中相鄰二者與第一延伸包覆部31其中位於第二延伸包覆部21相鄰二者間之一者所圍構而成,且複數個第一邊緣曝露區ER1與複數個第二邊緣曝露區ER2是相互連通,藉以使第一圖樣化透明導電層2與第二圖樣化透明導電層3間隔地設置,即第一圖樣化透明導電層2與第二圖樣化透明導電層3之邊緣完全不接觸,以避免短路現象。As described above, the first extended cladding portion 21 and the second extended cladding portion 31 are alternately arranged, and the edge of the first patterned transparent conductive layer 2 is complementary to the edge of the second patterned transparent conductive layer 3 but The plurality of mutually connected edge exposure regions are enclosed between the second patterned transparent conductive layer 3 and the first patterned transparent conductive layer 2, and the plurality of edge exposure regions are further divided into a plurality of edges. a first edge exposed area ER1 and a plurality of second edge exposed areas ER1, wherein the first edge exposed area ER1 is formed by the first extended covering portion 21 and the second extending covering portion 31 is located in the first extended package The covering portion 21 is surrounded by one of the two, and the second edge exposed portion ER2 is formed by the second extending covering portion 21, wherein the two adjacent first covering portions 31 are located in the second extending portion The covering portion 21 is surrounded by one of the two, and the plurality of first edge exposed regions ER1 and the plurality of second edge exposed regions ER2 are connected to each other, thereby making the first patterned transparent conductive layer 2 Arranging at intervals from the second patterned transparent conductive layer 3, that is, the first pattern is transparent The conductive layer 2 is completely out of contact with the edge of the second patterned transparent conductive layer 3 to avoid a short circuit phenomenon.
此外,在本實施例中,第一邊緣曝露區ER1之形狀主要為長方形,而第二邊緣曝露區ER2之形狀主要為長方形與位於四個邊角的弧形,但在其他實施例中而不限於此,例如可為長方形、正方形、弧形、不規則形、環形或其組合。In addition, in the embodiment, the shape of the first edge exposure area ER1 is mainly a rectangle, and the shape of the second edge exposure area ER2 is mainly a rectangle and an arc located at four corners, but in other embodiments, To be limited thereto, for example, it may be a rectangle, a square, an arc, an irregular shape, a ring shape, or a combination thereof.
如上所述,藉由第一圖樣化透明導電層2所具有的複數個第一延伸包覆部21部分地包覆住第一非晶矽半導體層13與第二非晶矽半導體層15之邊緣,可有效的增加 太陽能電池本體1的光吸收率,意即被第一延伸包覆部21所包覆的太陽能電池本體1之邊緣亦可吸收光線並產生光電轉換,進而增加電流的輸出。As described above, the plurality of first extending cladding portions 21 of the first patterned transparent conductive layer 2 partially cover the edges of the first amorphous germanium semiconductor layer 13 and the second amorphous germanium semiconductor layer 15 Can be effectively increased The light absorption rate of the solar cell body 1, that is, the edge of the solar cell body 1 covered by the first extended cladding portion 21 can also absorb light and generate photoelectric conversion, thereby increasing the output of current.
請繼續參閱第三圖至第六圖。如圖所示,本發明更提供一種異質接面太陽能電池100的製作方法,其步驟首先是製備半導體基板11,而半導體基板11在製作的過程中便摻雜有第一半導體,第一半導體在本實施例中係為第一型半導體,即N型半導體;接著於半導體基板11之第一表面111上以一化學氣相沉積製程形成第一本質非晶矽半導體層12;然後於第一本質非晶矽半導體層上以化學氣相沉積製程形成一第一非晶矽半導體層13,且第一非晶矽半導體層13在形成的同時便摻雜有一第二半導體,第二半導體在本實施例中係為第二型半導體,即P型半導體;再來於半導體基板11之一第二表面112上以化學氣相沉積製程形成一第二本質非晶矽半導體層14;接著於第二本質非晶矽半導體層14上以化學氣相沉積製程形成一第二非晶矽半導體層15,其中第二非晶矽半導體層15在形成時便摻雜有第三半導體,第三半導體在本實施例中係為第一型半導體,即N型半導體;之後於第一非晶矽半導體層13之表面形成第一圖樣化透明導電層2,且第一圖樣化透明導電層2具有複數個包覆第一非晶矽半導體層13邊緣之第一延伸包覆部21;最後,於第二非晶矽半導體層15上形成第二圖樣化透明導電層3,且第二圖樣化透明導電層3與第一圖樣化透明導電層2係圍構出複數個相互連通之第一邊緣曝露區ER1 與第二邊緣曝露區ER2,藉以使第一圖樣化透明導電層2與該第二圖樣化透明導電層3間隔地設置,而第一非晶矽半導體層13與第二非晶矽半導體層15之邊緣係自第一邊緣曝露區ER1與第二邊緣曝露區ER2露出。Please continue to refer to the third to sixth figures. As shown in the figure, the present invention further provides a method for fabricating a heterojunction solar cell 100, the first step of which is to prepare a semiconductor substrate 11, and the semiconductor substrate 11 is doped with a first semiconductor during fabrication, and the first semiconductor is In this embodiment, the first type of semiconductor, that is, the N-type semiconductor; then the first intrinsic amorphous germanium semiconductor layer 12 is formed on the first surface 111 of the semiconductor substrate 11 by a chemical vapor deposition process; A first amorphous germanium semiconductor layer 13 is formed on the amorphous germanium semiconductor layer by a chemical vapor deposition process, and the first amorphous germanium semiconductor layer 13 is doped with a second semiconductor, and the second semiconductor is in the present embodiment. In the example, a second type semiconductor, that is, a P-type semiconductor; a second surface 112 of the semiconductor substrate 11 is formed by a chemical vapor deposition process to form a second intrinsic amorphous germanium semiconductor layer 14; Forming a second amorphous germanium semiconductor layer 15 on the amorphous germanium semiconductor layer 14 by a chemical vapor deposition process, wherein the second amorphous germanium semiconductor layer 15 is doped with a third semiconductor, third In this embodiment, the conductor is a first type semiconductor, that is, an N type semiconductor; then a first patterned transparent conductive layer 2 is formed on the surface of the first amorphous germanium semiconductor layer 13, and the first patterned transparent conductive layer 2 has a plurality of first extended cladding portions 21 covering the edges of the first amorphous germanium semiconductor layer 13; finally, a second patterned transparent conductive layer 3 is formed on the second amorphous germanium semiconductor layer 15, and the second patterned transparent layer The conductive layer 3 and the first patterned transparent conductive layer 2 enclose a plurality of first edge exposed regions ER1 connected to each other And the second edge exposed region ER2, wherein the first patterned transparent conductive layer 2 and the second patterned transparent conductive layer 3 are disposed apart from each other, and the first amorphous germanium semiconductor layer 13 and the second amorphous germanium semiconductor layer 15 are disposed at intervals The edges are exposed from the first edge exposure zone ER1 and the second edge exposure zone ER2.
在本實施例中,化學氣相沉積製程例如是電漿輔助化學氣相沉積(Plasma-enhanced chemical vapor deposition,PECVD)製程,而第一圖樣化透明導電層2與第二圖樣化透明導電層3係透過一真空蒸鍍製程、一電弧放電蒸鍍製程、一脈衝雷射蒸鍍製程或一濺鍍製程所形成。In this embodiment, the chemical vapor deposition process is, for example, a plasma-assisted chemical vapor deposition (PECVD) process, and the first patterned transparent conductive layer 2 and the second patterned transparent conductive layer 3 It is formed by a vacuum evaporation process, an arc discharge evaporation process, a pulsed laser evaporation process or a sputtering process.
此外,第一圖樣化透明導電層2之第一延伸包覆部21在形成的過程中,係利用半導體基板支架支撐太陽能電池本體1之第二非晶矽半導體層15邊緣,再形成透明導電層,使得所形成的第一圖樣化透明導電層2會在支架兩側形成第一延伸包覆部21,因此透過支架之遮擋即可圖樣化透明導電層而形成第一圖樣化透明導電層2。而第二圖樣化透明導電層3之第二延伸包覆部31例如是透過遮罩的方式利用上述之真空蒸鍍製程、一電弧放電蒸鍍製程、一脈衝雷射蒸鍍製程或一濺鍍製程所形成,意即在形成時,遮罩是覆蓋住第一延伸包覆部21與第一延伸包覆部21之間的第一非晶矽半導體層13,以形成第二圖樣化透明導電層3與第二延伸包覆部31。在本實施例中,透過支架遮擋形成之第一延伸包覆部21與透過遮罩形成之第二延伸包覆部31所形成的圖案為互補,但第一延伸包覆部21與第二延伸包覆部31的邊緣並不相連,因此可避免第一圖樣化透明導電層2與第二圖樣化透明 導電層3接觸而短路的問題。In addition, in the forming process, the first extended cladding portion 21 of the first patterned transparent conductive layer 2 supports the edge of the second amorphous germanium semiconductor layer 15 of the solar cell body 1 by using a semiconductor substrate holder, and then forms a transparent conductive layer. The first patterned transparent conductive layer 2 is formed on the two sides of the bracket to form the first extended covering portion 21, so that the transparent conductive layer can be patterned by the shielding of the bracket to form the first patterned transparent conductive layer 2. The second extended cladding portion 31 of the second patterned transparent conductive layer 3 is, for example, a vacuum evaporation process, an arc discharge evaporation process, a pulsed laser evaporation process, or a sputtering process. The process is formed, that is, when formed, the mask covers the first amorphous germanium semiconductor layer 13 between the first extended cladding portion 21 and the first extended cladding portion 21 to form a second patterned transparent conductive The layer 3 and the second extension cladding portion 31. In this embodiment, the first extended covering portion 21 formed by the shield shielding is complementary to the pattern formed by the second extending covering portion 31 formed by the transparent mask, but the first extending covering portion 21 and the second extending portion The edges of the covering portion 31 are not connected, so that the first patterned transparent conductive layer 2 and the second patterned transparent can be avoided. The problem that the conductive layer 3 is in contact and short-circuited.
請參閱第七圖與第八圖,第七圖係顯示本發明第二較佳實施例所提供之異質接面太陽能電池之平面示意圖;第八圖係顯示本發明第二較佳實施例所提供之異質接面太陽能電池之另一平面示意圖。如圖所示,一種異質接面太陽能電池100a包含一太陽能電池本體1a、一第一圖樣化透明導電層2a以及一第二圖樣化透明導電層3a。其中,異質接面太陽能電池100a與上述之異質接面太陽能電池100相似,其差異主要在於異質接面太陽能電池100a之第一圖樣化透明導電層2a具有四個第一延伸包覆部21a,而第二圖樣化透明導電層3a具有四個第二延伸包覆部31a,第一非晶矽半導體層13與第二非晶矽半導體層15係自前述圖樣化透明導電層未覆蓋的區域露出。Please refer to the seventh and eighth figures. FIG. 7 is a schematic plan view showing a heterojunction solar cell according to a second preferred embodiment of the present invention; and FIG. 8 is a view showing the second preferred embodiment of the present invention. Another schematic diagram of a heterojunction solar cell. As shown, a heterojunction solar cell 100a includes a solar cell body 1a, a first patterned transparent conductive layer 2a, and a second patterned transparent conductive layer 3a. The heterojunction solar cell 100a is similar to the heterojunction solar cell 100 described above, and the difference is mainly that the first patterned transparent conductive layer 2a of the heterojunction solar cell 100a has four first extended cladding portions 21a, and The second patterned transparent conductive layer 3a has four second extended cladding portions 31a, and the first amorphous germanium semiconductor layer 13 and the second amorphous germanium semiconductor layer 15 are exposed from a region not covered by the patterned transparent conductive layer.
請參閱第九圖與第十圖,第九圖係顯示本發明第三較佳實施例所提供之異質接面太陽能電池之平面示意圖;第十圖係顯示本發明第三較佳實施例所提供之異質接面太陽能電池之另一平面示意圖。如圖所示,一種異質接面太陽能電池100b包含一太陽能電池本體1b、一第一圖樣化透明導電層2b以及一第二圖樣化透明導電層3b。其中,異質接面太陽能電池100b與上述之異質接面太陽能電池100相似,其差異主要在於異質接面太陽能電池100b之第一圖樣化透明導電層2b具有四個第一延伸包覆部21b,而第二圖樣化透明導電層3b具有四個第二延伸包覆部31b。Please refer to the ninth and tenth drawings. The ninth drawing shows a schematic plan view of a heterojunction solar cell according to a third preferred embodiment of the present invention. The tenth figure shows the third preferred embodiment of the present invention. Another schematic diagram of a heterojunction solar cell. As shown, a heterojunction solar cell 100b includes a solar cell body 1b, a first patterned transparent conductive layer 2b, and a second patterned transparent conductive layer 3b. The heterojunction solar cell 100b is similar to the heterojunction solar cell 100 described above, and the difference is mainly that the first patterned transparent conductive layer 2b of the heterojunction solar cell 100b has four first extended cladding portions 21b, and The second patterned transparent conductive layer 3b has four second extended cladding portions 31b.
請參閱第十一圖與第十二圖,第十一圖係顯示本發明第四較佳實施例所提供之異質接面太陽能電池之平面示意圖;第十二圖係顯示本發明第四較佳實施例所提供之異質接面太陽能電池之另一平面示意圖。如圖所示,一種異質接面太陽能電池100c包含一太陽能電池本體1c、一第一圖樣化透明導電層2c以及一第二圖樣化透明導電層3c。其中,異質接面太陽能電池100c與上述之異質接面太陽能電池100相似,其差異主要在於異質接面太陽能電池100c之第一圖樣化透明導電層2c具有四個第一延伸包覆部21c,而第二圖樣化透明導電層3c未具有第二延伸包覆部,在本實施例中第一圖樣化透明導電層2與第二圖樣化透明導電層3不接觸,因此可避免短路的問題。Referring to FIG. 11 and FIG. 12, FIG. 11 is a plan view showing a heterojunction solar cell according to a fourth preferred embodiment of the present invention; and FIG. 12 is a fourth preferred embodiment of the present invention. Another schematic plan view of a heterojunction solar cell provided by the embodiments. As shown, a heterojunction solar cell 100c includes a solar cell body 1c, a first patterned transparent conductive layer 2c, and a second patterned transparent conductive layer 3c. The heterojunction solar cell 100c is similar to the heterojunction solar cell 100 described above, and the difference is mainly that the first patterned transparent conductive layer 2c of the heterojunction solar cell 100c has four first extended cladding portions 21c, and The second patterned transparent conductive layer 3c does not have the second extended cladding portion. In the embodiment, the first patterned transparent conductive layer 2 is not in contact with the second patterned transparent conductive layer 3, so that the problem of short circuit can be avoided.
綜上所述,由於本發明所提供之異質接面太陽能電池及其製造方法在形成第一圖樣化透明導電層時是利用支架及/或遮罩的方式來遮擋,在形成第二圖樣化透明導電層時,是利用遮罩來遮擋,使得第一圖樣化透明導電層與第二圖樣化透明導電層形成後會在遮擋處露出第一非晶矽半導體層13與第二非晶矽半導體層15,並使遮擋處的兩側形成第一延伸包覆部或第二延伸包覆部,進而增加太陽能電池本體的光電轉換效率,且由於第一延伸包覆部或第二延伸包覆部並未直接接觸,因此不會有短路及漏電流的現象產生。相較於先前技術之異質接面太陽能電池在形成透明導電層後再以雷射切割的方式分隔出兩塊透明導電層,本發明可以有效的省略雷射切割製 程,同時太陽能電池本體邊緣僅部分遮擋,因此可以增加透明導電層覆蓋太陽能電池本體的面積,進而有效的增加太陽能電池本體的吸光率與光電轉換率。In summary, the heterojunction solar cell and the method for fabricating the same according to the present invention are formed by using a bracket and/or a mask to form a first patterned transparent conductive layer, and forming a second pattern transparent. When the conductive layer is shielded by the mask, the first patterned amorphous conductive layer and the second patterned transparent conductive layer are formed to expose the first amorphous germanium semiconductor layer 13 and the second amorphous germanium semiconductor layer at the shielding portion. And forming a first extended cladding portion or a second extended cladding portion on both sides of the shielding portion, thereby increasing the photoelectric conversion efficiency of the solar cell body, and due to the first extended cladding portion or the second extended cladding portion It is not in direct contact, so there is no short circuit or leakage current. Compared with the prior art heterojunction solar cell, after forming a transparent conductive layer and separating two transparent conductive layers by laser cutting, the present invention can effectively omit the laser cutting system. At the same time, the edge of the solar cell body is only partially blocked, so that the transparent conductive layer can cover the area of the solar cell body, thereby effectively increasing the absorbance and photoelectric conversion rate of the solar cell body.
此外,雖然在本實施例中,第一半導體與第三半導體為第一型半導體,第二半導體為第二型半導體,且第一型半導體為N型半導體,第二型半導體為P型半導體;但在其他實施例中則不限於此,亦可是第一半導體與第二半導體為第一型半導體,第三半導體為第二型半導體,且第一型半導體亦可是P型半導體,第二型半導體亦可相對的是N型半導體。In addition, in this embodiment, the first semiconductor and the third semiconductor are a first type semiconductor, the second semiconductor is a second type semiconductor, and the first type semiconductor is an N type semiconductor, and the second type semiconductor is a P type semiconductor; However, in other embodiments, the first semiconductor and the second semiconductor are first type semiconductors, the third semiconductor is a second type semiconductor, and the first type semiconductor may be a P type semiconductor, and the second type semiconductor It can also be opposed to an N-type semiconductor.
藉由以上較佳具體實施例之詳述,係希望能更加清楚描述本發明之特徵與精神,而並非以上述所揭露的較佳具體實施例來對本發明之範疇加以限制。相反地,其目的是希望能涵蓋各種改變及具相等性的安排於本發明所欲申請之專利範圍的範疇內。The features and spirit of the present invention will be more apparent from the detailed description of the preferred embodiments. On the contrary, the intention is to cover various modifications and equivalents within the scope of the invention as claimed.
100‧‧‧異質接面太陽能電池100‧‧‧Hexual junction solar cells
1‧‧‧太陽能電池本體1‧‧‧ solar cell body
2‧‧‧第一圖樣化透明導電層2‧‧‧First patterned transparent conductive layer
21‧‧‧第一延伸包覆部21‧‧‧First extension cladding
ER1‧‧‧第一邊緣曝露區ER1‧‧‧First edge exposure area
Claims (15)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW103141810A TWI513012B (en) | 2014-12-02 | 2014-12-02 | Solar cell with hetrojunction and a manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW103141810A TWI513012B (en) | 2014-12-02 | 2014-12-02 | Solar cell with hetrojunction and a manufacturing method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TWI513012B true TWI513012B (en) | 2015-12-11 |
| TW201622162A TW201622162A (en) | 2016-06-16 |
Family
ID=55407835
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW103141810A TWI513012B (en) | 2014-12-02 | 2014-12-02 | Solar cell with hetrojunction and a manufacturing method thereof |
Country Status (1)
| Country | Link |
|---|---|
| TW (1) | TWI513012B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI610455B (en) * | 2016-12-30 | 2018-01-01 | Method for manufacturing heterojunction thin intrinsic layer solar cell |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2011091587A1 (en) * | 2010-01-27 | 2011-08-04 | Xu Zhen | Solar cell apparatus having light-modulating function |
| TW201128789A (en) * | 2010-02-12 | 2011-08-16 | Univ Nat Chiao Tung | New structure solar cell with superlattices |
| TW201143162A (en) * | 2009-12-18 | 2011-12-01 | Osram Opto Semiconductors Gmbh | Optoelectronic component and method for producing an optoelectronic component |
| TW201225317A (en) * | 2010-07-15 | 2012-06-16 | Shinetsu Chemical Co | Method for producing solar cell and film-producing device |
-
2014
- 2014-12-02 TW TW103141810A patent/TWI513012B/en active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW201143162A (en) * | 2009-12-18 | 2011-12-01 | Osram Opto Semiconductors Gmbh | Optoelectronic component and method for producing an optoelectronic component |
| WO2011091587A1 (en) * | 2010-01-27 | 2011-08-04 | Xu Zhen | Solar cell apparatus having light-modulating function |
| TW201128789A (en) * | 2010-02-12 | 2011-08-16 | Univ Nat Chiao Tung | New structure solar cell with superlattices |
| TW201225317A (en) * | 2010-07-15 | 2012-06-16 | Shinetsu Chemical Co | Method for producing solar cell and film-producing device |
Also Published As
| Publication number | Publication date |
|---|---|
| TW201622162A (en) | 2016-06-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101048878A (en) | Avalanche photodiode | |
| JP5820265B2 (en) | Back electrode type solar cell and manufacturing method thereof | |
| CN103515396A (en) | Photodiode array | |
| CN108701701A (en) | photoelectric conversion device | |
| JP2013098564A (en) | Method for making semiconductor light detection devices | |
| US20240304650A1 (en) | Back surface incident type semiconductor photo detection element | |
| TWI513012B (en) | Solar cell with hetrojunction and a manufacturing method thereof | |
| CN105810770B (en) | heterojunction solar cell and manufacturing method thereof | |
| JP2008028421A (en) | Avalanche photodiode | |
| CN103985769B (en) | Solar cell and module thereof | |
| WO2022133660A1 (en) | Single-photon avalanche diode and photoelectric sensing device | |
| JP6762304B2 (en) | Photoelectric conversion element | |
| TWI497733B (en) | Back contact solar cell and module comprising the same | |
| WO2016140309A1 (en) | Photoelectric conversion element and method for manufacturing same | |
| US12272701B2 (en) | Method for manufacturing back surface incident type semiconductor photo detection element | |
| JP7794031B2 (en) | Light receiving element | |
| US11239266B2 (en) | Back-illuminated semiconductor photodetection element | |
| JP2017157781A (en) | Photoelectric conversion element and method for manufacturing the same | |
| US11276794B2 (en) | Backside illuminated semiconductor photodetection element | |
| CN106920852B (en) | Solar cell and module thereof | |
| CN107154413A (en) | Semiconductor device with photo detector | |
| TWI514593B (en) | Solar cell and module comprising the same | |
| CN116404064A (en) | SiC top collector region ultraviolet photoelectric transistor integrated with temperature measuring unit and manufacturing method | |
| JP2025095758A (en) | Semiconductor elements and optical sensors | |
| JP6333139B2 (en) | Photoelectric conversion element and method for producing photoelectric conversion element |