TWI509978B - Crystal controlled oscillator and oscillator apparatus - Google Patents

Description

Crystal controlled oscillator and oscillating device

The present invention relates to a crystal controlled oscillator that detects a temperature of an environment in which a crystal oscillator is placed, and controls a heating portion based on a temperature detection result. The temperature of the above environment remains fixed.

When a crystal controlled oscillator is loaded into an application requiring extremely high frequency stability, it is common to use an Oven Controlled Crystal Oscillator (OCXO). Temperature control in OCXO uses a thermistor as a temperature detector and uses discrete components such as operational amplifiers, resistors, and condensers, but because of the analog parts. The deviation or change with time, for example, temperature control of ±20m °C is not possible.

However, in a base station, a relay station, or the like, it is necessary to inexpensively use a clock signal having an extremely high stability. Therefore, it is expected that the previous OCXO is difficult to cope with.

In FIGS. 2 and 3 of Patent Document 1, it is disclosed that two crystal resonators (crystal resonators) are formed by providing two pairs of electrodes on a common crystal piece. Further, in paragraph 0018, the same method as the method of measuring the temperature by measuring the frequency difference due to a change in temperature due to a change in temperature occurs is disclosed. and, The relationship between the frequency difference Δf and the amount of frequency to be corrected is stored in a read only memory (ROM), and the frequency correction amount is read based on Δf.

However, the above method is independent of the OCXO in relation to the Temperature Compensated Crystal Oscillator (TCXO), which corrects the oscillation frequency based on the temperature detection.

Further, as disclosed in paragraph 0019, the crystal oscillator must be adjusted such that the desired output frequency f0 and the respective frequencies f1 and f2 of the two crystal oscillators are in the relationship of f0 ≒ f1 ≒ f2, and therefore, the crystal oscillator is manufactured. The steps become complicated and you can't get high yield problems. Further, the frequency signals from the crystal oscillators are counted at a fixed time, and the difference (f1 - f2) of the clock is obtained. Therefore, the detection accuracy directly affects the detection time, making it difficult to perform. High precision temperature compensation.

[Previous Technical Literature]

[Patent Literature]

[Patent Document 1] Japanese Patent Laid-Open No. 2001-292030

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a crystal controlled oscillator which detects the temperature of an environment in which a crystal oscillator is placed, based on temperature. The detection result is used to control the heating portion to keep the temperature of the above environment constant, and the crystal controlled oscillator can obtain a vibration with high frequency stability. Swing output.

The present invention is a crystal controlled oscillator that detects the temperature of an environment in which a crystal oscillator is placed, and controls the heating portion based on the temperature detection result to keep the temperature of the environment constant. The crystal controlled oscillator is characterized by including The first crystal oscillator is configured by providing a first electrode on a crystal piece, and the second crystal resonator is configured by providing a second electrode on the crystal piece; the first oscillation circuit and the second oscillation circuit are respectively connected to The first crystal oscillator and the second crystal oscillator; the frequency difference detecting unit sets the oscillation frequency of the first oscillation circuit to f1, sets the oscillation frequency of the first oscillation circuit at the reference temperature to f1r, and sets the second oscillation circuit. When the oscillation frequency is f2 and the oscillation frequency of the second oscillation circuit at the reference temperature is f2r, a value corresponding to the difference value is obtained as a temperature detection value, and the difference value corresponds to f1 and f1r. a difference value between the value of the difference and a value corresponding to the difference between f2 and f2r; and an addition unit that deviates the temperature setting value of the temperature of the environment in which the crystal oscillator is located from the temperature detection value (Partial difference) removed; and a circuit unit, the electric power supplied to the heating unit is controlled based on the deviation adding unit extracted points.

For example, the integration circuit unit integrates the deviation score extracted by the addition unit, and then outputs it to the circuit unit.

For example, the first oscillating circuit and the second oscillating circuit respectively set an overtone as an oscillating output.

The value corresponding to the difference value is, for example, {(f2-f2r)/f2r}-{(f1-f1r)/f1r}], and the difference value is a value corresponding to the difference between f1 and f1r, and corresponds to f2 The difference value of the value of the difference from f2r. Furthermore, instead of directly detecting the value, there is also a case where {(f2-f1)/f1}-{(f2r-f1r)/f1r} which can obtain a result equivalent to the above value is detected. .

The oscillation output of the crystal controlled oscillator may be, for example, an oscillation output of one of the first oscillation circuit and the second oscillation circuit, but may be different from the first crystal resonator and the second crystal resonator and may be in the above environment. In the third crystal unit, the oscillation output from the third oscillation circuit connected to the third crystal unit is set as the oscillation output of the crystal controlled oscillator.

Another invention is an oscillating device, comprising: a crystal controlled oscillator of the present invention, and an oscillation output of the crystal controlled oscillator as a clock signal and including a phase locked loop (PLL) The body circuit portion of the oscillating device.

In the present invention, when the oscillation outputs of the first oscillation circuit and the second oscillation circuit are f1 and f2, the oscillation frequencies of the first oscillation circuit and the second oscillation circuit at the reference temperature are f1r and f2r, respectively. The value corresponding to the difference value is the temperature at this time, and the difference value is a difference value between the value corresponding to the difference between f1 and f1r and the value corresponding to the difference between f2 and f2r. Since the correlation between the above value and the temperature is extremely high, the value of the supply power of the heating unit is controlled as the temperature detection value, whereby the temperature of the environment in which the crystal resonator is placed is extremely stable. Result, available Highly stable oscillating output.

Fig. 1 is a block diagram showing an entire oscillating device including a crystal controlled oscillator according to an embodiment of the present invention. The oscillating device is configured as a frequency synthesizer that outputs a frequency signal of a set frequency, and includes a voltage controlled oscillator 100 using a crystal oscillator, and a control circuit unit 200 constituting the voltage controlled oscillator 100. PLL; crystal controlled oscillator (not shown), generates a clock signal for operating a direct digital synthesizer (DDS) 201, and the DDS circuit unit 201 generates a reference signal for the PLL. And a heater 5 for heating the temperature of the environment in which the crystal resonators 10 and 20 in the crystal controlled oscillator are located. Therefore, the crystal controlled oscillator is OCXO.

Further, the oscillation device further includes a temperature compensation unit that performs temperature compensation of the reference clock input to the control circuit unit 200. Although the temperature compensation unit is not provided with a reference numeral, the temperature compensation unit corresponds to a portion on the left side of the control circuit unit 200 in FIG. 1 and is shared as a circuit portion for controlling the heater 5.

The control circuit unit 200 compares the reference (reference) clock output from the DDS (Direct Digital Synthesizer) circuit unit 201 with the phase frequency comparison unit 205, and the voltage controlled oscillator by the frequency divider 204. The output of 100 is divided by the phase of the obtained clock, and then the charge pump 202 is used to classify the phase difference as the result of the comparison. Analogized letter The number is input to a loop filter 206 to control the PLL (Phase locked loop) in a stable manner. Therefore, the control circuit unit 200 can also be referred to as a PLL unit. Here, the DDS circuit unit 201 uses a frequency signal output from a first oscillation circuit 1 to be described later as a reference clock, and inputs frequency data (digital value) to be used for the frequency data. The signal of the frequency to be the target is output.

However, since the frequency of the reference clock has a temperature characteristic, the signal corresponding to a frequency correction value to be described later is input to the frequency input to the DDS circuit unit 201 by the addition unit 60 in order to cancel the temperature characteristic. The data is added. By correcting the frequency data input to the DDS circuit unit 201, the temperature fluctuation amount of the output frequency of the DDS circuit unit 201 based on the temperature characteristic variation amount of the reference clock is eliminated, and as a result, the reference clock is used with respect to the temperature fluctuation. The frequency is stable, and therefore, the output frequency from the voltage controlled oscillator 100 is stable.

According to the present embodiment, since the crystal controlled oscillator for fabricating the reference clock is configured as OCXO, the frequency of the reference clock is stabilized, so that the temperature characteristics of the reference clock are not exhibited. However, when the heater malfunctions or the like, the temperature fluctuation amount of the output frequency of the DDS circuit unit 201 based on the temperature characteristic variation amount of the reference clock is compensated in advance, thereby having the advantage that reliability can be formed. Very high frequency synthesizer.

Next, a portion corresponding to the OCXO of the crystal controlled oscillator of the present invention will be described. The crystal controlled oscillator includes a first crystal unit 10 and a second crystal unit 20, and the first crystal unit 10 and the second crystal unit 20 are formed using a common crystal piece Xb. That is, for example, length In the direction, the region of the strip-shaped crystal piece Xb is divided into two, and electrodes for excitation are provided on the front and back surfaces of each divided region (vibration region). Therefore, the first crystal unit 10 is constituted by one divided region and the pair of electrodes 11, 12, and the second crystal unit 20 is constituted by the other divided region and the pair of electrodes 21 and 22. Therefore, it can be said that the first crystal unit 10 and the second crystal unit 20 are thermally coupled.

The first oscillation circuit 1 and the second oscillation circuit 2 are connected to the first crystal unit 10 and the second crystal unit 20, respectively. The outputs of the oscillation circuits 1 and 2 described above may be, for example, harmonics of the crystal oscillators 10 and 20, or may be fundamental waves. In the case of obtaining the output of the harmonics, for example, a tuning circuit for setting harmonics in the oscillation circuit including the crystal oscillator and the amplifier may be used to oscillate the oscillation circuit with harmonics. Alternatively, the oscillation circuit can be oscillated with a fundamental wave, and a C-stage amplifier is provided in the latter stage of the oscillation section, for example, in the latter stage of the amplifier as a part of the Colpitts circuit, by which the C-stage amplifier is used. The wave is deformed, and a tuning circuit that is tuned to harmonics is provided in the latter stage of the class C amplifier. As a result, the oscillation circuits 1, 2 output an oscillation frequency of, for example, a third harmonic.

Here, for the sake of convenience, a frequency signal of the frequency f1 is output from the first oscillation circuit 1, and a frequency signal of the frequency f2 is output from the second oscillation circuit 2, and the frequency signal of the frequency f1 is supplied as a reference clock. The control circuit unit 200. 3 is a frequency difference detecting unit. Specifically, the frequency difference detecting unit 3 is a circuit unit for taking out f2-f1-Δfr, where f2-f1-Δfr is f1 and f2. The difference between the difference and Δfr. Δfr is the difference between f1 (f1r) and f2 (f2r) of the reference temperature, for example, 25 °C. If you list f1 and f2 An example of the difference is, for example, several MHz. The present invention is established by calculating the ΔF by the frequency difference detecting unit 3, and the ΔF is a value corresponding to a difference between f1 and f2 and a value corresponding to a difference between f1 and f2 corresponding to a reference temperature of, for example, 25°C. The difference between the two. In the case of the present embodiment, in more detail, the value obtained by the frequency difference detecting unit 3 is {(f2-f1)/f1}-{(f2r-f1r)/f1r}. However, in the drawing, the display of the output of the frequency difference detecting unit 3 has been omitted.

FIG. 2 shows a specific example of the frequency difference detecting unit 3. 31 is a flip-flop circuit (F/F circuit), and a frequency signal from the frequency f1 of the first oscillation circuit 1 is input to one input terminal of the flip-flop circuit 31, and from the second oscillation circuit 2 The frequency signal of the frequency f2 is input to the other input terminal of the flip-flop circuit 31, and the frequency signal of the frequency f2 from the second oscillation circuit 2 is locked by the frequency signal of the frequency f1 from the first oscillation circuit 1. Save. Hereinafter, in order to avoid redundancy in description, it is considered that the frequency or the frequency signal itself is represented by f1 and f2. The flip-flop circuit 31 outputs a signal having a frequency corresponding to the frequency difference between f1 and f2, that is, a frequency of (f2-f1)/f1.

A one-shot circuit 32 is provided in the rear stage of the flip-flop circuit 31, and the one-shot circuit 32 outputs a one-shot pulse when the pulse signal obtained from the flip-flop circuit 31 rises. Fig. 3 is a timing chart showing a series of signals up to this point.

A PLL (Phase Locked Loop) is provided in the latter stage of the one-shot circuit 32. The PLL includes a latch circuit 33, a loop filter 34 having an integrating function, an adder 35, and a DDS circuit unit 36. Latch circuit 33 The sawtooth wave output from the DDS circuit unit 36 is latched by the pulse output from the one-shot circuit 32, and the output of the latch circuit 33 is the signal level of the sawtooth wave when the pulse is output. . The loop filter 34 integrates the DC voltage at the above-described signal level, and the adder 35 adds the DC voltage to a DC voltage corresponding to Δfr (the difference between the reference temperature and the f1 and f2 of 25 ° C, for example). The data corresponding to the DC voltage of Δfr is stored in the memory 30 shown in FIG. 2.

In this example, with respect to the sign in the addition unit 35, the input side of the DC voltage corresponding to Δfr is “+”, and the input side of the output voltage of the loop filter 34 is “-”. The DC voltage calculated by the addition unit 35, that is, the voltage obtained by subtracting the output voltage of the loop filter 34 from the DC voltage corresponding to Δfr, is input to the DDS circuit unit 36, and the frequency corresponding to the voltage value is input. The sawtooth wave is output. In order to facilitate understanding of the operation of the PLL, the output of each part is extremely schematically shown in FIGS. 4(a) to 4(c), and in order to intuitively grasp the above, an extremely modematic description has been made in advance. When the device is activated, the DC voltage corresponding to Δfr is input to the DDS circuit unit 36 via the adder 35. For example, if Δfr is 5 MHz, a sawtooth wave of a frequency corresponding to the frequency is output from the DDL 36.

The latch circuit 33 latches the sawtooth wave by using a pulse corresponding to the frequency of (f2-f1), but if (f2-f1) is, for example, 6 MHz, the period of the pulse for latching is longer than the period of the sawtooth wave. Therefore, as shown in FIG. 4(a), the latching point of the sawtooth wave is gradually lowered, as shown in FIGS. 4(b) and 4(c), the output of the latch circuit 33 and the loop filter 34 are Output toward - The side is gradually lowered. Since the sign of the addition unit 35 on the output side of the loop filter 34 is "-", the DC voltage input from the addition unit 35 to the DDS circuit unit 36 rises. Therefore, when the frequency of the sawtooth wave outputted from the DDS circuit unit 36 rises and the DC voltage corresponding to 6 MHz is input to the DDS circuit unit 36, the frequency of the sawtooth wave becomes 6 MHz, as shown in Fig. 5(a) to Fig. 5(c). ), the PLL is locked. At this time, the DC voltage output from the loop filter 34 reaches a value corresponding to Δfr - (f2 - f1) = -1 MHz. That is, it can be said that the integrated value of the loop filter 34 corresponds to an integral value of the amount of change of 1 MHz when the sawtooth wave changes from 5 MHz to 6 MHz.

Contrary to the above example, when Δfr is 6 MHz and (f2-f1) is 5 MHz, the period of the latch pulse is longer than the period of the sawtooth wave, and therefore, the latch point shown in Fig. 4(a) is gradually Ascending, the output of the latch circuit 33 and the output of the loop filter 34 also rise. Therefore, in the addition unit 35, since the value obtained by subtraction becomes large, the frequency of the sawtooth wave gradually decreases, and when the frequency of the sawtooth wave reaches 5 MHz which is the same as (f2-f1), the PLL is locked. At this time, the DC voltage output from the loop filter 34 reaches a value corresponding to Δfr - (f2 - f1) = 1 MHz. Further, Fig. 6(a) and Fig. 6(b) show actual test data, and in this example, at time t0, the PLL is locked.

However, as described above, actually, the output of the frequency difference detecting unit 3, that is, the output of the averaging circuit 37 shown in Fig. 2, is {(f2-f1)/f1}-{(f2r-f1r)/f1r} The value is a value represented by a 34-bit numeric value. The set of the above values from the vicinity of -50 ° C to around 100 ° C is set to (f1 - f1r) / f1 = OSC1 (in ppm or ppb), (f2 - f2r) / f2r = OSC2 (in ppm or Ppb), the change with respect to temperature becomes substantially OSC2-OSC1 has the same curve. Therefore, the output of the frequency difference detecting unit 3 can be regarded as OSC2-OSC1=temperature data.

Further, since the flipping operation of f2 by f1 is not synchronized in the flip-flop circuit 31, it is also possible to generate metastability (when the edge of the clock is formed, When the input data is latched, the input data must be held for a fixed period of time before and after the edge of the latch, but the clock and the input data change substantially at the same time, so the output becomes unstable. It is possible to include an instantaneous error in the output of the loop filter 34. Therefore, an averaging circuit 37 is provided on the output side of the loop filter 34, and the averaging circuit 37 obtains a moving average of the input value in a predetermined time period, and the above-described instantaneous error can be eliminated. Instantaneous error. By providing the averaging circuit 37, the frequency shift information (frequency shift informaion) of the variable temperature amount can be finally obtained with high accuracy. However, the averaging circuit 37 may not be provided.

Here, the OSC2-OSC1, which is the frequency offset information of the fluctuation temperature amount obtained by the loop filter 34 of the PLL, will be described with reference to Figs. 7 to 10 . Fig. 7 is a characteristic diagram showing the relationship between temperature and frequency by normalizing f1 and f2 by the reference temperature. The term "normalization" as used herein refers to, for example, setting 25 ° C as the reference temperature, and setting the frequency of the reference temperature to zero for the relationship between temperature and frequency, and determining the offset of the frequency from the frequency of the reference temperature. The relationship between temperatures. When the frequency of the first oscillation circuit 1 at 25 ° C is f1r, and the frequency of the second oscillation circuit 2 at 25 ° C is f2r, that is, when the values of f1 and f2 of 25 ° C are respectively set to f1r , f2r, then map The values of the vertical axis of 7 are (f1 - f1r) and (f2 - f2r).

Moreover, FIG. 8 shows the rate of change of the frequency of each temperature shown in FIG. 7 with respect to the frequency of the reference temperature (25 degreeC). Therefore, the values of the vertical axis of Fig. 8 are (f1 - f1r) / f1r and (f2 - f2r) / f2r, that is, OSC1 and OSC2 as described above. Further, the unit of the value of the vertical axis of Fig. 8 is ppm.

Fig. 9 shows the relationship between OSC1 and temperature (same as Fig. 8), and (OSC2-OSC1) and temperature, and it is known that (OSC2-OSC1) has a linear relationship with temperature. Therefore, it is known that (OSC2-OSC1) corresponds to the temperature variation offset from the reference temperature.

When the description returns to FIG. 1, the output value of the frequency difference detecting unit 3 is substantially (OSC2-OSC1). As shown in FIG. 9, this value can be referred to as the detected value of the temperature at which the crystal oscillators 10 and 20 are located. . Therefore, an adder (deviation-dividing circuit) 6 is provided in the subsequent stage of the frequency difference detecting unit 3, and a temperature setting value (a digital value of 34 bits of OSC2-OSC1 of the set temperature) and the frequency difference detecting unit 3 are set as the digital signal. The output is the differential removal of OSC2-OSC1. In the temperature setting value, it is preferable to select a temperature at which the temperature of the OSC1 corresponding to the first crystal unit 10 does not easily fluctuate due to a temperature change, and the first crystal unit 10 is used to obtain the temperature. The crystal controls the output of the oscillator. In the relationship between OSC1 and temperature shown in Fig. 8, for example, 50 °C corresponding to the bottom portion is selected as the above temperature. Further, according to the viewpoint that it is difficult to change the temperature of the OSC1 due to the temperature change, 10 degrees may be set as the set temperature. In this case, the temperature may be lower than the room temperature. Therefore, the setting and heating are performed. Department and A temperature adjustment unit in which a cooling unit such as a Peltier element is combined.

Further, a loop filter 61 corresponding to the integrating circuit unit is provided in the subsequent stage of the adder 6.

Further, a Pulse Width Modulation (PWM) interpolation unit 62 is provided in the subsequent stage of the loop filter 61. The PWM interpolating unit 62 performs conversion so that a 14-bit digital signal (2 complements from -2 ¹³ to +2 ¹³ ) is expressed as a pulse signal of a fixed time. For example, when the minimum H pulse width is 10 nsec, 2 ¹⁴ * 10 ^-9 = 16.384 msec is set to a fixed time, and the pulse number digital signal of the period is expressed. Specifically, it is expressed as follows. When the 14-bit digit value is zero, the number of H pulses during 16.384 msec is 2 ¹³ . When the digit value of 14 bits is -2 ¹³ , the number of H pulses during 16.384 msec is zero. When the digit value of 14 bits is 2 ¹³ -1 , the number of H pulses during 16.384 msec is 2 ¹⁴ -1 .

A low pass filter (LPF) 63 is provided in the subsequent stage of the PWM interpolating unit 62, and the output from the PWM interpolating unit 62 is averaged, and a DC voltage corresponding to the output, that is, the number of pulses is output. That is, in this example, the PWM interpolation unit 62 and the low-pass filter 63 are used to convert the digital value into an analog value, and a digital/analog converter may be used instead of using the PWM interpolation unit 62 and low-pass filtering. 63.

A heater circuit 5 corresponding to the heating portion is provided in the subsequent stage of the low pass filter (LPF) 63. As shown in FIG. 10, the heater circuit 5 includes a transistor 64 whose base is connected to the output terminal of the low pass filter 63, and the voltage is supplied from the power supply portion Vc to the collector. And a resistor 65 connected between the emitter and the earth of the transistor 64. The relationship between the voltage supplied to the base of the transistor 64 and the total power of the power consumption of the transistor 64 and the power consumption of the resistor 65 is linear, and therefore, linearly corresponding to the difference between the temperature data and the temperature set value. The heating temperature is controlled. In this example, since the transistor 64 is also a part of the heat generating portion, it is used that the heater circuit 5 also serves as a heater and heater control circuit.

Fig. 11 is a view showing a schematic structure of the oscillation device shown in Fig. 1; 51 is a container, and 52 is a print substrate provided in the container 51. On the upper surface side of the printed circuit board 52, the crystal oscillators 10 and 20 and the integrated circuit unit 300 and the control circuit unit 200 in which the following circuits are formed into a single wafer are provided, and the above circuit includes the oscillation circuits 1, 2 And a circuit that performs digital processing such as the frequency difference detecting unit 3 and the like. Further, on the lower surface side of the printed circuit board 52, for example, a heater 5 is provided at a position facing the crystal resonators 10 and 20, and the crystal oscillators 10 and 20 are maintained at a set temperature by the heat generated by the heater 5. .

Further, as described above, the oscillation device of the present embodiment also includes a temperature compensation unit that performs temperature compensation of the reference clock input to the control circuit unit 200. That is, the oscillating device of this example is a device in which OCXO and TCXO are combined. However, the present invention may also not combine TCXO. The temperature compensation unit includes a crystal unit 10, a crystal unit 20, an oscillation circuit 1, an oscillation circuit 2, a frequency difference detection unit 3, and a correction value calculation unit 4. That is, the frequency difference detecting unit 3 controls the temperature of the heater 5. A part of the part is also part of the above temperature compensation unit.

The frequency offset information of the fluctuation temperature amount obtained by the loop filter 34 of the PLL is input to the correction value calculation unit 4 which is the correction value acquisition unit shown in Fig. 1, and the frequency correction value is calculated here. The frequency offset information is as described above.

Fig. 12 shows the relationship between OSC1 and temperature (same as Fig. 8) and (OSC2-OSC1) and temperature, and it is known that (OSC2-OSC1) has a linear relationship with temperature. Therefore, it is known that (OSC2-OSC1) corresponds to the temperature variation offset from the reference temperature. In general, since the frequency-temperature characteristic of the crystal oscillator is represented by a cubic function, the relationship between the frequency correction value for canceling the frequency variation caused by the third-order function and (OSC2-OSC1) can be obtained based on The detected value of (OSC2-OSC1) is used to obtain a frequency correction value.

As described above, the oscillation device of the present embodiment uses the frequency signal (f1) obtained from the first oscillation circuit 1 as the reference clock of the control circuit unit 200 shown in FIG. 1, and the reference clock has a frequency-temperature characteristic. Therefore, it is necessary to perform temperature correction for the frequency of the reference clock. Therefore, first, a function indicating the relationship between the temperature and f1 normalized by the reference temperature is obtained in advance, and as shown in FIG. 13, a function for canceling the frequency fluctuation amount of f1 caused by the above function is obtained in advance. In addition, in detail, f1 of the above function is a rate of change of the frequency of the reference temperature, that is, (f1 - f1r) / f1r = OSC1. Therefore, the vertical axis of Fig. 13 is -OSC1. In this example, in order to perform temperature correction with high precision, the above function is defined as, for example, a 9th-order function.

As described above, since the temperature is linear with (OSC2-OSC1), Therefore, the horizontal axis of Fig. 13 is set to the value of (OSC2-OSC1). However, if the value of (OSC2-OSC1) is used as it is, the amount of data for determining the value is increased. Therefore, the following is true ( The value of OSC2-OSC1) is normalized. In other words, the upper limit temperature and the lower limit temperature when the oscillation device is actually used are determined in advance, and the value of (OSC2-OSC1) at the upper limit temperature is regarded as +1, and the value of (OSC2-OSC1) at the lower limit temperature is regarded as -1. In this example, as shown in FIG. 13, -30 ppm is set to +1, and +30 ppm is set to -1.

In this example, the frequency characteristic of the crystal oscillator with respect to temperature is regarded as a multiple approximation of nine times. Specifically, when a crystal oscillator is produced, the relationship between (OSC2-OSC1) and temperature is obtained by actual testing, and a corrected frequency curve is derived based on the actual test data, the corrected frequency curve indicating a frequency change with respect to temperature. The curve of the relationship between the temperature of the offset and the -OSC1 is derived by the least square method to derive the multiple approximation coefficient of 9 times. Next, the plurality of approximate expression coefficients are previously stored in the memory 30 (see FIG. 1), and the correction value calculation unit 4 performs the arithmetic processing of the equation (1) using the plurality of approximate expression coefficients.

Y=P1. X ⁹ +P2. X ⁸ +P3. X ⁷ +P4. X ⁶ +P5. X ⁵ +P6. X ⁴ +P7. X ³ +P8. X ² +P9. X.........(1)

In the formula (1), X is the frequency difference detection information, Y is the correction data, and P1 to P9 are the multiple approximation coefficients.

Here, X is a value obtained by the frequency difference detecting unit 3 shown in Fig. 1, That is, the value obtained by the averaging circuit 37 shown in Fig. 2 (OSC2-OSC1).

FIG. 14 shows an example of a block diagram for performing calculation by the correction value calculation unit 4. In FIG. 14, 401 to 409 are calculation units for performing calculation of each of the equations (1), 400 is an addition unit, and 410 is a circuit for performing rounding processing. Further, the correction value calculation unit 4 uses, for example, a multiplication unit, and when the multiplication unit obtains the value of the ninth power term, and then uses the multiplication unit to obtain the value of the eighth power term, for example, any The multiplication unit is used to finally add the values of the respective square terms. Further, the calculation formula of the correction value is not limited to the use of a plurality of approximation equations of nine times, and an approximate expression corresponding to the required accuracy may be used.

Next, the overall operation of the above embodiment will be summarized. When attention is paid to the crystal controlled oscillator of the above oscillation device, the output of the crystal controlled oscillator corresponds to the frequency signal output from the first oscillation circuit 1. Further, heating is performed by the heater 5 so that the environment in which the crystal resonators 10, 20 are placed reaches a set temperature. The first crystal unit 10 and the first oscillation circuit 1 generate a frequency signal as an output of the crystal controlled oscillator, and have a function as a temperature detecting unit together with the second crystal unit 20 and the second oscillation circuit 2. As described above, the value OSC2-OSC1 corresponding to the frequency difference of the frequency signals obtained by each of the above-described oscillation circuits 1, 2 corresponds to the temperature, and the addition portion is used to set the temperature with the temperature setting value (for example, OSC2-OSC1 of 50 °C) The difference between the values is taken out.

The above difference is integrated by the loop filter 61, and then converted into a DC voltage to adjust the control power of the heater 5. According to the characteristic diagram shown in FIG. 9, when the value of OSC1 at 50 ° C is set to -1.5 × 10 ⁵ , the output of the adder 6 is positive when the temperature is lower than 50 ° C, and the output will follow The temperature is reduced and becomes larger. Therefore, it functions in such a manner that the lower the ambient temperature at which the crystal resonators 10, 20 are lower than 50 °C, the larger the control power of the heater 5. Further, when the ambient temperature is higher than 50 ° C, the output of the adder 6 is a negative value, and the absolute value of the output becomes larger as the temperature rises. Therefore, it functions in such a manner that the higher the temperature is at 50 ° C, the smaller the supply power of the heater is. Therefore, the temperature of the environment in which the crystal resonators 10 and 20 are placed is maintained at 50 ° C which is the set temperature, so that the output frequency from the first oscillator 1 as the oscillation output is stabilized. As a result, in the control circuit unit 200 that uses the output from the first oscillator 1 as the clock signal, the frequency of the reference signal supplied to the phase comparison unit 205 is stabilized, and therefore, the output of the oscillation device (frequency synthesizer) is used. The output frequency from the voltage controlled oscillator 100 is also stable.

On the other hand, the output (OSC2-OSC1) from the frequency difference detecting unit 3 is input to the correction value computing unit 4, and the calculation of the above formula (1) is executed to obtain the frequency correction amount as the temperature correction data. The calculation of the equation (1) is a process of obtaining a value of the vertical axis of the corrected frequency curve in the characteristic map shown in FIG. 13, for example, the value of the vertical axis of the corrected frequency curve corresponds to the output value based on the frequency difference detecting unit 3. And the value obtained.

As shown in FIG. 1, the first crystal unit 10 and the second crystal unit 20 are configured by using a common crystal piece Xb, and are thermally coupled to each other. Therefore, the frequency difference between the oscillation circuits 1 and 2 is extremely accurately corresponding to the environment. The value of the temperature is such that the output of the frequency difference detecting unit 3 is the temperature difference information of the ambient temperature and the reference temperature (25 ° C in this example). Due to the first oscillating circuit 1 The output frequency signal f1 is used as the main clock of the control circuit unit 200, and therefore, the correction value obtained by the correction value computing unit 4 is used as a signal for compensating the operation of the control circuit unit 200 to be used for the control circuit. The influence of the operation of the unit 200 is canceled, and the influence on the operation of the control circuit unit 200 is based on the frequency shift amount of f1 caused by the temperature deviating from 25 °C. As a result, the output frequency of the voltage controlled oscillator 100, which is the output of the oscillation device of the present embodiment, is stable regardless of the temperature fluctuation.

As described above, according to the above-described embodiment, the difference between the values corresponding to the frequency difference of the frequency signals obtained by the crystal resonators 10 and 20 is used as the temperature detection value, and the heater 5 is performed based on the temperature detection value. Controlled, the heater 5 manages the ambient temperature of the crystal resonators 10, 20. Therefore, the ambient temperature can be maintained at the set temperature with high precision, and the output of the crystal controlled oscillator (the output of the first oscillation circuit 1) is stabilized.

Further, in the present embodiment, the output of the crystal controlled oscillator is supplied to the control circuit unit 200 as a clock signal, and the control circuit unit 200 generates an oscillation output of the frequency synthesizer as an oscillation device, and then uses the corresponding frequency. The difference value is used to correct the above clock signal. In other words, the frequency synthesizer adds the correction value obtained by the correction value calculation unit 4 to the frequency setting value of the DDS circuit unit 201, and performs temperature compensation of the main clock (f1) input to the DDS circuit unit 201. As such, the frequency synthesizer includes both the functions of the OCXO and the TCXO, thereby having the following advantages. Although the maker uses the temperature range of the frequency synthesizer, the output frequency is stable even when the user uses the frequency synthesizer in an environment that deviates from the operating temperature range. Also, when you want to set the temperature of the heater When the upper limit value of the temperature range is increased, the power consumption of the heater is increased, and the size of the heater circuit is also increased, but the advantage is that the function of the TCXO can be suppressed. The power consumption of the heater.

However, as shown in FIG. 15, the frequency synthesizer may be configured to include the function of the correction value calculation unit 4 (having no TCXO). That is, in this case, the value corresponding to the difference value is also regarded as the temperature at this time, which is a value corresponding to the difference between f1 and f1r and a value corresponding to the difference between f2 and f2r. Differential value. Since the correlation between the above value and the temperature is extremely high, the value of the supply power of the heating unit is controlled as the temperature detection value, whereby the temperature of the environment in which the crystal resonator is placed is extremely stable. As a result, an oscillation output with high stability can be obtained.

Here, the loop filter 61 is a circuit for determining loop gain and damping, and can adjust the loop gain and the coefficient of the damping according to the digital value. By making the loop coefficient digital, the coefficient can be easily adjusted for each structure even if the heat transfer coefficient caused by the structural change is changed.

In the above example, the third harmonic of each of the crystal resonators 10 and 20 is taken as the output frequency, and since the temperature and temperature characteristics of the harmonics are large due to the temperature change, it is possible to correspond to the difference of the third harmonic described above. The value is better than the temperature and is a preferred form. However, each fundamental wave of the crystal resonators 10 and 20 may be taken out as an output frequency, and a value corresponding to the difference of each of the fundamental waves described above may be used as a temperature value. Alternatively, the fundamental wave and the harmonic can be respectively taken out from one of the crystal oscillators 10 and 20 and the other crystal oscillator. The wave is regarded as a temperature value as a value corresponding to the difference between the fundamental wave and the harmonic.

Further, in order to obtain the frequency difference detection information, a pulse corresponding to the differential frequency of f1 and f2 is created, and the sawtooth wave signal output from the DDS circuit unit is latched by the latch circuit by the pulse, and is latched. The signal value is integrated, the integrated value is output as the frequency difference, and the difference between the output and the value corresponding to the difference between f1r and f2r is taken out, and the difference is input to the DDS circuit unit to constitute a PLL. As in Patent Document 1, when f1 and f2 are counted and the difference between f1 and f2 is obtained, the counting time directly affects the detection accuracy, but there is no such problem in the configuration described above. Therefore, the detection accuracy is high. Actually, the mode of the two is compared by simulation. When the counting time of 200 ms is set in the method of counting the frequency, the following result is obtained, that is, the detection accuracy of the mode of the present embodiment About 50 times higher.

The frequency difference detecting unit 3 may use the difference value itself of (f1 - f1r) and (f2 - f2r) as a value corresponding to a difference value which is a value corresponding to the difference between f1 and f1r and corresponds to The difference value between the values of the difference between f2 and f2r. In this case, the temperature of Fig. 7 is flexibly used to obtain the temperature.

In the above embodiment, in the description of FIGS. 8 to 10, the amount of change in frequency is displayed in units of "ppm". However, in the actual digital circuit, all of them are processed by binary numbers. Therefore, the frequency setting accuracy of the DDS circuit 36 is calculated by the number of constituent bits, and the frequency setting accuracy is, for example, 34 bits. If an example is given, When the 10 MHz clock is supplied to the DDS circuit unit 201 included in the control circuit unit 200 shown in FIG. 1, the frequency of the fluctuation of the clock is 100 Hz.

[variation ratio calculation]

100Hz/10MHz=0.00001

[ppm conversion]

0.00001*1e6=10[ppm]

[DDS setting accuracy conversion]

0.00001*2ˆ34≒171,799[ratio-34bit (tentative name)].

In the case of the above configuration, the frequency setting accuracy is expressed by the following formula (2).

1×[ratio-34bit]=10M[Hz]/2ˆ34≒0.58m[Hz/bit]...(2)

Therefore, 100 [Hz] / 0.58 m [Hz / bit] ≒ 171, 799 [bit (ratio - 34 bit)].

Further, 0.58 mHz can be calculated in the following manner (3) with respect to 10 MHz.

0.58m[Hz]/10M[Hz]*1e9≒0.058[ppb]...(3)

Therefore, according to the formulas (2) and (3), the relationship of the formula (4) holds.

1e9/2ˆ34=0.058[ppb/ratio-34bit]...(4)

That is, the frequency of the DDS circuit 36 is such that the frequency disappears, which is only the relationship of the number of bits.

Further, in the above example, the first crystal unit 10 and the second crystal unit 20 use the common crystal piece Xb, but the crystal piece Xb may not be shared. In this case, for example, the first crystal unit 10 and the second crystal unit 20 are disposed in a common housing. According to this configuration, since the temperature is substantially the same, the same effect can be obtained.

The output signal of the DDS circuit unit 36 of the frequency difference detecting unit 3 is not limited to a sawtooth wave, and may be a frequency signal as follows. The signal value of the frequency signal may increase and decrease over time, for example, may be a sine wave. .

Further, the frequency difference detecting unit 3 may count f1 and f2 by a counter, and subtract a value corresponding to Δfr from the difference value of the count value, and a value corresponding to the obtained count value. Output it.

In the above embodiment, the first crystal unit 10 and the first oscillation circuit 1 have a function of taking out the temperature detection value and a function of producing an output of the crystal controlled oscillator. That is, the oscillation circuit 1 shares an oscillation circuit for temperature detection and an oscillation circuit for outputting the crystal controlled oscillator. Of course Further, in the present invention, for example, three crystal oscillators may be prepared, and three oscillation circuits may be prepared. For example, in the configuration of FIG. 1, a third crystal oscillator and a third oscillation circuit connected to the crystal oscillator are prepared. The output of the third oscillation circuit is used as an output of the crystal controlled oscillator, and the oscillation outputs of the remaining first oscillation circuit and second oscillation circuit are input to the frequency difference detection unit to obtain a temperature detection value. In this case, when the OCXO and the TCXO are combined, the output of the third crystal oscillation circuit is used as the clock of the DDS circuit unit 201.

The frequency synthesizer, which is an oscillating device shown in FIG. 1 and FIG. 15, is configured by using a crystal controlled oscillator including an crystal oscillator 10, a crystal unit 20, an oscillating circuit 1, and an oscillating circuit. 2. The frequency difference detecting unit 3 and the portion up to the adding unit 6 to the heater circuit 5. However, the present invention is not limited to being configured as a frequency synthesizer, and may be configured to have an oscillation output of the first oscillation circuit 1 as an output of the crystal controlled oscillator of the present invention, that is, no control is used. The configuration of the circuit unit 200.

Further, in the present invention, even when the oscillation output of the first oscillation circuit 1 is used as the output of the crystal controlled oscillator in the above manner, the function of the TCXO can be obtained. Specifically, an example in which a temperature sensor such as a thermistor is used as a temperature detecting unit for detecting an ambient temperature at which the crystal resonators 10 and 20 are placed is used. The output of the crystal controlled oscillator is adjusted based on the temperature detection value of the temperature detecting portion. For example, a crystal controlled oscillator using a Buchez oscillation circuit sets a frequency by setting a control voltage. In this situation When the ambient temperature at which the crystal oscillator is placed changes from the reference temperature, the oscillation frequency changes, and the correction value of the control voltage generated based on the temperature detection value is added to the set value of the control voltage, thereby The amount of change in the oscillation frequency caused by the temperature change is offset. According to such a configuration, the added value of the OCXO of the present invention is further increased.

[Example]

Using the circuit shown in the above embodiment, the ramp response waveform was investigated, and the result shown in Fig. 16 was obtained. The ramp response waveform indicates that the temperature of the environment in which the crystal resonators 10 and 20 are placed is 1 °C. / The frequency difference of the two crystal oscillators 10, 20 when the slope of each minute changes continuously. Both f1 and f2 use the third harmonic. One scale of FIG. 16 corresponds to 20 m ° C (20 ° C / 1000), and when the temperature slope is 1 ° C / min, an offset equivalent to 20 m ° C can be confirmed, and the loop filter 61 can be used. The coefficients are optimized to reduce the offset.

Further, after the step response waveform was examined, the result shown in FIG. 17 was obtained, and the step response waveform indicates the transition of the output of the frequency difference detecting unit 3 when the ambient temperature was changed by 1 °C. From this result, it is understood that the output (OSC2-OSC1) of the frequency difference detecting unit 3 follows the temperature change. Furthermore, the overshoot portion of the response waveform can be improved by adjusting the coefficients of the loop filter 61.

1‧‧‧1st oscillation circuit/oscillation circuit

2‧‧‧2nd oscillation circuit/oscillation circuit

3‧‧‧frequency difference detection department

4‧‧‧ Correction value calculation unit (correction value acquisition unit)

5‧‧‧heater circuit

6‧‧‧Adder/deviation extraction circuit

10‧‧‧1st crystal oscillator

11, 12, 21, 22 ‧ ‧ electrodes

20‧‧‧2nd crystal oscillator

30‧‧‧ memory

31‧‧‧Factor circuit

32‧‧‧One-shot circuit

33‧‧‧Latch circuit

34, 61‧‧‧ loop filter

35‧‧‧Additional Department

36, 201‧‧‧DDS Circuit Department

37‧‧‧Averaging circuit

51‧‧‧ Container

52‧‧‧Printing substrate

60, 400‧ ‧ Addition Department

62‧‧‧PWM Interpolation

63‧‧‧ low pass filter

64‧‧‧Optoelectronics

100‧‧‧Voltage Controlled Oscillator

200‧‧‧Control Circuit Department

202‧‧‧Charge pump

204‧‧‧divider

205‧‧‧ Phase Frequency Comparison Department

206‧‧‧ Loop Filter

300‧‧‧Integrated Circuits Department

401~409‧‧‧ Computing Department

410‧‧‧ Circuit

F1, f2‧‧‧ frequency

OSC1, OSC2‧‧‧ collection

P1~P9‧‧‧Multiple approximation coefficients

Vc‧‧‧Power Department

Xb‧‧‧ crystal piece

△f‧‧‧frequency difference

Fig. 1 is a block diagram showing the overall configuration of an embodiment of the present invention.

Fig. 2 is a block diagram showing a part of an embodiment of the present invention.

Fig. 3 is a waveform diagram of an output of a portion shown in Fig. 2.

4(a) to 4(c) are waveform diagrams schematically showing respective portions of a state in which the circuit including the DDS circuit portion shown in Fig. 2 is unlocked.

5(a) to 5(c) are waveform diagrams schematically showing respective portions in a state in which the circuit including the DDS circuit portion shown in Fig. 2 is locked.

6(a) and 6(b) are waveform diagrams of respective portions of the above-described circuit related to the actual device corresponding to the above embodiment.

FIG. 7 is a frequency-temperature characteristic diagram showing the relationship between the frequency f1 of the first oscillation circuit and the frequency f2 of the second oscillation circuit and temperature.

FIG. 8 is a frequency-temperature characteristic diagram showing the relationship between the value obtained by normalizing the rate of change of f1 and the rate of change of f2 by the value of the reference temperature, and temperature.

FIG. 9 is a characteristic diagram showing a relationship between a digital output value of a frequency difference detecting unit and temperature.

Fig. 10 is a circuit diagram showing a control circuit of the heating unit.

Fig. 11 is a schematic longitudinal sectional side view showing the structure of the oscillating device of the embodiment.

FIG. 12 is a frequency-temperature characteristic diagram showing the relationship between the value obtained by normalizing the rate of change of f1 and the temperature by the value of the reference temperature, and the relationship between the difference ΔF and the temperature, and the difference ΔF is the value using the reference temperature. The value obtained by normalizing the rate of change of f1 and the value obtained by normalizing the rate of change of f2 by the value of the reference temperature.

FIG. 13 is a characteristic diagram showing a relationship between a value obtained by normalizing the vertical axis of FIG. 12 and a frequency correction value.

Fig. 14 is a block diagram showing a correction value calculation unit.

Fig. 15 is a block diagram showing the overall configuration of another embodiment of the present invention.

Fig. 16 is a view showing a slope response of a frequency difference between two crystal oscillators when the temperature is continuously changed.

Fig. 17 is a step response diagram showing the output of the frequency difference detecting unit when the temperature is changed by 1 °C.

1‧‧‧1st oscillation circuit/oscillation circuit

2‧‧‧2nd oscillation circuit/oscillation circuit

3‧‧‧frequency difference detection department

4‧‧‧ Correction value calculation unit (correction value acquisition unit)

5‧‧‧heater circuit

6‧‧‧Adder/deviation extraction circuit

10‧‧‧1st crystal oscillator

11, 12, 21, 22 ‧ ‧ electrodes

20‧‧‧2nd crystal oscillator

30‧‧‧ memory

60‧‧ ‧Addition Department

61‧‧‧ Loop Filter

62‧‧‧PWM Interpolation

63‧‧‧ low pass filter

100‧‧‧Voltage Controlled Oscillator

200‧‧‧Control Circuit Department

201‧‧‧DDS Circuit Department

202‧‧‧Charge pump

204‧‧‧divider

205‧‧‧ Phase Frequency Comparison Department

206‧‧‧ Loop Filter

F1, f2‧‧‧ frequency

Xb‧‧‧ crystal piece

△f‧‧‧frequency difference

Claims (8)

A crystal controlled oscillator comprising: an oscillator circuit for outputting an oscillator, connected to a crystal oscillator; a heating portion for maintaining a temperature of an environment in which the crystal oscillator is located; and a first crystal oscillator, which is The first electrode is formed on the crystal piece, and the second crystal resonator is configured by providing the second electrode on the crystal piece; the first oscillation circuit and the second oscillation circuit are respectively connected to the first crystal oscillator and the second crystal. The frequency difference detecting unit sets the oscillation frequency of the first oscillation circuit to f1, the oscillation frequency of the first oscillation circuit at the reference temperature to f1r, and the oscillation frequency of the second oscillation circuit to f2. When the oscillation frequency of the second oscillation circuit at the reference temperature is f2r, a value corresponding to the difference value is obtained as a temperature detection value, and the difference value is a value corresponding to the difference between f1 and f1r. a difference value between a value corresponding to a difference between f2 and f2r; an addition unit that extracts a deviation between a temperature set value of a temperature at which the crystal vibrator is located and the temperature detection value; and a circuit , The adding unit based on the extracted partial difference, the power supplied to the heating portion is controlled, wherein said oscillator output oscillation circuit is shared with the first oscillation circuit and a second oscillation circuit oscillating in a circuit. A crystal controlled oscillator, comprising: an oscillator circuit for outputting an oscillator, connected to a crystal oscillator; a heating unit for maintaining a temperature of an environment in which the crystal resonator is placed; a first crystal resonator configured by disposing a first electrode on a crystal piece; and a second crystal resonator having a second electrode disposed on a crystal The first oscillation circuit and the second oscillation circuit are respectively connected to the first crystal unit and the second crystal unit; and the frequency difference detecting unit sets the oscillation frequency of the first oscillation circuit to f1 to set a reference temperature. In the case where the oscillation frequency of the first oscillation circuit is f1r, the oscillation frequency of the second oscillation circuit is f2, and the oscillation frequency of the second oscillation circuit at the reference temperature is f2r, The value corresponding to the difference value is a temperature detection value, and the difference value is a difference value between a value corresponding to a difference between f1 and f1r and a value corresponding to a difference between f2 and f2r; and an addition unit sets the crystal oscillator And extracting the deviation between the temperature setting value of the ambient temperature and the temperature detection value; and the circuit unit controlling the electric power supplied to the heating unit based on the deviation score extracted by the addition unit; and integrating Passage portion, the integrating circuit portion to the adder unit integrates extracted offset points, and outputs to the circuit unit. A crystal controlled oscillator comprising: an oscillator circuit for outputting an oscillator, connected to a crystal oscillator; a heating portion for maintaining a temperature of an environment in which the crystal oscillator is located; and a first crystal oscillator, which is The first electrode is disposed on the crystal piece; The second crystal resonator is configured by providing a second electrode on the crystal piece; the first oscillation circuit and the second oscillation circuit are respectively connected to the first crystal oscillator and the second crystal oscillator; and the frequency difference detecting unit The oscillation frequency of the first oscillation circuit is f1, the oscillation frequency of the first oscillation circuit at the reference temperature is f1r, the oscillation frequency of the second oscillation circuit is f2, and the second temperature is the reference temperature. When the oscillation frequency of the oscillation circuit is f2r, a value corresponding to the difference value is obtained as a temperature detection value, and the difference value is a value corresponding to the difference between f1 and f1r and a value corresponding to the difference between f2 and f2r. a difference value between the temperature setting value of the temperature of the environment in which the crystal vibrator is located and the deviation of the temperature detection value; and the circuit portion is supplied to the above based on the deviation score extracted by the addition unit The electric power of the heating unit is controlled, wherein a value corresponding to the difference value is {(f2-f2r)/f2r}-{(f1-f1r)/f1r}, and the difference value is a difference corresponding to f1 and f1r. Value, and the difference corresponding to f2 and f2r A difference value between the values. A crystal controlled oscillator comprising: an oscillator circuit for outputting an oscillator, connected to a crystal oscillator; a heating portion for maintaining a temperature of an environment in which the crystal oscillator is located; and a first crystal oscillator, which is The first electrode is formed on the crystal piece; the second crystal oscillator is configured by providing the second electrode on the crystal piece; and the first oscillation circuit and the second oscillation circuit are respectively connected to the first crystal The crystal oscillator and the second crystal oscillator; the frequency difference detecting unit sets the oscillation frequency of the first oscillation circuit to f1, and sets the oscillation frequency of the first oscillation circuit at the reference temperature to f1r, and the second oscillation circuit When the oscillation frequency is f2 and the oscillation frequency of the second oscillation circuit at the reference temperature is f2r, a value corresponding to the difference value is obtained as a temperature detection value, and the difference value corresponds to f1 and a difference value between f1r and a value corresponding to a difference between f2 and f2r; and an addition unit that extracts a deviation between a temperature set value of a temperature at which the crystal vibrator is located and the temperature detection value; and a circuit The portion controls the electric power supplied to the heating unit based on the deviation score extracted by the addition unit, wherein the first oscillation circuit and the second oscillation circuit respectively output harmonics as oscillation. A crystal controlled oscillator comprising: an oscillator circuit for outputting an oscillator, connected to a crystal oscillator; a heating portion for maintaining a temperature of an environment in which the crystal oscillator is located; and a first crystal oscillator, which is The first electrode is formed on the crystal piece, and the second crystal resonator is configured by providing the second electrode on the crystal piece; the first oscillation circuit and the second oscillation circuit are respectively connected to the first crystal oscillator and the second crystal. The vibrator; the frequency difference detecting unit sets the oscillation frequency of the first oscillation circuit to f1, and sets the oscillation frequency of the first oscillation circuit at the reference temperature to In the f1r, the oscillation frequency of the second oscillation circuit is f2, and the oscillation frequency of the second oscillation circuit at the reference temperature is f2r, and a value corresponding to the difference value is obtained as a temperature detection value. The difference value is a difference value between a value corresponding to a difference between f1 and f1r and a value corresponding to a difference between f2 and f2r, and an addition unit sets a temperature setting value of a temperature of an environment in which the crystal oscillator is located and the temperature detection described above. And the circuit unit controls the electric power supplied to the heating unit based on the deviation component extracted by the addition unit, wherein the frequency difference detecting unit includes a pulse generation unit that is configured to correspond to the f1 and the f2 a differential frequency pulse; the DDS circuit section outputs a frequency signal whose signal value repeatedly increases and decreases with time at a frequency corresponding to the magnitude of the input DC voltage; the latch circuit, The frequency signal output from the DDS circuit unit is latched by a pulse generated by the pulse generating unit; and the loop filter latches the signal to the latch circuit The value is integrated, and the integrated value is output as a value corresponding to the difference value; and the adder extracts a difference between an output of the loop filter and a value corresponding to a difference between f1r and f2r, and the difference is obtained. As an input value input to the above DDS circuit section. A crystal controlled oscillator characterized by comprising: The oscillation circuit for oscillator output is connected to the crystal oscillator; the heating portion is for fixing the temperature of the environment in which the crystal resonator is located; and the first crystal resonator is configured by disposing the first electrode on the crystal piece; a crystal oscillator in which a second electrode is provided in a crystal piece; the first oscillation circuit and the second oscillation circuit are connected to the first crystal oscillator and the second crystal oscillator, respectively; and the frequency difference detecting unit The oscillation frequency of the oscillation circuit is f1, the oscillation frequency of the first oscillation circuit at the reference temperature is f1r, the oscillation frequency of the second oscillation circuit is f2, and the second oscillation at the reference temperature is used. When the oscillation frequency of the circuit is f2r, a value corresponding to the difference value is obtained as a temperature detection value, and the difference value is a value corresponding to the difference between f1 and f1r and a value corresponding to the difference between f2 and f2r. a difference value between the temperature setting value of the temperature in which the crystal vibrator is located and the temperature detection value; and the circuit portion based on the deviation score extracted by the addition unit The electric power to the heating unit is controlled; and the temperature detecting unit detects the temperature of the environment in which the crystal vibrator is located, and cancels the change in the output frequency of the crystal controlled oscillator due to the difference between the ambient temperature and the reference temperature. The set value of the output frequency of the crystal controlled oscillator is corrected based on the temperature detection value of the temperature detecting unit. An oscillating device comprising: the crystal controlled oscillator according to claim 1; and a main body circuit portion of the oscillating device including the oscillation output of the crystal controlled oscillator as a clock signal and including a PLL. The oscillating device according to claim 7, comprising: a correction value acquisition unit that detects a temperature detection value detected by the frequency difference detection unit, and the temperature detection value and the oscillation circuit for the oscillator output The relationship between the frequency correction value of the oscillation frequency f1, the frequency correction value of the oscillation frequency of the oscillation circuit for the oscillator output caused by the difference between the ambient temperature and the reference temperature, and the set value correction unit based on the correction value acquisition unit The obtained frequency correction value corrects the frequency setting value input to the main body circuit unit.