TWI503920B - Process equipment and o-ring thereof - Google Patents
Process equipment and o-ring thereof Download PDFInfo
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- TWI503920B TWI503920B TW099108125A TW99108125A TWI503920B TW I503920 B TWI503920 B TW I503920B TW 099108125 A TW099108125 A TW 099108125A TW 99108125 A TW99108125 A TW 99108125A TW I503920 B TWI503920 B TW I503920B
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- 238000000034 method Methods 0.000 title claims description 46
- 239000004065 semiconductor Substances 0.000 claims description 48
- 239000012530 fluid Substances 0.000 claims description 32
- 239000013078 crystal Substances 0.000 claims description 28
- 239000000463 material Substances 0.000 claims description 6
- 239000000919 ceramic Substances 0.000 claims description 5
- 230000000694 effects Effects 0.000 description 6
- 238000007789 sealing Methods 0.000 description 6
- 239000000853 adhesive Substances 0.000 description 4
- 230000001070 adhesive effect Effects 0.000 description 4
- 238000001020 plasma etching Methods 0.000 description 4
- 239000002245 particle Substances 0.000 description 2
- 229920000297 Rayon Polymers 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
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Description
本發明係有關於一種O形環,特別係有關於一種應用於半導體製程設備的O形環。This invention relates to an O-ring, and more particularly to an O-ring for use in a semiconductor process equipment.
參照第1a、1b圖,其係顯示習知之半導體製程設備(電漿蝕刻設備)1,用以對一晶圓2實施製程。第1b圖係為第1a圖中的A部分放大圖。半導體製程設備1包括一晶座10、一延伸覆蓋元件20以及一腔體30。晶座10設於腔體30之中。晶座10包括一晶座本體11、一流體供應單元13以及一承載元件12,該承載元件12設於該晶座本體11之上,該晶圓2置於該承載元件12之上,該流體供應單元13設於該晶座本體11之中,並經過該承載元件12對該晶圓2提供一流體3,其中,一溝槽14形成於該晶座10之一晶座側面15上之該晶座本體11與該承載元件12的連接處。Referring to Figures 1a and 1b, there is shown a conventional semiconductor processing apparatus (plasma etching apparatus) 1 for performing a process on a wafer 2. Fig. 1b is an enlarged view of a portion A in Fig. 1a. The semiconductor processing apparatus 1 includes a crystal holder 10, an extended cover member 20, and a cavity 30. The crystal holder 10 is disposed in the cavity 30. The crystal holder 10 includes a crystal holder body 11 , a fluid supply unit 13 , and a carrier member 12 . The carrier member 12 is disposed on the wafer holder body 11 . The wafer 2 is placed on the carrier member 12 . The supply unit 13 is disposed in the base body 11 and provides a fluid 3 to the wafer 2 via the carrier member 12, wherein a groove 14 is formed on one of the crystal seat sides 15 of the crystal holder 10. The junction of the base body 11 and the carrier element 12.
參照第1b圖,在習知技術中,由於該晶座本體11與該承載元件12的連接處有微小縫隙(漏氣點)存在,因此流體3會經過此縫隙於溝槽14處洩漏(在某些情況,縫隙(漏氣點)會位在溝槽14底部的中央位置)。參照第1c圖,為避免流體3洩漏,習知技術中將黏膠4填入溝槽14之中,以密封溝槽14。然而,參照第1d圖,由於黏膠4會被電漿粒子蝕刻而損耗,因此在長期使用之後將失去其密封效果。此外,由於黏膠4的有效時間不確定,並無法定期補強或更換,因此會影響整體製程的良率。Referring to FIG. 1b, in the prior art, since a small gap (leakage point) exists at the junction of the crystal holder body 11 and the carrier member 12, the fluid 3 leaks through the gap at the groove 14 (in In some cases, the gap (leakage point) will be at the center of the bottom of the groove 14). Referring to Fig. 1c, in order to avoid leakage of the fluid 3, the adhesive 4 is filled into the groove 14 to seal the groove 14. However, referring to Fig. 1d, since the adhesive 4 is lost by etching of the plasma particles, the sealing effect will be lost after long-term use. In addition, since the effective time of the adhesive 4 is uncertain and cannot be periodically replenished or replaced, it affects the overall process yield.
本發明即為了欲解決習知技術之問題而提供之一種半導體製程設備,用以對一晶圓實施製程,包括一晶座以及一O形環。晶座包括一晶座本體、一流體供應單元以及一承載元件,該承載元件設於該晶座本體之上,該晶圓置於該承載元件之上,該流體供應單元設於該晶座本體之中,並對該晶圓提供一流體,其中,一溝槽形成於該晶座之一晶座側面上之該晶座本體與該承載元件的連接處。O形環設於該溝槽之中。The present invention is a semiconductor process apparatus for solving the problems of the prior art for performing a process on a wafer, including a crystal holder and an O-ring. The crystal holder includes a crystal holder body, a fluid supply unit and a carrier member, the carrier member is disposed on the crystal holder body, the wafer is disposed on the carrier member, and the fluid supply unit is disposed on the crystal holder body And providing a fluid to the wafer, wherein a trench is formed on a side of the crystal holder of the crystal holder at a junction of the crystal holder body and the carrier member. An O-ring is disposed in the groove.
在一實施例中,本發明之半導體製程設備更包括一延伸覆蓋元件,該延伸覆蓋元件環繞該承載元件並與該晶座側面之間維持一間距。In one embodiment, the semiconductor process apparatus of the present invention further includes an extended cover element that surrounds the load-bearing element and maintains a spacing from the side of the mount.
在一實施例中,該溝槽具有一溝槽寬度,該O形環具有一O形環寬度,該O形環寬度比該溝槽寬度的比值介於1.00~1.20之間,例如1.05~1.15。In one embodiment, the trench has a trench width, and the O-ring has an O-ring width, and the ratio of the O-ring width to the trench width is between 1.00 and 1.20, for example, 1.05 to 1.15. .
在一實施例中,該溝槽具有一溝槽中心直徑,該O形環具有一O形環中心直徑,該O形環中心直徑比該溝槽中心直徑的比值介於0.95~1.00之間,例如0.97~0.99。In one embodiment, the groove has a groove center diameter, the O-ring has an O-ring center diameter, and a ratio of a center diameter of the O-ring to a center diameter of the groove is between 0.95 and 1.00. For example, 0.97 to 0.99.
在一實施例中,該O形環的截面呈矩形。In an embodiment, the O-ring has a rectangular cross section.
在另一實施例中,該O形環具有一第一導角部以及一第二導角部,第一導角部形成於該O形環之一第一內緣,第二導角部形成於該O形環之一第二內緣。該第一導角部位於一O形環頂面,該O形環頂面的徑向寬度比該O形環之徑向寬度的比值介於0.70~0.90之間,例如0.75~0.88。該第二導角部位於一O形環底面,該O形環底面的徑向寬度比該O形環之徑向寬度的比值介於0.70~0.90之間,例如0.75~0.88。In another embodiment, the O-ring has a first lead portion and a second lead portion. The first lead portion is formed on one of the first inner edges of the O-ring, and the second lead portion is formed. And a second inner edge of the O-ring. The first guiding portion is located on a top surface of an O-ring, and a ratio of a radial width of the top surface of the O-ring to a radial width of the O-ring is between 0.70 and 0.90, for example, 0.75 to 0.88. The second corner portion is located on a bottom surface of an O-ring, and a ratio of a radial width of the bottom surface of the O-ring to a radial width of the O-ring is between 0.70 and 0.90, for example, 0.75 to 0.88.
在一實施例中,該O形環的材質為橡膠,該承載元件的材料為陶瓷。In an embodiment, the O-ring is made of rubber, and the material of the carrier element is ceramic.
在一實施例中,該溝槽具有一溝槽底面以及一溝槽側壁,其中,該溝槽底面的寬度大於該溝槽側壁的徑向寬度。In one embodiment, the trench has a trench bottom surface and a trench sidewall, wherein the trench bottom surface has a width greater than a radial width of the trench sidewall.
在一實施例中,該流體經過該晶座本體以及該承載元件之間的縫隙進入該溝槽,並由於該O形環所密封。In one embodiment, the fluid enters the groove through the gap between the base body and the carrier member and is sealed by the O-ring.
本發明亦有關於一種O形環,包括一O形環本體以及一第一導角部。該O形環本體的截面呈矩形。第一導角部形成於該O形環本體之一第一內緣。The invention also relates to an O-ring comprising an O-ring body and a first lead. The O-ring body has a rectangular cross section. The first lead portion is formed on one of the first inner edges of the O-ring body.
應用本發明之半導體製程設備(電漿蝕刻設備),由於使用O形環密封溝槽,因此可防止流體洩漏。此外,由於用O形環的品質較為一致,因此可準確的依據使用壽命而定期更換。特別是,由於本發明實施例中採用截面呈矩形的O形環,因此可適用於溝槽底面的寬度大於該溝槽側壁的徑向寬度的情況,從而提供良好的密封效果。With the semiconductor process apparatus (plasma etching apparatus) of the present invention, since the groove is sealed by using an O-ring, fluid leakage can be prevented. In addition, since the quality of the O-ring is relatively uniform, it can be accurately replaced according to the service life. In particular, since the O-ring having a rectangular cross section is employed in the embodiment of the present invention, it is applicable to the case where the width of the bottom surface of the groove is larger than the radial width of the side wall of the groove, thereby providing a good sealing effect.
此外,應用另一實施例之O形環,由於O形環具有第一導角部以及第二導角部,因此可更順利的置入溝槽之中而提供密封的效果。Further, with the O-ring of another embodiment, since the O-ring has the first corner portion and the second corner portion, it can be smoothly placed into the groove to provide a sealing effect.
在一實施例中,O形環具有一徑向寬度以及一垂直向厚度,其中,該徑向寬度與該垂直向厚度的比值介於1:0.8~1:4之間。In one embodiment, the O-ring has a radial width and a vertical thickness, wherein the ratio of the radial width to the vertical thickness is between 1:0.8 and 1:4.
在另一實施例中,該O形環具有一O形環本體以及一肋,該O形環本體具有一內側面以及一外側面,該內側面接觸該溝槽之底部,該外側面與該內側面相反,該肋形成於該外側面之上。In another embodiment, the O-ring has an O-ring body and a rib, the O-ring body has an inner side and an outer side, the inner side contacting the bottom of the groove, the outer side and the outer side The rib is formed on the outer side opposite the inner side.
參照第2a、2b圖,其係顯示本發明第一實施例之半導體製程設備(電漿蝕刻設備)100,用以對一晶圓2實施製程。第2b圖係為第2a圖中的A1部分放大圖。半導體製程設備100包括一晶座10、一延伸覆蓋元件20、一O形環(O形環本體)110以及一腔體30。晶座10設於腔體30之中。晶座10包括一晶座本體11、一流體供應單元13以及一承載元件12,該承載元件12設於該晶座本體11之上,該晶圓2置於該承載元件12之上,該流體供應單元13設於該晶座本體11之中,並經過該承載元件12對該晶圓2提供一流體3。一溝槽14形成於該晶座10之一晶座側面15上之該晶座本體11與該承載元件12的連接處。該延伸覆蓋元件20環繞該承載元件12並與該晶座側面15之間維持一間距G。O形環110設於該溝槽14之中。Referring to Figures 2a and 2b, there is shown a semiconductor process apparatus (plasma etching apparatus) 100 of a first embodiment of the present invention for performing a process on a wafer 2. Fig. 2b is an enlarged view of a portion A1 in Fig. 2a. The semiconductor process device 100 includes a crystal holder 10, an extended cover member 20, an O-ring (O-ring body) 110, and a cavity 30. The crystal holder 10 is disposed in the cavity 30. The crystal holder 10 includes a crystal holder body 11 , a fluid supply unit 13 , and a carrier member 12 . The carrier member 12 is disposed on the wafer holder body 11 . The wafer 2 is placed on the carrier member 12 . The supply unit 13 is disposed in the base body 11 and supplies a fluid 3 to the wafer 2 via the carrier member 12. A trench 14 is formed on the side of the crystallizer side of the crystal holder 10 at the junction of the holder body 11 and the carrier member 12. The extended cover member 20 surrounds the carrier member 12 and maintains a spacing G between the wafer holder side 15. An O-ring 110 is disposed in the groove 14.
參照第2c圖,該溝槽具有一溝槽寬度d1,該O形環110具有一O形環寬度d2,該O形環寬度d2比該溝槽寬度d1的比值介於1.00~1.20之間,例如1.05~1.15。該溝槽14具有一溝槽中心直徑Φ 1 ,該O形環110具有一O形環中心直徑Φ 2 ,該O形環中心直徑Φ 2 比該溝槽中心直徑Φ 1 的比值介於0.95~1.00之間,例如0.97~0.99。Referring to FIG. 2c, the trench has a trench width d1, and the O-ring 110 has an O-ring width d2, and the ratio of the O-ring width d2 to the trench width d1 is between 1.00 and 1.20. For example, 1.05 to 1.15. The groove 14 has a groove center diameter Φ 1 , and the O-ring 110 has an O-ring center diameter Φ 2 , and the O-ring center diameter Φ 2 is greater than the groove center diameter Φ 1 by 0.95 ~ Between 1.00, for example, 0.97 to 0.99.
在此實施例中,該O形環110的截面呈矩形,其材質為橡膠,然此並未限制本發明,該O形環110的形狀亦可隨該溝槽的形狀而對應修改。In this embodiment, the O-ring 110 has a rectangular cross section and is made of rubber. However, the present invention is not limited thereto, and the shape of the O-ring 110 may be modified correspondingly according to the shape of the groove.
在一實施例中,該承載元件12的材料為陶瓷。該溝槽14具有一溝槽底面141以及一溝槽側壁142,其中,該溝槽底面141的寬度Wb 大於該溝槽側壁142的徑向寬度Wr 。該流體3經過該晶座本體11以及該承載元件12之間的縫隙進入該溝槽14,並由於該O形環110所密封。In an embodiment, the material of the carrier element 12 is ceramic. The groove 14 has a bottom surface 141 and a groove 142 groove sidewalls, wherein a bottom surface of the groove 141 is greater than a width W b W r radial width of the trench 142 sidewalls. The fluid 3 enters the groove 14 through the gap between the base body 11 and the carrier member 12 and is sealed by the O-ring 110.
應用本發明之半導體製程設備(電漿蝕刻設備),由於使用O形環密封溝槽,因此可防止流體洩漏。此外,由於用O形環的品質較為一致,因此可準確的依據使用壽命而定期更換。特別是,由於本發明實施例中採用截面呈矩形的O形環,因此可適用於溝槽底面的寬度大於該溝槽側壁的徑向寬度的情況,從而提供良好的密封效果。With the semiconductor process apparatus (plasma etching apparatus) of the present invention, since the groove is sealed by using an O-ring, fluid leakage can be prevented. In addition, since the quality of the O-ring is relatively uniform, it can be accurately replaced according to the service life. In particular, since the O-ring having a rectangular cross section is employed in the embodiment of the present invention, it is applicable to the case where the width of the bottom surface of the groove is larger than the radial width of the side wall of the groove, thereby providing a good sealing effect.
第3A圖係顯示本發明第二實施例之O形環120,在本發明第二實施例中,半導體製程設備其他元件的結構同第一實施例。參照第3圖,O形環120具有一第一導角部121以及一第二導角部122。第一導角部121形成於該O形環120之一第一內緣。第二導角部122形成於該O形環120之一第二內緣。該第一導角部121位於一O形環頂面123,該O形環頂面123的徑向寬度Wot 比該O形環120之徑向寬度Wo 的比值介於0.70~0.90之間,例如0.75~0.88。該第二導角部122位於一O形環底面124,該O形環底面124的徑向寬度Wob 比該O形環120之徑向寬度Wo 的比值介於0.70~0.90之間,例如0.75~0.88。Fig. 3A shows an O-ring 120 of a second embodiment of the present invention. In the second embodiment of the present invention, the other elements of the semiconductor process apparatus have the same structure as the first embodiment. Referring to FIG. 3, the O-ring 120 has a first lead portion 121 and a second lead portion 122. The first lead portion 121 is formed on one of the first inner edges of the O-ring 120. The second lead portion 122 is formed on a second inner edge of the O-ring 120. The first guiding portion 121 is located on an O-ring top surface 123. The ratio of the radial width W ot of the O-ring top surface 123 to the radial width W o of the O-ring 120 is between 0.70 and 0.90. , for example, 0.75 to 0.88. The second corner portion 122 is located on an O-ring bottom surface 124. The ratio of the radial width W ob of the O-ring bottom surface 124 to the radial width W o of the O-ring 120 is between 0.70 and 0.90, for example. 0.75 ~ 0.88.
應用本發明第二實施例之O形環,由於O形環具有第一導角部以及第二導角部,因此可更順利的置入溝槽之中而提供密封的效果。According to the O-ring of the second embodiment of the present invention, since the O-ring has the first guide portion and the second guide portion, it can be smoothly placed into the groove to provide a sealing effect.
第3B圖係顯示本發明第三實施例之O形環120’,在本發明第三實施例中,半導體製程設備其他元件的結構大致上同第一實施例。參照第3B圖,O形環120’具有一導角部121’。導角部121’形成於該O形環120’之一內緣。該導角部121’位於一O形環底面124,然,亦可以位於一O形環頂面123。O形環120’具有一徑向寬度Wo 以及一垂直向厚度To 。在第三實施例中,該徑向寬度Wo 與該垂直向厚度To 的比值,搭配溝槽尺寸,介於1:0.8~1:4之間。特別是,第三實施例可適用於該徑向寬度Wo 與該垂直向厚度To 的比值介於1:2~1:4之間的情況。在此實施例中,僅需要單一個導角部121’,便可順利完成組裝。Fig. 3B is a view showing an O-ring 120' of a third embodiment of the present invention. In the third embodiment of the present invention, the other elements of the semiconductor process apparatus are substantially the same as those of the first embodiment. Referring to Fig. 3B, the O-ring 120' has a lead portion 121'. A lead portion 121' is formed at an inner edge of the O-ring 120'. The lead portion 121' is located on the bottom surface 124 of an O-ring, but may also be located on the top surface 123 of the O-ring. O-ring 120' has a radial width W o and a vertical thickness T o . In the third embodiment, the ratio of the radial width W o to the vertical thickness T o , in combination with the groove size, is between 1:0.8 and 1:4. In particular, the third embodiment is applicable to the case where the ratio of the radial width W o to the vertical thickness T o is between 1:2 and 1:4. In this embodiment, only a single lead portion 121' is required, and assembly can be completed smoothly.
第3C圖係顯示本發明第四實施例之O形環120”,在本發明第四實施例中,半導體製程設備其他元件的結構大致上同第一實施例。參照第3C圖,O形環120”具有具有一O形環本體128以及一肋125,該O形環本體128具有一內側面126以及一外側面127,該內側面126接觸該溝槽之底部,該外側面127與該內側面126相反,該肋125形成於該外側面127之上。其中,該O形環本體128具有一本體徑向厚度Wo (同前述之徑向厚度),該肋具有一肋徑向厚度Wrib ,該本體徑向厚度Wo 與該肋徑向厚度Wrib 的比值介於3:1~12:1之間。在本發明第四實施例中,藉由肋125的設置,可加強O形環120”的徑向強度,防止O形環120”朝徑向發生撓曲。此外,在本實施例中,透過適當設計該本體徑向厚度Wo 與該肋徑向厚度Wrib 的比值,可以同時提供充足的防撓曲以及密封效果。並且,肋可幫助辨識外側面,避免組裝錯誤的情況發生。3C is a view showing an O-ring 120" according to a fourth embodiment of the present invention. In the fourth embodiment of the present invention, the other components of the semiconductor processing apparatus have substantially the same structure as the first embodiment. Referring to FIG. 3C, an O-ring The 120" has an O-ring body 128 and a rib 125. The O-ring body 128 has an inner side 126 and an outer side 127. The inner side 126 contacts the bottom of the groove, and the outer side 127 and the inner side Opposite the side 126, the rib 125 is formed over the outer side 127. Wherein, the O-ring body 128 has a body radial thickness W o (the same radial thickness as described above), the rib has a rib radial thickness W rib , the body radial thickness W o and the rib radial thickness W The ratio of rib is between 3:1 and 12:1. In the fourth embodiment of the present invention, by the arrangement of the ribs 125, the radial strength of the O-ring 120" can be strengthened to prevent the O-ring 120" from being deflected in the radial direction. Further, in the present embodiment, by appropriately designing the ratio of the radial thickness W o of the body to the radial thickness W rib of the rib , it is possible to simultaneously provide sufficient deflection and sealing effects. Moreover, the ribs can help identify the outer side and avoid assembly errors.
雖然本發明已以具體之較佳實施例揭露如上,然其並非用以限定本發明,任何熟習此項技藝者,在不脫離本發明之精神和範圍內,仍可作些許的更動與潤飾,因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。Although the present invention has been described above in terms of the preferred embodiments thereof, it is not intended to limit the invention, and those skilled in the art can make some modifications and refinements without departing from the spirit and scope of the invention. Therefore, the scope of the invention is defined by the scope of the appended claims.
1、100...半導體製程設備1, 100. . . Semiconductor process equipment
2...晶圓2. . . Wafer
3...流體3. . . fluid
4...黏膠4. . . Viscose
10...晶座10. . . Crystal seat
11...晶座本體11. . . Crystallium body
12...承載元件12. . . Carrier element
13...流體供應單元13. . . Fluid supply unit
14...溝槽14. . . Trench
141...溝槽底面141. . . Groove bottom
142...溝槽側壁142. . . Groove sidewall
15...晶座側面15. . . Crystallizer side
110、120、120’、120”...O形環110, 120, 120', 120"... O-ring
121...第一導角部121. . . First guide
121’...導角部121’. . . Leading section
122...第二導角部122. . . Second guide
123...O形環頂面123. . . O-ring top surface
124...O形環底面124. . . O-ring bottom
125...肋125. . . rib
126...內側面126. . . Inner side
127...外側面127. . . Outer side
128...O形環本體128. . . O-ring body
第1a圖係顯示習知之半導體製程設備;Figure 1a shows a conventional semiconductor process equipment;
第1b圖係為第1a圖中的A部分放大圖;Figure 1b is an enlarged view of Part A of Figure 1a;
第1c圖係顯示習知技術之將黏膠填入溝槽之中的情形;Figure 1c shows the prior art in which the adhesive is filled into the groove;
第1d圖係顯示黏膠被電漿粒子蝕刻而損耗的情形;Figure 1d shows the case where the glue is etched by the plasma particles and is lost;
第2a圖係顯示本發明第一實施例之半導體製程設備;Figure 2a is a diagram showing a semiconductor process apparatus according to a first embodiment of the present invention;
第2b圖係為第2a圖中的A1部分放大圖;Figure 2b is an enlarged view of part A1 in Figure 2a;
第2c圖係顯示第一實施例中O形環與半導體製程設備分離的情形;2c is a view showing a state in which the O-ring is separated from the semiconductor process equipment in the first embodiment;
第3A圖係顯示本發明第二實施例之O形環;3A is an O-ring showing a second embodiment of the present invention;
第3B圖係顯示本發明第三實施例之O形環;以及Figure 3B is an O-ring showing a third embodiment of the present invention;
第3C圖係顯示本發明第四實施例之O形環Figure 3C shows an O-ring of the fourth embodiment of the present invention
2...晶圓2. . . Wafer
3...流體3. . . fluid
10...晶座10. . . Crystal seat
11...晶座本體11. . . Crystallium body
12...承載元件12. . . Carrier element
13...流體供應單元13. . . Fluid supply unit
14...溝槽14. . . Trench
141...溝槽底面141. . . Groove bottom
142...溝槽側壁142. . . Groove sidewall
15...晶座側面15. . . Crystallizer side
110...O形環110. . . O-ring
Claims (32)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW099108125A TWI503920B (en) | 2009-03-19 | 2010-03-19 | Process equipment and o-ring thereof |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW98108872 | 2009-03-19 | ||
| TW099108125A TWI503920B (en) | 2009-03-19 | 2010-03-19 | Process equipment and o-ring thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW201036102A TW201036102A (en) | 2010-10-01 |
| TWI503920B true TWI503920B (en) | 2015-10-11 |
Family
ID=44856115
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW099108125A TWI503920B (en) | 2009-03-19 | 2010-03-19 | Process equipment and o-ring thereof |
Country Status (1)
| Country | Link |
|---|---|
| TW (1) | TWI503920B (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10153140B2 (en) | 2014-12-09 | 2018-12-11 | Mfc Sealing Technology Co., Ltd. | Method of installing elastomer ring in semiconductor processing equipment and guiding sheet and jig used in installing elastomer ring |
| US10529611B2 (en) | 2015-02-16 | 2020-01-07 | Mfc Sealing Technology Co., Ltd. | Barrier seal for electrostatic chuck |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI467174B (en) * | 2012-10-19 | 2015-01-01 | Mfc Sealing Technology Co Ltd | Method for inspecting seals |
| US10991570B2 (en) * | 2017-09-18 | 2021-04-27 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor wafer cleaning apparatus |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2197378Y (en) * | 1994-06-14 | 1995-05-17 | 马建军 | Multifunctional expanding rubber ring |
| US5636098A (en) * | 1994-01-06 | 1997-06-03 | Applied Materials, Inc. | Barrier seal for electrostatic chuck |
| JP2007194616A (en) * | 2005-12-22 | 2007-08-02 | Kyocera Corp | Susceptor and wafer processing method using the same |
| CN201101429Y (en) * | 2007-11-17 | 2008-08-20 | 广东新宝电器股份有限公司 | Electric kettle sealing ring |
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2010
- 2010-03-19 TW TW099108125A patent/TWI503920B/en not_active IP Right Cessation
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5636098A (en) * | 1994-01-06 | 1997-06-03 | Applied Materials, Inc. | Barrier seal for electrostatic chuck |
| CN2197378Y (en) * | 1994-06-14 | 1995-05-17 | 马建军 | Multifunctional expanding rubber ring |
| JP2007194616A (en) * | 2005-12-22 | 2007-08-02 | Kyocera Corp | Susceptor and wafer processing method using the same |
| CN201101429Y (en) * | 2007-11-17 | 2008-08-20 | 广东新宝电器股份有限公司 | Electric kettle sealing ring |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10153140B2 (en) | 2014-12-09 | 2018-12-11 | Mfc Sealing Technology Co., Ltd. | Method of installing elastomer ring in semiconductor processing equipment and guiding sheet and jig used in installing elastomer ring |
| US10529611B2 (en) | 2015-02-16 | 2020-01-07 | Mfc Sealing Technology Co., Ltd. | Barrier seal for electrostatic chuck |
Also Published As
| Publication number | Publication date |
|---|---|
| TW201036102A (en) | 2010-10-01 |
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