TWI503666B - Flash memory module and flash memory accessing method - Google Patents

Description

Flash memory module and access method of flash memory

The present invention relates to a method for accessing flash memory, and more particularly to a method for accessing backup data of a flash memory.

In recent years, flash memory has the advantages of large memory capacity and high erasing speed, and therefore has become the mainstream of non-volatile memory.

However, flash memory poses a risk of damage after multiple data actions. Once the flash memory is not properly designed due to the design of the associated electronic device, the update operation of the flash memory cannot be uniformly applied to each of the memory blocks, so that the commonly used memory blocks are damaged. These often damaged memory blocks usually store more important data, such as the boot data of the electronic device.

If the boot data of the electronic device cannot be read due to the damage of the flash memory, the entire electronic device will not be able to be turned on and completely stopped. In order to restore such an electronic device, professional maintenance personnel are always required to complete it, resulting in many inconveniences in use.

The invention provides a method for accessing a flash memory, which ensures that the electronic device can be turned on normally.

The present invention provides a flash memory module that is disposed on an electronic device to ensure that the electronic device can be powered on normally.

The present invention provides a method for accessing a flash memory, comprising: first, dividing a flash memory into a primary storage area and a backup storage area, wherein a first start address of the primary storage area and a second start of the spare storage area An offset address whose address difference is not equal to 0. The flash memory is read according to the first start address as a read indicator to obtain boot data. And according to the boot data, the electronic device performs a booting action. Then, it is detected whether the booting action is normal or not, and when the booting action is not normal, the flash memory is provided to change the read index to the second start address according to the offset address to read the standby booting data.

The invention provides a flash memory module which is arranged on an electronic device. The flash memory module includes a flash memory and an access position converter. Flash memory, divided into primary storage area and backup storage area. The access position converter is coupled to the flash memory. The main storage area is used to store the boot data, and the spare storage area is used to store the boot data as the backup boot data. The access location converter is built in the flash memory for receiving the first start address and the power-on normal signal, and generates a read indicator according to the power-on normal signal, the first start address, and the offset address to provide the read indicator. Read indicators to read boot data or alternate boot data.

Based on the above, the present invention allocates the main storage area and the backup storage area in the flash memory configured by the electronic device, and stores the boot data in both the main storage area and the backup storage area. Then, by detecting the success or failure of the booting, it is determined whether to read the booting data in the spare storage area to perform the booting operation. In this way, it can be ensured that the power-on operation of the electronic device can be performed normally without causing the electronic device to be completely inoperable due to the destruction of the flash memory.

The above described features and advantages of the present invention will be more apparent from the following description.

First, please refer to FIG. 1. FIG. 1 is a flowchart of a method for accessing a flash memory according to an embodiment of the present invention. The flash memory of this embodiment is divided into two areas, one of which is a primary storage area and the other is a spare storage area. The method of dividing two regions in the flash memory is to set two different start addresses for the flash memory, and thereby distinguish the main storage area and the memory block to which the spare storage area belongs. For example, assume that the starting address of the primary storage area is the flash memory entity address 000000H, and the starting address of the spare storage area is the flash memory entity address 400000H. In this way, the memory block of the flash memory entity address 000000H~3FFFFFH belongs to the main storage area, and the memory block after the flash memory entity address 400000H belongs to the spare storage area.

Incidentally, the memory capacity of the spare storage area is not planned to be larger than the storage capacity of the main storage area.

Moreover, the boot data can be copied into two copies and simultaneously stored in the main storage area and the spare storage area, wherein the boot data stored in the spare storage area can also be referred to as standby boot data.

The step of the flash memory access method in this embodiment includes: setting a start address of the main storage area as a read index, and reading the main storage area by using the read indicator to obtain a boot stored in the main storage area. data (S110). When the reading of the data in the main storage area is performed, the reading may be performed according to the manner in which the reading index is read and the memory address pointed to by the index is read as the reading action is incremented. And when the memory address pointed to by the reading indicator is the memory address of the boot data, the boot data is read and obtained.

After obtaining the booting data, the electronic device to which the flash memory belongs can perform the booting operation according to the booting data (S120). Then, detection is performed on the state of the power-on operation performed by the electronic device (S130). The detecting method for the state of the power-on operation of the electronic device may perform one or more boot test programs after the electronic device performs the booting operation, and thereby observe whether the electronic device has a corresponding and normal reply for the booting test programs. . Once the electronic device has a normal response to the boot test program, it can indicate that the electronic device is powered on normally. That is, the boot data read by the main storage area is normal. Or if the electronic device does not respond normally to the boot test program, it means that the boot data read by the main storage area is abnormal, and the part of the main storage area where the boot data is stored may be damaged.

When confirming whether the electronic device has a normal response to the boot test program, it can be completed by using a timing action performed simultaneously with executing the boot test program. As an example, the timing action is first cleared, and the timing action is synchronized when the power-on test action is performed. When the timeout action occurs, if the electronic device has not performed a normal reply according to the executed boot test program, it indicates that the power-on action of the electronic device is not completed. Conversely, when the electronic device successfully performs a normal response according to the executed boot test program before the timeout action occurs, the timing action is cleared. Confirm that the power-on action of the electronic device has been effectively completed.

When the detection result of the power-on state indicates that the electronic device is not normally turned on, the read indicator is changed to the start address of the spare storage area, and the stored in the spare storage area is read according to the new read indicator. Boot data (S140). In this way, when the boot data of the main storage area is damaged, the electronic device can still be powered on according to the boot data in the spare storage area, thereby maintaining the normal working ability of the electronic device.

In the manner of changing the read index, the difference between the start address of the primary storage area and the spare storage area may be recorded as the offset address. When the read indicator needs to be changed, the new read index is directly equal to the start address of the main storage area plus the offset address.

In addition, when it is found that the boot data in the main storage area cannot make the electronic device boot normally, the boot data read out from the backup storage area can be written back to the main storage area to cover the boot data. In this way, when the main storage area is not physically damaged, the boot data in the main storage area can be returned to normal.

That is to say, in the embodiment of the present invention, when the booting data stored in the main storage area cannot provide the home electronic device for normal booting, the flash memory of the embodiment of the present invention only needs to be booted normally through the receiving electronic device. The information can be switched according to the offset address to read the standby boot data in the spare storage area to enable the electronic device to be effectively turned on and maintain the operation of the system.

Please pay special attention to the fact that the main storage area and the backup storage area do not store only the boot data. Among them, the main storage area can store the storage required by the electronic device. Multiple data is stored, while the backup storage area is stored for important data (such as boot data) in the main storage area. To ensure the safety of important information in the main storage area.

For a more detailed description of the implementation of the present invention, please refer to FIG. 2A and FIG. 2B. FIG. 2A and FIG. 2B respectively illustrate the operation of the embodiment of the present invention. In the illustration of FIG. 2A, the read index PTR1 is set equal to the start address of the primary storage area 210 (the physical address ADDR=0H). The reading operation of the flash memory 200 is performed in accordance with the reading index PTR1. In other words, the physical address ADDR=0H of the flash memory 200 corresponds to the logical address 000000H of the flash memory 200. When the booting data in the main storage area 210 fails to enable the electronic device to which the flash memory 200 belongs to be powered on normally, the read index PTR1 is reset to the start address of the backup storage area 220 as shown in FIG. 2B ( The physical address ADDR=40000H). The above read index PTR1 re-action can obtain a new read index PTR1 by adding the start address of the main storage area 210 to the offset address OFFSET, wherein the offset address OFFSET is not equal to zero.

After the read index PTR1 is changed, the physical address ADDR=4000K of the flash memory 200 corresponds to the logical address 000000H of the flash memory 200, and the physical address ADDR=0H of the flash memory 200 corresponds to fast. The logical address of the flash memory 200 is 400000H.

When the flash memory 200 is read according to the start address of the spare storage area 220 as the new read index PTR1, when the read operation proceeds to the last address of the spare storage area 220, the read index is re-enabled. Equal to the start address of the primary storage area 210 and continue reading of the flash memory 200.

Please refer to FIG. 3 . FIG. 3 is a schematic diagram of the flash memory 300 according to an embodiment of the present invention. The flash memory module 300 is disposed on an electronic device. The flash memory 300 includes an access location converter 310, a primary storage area 321, a spare storage area 322, and a timer 311. The access location converter 310 can be an address decoder coupled to the primary storage area 321 and the spare storage area 322. The primary storage area 321 and the backup storage area 322 are used to store boot data and backup boot data, respectively. The access location converter 310 reads the flash memory 300 according to the start address ADDR as a read indicator to obtain boot data and causes the electronic device to perform a boot operation according to the boot data.

After the electronic device of the embodiment of the present invention is powered on, the electronic device itself performs a normal or non-detecting action of the power-on, and the result of the detection can be obtained by the timer 330. In brief, when the electronic device is turned on or off, the timer 330 will start its timing action correspondingly. If the electronic device's power-on action is normal, the timed action will be reset by the electronic device without causing an overflow. Conversely, if the power-on action of the electronic device is abnormal, the timer action of the timer 330 will not be reset and an overflow will occur, and the overflow signal OV indicating the state of the overflow is used as the power-on normal signal. Transfer to the access location converter 310. The access location converter 310 converts the read indicator to the spare storage area 322 according to the overflow address OV according to the overflow signal OV to read the standby boot data.

Please note that the timer 330 can also be constructed using the timer 311 built into the flash memory 300 instead. And, the above timer 311 can be A hardware circuit is implemented by means of software.

In summary, the present invention determines whether the boot data of the main storage area is damaged by detecting the normality of the booting operation, and accesses provided through the internal flash memory when the boot data of the main storage area is damaged. The position converter changes the read indicator to the start address of the spare storage area according to the boot normal signal and the offset address to read the standby boot data from the spare storage area, so that the electronic device can be normally turned on.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims.

Steps for S110~S140‧‧‧ access method

200‧‧‧flash memory

210, 321‧‧‧ main storage areas

220, 322‧‧‧ spare storage area

300‧‧‧flash memory

310‧‧‧Access position converter

311, 330‧‧‧ timer

PTR1‧‧‧ reading indicators

OFFSET, OFFADD‧‧‧ offset address

ADDR‧‧‧ address

FIG. 1 is a flow chart of a method for accessing a flash memory according to an embodiment of the invention.

2A and 2B are schematic views respectively showing the operation of the embodiment of the present invention.

FIG. 3 is a schematic diagram of a flash memory 300 according to an embodiment of the present invention.

Steps for S110~S140‧‧‧ access method

Claims (11)

A method for accessing a flash memory, the flash memory is disposed on an electronic device, and the flash memory includes a main storage area and a spare storage area for respectively storing a boot data and a backup boot data. And a first start address of the primary storage area and a second start address of the spare storage area are different from an offset address of 0, including: reading the index according to the first start address Reading the flash memory to obtain the booting data; causing the electronic device to perform a booting operation according to the booting data; and detecting whether the booting action is normal or not; when the booting action is abnormal, providing the built-in An access location converter in the flash memory to read the alternate boot data by converting the read index to the second start address according to an offset address; and when according to the second start The address is the read indicator for reading the flash memory, and when the read operation proceeds to the last address of the spare storage area, the read indicator is equal to the first start address and the flash is flashed The memory continues to be read. The method for accessing the flash memory according to the first aspect of the invention, wherein the step of detecting whether the booting operation is normal or not further comprises: clearing a timing action; performing at least one booting test action, and starting The timing action; and when the timing action occurs, the normality of the power-on action is determined according to the power-on test action. For example, the access method of the flash memory in the first application of the patent scope, The step of “changing the read index to the second start address according to the offset address to read the boot data” includes: making the read index equal to the offset address plus the first Starting address. The method for accessing a flash memory according to claim 1, wherein the storage capacity of the spare storage area is not greater than the storage capacity of the main storage area. The access method of the flash memory according to the first aspect of the invention, further comprising: writing back the standby boot data obtained by reading the read indicator according to the second start address to the The main storage area covers the boot data. A flash memory device is disposed on an electronic device, comprising: a main storage area for storing a booting data; and a spare storage area for storing the booting data for an alternate booting data, wherein the primary storage area An offset address that is different from a second start address of the spare storage area by a value other than 0; and an access location converter built in the flash memory and directly received The first start address and a boot normal signal are determined according to the boot normal signal to determine whether to convert the first start address according to the offset address to generate a read indicator, and provide the read indicator to read The booting data or the standby booting data, wherein when the booting normal signal indicates that the booting operation is abnormal, the flash memory changes the reading index to the second starting address according to the offset address to read The alternate boot data, When the flash memory is read according to the read index of the second start address, and the read operation proceeds to the last address of the spare storage area, the read index is made equal to the first start The address is read and the flash memory continues to be read. The flash memory of claim 6, wherein the method further includes: a timer coupled to the access location converter, and performing a timing action when the electronic device detects whether the power-on operation is normal or not, And an overflow signal is transmitted as the power-on normal signal to the access position converter according to whether the timing action overflows or not. The flash memory of claim 7, wherein when the timing action overflows, the access location converter causes the read index to be equal to the first start address plus the offset address And providing the read indicator as a second start address to read the standby boot data. The flash memory of claim 7, wherein the access location converter makes the read index equal to the first start address when the timing action does not overflow, and provides the read Indicator to read the boot data. The flash memory of claim 6, wherein the spare storage area has a storage capacity not greater than a storage capacity of the primary storage area. The flash memory of claim 6, wherein the access location converter further provides the read indicator of the second start address to read the standby boot data and provide the first start Address as a write The indicator writes the alternate boot data back to the primary storage area to cover the boot data.