TWI500002B - Interlocking unit having an electronic component and teaching aid of an electrical circuit assembled with the interlocking units - Google Patents
Interlocking unit having an electronic component and teaching aid of an electrical circuit assembled with the interlocking units Download PDFInfo
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- 239000002184 metal Substances 0.000 claims 4
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Description
本發明係關於一種電子元件疊接單元及其組成的電路教具,尤指一種將電子元件設於積木中,且當若干積木相對扣接可使各電子元件形成導通的電路教具。The present invention relates to an electronic component splicing unit and a circuit teaching aid thereof, and more particularly to a circuit teaching tool for arranging electronic components in a building block, and when the plurality of building blocks are relatively fastened, the electronic components can be turned on.
電子電機相關產業是本世紀最重要的產業,在教育方面若能從小培養電子電機類的興趣,對孩童未來選擇專長與培養專業定將有極大助益,目前在此類相關的教材與較具,除了自行設計與製作電路板外,主要教具即為俗稱麵包板的免焊萬用電路板,製作電路板具有危險性且僅能使用一次,而麵包板則為高工階段的主要電路教具。The electronic motor-related industry is the most important industry in this century. If you can cultivate the interest in electronic and electrical engineering from an early age, it will be of great help to children's future choice of expertise and training. In addition to designing and manufacturing circuit boards by themselves, the main teaching aids are the solderless universal circuit boards commonly known as breadboards. The production of circuit boards is dangerous and can only be used once, while the breadboards are the main circuit teaching aids in the high-tech stage.
參見第二十一圖所示,為一現有技術之免焊萬用電路板(solderless breadboard),俗稱麵包板,其係於一基板(50)上設有複數個呈縱橫排列的插孔(51),各插孔(51)間具有不同的導通方式,電線(60)及各式電子元件(70A)(70B)(70C)(70D)之接腳(71A)(71B)(71C)(71D)可分別插設於該插孔(51)中,以模擬各種不同的電路、進行實驗。其中由於該電線(60)及電子元件(70A)(70B)(70C)(70D)可任意插拔,以根據不同的電路設計改變其連接關係,故已成為電子教學不可或缺的基本教具之一。Referring to the twenty-first embodiment, a prior art solderless breadboard, commonly known as a breadboard, is provided on a substrate (50) with a plurality of jacks arranged in a vertical and horizontal direction (51). ), each jack (51) has different conduction modes, wires (60) and various electronic components (70A) (70B) (70C) (70D) pins (71A) (71B) (71C) (71D) ) can be inserted into the jack (51) to simulate various circuits and conduct experiments. Since the electric wire (60) and the electronic component (70A) (70B) (70C) (70D) can be arbitrarily inserted and removed to change the connection relationship according to different circuit designs, it has become an indispensable basic teaching aid for e-learning. One.
然而,因為電線(60)及電子元件(70A)(70B)(70C)(70D)的接腳(71A)(71B)(71C)(71D)均為尖細的金屬線,基板(50)上的插孔(51)也呈細小孔洞的型態,故一般只適合年紀較大的研究人員或學生使用;對於年紀較小的孩童而言,則因為無法進行較為精細的動作,故不適合將上述現有技術的免焊萬用電路板作為讓孩童從小培養對電子電路設計興趣的玩具使用。However, since the wires (60) and the electronic components (70A) (70B) (70C) (70D) have pins (71A) (71B) (71C) (71D) which are tapered metal wires, the substrate (50) The jack (51) is also in the form of small holes, so it is generally only suitable for older researchers or students. For younger children, it is not suitable for the above-mentioned children because they cannot perform finer movements. The prior art solderless universal circuit board is used as a toy for children to cultivate an interest in electronic circuit design from an early age.
有鑑於前述現有技術的缺點,本發明提供一種電子元件疊接單元及其組成的電路教具,希藉此設計解決現有技術之免焊萬用電路板的插孔細小,造成電子元件之接腳難以插接的缺點。In view of the above disadvantages of the prior art, the present invention provides an electronic component splicing unit and a circuit teaching tool thereof, which is designed to solve the problem of the prior art solderless universal circuit board having a small jack, which makes it difficult to connect the electronic components. The disadvantages of plugging.
為了達到上述的發明目的,本發明所利用的技術手段係使一電路教具之疊接單元具有一基座,該基座上設有至少一導電件及至少一電子元件,該電子元件與該導電件相接,並可經由該導電件與另一疊接單元之導電件相接。In order to achieve the above object, the technical means utilized by the present invention is such that a stacking unit of a circuit teaching device has a base, and the base is provided with at least one conductive member and at least one electronic component, the electronic component and the conductive The components are connected to each other and can be connected to the conductive member of another splicing unit via the conductive member.
所述基座可呈塊體狀;所述導電件可呈導接柱之型態,其材質為具導電性的金屬材料,各導接柱的兩端分別形成為一母扣部及一公扣部,該母扣部呈凹槽狀,該公扣部突伸出該基座,並可與另一疊接單元的母扣部相對扣接;所述電子元件與該導接柱相接。所述導接柱之母扣部槽壁上可間隔環設有複數個剖槽。The pedestal may be in the form of a block; the conductive member may be in the form of a guiding post, and the material is made of a conductive metal material, and the two ends of each guiding post are respectively formed as a female button portion and a male a buckle portion, the female buckle portion is in a groove shape, the male buckle portion protrudes from the base, and is fastened to the female buckle portion of the other overlapping unit; the electronic component is connected to the guiding post . A plurality of slots are formed in the spacer ring on the wall of the female button portion of the guiding post.
此外,所述基座亦可呈塊體狀,並於外環壁面上間隔內凹成型有複數個對位槽,各對位槽的兩端分別貫穿該基座之頂面與底面;所述導電件則可呈導電片之型態,且分別設於該基座之對位槽中;所述電子元件與該導電片相接。In addition, the pedestal may also have a block shape, and a plurality of alignment grooves are concavely formed on the outer ring wall surface, and two ends of each aligning groove respectively penetrate the top surface and the bottom surface of the pedestal; The conductive members may be in the form of conductive sheets and respectively disposed in the alignment grooves of the base; the electronic components are in contact with the conductive sheets.
所述導電片的一端可凸出於該基座的頂面,導電片的另一端則可內凹於該基座的對位槽之中所述之疊接單元可具有複數個導接柱,電子元件可為電阻器、電容器、電晶體、發光二極體、積體電路或電感器,該電子元件具有複數支分別與該導電件相接的接腳。One end of the conductive sheet may protrude from a top surface of the base, and the other end of the conductive sheet may be recessed into an alignment groove of the base, and the overlapping unit may have a plurality of guiding columns. The electronic component can be a resistor, a capacitor, a transistor, a light emitting diode, an integrated circuit or an inductor having a plurality of pins respectively connected to the conductive member.
所述電子元件還可包含複數段金屬導線,每一段金屬導線連接兩導接柱。The electronic component may further comprise a plurality of metal wires, each of the metal wires connecting the two lead posts.
所述電子元件另可進一步包含一金屬導線,該金屬導線連接各導電片。The electronic component may further comprise a metal wire connecting the conductive sheets.
所述基座表面可以標註該電子元件的單位數值、極性或型號。The surface of the pedestal may be labeled with a unit value, polarity or model number of the electronic component.
本發明所利用的另一種技術手段係提供一種由上述疊接單元所組成的電路教具,其具有複數個如上所述之疊接單元與一疊接板,該疊接板上間隔排列成型有複數個組接塊,各疊接單元可與該組接塊相對扣接而定位於該疊接板上。Another technical means utilized by the present invention is to provide a circuit teaching device comprising the above-mentioned splicing unit, which has a plurality of splicing units and a splicing plate as described above, and the splicing plates are arranged at intervals Each of the stacking units can be fastened to the stacking plate and positioned on the stacking plate.
本發明的優點在於,其將金屬導線或各式電子元件及其接腳設於基座中,讓各電子元件可經由該導接柱連接並形成電路導通之型態,組裝時就好像在堆疊積木般,簡易且穩固,另外則特別適合孩童使用,讓孩童從小便可在遊戲的過程中培養對電子電路設計的興趣。The invention has the advantages that the metal wires or various electronic components and their pins are arranged in the base, so that the electronic components can be connected through the guiding posts and form a circuit conduction mode, which is assembled as if stacked. It is simple and stable, and it is especially suitable for children. It allows children to cultivate interest in electronic circuit design during the game.
以下配合圖式及本發明之較佳實施例,進一步闡述本發明為達成預定發明目的所採取的技術手段。The technical means adopted by the present invention for achieving the intended purpose of the invention are further described below in conjunction with the drawings and preferred embodiments of the invention.
參見第一及十三圖所示,本發明之電路教具包括有複數個疊接單元(1A)(1J),每一疊接單元(1A)(1J)具有一基座(10A)(10J),該基座(10A)(10J)上設有至少一導電件及至少一電子元件(30A),該電子元件(30A)與該導電件相接,並可經由該導電件與另一疊接單元之導電件相接,使兩疊接單元內之電子元件形成電路導通的狀態。Referring to the first and thirteenth drawings, the circuit teaching tool of the present invention comprises a plurality of splicing units (1A) (1J), each splicing unit (1A) (1J) having a pedestal (10A) (10J) The base (10A) (10J) is provided with at least one conductive member and at least one electronic component (30A), the electronic component (30A) is connected to the conductive member, and can be overlapped with another through the conductive member The conductive members of the unit are connected such that the electronic components in the two stacked units form a state in which the circuit is turned on.
第一圖所示為該疊接單元(1A)的第一實施例,其中:基座(10A)呈塊體狀,較佳地,該基座(10A)係呈矩形塊體狀;進一步參見第二及三圖所示,導電件呈導接柱(20A)之型態,該導接柱(20A)間隔設於該基座(10A)之中,其材質為具導電性的金屬材料,以供電路導通之用,各導接柱(20A)的兩端分別形成為一母扣部(21A)及一公扣部(22A),該母扣部(21A)呈凹槽狀,母扣部(21A)的槽壁上間隔環設有複數個剖槽(23A),使該母扣部(21A)處具彈性挾持力,該公扣部(22A)突伸出該基座(10A)的表面,並可與另一疊接單元(1A)的母扣部(21A)相對扣接,並藉該母扣部(21A)的彈性挾持力使該公扣部(22A)與母扣部(21A)穩固相接;電子元件(30A)設於該基座(10A)之中,其具有至少二接腳(31A),該二接腳(31A)分別與其中一導接柱(20A)相接,藉此設計,當一疊接單元(1A)之公扣部(22A)與另一疊接單元(1A)之母扣部(21A)相接時,疊接單元(1A)內所設的電子元件(30A)便可透過該導接柱(20A)形成電性導通的狀態。The first figure shows a first embodiment of the splicing unit (1A), wherein: the pedestal (10A) is in the form of a block, preferably, the pedestal (10A) is in the form of a rectangular block; see further As shown in the second and third figures, the conductive member is in the form of a conductive post (20A), and the conductive post (20A) is spaced apart from the base (10A) and is made of a conductive metal material. For the conduction of the circuit, the two ends of each of the guiding posts (20A) are respectively formed as a female button portion (21A) and a male button portion (22A), and the female button portion (21A) has a groove shape and a female button The spacer ring of the portion (21A) is provided with a plurality of slits (23A) for elastically holding the female snap portion (21A), and the male snap portion (22A) protrudes from the base (10A) The surface of the other fastening unit (1A) is relatively fastened to the female fastening portion (21A) of the other fastening unit (1A), and the male fastening portion (22A) and the female fastening portion are supported by the elastic clamping force of the female fastening portion (21A). (21A) firmly connected; the electronic component (30A) is disposed in the base (10A), and has at least two pins (31A), and the two pins (31A) are respectively connected to one of the guiding posts (20A) Connected, by this design, when the male button portion (22A) of one stacking unit (1A) and the female button portion of another stacking unit (1A) (21) A) When connected, the electronic component (30A) provided in the splicing unit (1A) can be electrically connected to the conductive post (20A).
同樣參見第一至三圖所示,在疊接單元(1A)的第一實施例中,該疊接單元(1A)係具有二間隔設置導接柱(20A),該電子元件(30A)設於該二導接柱(20A)之間,且為一具有二接腳(31A)的電阻器(Resistor),使該二接腳(31A)分別與該二導接柱(20A)相接,令此疊接單元(1A)在進行電路模擬時,可當做一電阻器來使用,其中,該疊接單元(1A)內所設電阻器的電阻值可利用刻印或貼貼紙的方式標註於基座(10A)表面,以便於使用者選擇使用,如圖所示,可知其電阻值為10KΩ。Referring also to the first to third figures, in the first embodiment of the splicing unit (1A), the splicing unit (1A) has two spaced-apart guiding posts (20A), and the electronic component (30A) is provided. Between the two lead posts (20A), and a resistor having two pins (31A), the two pins (31A) are respectively connected to the two lead posts (20A). The splicing unit (1A) can be used as a resistor when performing circuit simulation, wherein the resistance value of the resistor provided in the splicing unit (1A) can be marked on the base by marking or pasting. The seat (10A) surface is designed for the user to use. As shown in the figure, the resistance value is 10KΩ.
進一步參見第四圖所示,為疊接單元(1B)的第二實施例,其中該疊接單元(1B)上係設有四個導接柱(20B),上述為電阻器的電子元件(30A)設於兩兩導接柱(20B)之間,使其二接腳(31A)分別與電子元件(30A)兩側的導接柱(20B)相接,兩相鄰的導接柱(20B)之間再分別以一金屬導線(32A)相接,讓使用者可具選擇性地將另一疊接單元與其中一導接柱(20B)相接,藉此變化本發明之電路教具的組合型態。Further referring to the fourth figure, which is a second embodiment of the splicing unit (1B), wherein the splicing unit (1B) is provided with four lead posts (20B), which are electronic components of the resistor ( 30A) is disposed between the two guiding posts (20B) such that the two pins (31A) are respectively connected to the guiding posts (20B) on both sides of the electronic component (30A), and the two adjacent guiding posts ( 20B) is respectively connected by a metal wire (32A), so that the user can selectively connect another splicing unit to one of the guiding posts (20B), thereby changing the circuit teaching aid of the present invention. The combination type.
進一步參見第五圖所示,為疊接單元(1C)的第三實施例,其中該疊接單元(1C)上設有二導接柱(20C),該電子元件(30C)設於該二導接柱(20C)之間,且為一具有二接腳(31C)的圓板形陶瓷電容器(Capacitor),使該二接腳(31C)分別與該導接柱(20C)相接,令此疊接單元(1C)在進行電路模擬時,可當做一電容器來使用,進一步參見第六圖所示,該疊接單元(1C)內所設電容器的電容值可利用刻印或貼貼紙的方式標註於基座(10C)表面,以便於使用者選擇使用,如圖所示,可知其電容值為10μF。Referring to FIG. 5, a third embodiment of the splicing unit (1C) is provided, wherein the splicing unit (1C) is provided with two guiding posts (20C), and the electronic component (30C) is disposed on the second Between the lead posts (20C), and a circular plate-shaped ceramic capacitor (Capacitor) having two pins (31C), the two pins (31C) are respectively connected to the guiding posts (20C), so that The splicing unit (1C) can be used as a capacitor when performing circuit simulation. Further, as shown in the sixth figure, the capacitance value of the capacitor provided in the splicing unit (1C) can be etched or pasted. It is marked on the surface of the pedestal (10C) for the user to choose to use. As shown in the figure, the capacitance value is 10μF.
進一步參見第七圖所示,為疊接單元(1D)的第四實施例,其中該電子元件(30D)亦可為一具有二接腳(31D)的電解電容器,使該二接腳(31D)分別與該疊接單元(1D)的導接柱(20D)相接,令此疊接單元(1D)在進行電路模擬時,可當做一電容器來使用,其中,該該疊接單元(1D)內所設電解電容器之接腳(31D)的極性同樣可利用刻印或貼貼紙的方式標註於基座(10D)表面之各相對應的導接柱(20D)處,以便於使用者對照使用。Referring further to the seventh embodiment, a fourth embodiment of the splicing unit (1D), wherein the electronic component (30D) can also be an electrolytic capacitor having two pins (31D), the two pins (31D) ) respectively connected to the guiding post (20D) of the splicing unit (1D), so that the splicing unit (1D) can be used as a capacitor when performing circuit simulation, wherein the splicing unit (1D) The polarity of the pin (31D) of the electrolytic capacitor provided in the same can also be marked on the corresponding guide post (20D) on the surface of the pedestal (10D) by means of imprinting or pasting, so as to be used by the user. .
進一步參見第八圖所示,為疊接單元(1E)的第五實施例,其中該電子元件(30E)還可為一具有二接腳(31E)的發光二極體(Light Emitting Diode,LED),使該二接腳(31E)分別與該疊接單元(1E)的導接柱(20E)相接,令此疊接單元(1E)在進行電路模擬時,可當做一LED來使用。Further referring to the eighth embodiment, it is a fifth embodiment of the splicing unit (1E), wherein the electronic component (30E) can also be a light emitting diode (LED) having two pins (31E). The two pins (31E) are respectively connected to the guiding posts (20E) of the splicing unit (1E), so that the splicing unit (1E) can be used as an LED when performing circuit simulation.
進一步參見第九圖所示,為疊接單元(1F)的第六實施例,其中該疊接單元(1F)上設有三個導接柱(20F),該電子元件(30F)則為一具有三接腳(31F)的電晶體(Transistor),使該三接腳(31F)分別與該三導接柱(20F)相接,令此疊接單元(1F)在進行電路模擬時,可當做一電晶體來使用,又,該疊接單元(1F)內所設電晶體之接腳(31F)的極性與該電晶體的型號可利用刻印或貼貼紙的方式標註於基座(10F)表面,以便於使用者選擇使用,如圖所示,可知位於圖片左側的導接柱(20F)與該電晶體之基極(Base)接腳(31F)相接,位於圖片中間的導接柱(20F)與該電晶體之射極(Emitter)接腳(31F)相接,位於圖片右側的導接柱(20F)則與該電晶體之集極(Collector)接腳(31F)相接,此外,該疊接單元(1F)內所設電晶體的型號則可利用刻印或貼貼紙的方式標註於基座(10F)表面,以便於使用者選擇使用。Further referring to the ninth figure, a sixth embodiment of the splicing unit (1F), wherein the splicing unit (1F) is provided with three guiding posts (20F), and the electronic component (30F) has one The three-pin (31F) transistor (Transistor) connects the three pins (31F) to the three-lead post (20F), so that the splicing unit (1F) can be used as a circuit simulation. A transistor is used, and the polarity of the pin (31F) of the transistor provided in the splicing unit (1F) and the type of the transistor can be marked on the surface of the pedestal (10F) by means of imprinting or pasting. For the user to choose to use, as shown in the figure, it can be seen that the guide post (20F) on the left side of the picture is connected to the base (Base) pin (31F) of the transistor, and the guide post is located in the middle of the picture ( 20F) is connected to the emitter (Emitter) pin (31F) of the transistor, and the lead post (20F) on the right side of the picture is connected to the collector pin (31F) of the transistor. The type of the transistor provided in the splicing unit (1F) can be marked on the surface of the pedestal (10F) by means of engraving or sticker so as to be selected by the user.
進一步參見第十及十一圖所示,為疊接單元(1G)的第七實施例,其中該疊接單元(1G)上間隔設有複數個導接柱(20G),該電子元件(30G)包含複數段金屬導線(32G),每一段金屬導線(32G)連接相鄰的兩導接柱(20G),令此疊接單元(1G)在進行電路模擬時,可當做一電線使用。Further referring to the tenth and eleventh figures, a seventh embodiment of the splicing unit (1G), wherein the splicing unit (1G) is provided with a plurality of guiding posts (20G) spaced apart, the electronic component (30G) ) A plurality of metal wires (32G) are included, and each metal wire (32G) is connected to two adjacent conductive posts (20G), so that the splicing unit (1G) can be used as a wire when performing circuit simulation.
進一步參見第十二圖所示,為疊接單元(1I)的第八實施例,其中該疊接單元(1I)上設有六個導接柱(20I),該電子元件(30I)則為一具有六接腳(31I)的積體電路(Integrated Circuit,IC),使該六接腳(31I)分別與該六導接柱(20I)相接,令此疊接單元(1I)在進行電路模擬時,可當做一積體電路來使用。Further referring to the twelfth figure, which is an eighth embodiment of the splicing unit (1I), wherein the splicing unit (1I) is provided with six guiding posts (20I), and the electronic component (30I) is An integrated circuit (IC) having a six-pin (31I), the six pins (31I) are respectively connected to the six-lead posts (20I), so that the splicing unit (1I) is in progress When the circuit is simulated, it can be used as an integrated circuit.
進一步參見第十三及十四圖所示,為本發明之疊接單元(1J)的另一種較佳實施態樣,其中該疊接單元(1J)之基座(10J)的外型係如傳統樂高玩具之積木單元般,為一底面具開口的空心塊體,該基座(10J)之一頂面間隔突伸且排列成型有複數個結合塊(11J),另於該基座(10J)內部設有複數個間隔排列的定位柱(12J),使一疊接單元(1J)之基座(10J)的結合塊(11J)可迫緊定位於另一疊接單元(1J)之基座(10J)的內環壁面與定位柱(12J)之間,或迫緊定位於各定位柱(12J)之間,達到相對組接的效果;此外,於該基座(10J)之外環壁面上間隔內凹成型有複數個對位槽(13J),各對位槽(13J)的兩端分別貫穿該基座(10J)之頂面與底面,又,前述導電件係呈導電片(14J)之型態而分別設於各對位槽(13J)內,該導電片(14J)的一端凸出於該基座(10J)的頂面,導電片(14J)的另一端則內凹於該基座(10J)的對位槽(13J)之中,而設於該基座(10J)內之電子元件(30A)(以電阻器為例)的接腳(31A)則分別延伸而與各導電片(14J)相接;進一步參見第十五圖所示,當將二個上述實施態樣的疊接單元(1J)相對組接時,該位於下方之疊接單元(1J)的導電片(14J),其凸出於基座(10J)頂面的一端恰可對應嵌設於該位於上方之疊接單元(1J)的基座(10J)對位槽(13J)中,進而與該位於上方之疊接單元(1J)的導電片(14J)相接,達到使該二疊接單元(1J)內所設之電子元件(30A)(30E)達到電路導通的效果。Further, referring to the thirteenth and fourteenth drawings, another preferred embodiment of the splicing unit (1J) of the present invention, wherein the pedestal (10J) of the splicing unit (1J) is shaped as Like the building block unit of the traditional Lego toy, it is a hollow block with a bottom mask opening. One of the top surfaces of the base (10J) is spaced apart and is formed with a plurality of bonding blocks (11J), and the base (10J) A plurality of spaced apart positioning posts (12J) are disposed inside, so that the bonding block (11J) of the base (10J) of one of the overlapping units (1J) can be firmly positioned on the base of the other overlapping unit (1J) Between the inner ring wall of the seat (10J) and the positioning post (12J), or between the positioning posts (12J), to achieve the effect of relative assembly; in addition, outside the base (10J) A plurality of alignment grooves (13J) are formed in the wall surface, and two ends of each of the alignment grooves (13J) respectively penetrate the top surface and the bottom surface of the base (10J), and the conductive members are conductive sheets ( 14J) is respectively disposed in each of the alignment grooves (13J), one end of the conductive sheet (14J) protrudes from the top surface of the base (10J), and the other end of the conductive sheet (14J) is concave. Alignment groove (13J) of the base (10J) The pins (31A) of the electronic component (30A) (taking a resistor as an example) disposed in the susceptor (10J) extend respectively to be in contact with the conductive sheets (14J); As shown in FIG. 5, when the two overlapping units (1J) of the above embodiment are oppositely assembled, the conductive sheet (14J) of the lower overlapping unit (1J) protrudes from the base (10J). The one end of the top surface corresponds to the conductive groove of the pedestal (10J) aligning groove (13J) embedded in the upper splicing unit (1J), and further to the upper splicing unit (1J) When (14J) is connected, the electronic component (30A) (30E) provided in the two-stacking unit (1J) is brought into electrical conduction.
配合參見第十六圖所示,為一簡單的電路設計圖,其具有一電源(41)、一電阻(45)及一發光二極體(43),且三者間利用電線(44)以並聯方式相接,進一步參見第十八及十九圖所示,係利用一設有電源的疊接單元(1H)、一設有電阻器的疊接單元(1A)、一設有發光二極體的疊接單元(1E)、及設有金屬導線的疊接單元(1G)以模擬上述的電路設計圖的方式,將各疊接單元(1H)(1A)(1E)(1G)於一疊接板(80)上進行組接,該疊接板(80)上間隔排列成型有複數個組接塊(81),可使各疊接單元(1A)(1B)(1C)(1D)(1E)(1F)(1G)(1H)(1I)(1J)與該組接塊(81)相對扣接而定位於該疊接板(80)上,以便於組裝;另配合參見第十九圖所示,為一可使發光二極體進行閃爍的電路設計圖,其具有一電源(41)、二電容(42)、二發光二極體(43)、二電阻(45)及二電晶體(46),各電子元件間利用電線(44)相接,進一步參見第二十圖所示,此電路設計圖同樣可利用一設有電源的疊接單元(1H)、二個設有電容器的疊接單元(1D)、二個設有發光二極體的疊接單元(1E)、二個設有電阻器的疊接單元(1A)、二個設有電晶體的疊接單元(1F)及設有金屬導線的疊接單元(1G),於一疊接板(80)上進行組接,其中,在需要組裝之疊接單元()數量較多的情況下,還可利用僅設有導接柱或導電片的疊接單元來調整該設有電子元件(30A)(30C)(30D)(30E)(30F)(30I)之疊接單元(1A)(1C)(1D)(1E)(1F)(1I)的高度位置,使其可交錯設置。As shown in Fig. 16, a simple circuit design diagram has a power supply (41), a resistor (45) and a light-emitting diode (43), and the wires (44) are used in the three. Parallel connection, further see the eighteenth and nineteenth drawings, using a power supply stacking unit (1H), a splicing unit (1A) with a resistor, and a light-emitting diode The splicing unit (1E) of the body and the splicing unit (1G) provided with the metal wires are used to simulate the above circuit design diagram, and each splicing unit (1H) (1A) (1E) (1G) is The splicing plate (80) is assembled on the splicing plate (80), and a plurality of splicing blocks (81) are arranged at intervals, so that the splicing units (1A) (1B) (1C) (1D) can be arranged. (1E) (1F) (1G) (1H) (1I) (1J) is fastened to the stacking plate (80) with respect to the set of blocks (81) for easy assembly; As shown in FIG. 9 , it is a circuit design diagram for flashing a light-emitting diode, which has a power source (41), two capacitors (42), two light-emitting diodes (43), two resistors (45) and two. The transistor (46) is connected by wires (44) between the electronic components, and further see the figure 20 The circuit design diagram can also utilize a power supply splicing unit (1H), two splicing units (1D) with capacitors, two splicing units (1E) with light emitting diodes, and two A splicing unit (1A) provided with a resistor, two splicing units (1F) provided with a transistor, and a splicing unit (1G) provided with a metal wire are assembled on a stacking plate (80) Wherein, in the case where the number of the splicing units (A) to be assembled is large, the electronic component (30A) (30C) (30D) may be adjusted by using a splicing unit provided only with a lead post or a conductive sheet. (30E) (30F) (30I) The height position of the splicing unit (1A) (1C) (1D) (1E) (1F) (1I) so that it can be staggered.
如上所述,由於各疊接單元(1H)(1D)(1E)(1A)(1F)(1G)間的組合方式就好像在堆疊積木般,且本發明將該金屬導線(32A)(32G)或各式電子元件(30A)(30C)(30D)(30E)(30F)(30G)及其接腳(31A)(31C)(31D)(31E)(31F)設於基座(10A)中,讓各電子元件(30A)(30C)(30D)(30E)(30F)(30G)可經由該導接柱(20A)(20B)(20C)(20D)(20E)(20F)(20G)連接並形成電路導通之型態,故不會刺傷使用者,特別適合孩童使用,讓孩童從小便可在遊戲的過程中培養對電子電路設計的興趣。As described above, since the combination between the respective splicing units (1H) (1D) (1E) (1A) (1F) (1G) is as in the case of stacking blocks, and the present invention has the metal wire (32A) (32G) ) or various electronic components (30A) (30C) (30D) (30E) (30F) (30G) and its pins (31A) (31C) (31D) (31E) (31F) are provided on the base (10A) In the middle, let each electronic component (30A) (30C) (30D) (30E) (30F) (30G) pass through the guiding post (20A) (20B) (20C) (20D) (20E) (20F) (20G) The connection and formation of the circuit conduction mode, so it will not stab the user, especially suitable for children, so that children can cultivate interest in electronic circuit design during the game from childhood.
再者,上述設有各種不同電子元件(30A)(30C)(30D)(30E)(30F)(30G)的疊接單元(1A)(1B)(1C)(1D)(1E)(1F)(1G)(1H)間,可藉由使其基座(10A)(10C)(10F)具有不同的顏色以進行區分,同時還可便於孩童辨認及拿取,讓孩童依照說明書上所示圖片的型態進行組裝,即可完成一簡單的電子裝置,從遊戲中培養學習的熱趣。Furthermore, the above-mentioned splicing unit (1A) (1B) (1C) (1D) (1E) (1F) provided with various electronic components (30A) (30C) (30D) (30E) (30F) (30G) is provided. (1G) (1H) can be distinguished by making its base (10A) (10C) (10F) have different colors, and it is also convenient for children to recognize and take, so that children can follow the pictures shown in the manual. The type of assembly is complete, and a simple electronic device can be completed to cultivate the interest in learning from the game.
以上所述僅是本發明的較佳實施例而已,並非對本發明作任何形式上的限制,雖然本發明已以較佳實施例揭露如上,然而並非用以限定本發明,任何熟悉本專業的技術人員,在不脫離本發明技術方案的範圍內,當可利用上述揭示的技術內容作出些許更動或修飾為等同變化的等效實施例,但凡是未脫離本發明技術方案的內容,依據本發明的技術實質對以上實施例所作的任何簡單修改、等同變化與修飾,均仍屬於本發明技術方案的範圍內。The above is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention. Although the present invention has been disclosed in the above preferred embodiments, it is not intended to limit the present invention, any technology that is familiar with the present invention. A person skilled in the art can make some modifications or modifications to equivalent embodiments by using the above-disclosed technical contents without departing from the technical scope of the present invention. It is still within the scope of the technical solution of the present invention to make any simple modifications, equivalent changes and modifications to the above embodiments.
(1A)(1B)(1C)(1D)(1E)(1F)(1G)(1H)(1I)(1J)...疊接單元(1A) (1B) (1C) (1D) (1E) (1F) (1G) (1H) (1I) (1J). . . Stacking unit
(10A)(10C)(10F)(10J)...基座(10A) (10C) (10F) (10J). . . Pedestal
(11J)...結合塊(11J). . . Combined block
(12J)...定位柱(12J). . . Positioning column
(13J)...對位槽(13J). . . Alignment slot
(14J)...導電片(14J). . . Conductive sheet
(20A)(20B)(20C)(20D)(20E)(20F)(20G)(20I)...導接柱(20A) (20B) (20C) (20D) (20E) (20F) (20G) (20I). . . Guide post
(21A)...母扣部(21A). . . Female button
(22A)...公扣部(22A). . . Male button
(23A)...剖槽(23A). . . Groove
(30A)(30C)(30D)(30E)(30F)(30G)(30I)...電子元件(30A) (30C) (30D) (30E) (30F) (30G) (30I). . . Electronic component
(31A)(31C)(31D)(31E)(31F)(31I)...接腳(31A) (31C) (31D) (31E) (31F) (31I). . . Pin
(32A)(32G)...金屬導線(32A) (32G). . . Metal wire
(41)...電源(41). . . power supply
(42)...電容(42). . . capacitance
(43)...發光二極體(43). . . Light-emitting diode
(44)...電線(44). . . wire
(45)...電阻(45). . . resistance
(46)...電晶體(46). . . Transistor
(50)...基板(50). . . Substrate
(51)...插孔(51). . . Jack
(60)...電線(60). . . wire
(70A)(70B)(70C)(70D)...電子元件(70A) (70B) (70C) (70D). . . Electronic component
(71A)(71B)(71C)(71D)...接腳(71A) (71B) (71C) (71D). . . Pin
(80)...疊接板(80). . . Laminated board
(81)...組接塊(81). . . Group block
第一圖為本發明第一實施例之立體分解圖。The first figure is an exploded perspective view of the first embodiment of the present invention.
第二圖為本發明第一實施例之立體透視圖。The second figure is a perspective perspective view of the first embodiment of the present invention.
第三圖為本發明第一實施例側視之部分元件剖面圖。The third figure is a cross-sectional view of a part of the side view of the first embodiment of the present invention.
第四圖為本發明第二實施例之立體透視圖。The fourth figure is a perspective perspective view of a second embodiment of the present invention.
第五圖為本發明第三實施例側視之部分元件剖面圖。Figure 5 is a cross-sectional view showing a part of the side view of the third embodiment of the present invention.
第六圖為本發明第三實施例之上視圖。Figure 6 is a top plan view of a third embodiment of the present invention.
第七圖為本發明第四實施例側視之部分元件剖面圖。Figure 7 is a cross-sectional view showing a part of the side view of the fourth embodiment of the present invention.
第八圖為本發明第五實施例側視之部分元件剖面圖。Figure 8 is a cross-sectional view showing a part of the side view of the fifth embodiment of the present invention.
第九圖為本發明第六實施例之上視圖。The ninth drawing is a top view of a sixth embodiment of the present invention.
第十圖為本發明第七實施例之立體透視圖。Figure 11 is a perspective perspective view of a seventh embodiment of the present invention.
第十一圖為本發明第七實施例之底視圖。Figure 11 is a bottom view of a seventh embodiment of the present invention.
第十二圖為本發明第八實施例之上視圖。Figure 12 is a top plan view of an eighth embodiment of the present invention.
第十三圖為本發明另一實施態樣之立體外觀圖。Figure 13 is a perspective view of another embodiment of the present invention.
第十四圖為本發明另一實施態樣之底視圖。Figure 14 is a bottom view of another embodiment of the present invention.
第十五圖為本發明另一實施態樣於進行組接時之立體分解圖。The fifteenth figure is an exploded perspective view of another embodiment of the present invention when it is assembled.
第十六圖為一簡單的電路設計圖。Figure 16 shows a simple circuit design.
第十七圖為利用本發明之組合來模擬如第十六圖之電路圖的俯視圖。Figure 17 is a plan view showing a circuit diagram of the sixteenth embodiment using a combination of the present invention.
第十八圖為利用本發明之組合來模擬如第十六圖之電路圖的立體外觀圖。Fig. 18 is a perspective view showing a circuit diagram of the sixteenth embodiment using a combination of the present invention.
第十九圖為一可使發光二極體進行閃爍之電路設計圖。The nineteenth figure is a circuit design diagram for flashing the LED.
第二十圖利用本發明之組合來模擬如第十九圖之電路圖的俯視圖。Figure 20 is a top plan view of a circuit diagram as in the nineteenth embodiment using a combination of the present invention.
第二十一圖為現有技術之立體外觀圖。The twenty-first figure is a perspective view of the prior art.
(1A)...疊接單元(1A). . . Stacking unit
(10A)...基座(10A). . . Pedestal
(20A)...導接柱(20A). . . Guide post
(21A)...母扣部(21A). . . Female button
(22A)...公扣部(22A). . . Male button
(23A)...剖槽(23A). . . Groove
(30A)...電子元件(30A). . . Electronic component
(31A)...接腳(31A). . . Pin
Claims (10)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW099108660A TWI500002B (en) | 2010-03-24 | 2010-03-24 | Interlocking unit having an electronic component and teaching aid of an electrical circuit assembled with the interlocking units |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
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| TW099108660A TWI500002B (en) | 2010-03-24 | 2010-03-24 | Interlocking unit having an electronic component and teaching aid of an electrical circuit assembled with the interlocking units |
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| TW201133417A TW201133417A (en) | 2011-10-01 |
| TWI500002B true TWI500002B (en) | 2015-09-11 |
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| TW099108660A TWI500002B (en) | 2010-03-24 | 2010-03-24 | Interlocking unit having an electronic component and teaching aid of an electrical circuit assembled with the interlocking units |
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| US6944475B1 (en) * | 2000-08-30 | 2005-09-13 | Northrop Grumman Corporation | Transceiver-processor building block for electronic radio systems |
| US7203074B1 (en) * | 2003-07-28 | 2007-04-10 | Intellect Lab, Llc | Electronic circuit building block |
| TW200809581A (en) * | 2006-08-02 | 2008-02-16 | Her Inn Chyn | Mouse-like devices constructed with electronic building blocks |
| CN201063214Y (en) * | 2007-07-06 | 2008-05-21 | 李健 | Electronic building block for electricity demonstration |
-
2010
- 2010-03-24 TW TW099108660A patent/TWI500002B/en active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6944475B1 (en) * | 2000-08-30 | 2005-09-13 | Northrop Grumman Corporation | Transceiver-processor building block for electronic radio systems |
| US7203074B1 (en) * | 2003-07-28 | 2007-04-10 | Intellect Lab, Llc | Electronic circuit building block |
| TW200809581A (en) * | 2006-08-02 | 2008-02-16 | Her Inn Chyn | Mouse-like devices constructed with electronic building blocks |
| CN201063214Y (en) * | 2007-07-06 | 2008-05-21 | 李健 | Electronic building block for electricity demonstration |
Also Published As
| Publication number | Publication date |
|---|---|
| TW201133417A (en) | 2011-10-01 |
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