TWI596614B - Memory writing method - Google Patents

Description

Memory writing method

The invention relates to a method for writing a memory, in particular to a related technology for improving the service life and reliability of a memory.

A flash memory commonly used in the market, which comprises a single level cell (SLC) memory, a third level cell (TLC) memory, and one of the single order cell memories. The memory unit can store one data bit, and one memory unit of the third-order unit memory can store three data bits, so the data capacity of the third-order unit memory is three times the data capacity of the single-stage unit memory; Each of the plurality of pages of the unit memory can be divided into a plurality of page pairs, each page pairing includes a strong page and a weak page, the strong Pagination and weak pagination are respectively used to store data. The weak pagination has a lower number of readable and writable times and a slower data access speed. The strong pagination has a higher number of reading and writing times and a faster data access speed. On average, the paging of the single-order unit memory has a higher number of readable and writable times than the paging of the third-order unit memory, and a faster data access speed.

For example, Chinese Patent No. I403906 "Flash Memory Device and Operation Method" thereof is mainly connected to a host by a flash memory device, which comprises a multi-level unit flash memory and a controller; the multi-level unit The flash memory includes an acceleration zone and a normal zone, the acceleration zone includes a plurality of first blocks, the normal zone includes a plurality of second blocks, and the first block and the second block respectively include multiple a page, wherein the pages are divided into a strong page with a high number of data read and write times and a weak page with a low number of data read and write times; the controller receives a piece of data to be written into the flash memory device from the host, and Determining whether the data is important data, if the data is important data, writing the data into the strong page of each first block of the acceleration zone, and if the data is not the data, the data is written In the paging of each of the second blocks of the normal zone, in this way, the data storage areas of the two different blocks can be simultaneously used.

However, the flash memory commonly used in the market and the flash memory device in the above patents all have the problem of short service life, especially in the way that the acceleration zone improves the number and speed of reading and writing, and it is easier to accelerate the memory. The loss, as shown in FIG. 8 and FIG. 9 , is a performance curve of a single-order unit memory page and a third-order unit memory page, respectively, including a horizontal axis and a vertical axis, respectively representing the memory. The usage amount and the bit error, when the bit error rate reaches the upper limit, the page W' of the memory cannot be corrected and is used again. Therefore, as shown in FIG. 10, when the single-order unit memory is used After the weak page W' and the weak page W' of the third-order unit memory are page paired, the bit error rate of the memory will rapidly climb to the upper limit (for example, 70), resulting in a shortened memory life. The reliability of the data deteriorates; therefore, the above-mentioned prior art does have a need to propose a better solution.

In view of the above deficiencies of the prior art, the main object of the present invention is to provide a method for writing a memory by dispersing and pairing data of different performance attributes to achieve the purpose of improving the service life and reliability of the memory.

The main technical means to achieve the above purpose is to write the memory in the above method, mainly to make a memory space have a plurality of single-stage storage units and a plurality of third-order storage units, wherein each single-stage storage unit, three The order storage units respectively have a plurality of pagings, each of the pagings has a performance attribute, and the paging of each of the three single-level storage units corresponds to the paging of a third-order storage unit, and performs the following steps: respectively obtaining the single-order storage units The paging attribute of the paging, third-order storage unit is used to judge the pros and cons; the paging data of the single-level storage unit is written into the different performance attribute pages of the corresponding third-order storage unit.

The method is implemented in the memory space, and when the memory space is used for data writing, the performance attributes of the paging of the single-order storage unit and the paging of the third-order storage unit are respectively obtained, and the single-stage storage is determined. The pros and cons of the paging of the unit, the paging data of the single-level storage unit with the performance attribute being excellent/bad is written into the paging of the third-order storage unit with different performance attributes being inferior/excellent, so that the information of different performance attributes is paged. Dispersed pairing, data of the same performance attribute will not be paired, thus improving the memory life and the reliability of the memory data.

Referring to FIG. 1 and FIG. 2, a controller 10 is coupled to a memory space 20 having a plurality of single-stage storage units and a plurality of third-order storages. The controller 10 is configured to manage each storage unit in the memory space 20; in this embodiment, the plurality of single-stage storage units include a first single-stage storage unit 21 and a second single-stage storage unit 22 And a third single-stage storage unit 23, and the first single-stage storage unit 21, the second single-stage storage unit 22, and the third single-stage storage unit 23 are respectively connected to a third-order storage unit 24.

All of the above-mentioned single-stage storage units 21, 22, 23, and third-order storage units 24 have a plurality of pages, each page has a performance attribute, and the pages of each single-stage storage unit 21, 22, 23 correspond to one page. In the embodiment, the controller 10 is connected to one or more performance checklists 30, and the controller 10 obtains the single-stage storage units 21 of the memory space 20, respectively. The paging attribute of the 22, 23 page and the third-order storage unit 24 are sequentially edited in the performance check table 30 for the controller 10 to judge the merits and demerits, and then the single-stage storage unit 21, 22, The paged data of 23 is written into the different performance attribute pages of the corresponding third-order storage unit 24, so that the data of the different performance attribute pages are distributed.

Referring to FIG. 2, the controller 10 obtains the paging of the first single-stage storage unit 21, the paging of the second single-stage storage unit 22, and the paging of the third single-stage storage unit 23. The performance attribute of the paging of the third-order storage unit 24, and determining, according to the performance attribute, that the paging of the single-stage storage units 21, 22, 23 and the paging of the third-order storage unit 24 respectively belong to a vulnerable weak page W or Is a high-reliability strong page S, if the page of the third-order storage unit 24 is a weak page W, and the pages of the single-stage storage units 21, 22, 23 are strong pages S, the strong pages S The data is written into the weak page W, respectively.

As shown in FIG. 3, if the page of the third-order storage unit 24 is a strong page S, and the pages of the single-stage storage units 21, 22, 23 are weak pages W, the data of the weak pages W are respectively The strong page S is written into the strong page S; wherein the controller 10 sequentially edits the obtained performance attributes in the performance check table 30 to determine its merits and demerits (S/W), and maps the strong page S to the weak page. W, or the weak page W corresponds to the strong page S, the performance check table 30 can be in the form of the following chart:         <TABLE border="1" borderColor="#000000" width="_0001"><TBODY><tr><td> order</td><td> single-stage storage unit</td><td> </td ><td> Third-order storage unit</td></tr><tr><td> 1 </td><td><img wi="155" he="210" file="02_image001.gif" img -format="jpg"></img><img wi="154" he="89" file="02_image002.gif" img-format="jpg"></img>S1 </td><td> S1 </td></tr><tr><td> 2 </td><td><img wi="154" he="87" file="02_image003.gif" img-format="jpg"> </img>S2 </td><td> S2 </td></tr><tr><td> 3 </td><td> S3 </td><td> W1 </td></ Tr><tr><td> 4 </td><td> S4 </td><td> W2 </td></tr><tr><td> 5 </td><td> S5 </ Td><td> S3 </td></tr><tr><td> 6 </td><td> W1 </td><td> S4 </td></tr><tr><td ><img wi="4" he="41" file="02_image004.gif" img-format="jpg"></img></td><td><img wi="4" he="41 " file="02_image005.gif" img-format="jpg"></img></td><td><img wi="3" he="41" file="02_image006.gif" img-format= "jpg"></img></td></tr></TBODY></TABLE> in the above chart, which includes the paging of the single-stage storage units 21, 22, 23, and the third-order storage unit 24 Paging effect Attributes (S/W) are arranged in the performance lookup table 30 in the order of 1, 2, 3, 4, 5, 6, respectively, when the controller 10 determines that the single-order storage unit of the order 1, 2 is strong. The pages S1, S2 can be traced to the weak pages W1, W2 corresponding to the third-order storage unit of the order 3, 4, and when the controller 10 determines that the single-stage storage unit of the sequence 6 is the weak page W1, Then, the strong page S1 corresponding to the third-order storage unit of the sequence 1 is looked up, and the above-mentioned corresponding manner can improve the judgment efficiency of the controller 10.       

Further, when the controller 10 determines that the page of the first single-stage storage unit 21, the page of the second single-stage storage unit 22, and the page of the third single-stage storage unit 23 are respectively weak pages W, The data of the weak page W is written into the strong page S, and the pages of the single-stage storage units 21, 22, 23 are marked as a used weak page W, when the orders are sequentially determined. When the page of the storage unit 21, 22, 23 is not the weak page W, the search continues to search for other available weak pages W. Similarly, the controller 10 determines the page of the first single-stage storage unit 21, the second single stage. When the page of the storage unit 22 and the page of the third single-stage storage unit 23 are respectively strong page S, the data of the strong page S is written into the weak page W, and the single-stage storage units 21, 22 are The page of 23 is marked as a used strong page S. When the pages of the single-stage storage units 21, 22, 23 that are sequentially determined are not strong pages S, the search continues for other available strong pages S. .

To illustrate the application effect of the present invention, please refer to the figures shown in FIG. 4 and FIG. 5, which are respectively a page of a single-order unit memory and a page efficiency performance of a third-order unit memory, including a horizontal axis and a The vertical axis, which represents the amount of memory used (unit: column/page), the vertical axis represents a bit error rate (unit: bit error), when the bit error rate reaches a threshold (such as 70), All the pages of the memory space 20 can no longer be corrected and reused. Therefore, the paged data of all the single-stage storage units 21, 22, 23 is written into the corresponding third-order storage unit 24 by the above preferred embodiment of the present invention. In the different performance attribute pages, as shown in FIGS. 5 and 6, the weak page W of all the single-stage storage units 21, 22, 23 is page-paired with the strong page S of the third-order unit memory, and all single-stage storage is performed. The strong page S of the cells 21, 22, 23 is page-paired with the weak page W of the third-order cell memory, so that the data of different performance attribute pages (S/W) is distributed and the bit error rate of the memory space 20 is made. Effectively below the threshold, making the note The lifetime of the body space 20 is increased.

According to the specific application mode and description of the above preferred embodiment of the present invention, a memory writing method can be summarized, which mainly causes the memory space 20 to have a plurality of single-stage storage units and a plurality of third-order storage units, wherein each The single-stage storage unit and the third-order storage unit respectively have a plurality of pagings, each paging has a performance attribute, and the paging of each three single-order storage units corresponds to the paging of a third-order storage unit, and performs the following steps: The above performance checklist (S71); respectively obtaining the paging attribute of the single-order storage unit and the paging attribute of the third-order storage unit to judge the pros and cons (S72); determining the paging of the third-order storage unit according to the performance attribute belongs to High-reliability strong paging or fragile weak paging: if the paging of the third-order storage unit is strong paging, further determining whether the paging of the single-level storage unit is a vulnerable weak paging, if the third-order storage unit If the page break is a weak page, further determining whether the page of the single-stage storage unit is a high-reliability strong page (S73); When the paging of the single-stage storage unit is a weak paging, the weak paging data is written into the strong paging, and when the paging of the single-level storage unit is a strong paging, the strong paging data is written into the weak paging (S74); When the pages of the single-stage storage units are weakly paged, the weak paged data is written into the strong page, and the pages of the single-stage storage units are marked as used weak pages, when the orders are When the page of the order storage unit is a strong page, the strong page data is written into the weak page, and the pages of the single-level storage unit are marked as used strong pages (S75).

The present invention can be implemented in the memory space 20 by the above method. When the memory space 20 performs data writing and separately obtains the paging attribute performance of the paging and the third-order storage unit of the single-order storage unit, the judgment is performed by determining the performance attributes of the paging of the single-stage storage unit. The pros and cons of the paging of the single-order storage unit, the paging attribute of the single-level storage unit whose performance attribute is strong page is written into the paging of the third-order storage unit whose performance attribute is weakly paged, or the performance attribute is weakly paged. The paged data of the single-stage storage unit is written into the page of the third-order storage unit whose performance attribute is strong page, so that the data of the different performance attribute pages are distributed and paired, and the data of the same performance attribute is not paired, so Improve memory life and reliability of memory data.

10‧‧‧ Controller

20‧‧‧ memory space

21,22,23‧‧‧ single-stage storage unit

24‧‧‧ third-order storage unit

30‧‧‧Performance Checklist

1 is a block diagram of a system architecture in accordance with a preferred embodiment of the present invention. 2 is an application state diagram of a preferred embodiment of the present invention. 3 is another application state diagram of a preferred embodiment of the present invention. 4 is a page diagram of a single-stage storage unit in accordance with a preferred embodiment of the present invention. FIG. 5 is a page diagram of a third-order storage unit in accordance with a preferred embodiment of the present invention. 6 is a page alignment curve diagram of a single-stage/third-order memory cell in accordance with a preferred embodiment of the present invention. 7 is a flow chart of a method in accordance with a preferred embodiment of the present invention. Figure 8 is a page plot of a known single-order unit memory. Figure 9 is a breakdown of a known third-order unit memory. Figure 10 is a diagram of a paged pairing curve of known single-order/third-order unit memories.

10‧‧‧ Controller

20‧‧‧ memory space

21,22,23‧‧‧ single-stage storage unit

24‧‧‧ third-order storage unit

30‧‧‧Performance Checklist

Claims (8)

A memory writing method mainly comprises a memory space having a plurality of single-order storage units and a plurality of third-order storage units, wherein each single-stage storage unit and third-order storage unit respectively have a plurality of pages, each page Having a performance attribute, and having the paging of each of the three single-order storage units correspond to the paging of a third-order storage unit, and performing the following steps: respectively obtaining the paging attribute performance of the paging of the single-order storage unit and the paging of the third-order storage unit In order to judge the merits and demerits; the paged data of the single-order storage unit is written into the different performance attribute pages of the corresponding third-order storage unit; wherein, when the above step is performed, the paged data of the single-order storage unit is written into the corresponding third-order When the paging of the different performance attributes of the storage unit is included, the following first or second manner is further included: wherein the first manner includes the following steps: obtaining the paging of the single-order storage unit and the third-order storage unit The performance attribute of the paging; determining whether the paging of the third-order storage unit belongs to a strong page with high reliability according to the performance attribute; The page of the third-order storage unit is a strong page, and further determines whether the page of the single-stage storage unit belongs to a vulnerable page; when the page of the single-stage storage unit is a weak page, the page is weakly The data is written into the strong page of the third-order storage unit. In the second mode, the method includes the following steps: obtaining the paging attribute of the single-level storage unit and the paging attribute of the third-order storage unit; determining the performance attribute according to the performance attribute Whether the page of the third-order storage unit belongs to a vulnerable page that is vulnerable; If the page of the third-order storage unit is a weak page, further determining whether the page of the single-stage storage unit belongs to a high-reliability strong page; when the page of the single-stage storage unit is a strong page, the strong The paged data is written into the weak page of the third-order storage unit. The method for writing a memory according to claim 1, wherein when the step of performing the paging attribute of the paging of the single-stage storage unit and the paging attribute of the third-order storage unit are respectively performed, the method further includes the following steps: establishing more than one performance. The lookup table; the paging attribute of the single-stage storage unit and the paging attribute of the third-order storage unit are sequentially edited in the performance checklist. The method for writing a memory according to claim 1, wherein when the single-level storage unit pages are weakly paged, the weak paged data is written into the strong page, and the single-stage storage units are The pagination is marked as a weak page that has been used. The method for writing a memory according to claim 1, wherein when the page of the single-stage storage unit is a strong page, the strong page data is written into the weak page, and the single-order storage unit is The tabs are marked as a strong page that has been used. The method for writing a memory according to claim 3, wherein when the page of the single-stage storage unit is a strong page, the strong page data is written into the weak page, and the single-order storage unit is used. The tabs are marked as a strong page that has been used. The method for writing a memory according to claim 4, wherein when the page of the single-stage storage unit is a weak page, the weak page data is written into the strong page, and the single-stage storage unit is The tabs are marked as a weak page that has been used. The method for writing a memory according to claim 1, wherein when determining whether the paging of the single-order storage units belongs to a vulnerable page that is vulnerable, the method further comprises the following steps: When the pages of the single-stage storage units are not weakly paged, the search for other available weak pages continues. The method for writing a memory according to claim 1, wherein when determining whether the page of the single-order storage unit belongs to a high-reliability strong page, further comprising the step of: paging when the single-stage storage unit If it is not strong, then continue to search for other available strong pages.