TWI581229B - Liquid crystal display and mtehod for operating the same - Google Patents

Description

Liquid crystal display and its operation method

The present invention relates to a display and a method of operating the same, and more particularly to a liquid crystal display and a method of operating the same.

With the rapid advancement of optoelectronic technology and semiconductor technology, flat panel displays such as liquid crystal displays (LCDs) have flourished in recent years. Due to the low power consumption, non-radiation and high space utilization of liquid crystal displays, liquid crystal displays have become the mainstream of today's flat panel display market. Since the liquid crystal display panel itself does not have the function of emitting light, the backlight module must be disposed behind the liquid crystal display panel to provide a surface light source required for the liquid crystal display panel. The liquid crystal display panel adjusts the light transmittance and the reflectance of the light source by controlling the rotation angle of the liquid crystal to display an image.

In general, the angle of rotation of the liquid crystal is determined by the voltage difference across the liquid crystal layer and the direction of the electric field. In order to avoid the phenomenon of liquid crystal polarization, liquid crystal displays usually adopt a polarity inversion driving method, that is, alternately driving liquid crystals with voltages of different polarities (such as positive polarity and negative polarity) at different times. The polarity of the voltage applied to the liquid crystal is determined by the direction of the electric field applied to the liquid crystal. Assuming that the voltage of the pixel electrode is greater than the common voltage, the liquid crystal is driven by a positive voltage, and vice versa, by a negative voltage.

However, when the liquid crystal display panel displays a dynamic picture, the grayscale value displayed by each pixel on the liquid crystal display panel may continuously change. In the case where the gray scale value is changed, the liquid crystal of the liquid crystal display panel may be polarized, that is, the liquid crystal in the pixel may have a DC voltage remaining, so that the afterimage is displayed on the liquid crystal display panel.

The invention provides a liquid crystal display and a method for operating the same, which utilizes polarity signal inversion to reduce the chance of liquid crystal display panel generating image sticking. Also, the flicker caused by the inversion of the polarity signal is suppressed.

The invention provides a method for operating a liquid crystal display, comprising the following steps. It is determined whether the first screen and the second screen connected to the first screen are dynamic images. When the first picture and the second picture are dynamic pictures, the timing controller of the liquid crystal display performs polarity inversion on the polarity signal such that the polarity signal corresponding to the first picture is the same as the polarity signal of the second picture. When writing the second screen to the liquid crystal display panel of the liquid crystal display, the energy written to the liquid crystal display panel is reduced.

In an embodiment of the invention, the step of reducing the energy written to the liquid crystal display panel comprises: shortening the pulse width of the output enable signal or the gate clock signal to shorten the plurality of scan signals output to the liquid crystal display panel Pulse width.

In an embodiment of the invention, the method of operating the liquid crystal display further comprises the following steps. When the screen update rate of the liquid crystal display is reduced to be smaller than the threshold value of the first screen update rate, the pulse width of the output enable signal or the gate clock signal is set to be the first pulse width. When the screen update rate of the liquid crystal display is increased to be greater than the threshold value of the second screen update rate, the pulse width of the output enable signal or the gate clock signal is set to be the second pulse width. The first picture update rate threshold is greater than the second picture update rate threshold, and the first pulse width is greater than the second pulse width.

In an embodiment of the invention, the method of operating the liquid crystal display further comprises the following steps. When the operating temperature of the liquid crystal display is reduced to less than the first temperature threshold, the pulse width of the output enable signal or the gate clock signal is set to be the third pulse width. When the operating temperature of the liquid crystal display increases to be greater than the second temperature threshold, the pulse width of the output enable signal or the gate clock signal is set to be the fourth pulse width. The first temperature threshold is greater than the second temperature threshold, and the third pulse width is greater than the fourth pulse width.

In an embodiment of the invention, the step of reducing the energy written to the liquid crystal display panel includes delaying the latch signal to shorten the output time of the plurality of pixel voltages output to the liquid crystal display panel.

In an embodiment of the invention, the method of operating the liquid crystal display further comprises the following steps. When the picture update rate of the liquid crystal display is reduced to be smaller than the first picture update rate threshold, the delay time of the latch signal is set to be the first delay time. When the screen update rate of the liquid crystal display is increased to be greater than the second screen update rate threshold, the delay time of the latch signal is set to be the second delay time. The first screen update rate threshold is greater than the second screen update rate threshold, and the first delay time is greater than the second delay time.

In an embodiment of the invention, the method of operating the liquid crystal display further comprises the following steps. When the operating temperature of the liquid crystal display is reduced to less than the first temperature threshold, the delay time of setting the latch signal is the third delay time. When the operating temperature of the liquid crystal display increases to be greater than the second temperature threshold, the delay time of the latch signal is set to be the fourth delay time. The first temperature threshold is greater than the second temperature threshold, and the third delay time is less than the fourth delay time.

In an embodiment of the invention, the step of reducing the energy written to the liquid crystal display panel comprises: reducing a grayscale value corresponding to the plurality of pixel voltages output to the liquid crystal display panel.

In an embodiment of the invention, the method of operating the liquid crystal display further comprises the following steps. When the picture update rate of the liquid crystal display is reduced to be smaller than the threshold value of the first picture update rate, the gray scale value corresponding to the pixel voltages is decreased by the first gray level value. When the picture update rate of the liquid crystal display is increased to be greater than the threshold value of the second picture update rate, the gray scale value corresponding to the pixel voltages is decreased by the second gray level value. The first picture update rate threshold is greater than the second picture update rate threshold, and the first gray level value is greater than the second gray level value.

In an embodiment of the invention, the method of operating the liquid crystal display further comprises the following steps. When the operating temperature of the liquid crystal display is reduced to less than the first temperature threshold, the grayscale value corresponding to the pixel voltages is decreased by the third grayscale value. When the operating temperature of the liquid crystal display increases to be greater than the second temperature threshold, the grayscale value corresponding to the pixel voltages is decreased by the fourth grayscale value. The first temperature threshold is greater than the second temperature threshold, and the third grayscale value is less than the fourth grayscale value.

In an embodiment of the present invention, the operating method of the liquid crystal display further includes: when one of the first picture and the second picture is a static picture, stopping polarity inversion of the polarity signal.

In an embodiment of the invention, the step of determining whether the first picture is a dynamic picture comprises the following steps. When the first picture and the plurality of consecutive previous pictures are different from each other, it is determined that the first picture is a dynamic picture. When the first picture is the same as two adjacent pictures in the previous pictures, it is determined that the first picture is a still picture. Wherein, the first picture is to continue these previous pictures

The invention also provides a liquid crystal display comprising a liquid crystal display panel, a gate driver, a source driver and a timing controller. The gate driver is coupled to the liquid crystal display panel for outputting a plurality of scan signals to the liquid crystal display panel. The source driver is coupled to the liquid crystal display panel for outputting a plurality of pixel voltages to the liquid crystal display panel. The timing controller is coupled to the gate driver and the source driver for receiving the first picture and the second picture connecting the first picture, and determining whether the first picture and the second picture are dynamic pictures. When the first picture and the second picture are dynamic pictures, the timing controller performs polarity inversion on the polarity signal outputted to the source driver such that the polarity signal corresponding to the first picture is the same as the polarity signal of the second picture. When writing the second screen to the liquid crystal display panel, the timing controller adjusts the output states of these scan signals or these pixel voltages to reduce the energy written to the liquid crystal display panel.

In one embodiment of the invention, the timing controller shortens the pulse width of the output enable signal or the gate clock signal output to the gate driver to shorten the pulse width of the scan signals output to the liquid crystal display panel.

In an embodiment of the present invention, when the screen update rate of the liquid crystal display is reduced to be smaller than the threshold value of the first screen update rate, the timing controller sets the pulse width of the output enable signal or the gate clock signal to be the first pulse. Wave width. When the picture update rate of the liquid crystal display increases to be greater than the second picture update rate threshold, the timing controller sets the pulse width of the output enable signal or the gate clock signal to the second pulse width. The first picture update rate threshold is greater than the second picture update rate threshold, and the first pulse width is greater than the second pulse width.

In an embodiment of the invention, when the operating temperature of the liquid crystal display is reduced to less than the first temperature threshold, the timing controller sets the pulse width of the output enable signal or the gate clock signal to a third pulse width. When the operating temperature of the liquid crystal display increases to be greater than the second temperature threshold, the timing controller sets the pulse width of the output enable signal or the gate clock signal to be the fourth pulse width. The first temperature threshold is greater than the second temperature threshold, and the third pulse width is greater than the fourth pulse width.

In one embodiment of the invention, the timing controller delays the latch signal output to the source driver to reduce the output time of the pixel voltages output to the liquid crystal display panel.

In an embodiment of the invention, when the picture update rate of the liquid crystal display is reduced to be less than the first picture update rate threshold, the timing controller sets the delay time of the latch signal to the first delay time. When the picture update rate of the liquid crystal display increases to be greater than the second picture update rate threshold, the timing controller sets the delay time of the latch signal to the second delay time. The first screen update rate threshold is greater than the second screen update rate threshold, and the first delay time is greater than the second delay time.

In an embodiment of the invention, when the operating temperature of the liquid crystal display is reduced to less than the first temperature threshold, the timing controller sets the delay time of the latch signal to a third delay time. When the operating temperature of the liquid crystal display increases to be greater than the second temperature threshold, the timing controller sets the delay time of the latch signal to a fourth delay time. The first temperature threshold is greater than the second temperature threshold, and the third delay time is less than the fourth delay time.

In an embodiment of the invention, the timing controller controls the source driver to reduce the grayscale value corresponding to the plurality of pixel voltages output to the liquid crystal display panel.

In an embodiment of the invention, when the picture update rate of the liquid crystal display is reduced to be smaller than the first picture update rate threshold, the timing controller controls the source driver to lower the gray scale value corresponding to the pixel voltages by the first Grayscale value. When the picture update rate of the liquid crystal display increases to be greater than the second picture update rate threshold, the timing controller controls the source drivers to lower the grayscale values corresponding to the pixel voltages by the second grayscale value. The first picture update rate threshold is greater than the second picture update rate threshold, and the first gray level value is greater than the second gray level value.

In an embodiment of the invention, when the operating temperature of the liquid crystal display is reduced to be less than the first temperature threshold, the timing controller controls the source driver to lower the gray scale value corresponding to the pixel voltage by a third gray scale. value. When the operating temperature of the liquid crystal display increases to be greater than the second temperature threshold, the timing controller controls the source drivers to lower the grayscale values corresponding to the pixel voltages by the fourth grayscale value. The first temperature threshold is greater than the second temperature threshold, and the third grayscale value is less than the fourth grayscale value.

In an embodiment of the invention, when one of the first picture and the second picture is a still picture, the timing controller stops polarity inversion of the polarity signal.

In an embodiment of the invention, when the first picture and the plurality of consecutive previous pictures are different from each other, the timing controller determines that the first picture is a dynamic picture. When the first picture is the same as two adjacent pictures in the previous pictures, the timing controller determines that the first picture is a still picture. The first picture is to continue these previous pictures.

In summary, the liquid crystal display and the method for operating the same according to the embodiments of the present invention are both dynamic pictures on the first picture and the second picture, and the timing controller performs polarity inversion on the polarity signal to make the polarity signal corresponding to the first picture. The polarity signal is the same as the second picture to suppress the polarization of the liquid crystal of the liquid crystal display panel. Moreover, the timing controller adjusts the scan signals or the pixel voltages to reduce the energy written to the liquid crystal display panel by the second screen to avoid flickering of the screen caused by the liquid crystal display panel displaying the brighter second screen.

The above described features and advantages of the present invention will be more apparent from the following description.

1 is a schematic diagram of a system of a liquid crystal display according to an embodiment of the invention. Referring to FIG. 1 , in the present example, the liquid crystal display 100 includes a timing controller 110 , a gate driver 120 , a source driver 130 , a liquid crystal display panel 140 , and a gamma voltage generator 150 . The timing controller 110 is coupled to the gate driver 120, the source driver 130, and the gamma voltage generator 150. The gate driver 120 and the source driver 130 are coupled to the liquid crystal display panel 140, respectively. The gamma voltage generator 150 is configured to generate a plurality of gamma voltages VG to the source driver 130.

The timing controller 110 sequentially receives a plurality of consecutive previous pictures PF, a first picture F1, and a second picture F2, and outputs a plurality of display materials DD and latches according to the previous pictures PF, the first picture F1, and the second picture F2. The signal TP and the polarity signal POL are supplied to the source driver 130 to control the source driver 130 to output a plurality of pixel voltages VP to the liquid crystal display panel 140 according to the received gamma voltage VG. Moreover, the timing controller 110 outputs the gate clock signal CPV and the output enable signal OE to the gate driver 120 to control the gate driver 120 to output the plurality of scan signals SC to the liquid crystal display panel 140. The liquid crystal display panel 140 receives the pixel voltage VP by being driven by the scan signal SC, and further displays an image corresponding to the previous picture PF, the first picture F1, or the second picture F2.

Further, the timing controller 110 determines whether the first screen F1 and the second screen F2 are dynamic images. When the first picture F1 and the second picture F2 are both dynamic pictures, the timing controller 110 may perform polarity inversion on the polarity signal POL such that the polarity signal POL corresponding to the first picture F1 and the second picture F2 correspond to the polarity signal POL. To be the same, the probability that the liquid crystal of the liquid crystal display panel 140 is polarized when the liquid crystal display panel 140 displays a dynamic picture can be reduced. On the other hand, when one of the first picture F1 and the second picture F2 is determined to be a still picture, the timing controller 110 stops the polarity inversion of the polarity signal POL.

In the case where the polarity signal POL corresponding to the first picture F1 is the same as the polarity signal POL corresponding to the second picture F2, each pixel (not shown) of the liquid crystal display panel 140 may have the same polarity charging phenomenon, that is, each The polarities of the pixel voltages VP corresponding to the pixels in the first picture F1 and the second picture F2 will be the same. In the case of charging in the same polarity, the second screen F2 displayed on the liquid crystal display panel 140 is brighter, so that the screen flickers may occur. Therefore, when writing the second screen F2 to the liquid crystal display panel 140, the timing controller 110 adjusts the output states of the scan signals SC or the pixel voltages VP to reduce the energy written to the liquid crystal display panel 140, thereby The liquid crystal display panel 140 is prevented from displaying a brighter second picture F2 to cause picture flicker.

In the present embodiment, the gamma voltage generator 150 is controlled to generate a plurality of gamma voltages VG by the timing controller 110, but in other embodiments, the gamma voltage generators 150 can operate independently to generate these gamma voltages. VG, the embodiment of the present invention is not limited thereto, that is, the gamma voltage generator 150 may not be coupled to the timing controller 110.

2 is a timing diagram of the polarity signal of FIG. 1 in accordance with an embodiment of the present invention. Referring to FIG. 1 and FIG. 2, in the embodiment, the timing controller 110 can determine whether the first screen F1 is a dynamic picture according to the previous picture PF and the first picture F1. Further, when the previous picture PF and the first picture F1 are different from each other, the timing controller 110 may determine that the first picture F1 is a dynamic picture; otherwise, when the previous picture PF is adjacent to the first picture F1 When the pictures are the same, the timing controller 110 can determine that the first picture F1 is a still picture. In other words, the timing controller 110 determines that the Nth picture is a dynamic picture when counting to consecutive N pictures, and the timing controller 110 determines that the Nth picture is a static picture, where N is a positive integer. .

Similarly, the second picture F2 can also determine whether it is a dynamic picture by using the previous picture PF and the first picture F1. In the case where both the first picture F1 and the second picture F2 are dynamic pictures, the timing controller 110 performs polarity inversion on the polarity signal POL of the second picture F2 so that the polarity signal POL corresponding to the first picture F1 is made. The polarity signal POL corresponding to the second picture F2 is the same. In other words, when the timing controller 110 counts that the consecutive N pictures are different pictures and the N+1th picture (corresponding to the second picture F2) is also different from the Nth picture (corresponding to the first picture F1), the timing control The inverter 110 performs polarity inversion on the polarity signal POL of the (N+1)th picture; otherwise, the timing controller 110 does not perform polarity inversion on the polarity signal POL of the (N+1)th picture.

FIG. 3A is a timing diagram of the output enable signal and the scan signal of FIG. 1 according to an embodiment of the invention. Referring to FIG. 1 and FIG. 3A, in the embodiment, the output enable signal OE1 and the scan signal SC1 are corresponding to the first picture F1, and the output enable signal OE2 and the scan signal SC2 are corresponding to the second picture F2. According to the above, when the timing controller 110 performs polarity inversion on the polarity signal POL corresponding to the second picture F2, the timing controller 110 adjusts the output states of the scan signals SC or the pixel voltages VP to reduce the writing to the liquid crystal. The energy of the panel 140 is displayed.

In the present embodiment, the first way to reduce the energy written to the liquid crystal display panel 140 is to shorten the pulse width of these scan signals SC. Since the pulse width of the scan signal SC determines the time when each pixel (not shown) of the liquid crystal display panel 140 receives the pixel voltages VP, the pulse width of the scan signals SC can be determined by the liquid crystal display panel 140. The magnitude of the energy, that is, shortening the pulse width of these scan signals SC, reduces the energy written to the liquid crystal display panel 140.

In the present embodiment, it is assumed that the pulse width of the scan signals SC is controlled by the pulse width of the output enable signal OE, and therefore the pulse width of the output enable signal OE2 output by the timing controller 110 in the second screen F2. It will be smaller than the pulse width of the output enable signal OE1 outputted in the first picture F1, so that the pulse width of the scan signal SC2 output by the gate driver 120 in the second picture F2 will be smaller than the scan output in the first picture F1. The pulse width of the signal SC1, for example, the pulse width of the scan signal SC2 is 0.3 times the pulse width of the scan signal SC1. The pulse width of the scan signal SC2 may be determined according to the difference in brightness of the screen between the first picture F1 and the second picture F2, that is, the greater the difference in brightness of the picture, the narrower the pulse width of the scan signal SC2, when the brightness of the picture is different. The smaller the scan pulse SC2, the wider the pulse width.

In another embodiment, the pulse width of the scan signals SC can be controlled by the pulse width of the gate clock signal CPV, and the timing controller 110 can output the gate clock signal in the second picture F2. The pulse width of the CPV may be smaller than the pulse width of the gate clock signal CPV outputted in the first picture F1, so that the pulse width of the scan signal SC2 output by the gate driver 120 in the second picture F2 is smaller than the first The pulse width of the scanning signal SC1 outputted in the screen F1.

In still another embodiment, the pulse width of the scan signals SC can be simultaneously controlled by the pulse widths of the output enable signal OE and the gate clock signal CPV, and the timing controller 110 can simultaneously make the second picture F2. The pulse width of the output enable signal OE2 and the gate clock signal CPV of the intermediate output may be smaller than the pulse width of the output enable signal OE1 and the gate clock signal CPV outputted in the first picture F1.

In addition, the screen update rate of the liquid crystal display 100 varies depending on the area, and the difference in the screen update rate affects the charging time of the liquid crystal display surface 140, that is, the pulse that affects the output enable signal OE and the gate clock signal CPV. Wave width. FIG. 3B is a schematic diagram showing the adjustment of the setting of the liquid crystal display 100 according to an embodiment of the invention. Referring to FIG. 3B, in general, the screen update rate of the liquid crystal display 100 is approximately 50 Hz or 60 Hz. Therefore, the pulse width of the enable signal OE2 and the gate clock signal CPV outputted in the second screen F2 can be adjusted to different pulse widths according to different screen update rates, and the first screen update rate threshold can be set. The FA and the second picture update rate threshold FB determine the pulse width of the adjusted enable signal OE2 and the gate clock signal CPV. The first picture update rate threshold FA is set here to be greater than the second picture update rate threshold FB, the first picture update rate threshold is, for example, 57 Hz, and the second picture update rate threshold is, for example, 52 Hz. Moreover, the first screen update rate threshold and the second screen update rate threshold may be away from the screen update rate to be determined to avoid a boundary effect.

Further, when the screen update rate of the liquid crystal display 100 is reduced to be smaller than the first screen update rate threshold FA, the timing controller 110 sets the output enable signal OE2 and/or the gate clock outputted in the second screen F2. The pulse width of the signal CPV is a large pulse width (corresponding to the first pulse width P1). When the screen update rate of the liquid crystal display 100 is increased to be greater than the second screen update rate threshold FB, the timing controller 110 sets the pulse of the output enable signal OE2 and/or the gate clock signal CPV outputted in the second screen F2. The pulse width is a small pulse width (corresponding to the second pulse width P2).

Moreover, when the liquid crystal display device 100 is initially operated, its operating temperature rises from a lower operating temperature to a higher operating temperature with time, and the difference in operating temperature affects the rotational speed of the liquid crystal of the liquid crystal display surface 140, that is, the influence The degree of flicker caused by the second screen F2 is displayed. FIG. 3C is a schematic diagram showing the adjustment of the setting of the liquid crystal display 100 according to another embodiment of the present invention. Referring to FIG. 3C, in general, the operating temperature of the liquid crystal display 100 will rise to a higher operating temperature during normal operation when the device is turned on. Therefore, the pulse width of the enable signal OE2 and the gate clock signal CPV outputted in the second screen F2 may be adjusted according to the operating temperature of the liquid crystal display 100 to the lower operating temperature or the higher operating temperature. Different pulse widths are set, and the first temperature threshold TA and the second temperature threshold TB can be set to determine the pulse width of the set enable signal OE2 and the gate clock signal CPV. The first temperature threshold TA and the second temperature threshold TB are between the lower operating temperature and the higher operating temperature, and the first temperature threshold TA is greater than the second temperature threshold TB. Moreover, the first temperature threshold TA and the second temperature threshold TB may be away from the operating temperature to be determined to avoid a boundary effect.

Further, when the operating temperature of the liquid crystal display 100 is reduced to less than the first temperature threshold TA, the timing controller 110 sets the output enable signal OE2 and/or the gate clock signal CPV outputted in the second screen F2. The pulse width is a large pulse width (corresponding to the third pulse width P3). When the operating temperature of the liquid crystal display 100 increases to be greater than the second temperature threshold TB, the timing controller 110 sets the pulse width of the output enable signal OE2 and/or the gate clock signal CPV outputted in the second screen F2 to be Smaller pulse width (corresponding to the fourth pulse width P4).

In addition, in some embodiments, the liquid crystal display 100 can simultaneously set the pulse width of the enable signal OE2 and the gate clock signal CPV outputted in the second screen F2 according to the screen update rate and the operating temperature.

4 is a timing diagram of the scan signal and the latch signal of FIG. 1 in accordance with an embodiment of the present invention. Referring to FIG. 1 and FIG. 4, in the embodiment, the latch signal TP1 corresponds to the first screen F1, and the latch signal TP2 corresponds to the second screen F2. According to the above, when the timing controller 110 performs polarity inversion on the polarity signal POL corresponding to the second picture F2, the timing controller 110 adjusts the output states of the scan signals SC or the pixel voltages VP to reduce the writing to the liquid crystal. The energy of the panel 140 is displayed.

In the present embodiment, the second way to reduce the energy written to the liquid crystal display panel 140 is to delay the latch signal TP output to the source driver 130. Since the source driver 130 is controlled by the latch signal TP to receive the display material DD, the timing of the latch signal TP affects the output time of the pixel voltage VP. That is, the output time of the pixel voltage VP can be shortened by delaying the latch signal TP outputted to the source driver 130, so that the energy written to the liquid crystal display panel 140 can be reduced. In other words, when the timing controller 110 writes the second screen F2 to the liquid crystal display panel 140, the latch signal TP is delayed by a delay time D, such as the delay time D indicated by the latch signals TP1 and TP2. The delay time D may be determined according to the difference in the brightness of the screen between the first picture F1 and the second picture F2, that is, the greater the difference in brightness of the picture, the longer the delay time D, and the smaller the difference in brightness of the picture, the shorter the delay time D .

Further, since the difference in the screen update rate affects the charging time of the liquid crystal display surface 140, the first screen update rate threshold value and the second screen update rate threshold value can be set to determine the delay time D of the set latch signal TP2. Further, when the screen update rate of the liquid crystal display 100 is reduced to be smaller than the first screen update rate threshold, the timing controller 110 sets the delay time D of the latch signal TP2 outputted in the second screen F2 to be a large delay. Time (corresponding to the first delay time). When the screen update rate of the liquid crystal display 100 is increased to be greater than the second screen update rate threshold, the timing controller 110 sets the delay time D of the latch signal TP2 outputted in the second screen F2 to be a small delay time (corresponding to the first Second delay time).

Moreover, since the difference in operating temperature of the liquid crystal display 100 affects the rotational speed of the liquid crystal of the liquid crystal display surface 140, the first temperature threshold value and the second temperature threshold value can be set to determine the delay time D of the set latch signal TP2. . Further, when the operating temperature of the liquid crystal display 100 is reduced to less than the first temperature threshold, the timing controller 110 sets the delay time D of the latch signal TP2 outputted in the second screen F2 to be a small delay time (corresponding to Third delay time). When the operating temperature of the liquid crystal display 100 increases to be greater than the second temperature threshold, the timing controller 110 sets the delay time D of the latch signal TP2 outputted in the second screen F2 to a larger delay time (corresponding to the fourth delay time). ).

In addition, in some embodiments, the liquid crystal display 100 can simultaneously set the delay time D of the latch signal TP2 outputted in the second screen F2 according to the screen update rate and the operating temperature.

Referring to FIG. 1 again, in the present embodiment, the third mode of reducing the energy written to the liquid crystal display panel 140 is to reduce the gray scale value corresponding to the pixel voltage VP output to the liquid crystal display panel 140. Since the pixel voltage VP determines the brightness (ie, gray scale value) displayed by the pixel (not shown) of the liquid crystal display panel 140, the gray scale value corresponding to the pixel voltage VP outputted to the liquid crystal display panel 140 can be lowered. The energy written to the liquid crystal display panel 140.

According to the above, when the timing controller 110 writes the second screen F2 to the liquid crystal display panel 140, the timing controller 110 can reduce the grayscale value corresponding to the display material DD. That is, if the original grayscale value corresponding to the display data DD is 100, the timing controller 110 can adjust the grayscale value corresponding to the display data DD to 99 when writing the second screen F2. Alternatively, when the timing controller 110 writes the second screen F2 to the liquid crystal display panel 140, the timing controller 110 can lower the voltage level of the gamma voltage VG corresponding to each grayscale value. That is, assuming that the gamma voltage VG corresponding to the grayscale value 100 is 8 volts, the timing controller 110 can set the gamma voltage VG corresponding to the grayscale value 100 to 7.9 volts when writing the second screen F2. The adjustment range of the grayscale value corresponding to the display data DD and the adjustment amplitude of the gamma voltage VG corresponding to each grayscale value may be determined according to the difference of the brightness of the screen of the first picture F1 and the second picture F2, that is, when The larger the difference in brightness of the picture, the larger the adjustment range. The smaller the difference in brightness of the picture, the smaller the adjustment range.

In addition, since the difference of the screen update rate affects the charging time of the liquid crystal display surface 140, the first screen update rate threshold and the second screen update rate threshold may be set to determine the gray scale value and gamma reduced by the display data DD. The voltage at which the voltage VG is lowered. Further, when the screen update rate of the liquid crystal display 100 is reduced to be smaller than the threshold value of the first screen update rate, the timing controller 110 sets a grayscale value corresponding to the display data DD of the second screen F2 (corresponding to the first grayscale value) The voltage that is reduced by more or the gamma voltage VG is higher, that is, the gray scale value (corresponding to the first gray scale value) reduced by the set pixel voltage VP is higher. When the screen update rate of the liquid crystal display 100 is increased to be greater than the second screen update rate threshold, the timing controller 110 sets a voltage with a lower gray scale value or a lower gamma voltage VG corresponding to the display data DD of the second screen F2. The lower, that is, the grayscale value (corresponding to the second grayscale value) reduced by the pixel voltage VP is set.

Moreover, since the difference in operating temperature of the liquid crystal display 100 affects the rotational speed of the liquid crystal of the liquid crystal display surface 140, the first temperature threshold value and the second temperature threshold value can be set to determine the gray scale value and the gamma reduced by the display data DD. The voltage that the voltage VG is reduced. Further, when the operating temperature of the liquid crystal display 100 is reduced to be less than the first temperature threshold, the timing controller 110 sets the grayscale value (corresponding to the third grayscale value) reduced corresponding to the display data DD of the second screen F2. Or the voltage reduced by the gamma voltage VG is lower. When the operating temperature of the liquid crystal display 100 increases to be greater than the second temperature threshold, the timing controller 110 sets a grayscale value (corresponding to the fourth grayscale value) corresponding to the reduced display data DD of the second screen F2 or a gamma voltage The voltage reduced by VG is higher.

In addition, in some embodiments, the liquid crystal display device 100 can simultaneously set the grayscale value reduced by the display data DD corresponding to the second screen F2 and the voltage reduced by the gamma voltage VG according to the screen update rate and the operating temperature.

FIG. 5 is a flow chart of a method of operating a liquid crystal display according to an embodiment of the invention. Referring to FIG. 5, in the embodiment, the method for operating the liquid crystal display includes the following steps. It is determined whether the first screen and the second screen connected to the first screen are dynamic images (step S510). When the first picture and the second picture are dynamic pictures, that is, the determination result of step S510 is YES, the timing controller of the liquid crystal display reverses the polarity of the polarity signal so that the polarity signal corresponding to the first picture is the same as the first picture. The polarity signal of the two pictures (step S520). When the second screen is written to the liquid crystal display panel of the liquid crystal display, the energy written to the liquid crystal display panel is lowered (step S530). When one of the first picture and the second picture is a still picture, that is, the determination result of step S510 is "NO", the polarity inversion of the polarity signal is stopped. For details of the foregoing steps, refer to the foregoing embodiments of FIG. 1 to FIG. 4, and details are not described herein again.

In summary, the liquid crystal display and the operation method thereof are both dynamic images on the first picture and the second picture, and the timing controller can perform polarity inversion on the polarity signal to make the polarity corresponding to the first picture. The signal is the same as the polarity signal of the second picture to reduce the chance that the liquid crystal of the liquid crystal display panel is polarized. At this time, the timing controller controls the source driver and/or the gate driver to reduce the energy written to the liquid crystal display panel to avoid flickering of the screen caused by the liquid crystal display panel displaying the brighter second screen.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims.

100. . . LCD Monitor

110. . . Timing controller

120. . . Gate driver

130. . . Source driver

140. . . LCD panel

150. . . Gamma voltage generator

CPV. . . Gate clock signal

D. . . delay

DD. . . Display data

F1. . . First picture

F2. . . Second screen

FA. . . First screen update rate threshold

FB. . . Second screen update rate threshold

OE, OE1, OE2. . . Output enable signal

P1. . . First pulse width

P2. . . Second pulse width

P3. . . Third pulse width

P4. . . Fourth pulse width

PF. . . Previous screen

POL. . . Polarity signal

SC, SC1, SC2. . . Scanning signal

TA. . . First temperature threshold

TB. . . Second temperature threshold

TP, TP1, TP2. . . Latch signal

VG. . . Gamma voltage

VP. . . Pixel voltage

S510, S520, S530, S540. . . step

1 is a schematic diagram of a system of a liquid crystal display according to an embodiment of the invention.

2 is a timing diagram of the polarity signal of FIG. 1 in accordance with an embodiment of the present invention.

FIG. 3A is a timing diagram of the output enable signal and the scan signal of FIG. 1 according to an embodiment of the invention.

FIG. 3B is a schematic diagram showing the adjustment of the setting of the liquid crystal display 100 according to an embodiment of the invention.

FIG. 3C is a schematic diagram showing the adjustment of the setting of the liquid crystal display 100 according to another embodiment of the present invention.

4 is a timing diagram of the scan signal and the latch signal of FIG. 1 in accordance with an embodiment of the present invention.

FIG. 5 is a flow chart of a method of operating a liquid crystal display according to an embodiment of the invention.

S510, S520, S530, S540. . . step

Claims (24)

A method for operating a liquid crystal display, comprising: determining whether a first picture and a second picture connected to the first picture are a dynamic picture; and when the first picture and the second picture are the dynamic picture, the liquid crystal display a timing controller performing a polarity inversion on a polarity signal such that a polarity signal corresponding to the first picture is the same as a polarity signal of the second picture; and writing a second picture to a liquid crystal display of the liquid crystal display At the time of the panel, the energy written to the liquid crystal display panel is lowered. The method of operating a liquid crystal display according to claim 1, wherein the step of reducing energy written to the liquid crystal display panel comprises: shortening a pulse width of an output enable signal or a gate clock signal to shorten The pulse width of the plurality of scanning signals output to the liquid crystal display panel. The method for operating a liquid crystal display according to claim 2, further comprising: setting the output enable signal or the gate when a screen update rate of the liquid crystal display is reduced to less than a first screen update rate threshold The pulse width of the polar clock signal is a first pulse width; and when the screen update rate of the liquid crystal display is increased to be greater than a second screen update rate threshold, the output enable signal or the gate is set The pulse width of the pulse signal is a second pulse width; wherein the first picture update rate threshold is greater than the second picture update rate threshold, and the first pulse width is greater than the second pulse width. The method for operating a liquid crystal display according to claim 2, further comprising: setting an output enable signal or the gate clock when an operating temperature of the liquid crystal display is reduced to less than a first temperature threshold The pulse width of the signal is a third pulse width; and when the operating temperature of the liquid crystal display increases to be greater than a second temperature threshold, setting the output enable signal or the pulse width of the gate clock signal And a fourth pulse width; wherein the first temperature threshold is greater than the second temperature threshold, and the third pulse width is greater than the fourth pulse width. The method of operating a liquid crystal display according to claim 1, wherein the step of reducing energy written to the liquid crystal display panel comprises: delaying a latch signal to shorten a plurality of pixel voltages output to the liquid crystal display panel Output time. The method for operating a liquid crystal display according to claim 5, further comprising: setting a delay time of the latch signal when the screen update rate of the liquid crystal display is reduced to less than a first screen update rate threshold a first delay time; and when the screen update rate of the liquid crystal display is increased to be greater than a second screen update rate threshold, setting a delay time of the latch signal to a second delay time; wherein the first screen The update rate threshold is greater than the second screen update rate threshold, and the first delay time is greater than the second delay time. The method for operating a liquid crystal display according to claim 5, further comprising: setting a delay time of the latch signal to a third when an operating temperature of the liquid crystal display is reduced to less than a first temperature threshold a delay time; and when the operating temperature of the liquid crystal display increases to be greater than a second temperature threshold, setting a delay time of the latch signal to a fourth delay time; wherein the first temperature threshold is greater than the second a temperature threshold, the third delay time being less than the fourth delay time. The method of operating a liquid crystal display according to claim 1, wherein the step of reducing energy written to the liquid crystal display panel comprises: reducing a grayscale value corresponding to a plurality of pixel voltages output to the liquid crystal display panel . The method for operating a liquid crystal display according to claim 8, further comprising: when the picture update rate of the liquid crystal display is reduced to less than a threshold value of the first picture update rate, corresponding to the pixel voltages The grayscale value is decreased by a first grayscale value; and when the screen update rate of the liquid crystal display is increased to be greater than a second screen update rate threshold, the grayscale value corresponding to the pixel voltages is decreased by a second a grayscale value; wherein the first screen update rate threshold is greater than the second screen update rate threshold, and the first grayscale value is greater than the second grayscale value. The method for operating a liquid crystal display according to claim 8 , further comprising: when the operating temperature of the liquid crystal display is reduced to less than a first temperature threshold, the gray scale value corresponding to the pixel voltages is Decrease a third gray scale value; and when the operating temperature of the liquid crystal display increases to be greater than a second temperature threshold, lowering the gray scale value corresponding to the pixel voltages by a fourth gray scale value; The first temperature threshold is greater than the second temperature threshold, and the third grayscale value is less than the fourth grayscale value. The method for operating a liquid crystal display according to claim 1, further comprising: stopping the polarity inversion of the polarity signal when one of the first picture and the second picture is a still picture. The method for operating a liquid crystal display according to claim 1, wherein the determining whether the first picture is the dynamic picture comprises: determining that the first picture and the plurality of consecutive previous pictures are different from each other A picture is the dynamic picture, wherein the first picture is a continuation of the previous pictures; and when the first picture is the same as two adjacent pictures in the previous pictures, determining that the first picture is a static picture. A liquid crystal display comprising: a liquid crystal display panel; a gate driver coupled to the liquid crystal display panel, and outputting a plurality of scan signals to the liquid crystal display panel; a source driver coupled to the liquid crystal display panel, and having a large output a pixel voltage to the liquid crystal display panel; and a timing controller coupled to the gate driver and the source driver, receiving a first picture and a second picture connecting the first picture, and determining the first Whether the picture and the second picture are a dynamic picture, wherein when the first picture and the second picture are the dynamic picture, the timing controller performs a polarity inversion on a polarity signal outputted to the source driver The polarity signal corresponding to the first picture is the same as the polarity signal of the second picture, and when the second picture is written to the liquid crystal display panel, the timing controller adjusts the scan signals or the pixel voltages The output state is to reduce the energy written to the liquid crystal display panel. The liquid crystal display of claim 13, wherein the timing controller shortens a pulse width of an output enable signal or a gate clock signal outputted to the gate driver to shorten output to the liquid crystal display The pulse width of the scan signals of the panel. The liquid crystal display of claim 14, wherein the timing controller sets the output enable signal or the gate when a picture update rate of the liquid crystal display is reduced to less than a first picture update rate threshold The pulse width of the clock signal is a first pulse width, and when the picture update rate of the liquid crystal display increases to be greater than a second picture update rate threshold, the timing controller sets the output enable signal or the The pulse width of the gate clock signal is a second pulse width, wherein the first picture update rate threshold is greater than the second picture update rate threshold, and the first pulse width is greater than the second pulse width. The liquid crystal display of claim 14, wherein the timing controller sets the output enable signal or the gate clock signal when an operating temperature of the liquid crystal display decreases to less than a first temperature threshold. The pulse width is a third pulse width, and when the operating temperature of the liquid crystal display increases to be greater than a second temperature threshold, the timing controller sets the output enable signal or the gate clock signal The pulse width is a fourth pulse width, wherein the first temperature threshold is greater than the second temperature threshold, and the third pulse width is greater than the fourth pulse width. The liquid crystal display of claim 13, wherein the timing controller delays a latch signal outputted to the source driver to shorten an output time of the pixel voltages outputted to the liquid crystal display panel. The liquid crystal display of claim 17, wherein the timing controller sets the delay time of the latch signal to be one when the screen update rate of the liquid crystal display is reduced to less than a first screen update rate threshold. a first delay time, and when the screen update rate of the liquid crystal display increases to be greater than a second screen update rate threshold, the timing controller sets the delay time of the latch signal to a second delay time, wherein the A picture update rate threshold is greater than the second picture update rate threshold, the first delay time being greater than the second delay time. The liquid crystal display of claim 17, wherein when the operating temperature of the liquid crystal display is reduced to less than a first temperature threshold, the timing controller sets the delay time of the latch signal to a third delay. Time, and when the operating temperature of the liquid crystal display increases to be greater than a second temperature threshold, the timing controller sets the delay time of the latch signal to a fourth delay time, wherein the first temperature threshold is greater than the a second temperature threshold, the third delay time being less than the fourth delay time. The liquid crystal display of claim 13, wherein the timing controller controls the source driver to reduce a grayscale value corresponding to the pixel voltages outputted to the liquid crystal display panel. The liquid crystal display of claim 20, wherein when a picture update rate of the liquid crystal display is reduced to less than a first picture update rate threshold, the timing controller controls the source driver to cause the pictures The gray scale value corresponding to the prime voltage is decreased by a first gray scale value, and when the screen update rate of the liquid crystal display is increased to be greater than a second screen update rate threshold, the timing controller controls the source driver to enable The grayscale value corresponding to the pixel voltage is decreased by a second grayscale value, wherein the first screen update rate threshold is greater than the second screen update rate threshold, and the first grayscale value is greater than the second grayscale value. The liquid crystal display of claim 20, wherein when the operating temperature of the liquid crystal display is reduced to less than a first temperature threshold, the timing controller controls the source driver to cause the pixel voltages to be Corresponding gray scale value is decreased by a third gray scale value, and when the operating temperature of the liquid crystal display increases to be greater than a second temperature threshold, the timing controller controls the source driver to correspond to the pixel voltages The grayscale value is decreased by a fourth grayscale value, wherein the first temperature threshold is greater than the second temperature threshold, and the third grayscale value is less than the fourth grayscale value. The liquid crystal display of claim 13, wherein when the one of the first picture and the second picture is a still picture, the timing controller stops performing the polarity inversion on the polarity signal. The liquid crystal display of claim 13, wherein when the first picture and the plurality of consecutive previous pictures are different from each other, the timing controller determines that the first picture is the dynamic picture, and when the first picture When the two adjacent pictures in the previous pictures are the same, the timing controller determines that the first picture is a static picture, wherein the first picture is to continue the previous pictures.