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TWI561995B - Load balancing in heterogeneous computing environments - Google Patents

Load balancing in heterogeneous computing environments

Info

Publication number
TWI561995B
TWI561995B TW100147983A TW100147983A TWI561995B TW I561995 B TWI561995 B TW I561995B TW 100147983 A TW100147983 A TW 100147983A TW 100147983 A TW100147983 A TW 100147983A TW I561995 B TWI561995 B TW I561995B
Authority
TW
Taiwan
Prior art keywords
load balancing
computing environments
heterogeneous computing
heterogeneous
environments
Prior art date
Application number
TW100147983A
Other languages
Chinese (zh)
Other versions
TW201243618A (en
Inventor
Jayanth N Rao
Eric C Samson
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US13/094,449 external-priority patent/US20120192200A1/en
Application filed by Intel Corp filed Critical Intel Corp
Publication of TW201243618A publication Critical patent/TW201243618A/en
Application granted granted Critical
Publication of TWI561995B publication Critical patent/TWI561995B/en

Links

TW100147983A 2011-04-26 2011-12-22 Load balancing in heterogeneous computing environments TWI561995B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US13/094,449 US20120192200A1 (en) 2011-01-21 2011-04-26 Load Balancing in Heterogeneous Computing Environments

Publications (2)

Publication Number Publication Date
TW201243618A TW201243618A (en) 2012-11-01
TWI561995B true TWI561995B (en) 2016-12-11

Family

ID=48093886

Family Applications (1)

Application Number Title Priority Date Filing Date
TW100147983A TWI561995B (en) 2011-04-26 2011-12-22 Load balancing in heterogeneous computing environments

Country Status (1)

Country Link
TW (1) TWI561995B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20150050135A (en) * 2013-10-31 2015-05-08 삼성전자주식회사 Electronic system including a plurality of heterogeneous cores and operating method therof

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050212805A1 (en) * 1999-12-22 2005-09-29 Intel Corporation Image rendering
US7093147B2 (en) * 2003-04-25 2006-08-15 Hewlett-Packard Development Company, L.P. Dynamically selecting processor cores for overall power efficiency
US20080115143A1 (en) * 2006-11-10 2008-05-15 International Business Machines Corporation Job Execution Method, Job Execution System, and Job Execution Program
US7386739B2 (en) * 2005-05-03 2008-06-10 International Business Machines Corporation Scheduling processor voltages and frequencies based on performance prediction and power constraints
US20090109230A1 (en) * 2007-10-24 2009-04-30 Howard Miller Methods and apparatuses for load balancing between multiple processing units
US20100153956A1 (en) * 2008-12-16 2010-06-17 International Business Machines Corporation Multicore Processor And Method Of Use That Configures Core Functions Based On Executing Instructions
US20110078702A1 (en) * 2008-06-11 2011-03-31 Panasonic Corporation Multiprocessor system

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050212805A1 (en) * 1999-12-22 2005-09-29 Intel Corporation Image rendering
US7093147B2 (en) * 2003-04-25 2006-08-15 Hewlett-Packard Development Company, L.P. Dynamically selecting processor cores for overall power efficiency
US7386739B2 (en) * 2005-05-03 2008-06-10 International Business Machines Corporation Scheduling processor voltages and frequencies based on performance prediction and power constraints
US20080115143A1 (en) * 2006-11-10 2008-05-15 International Business Machines Corporation Job Execution Method, Job Execution System, and Job Execution Program
US20090109230A1 (en) * 2007-10-24 2009-04-30 Howard Miller Methods and apparatuses for load balancing between multiple processing units
US20110078702A1 (en) * 2008-06-11 2011-03-31 Panasonic Corporation Multiprocessor system
US20100153956A1 (en) * 2008-12-16 2010-06-17 International Business Machines Corporation Multicore Processor And Method Of Use That Configures Core Functions Based On Executing Instructions

Also Published As

Publication number Publication date
TW201243618A (en) 2012-11-01

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees