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TWI560815B - Semiconductor packages, methods for fabricating the same and carrier structures - Google Patents

Semiconductor packages, methods for fabricating the same and carrier structures

Info

Publication number
TWI560815B
TWI560815B TW103116496A TW103116496A TWI560815B TW I560815 B TWI560815 B TW I560815B TW 103116496 A TW103116496 A TW 103116496A TW 103116496 A TW103116496 A TW 103116496A TW I560815 B TWI560815 B TW I560815B
Authority
TW
Taiwan
Prior art keywords
fabricating
methods
same
semiconductor packages
carrier structures
Prior art date
Application number
TW103116496A
Other languages
English (en)
Other versions
TW201543622A (zh
Inventor
Yan Heng Chen
chun tang Lin
Chieh Yuan Chi
Original Assignee
Siliconware Precision Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siliconware Precision Industries Co Ltd filed Critical Siliconware Precision Industries Co Ltd
Priority to TW103116496A priority Critical patent/TWI560815B/zh
Priority to CN201410312075.3A priority patent/CN105097760A/zh
Priority to US14/584,428 priority patent/US9548219B2/en
Publication of TW201543622A publication Critical patent/TW201543622A/zh
Application granted granted Critical
Publication of TWI560815B publication Critical patent/TWI560815B/zh

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
    • H05K1/0298—Multilayer circuits
    • H10W70/635—
    • H10W70/65—
    • H10W74/014—
    • H10W90/701—
    • H10W99/00—
    • H10W70/655—
    • H10W72/0198—
    • H10W72/072—
    • H10W72/252—
    • H10W74/00—
    • H10W74/117—
    • H10W74/15—
    • H10W90/724—
    • H10W90/734—

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Manufacturing & Machinery (AREA)
  • Geometry (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
TW103116496A 2014-05-09 2014-05-09 Semiconductor packages, methods for fabricating the same and carrier structures TWI560815B (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
TW103116496A TWI560815B (en) 2014-05-09 2014-05-09 Semiconductor packages, methods for fabricating the same and carrier structures
CN201410312075.3A CN105097760A (zh) 2014-05-09 2014-07-02 半导体封装件及其制法与承载结构
US14/584,428 US9548219B2 (en) 2014-05-09 2014-12-29 Semiconductor package and fabrication method thereof and carrier structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW103116496A TWI560815B (en) 2014-05-09 2014-05-09 Semiconductor packages, methods for fabricating the same and carrier structures

Publications (2)

Publication Number Publication Date
TW201543622A TW201543622A (zh) 2015-11-16
TWI560815B true TWI560815B (en) 2016-12-01

Family

ID=54368500

Family Applications (1)

Application Number Title Priority Date Filing Date
TW103116496A TWI560815B (en) 2014-05-09 2014-05-09 Semiconductor packages, methods for fabricating the same and carrier structures

Country Status (3)

Country Link
US (1) US9548219B2 (zh)
CN (1) CN105097760A (zh)
TW (1) TWI560815B (zh)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9443799B2 (en) * 2014-12-16 2016-09-13 International Business Machines Corporation Interposer with lattice construction and embedded conductive metal structures
US9929112B2 (en) * 2015-09-25 2018-03-27 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and method of manufacture
US9589941B1 (en) * 2016-01-15 2017-03-07 Taiwan Semiconductor Manufacturing Company, Ltd. Multi-chip package system and methods of forming the same
US9852971B1 (en) * 2016-06-09 2017-12-26 Advanced Semiconductor Engineering, Inc. Interposer, semiconductor package structure, and semiconductor process
US10381300B2 (en) * 2016-11-28 2019-08-13 Advanced Semiconductor Engineering, Inc. Semiconductor device package including filling mold via
TWI638434B (zh) * 2018-04-17 2018-10-11 國立臺灣師範大學 電子組件封裝結構
KR102652266B1 (ko) * 2019-01-31 2024-03-28 (주)포인트엔지니어링 다층 배선 기판 및 이를 포함하는 프로브 카드
KR102762976B1 (ko) 2020-01-03 2025-02-07 삼성전자주식회사 반도체 패키지

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6525414B2 (en) * 1997-09-16 2003-02-25 Matsushita Electric Industrial Co., Ltd. Semiconductor device including a wiring board and semiconductor elements mounted thereon
CN100350608C (zh) * 2004-01-09 2007-11-21 日月光半导体制造股份有限公司 多芯片封装体
DE102006049562A1 (de) * 2006-10-20 2008-04-24 Qimonda Ag Substrat mit Durchführung und Verfahren zur Herstellung desselben
JP5385682B2 (ja) * 2009-05-19 2014-01-08 新光電気工業株式会社 電子部品の実装構造
US8895440B2 (en) * 2010-08-06 2014-11-25 Stats Chippac, Ltd. Semiconductor die and method of forming Fo-WLCSP vertical interconnect using TSV and TMV
CN102005520B (zh) * 2010-10-29 2012-08-29 北京大学 一种led封装方法
CN202395033U (zh) * 2011-12-12 2012-08-22 日月光半导体制造股份有限公司 发光二极管封装构造
JP6282425B2 (ja) * 2012-10-29 2018-02-21 新光電気工業株式会社 配線基板の製造方法

Also Published As

Publication number Publication date
US20150325508A1 (en) 2015-11-12
TW201543622A (zh) 2015-11-16
US9548219B2 (en) 2017-01-17
CN105097760A (zh) 2015-11-25

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