TWI546855B - The process of raising the strength of silicon carrier board and its products - Google Patents

Description

Process for improving the strength of the load-bearing plate and its products

The invention relates to a process for improving the strength of a load-bearing plate and a product thereof, and more particularly to a process and a product thereof which can make the load-bearing plate have a strength and avoid the occurrence of fragmentation or damage in a subsequent process.

Wafer refers to a germanium wafer used in the fabrication of semiconductor circuit integrated circuits. Because of its circular shape, it is called a wafer.

Because the wafer will pass through the Through Silicon Vias Formation Process (TSV), and the via process is a laser process combined with a wet etching process, since the laser process requires consideration of quality and processing rate, The wafer is ground to a set thickness.

However, due to the reduced thickness of the polished wafer, the strength thereof will also decrease, so the yield of subsequent processes will also decrease. In the existing plating process, the stress due to the clamping electrode often occurs. Under the influence of other stresses, fragmentation or wafer damage occurs, so how to avoid fragmentation or wafer damage becomes a topic that various manufacturers can discuss.

In view of the above problems, the object of the present invention is to provide a process for improving the strength of a load-bearing plate and a product thereof, which are to improve the strength of the load-bearing plate by changing the structure of the load-bearing plate, thereby avoiding the subsequent loading of the load-bearing plate. In the process, due to the stress, the fragmentation or damage occurs, thereby improving the yield of the subsequent process.

In order to achieve the above object, the technical means of the present invention is to provide a process for improving the strength of a carrier board, comprising: providing a substrate; reducing the thickness of the substrate to a first set thickness; Forming at least one surface of the substrate as a rough surface and reducing the thickness of the substrate to a second set thickness; an insulating layer is formed on the rough surface, and at least one side of the insulating layer forms an insulating rough surface; A metal layer is formed on the insulating rough surface of the insulating layer, the metal layer having a third set thickness.

The present invention further provides a raft carrier comprising: a substrate having a second set thickness, at least one side of the substrate being a rough surface; at least one insulating layer disposed on the rough surface, the insulating layer At least one side is an insulating rough surface; and at least one metal layer is disposed on the insulating rough surface of the insulating layer, the metal layer having a third set thickness.

In summary, since the shape of at least one surface of the insulating layer is equal to or approximately the shape of the junction of the rough surface, the surface is an insulating rough surface, which can make the metal layer and the substrate more compact. Combine.

The thickness value of the third set thickness can be changed according to the size of the plurality of substrates, so that the metal layer having the third set thickness can make the tantalum carrier have a considerable strength, so that the tantalum carrier can be prevented from being reacted in the subsequent process. Under the influence of force, the situation of fragmentation or damage occurs, thereby improving the yield of subsequent processes.

S1~S5‧‧‧Steps

10‧‧‧Substrate

100‧‧‧ first side

101‧‧‧ second side

103‧‧‧First rough surface

104‧‧‧Second rough surface

11‧‧‧Insulation

110‧‧‧Insulated rough surface

12‧‧‧metal layer

12A‧‧‧ metal layer

1 is a schematic flow chart of a process for improving the strength of a load-bearing plate according to the present invention.

2 is a schematic view of a substrate.

3 is a schematic view of a substrate having at least one rough surface.

4 is a schematic view of a substrate having at least one insulating layer.

Figure 5 is a schematic view of a raft carrier of the present invention.

Figure 6 is another schematic view of the raft carrier of the present invention.

The embodiments of the present invention are described below by way of specific embodiments, and those skilled in the art can easily disclose the contents disclosed in the present specification. Other advantages and effects of the present invention are understood.

Referring to FIG. 1 and FIG. 2, the present invention is a process for improving the strength of a carrier board, comprising: S1, providing a substrate 10, for example, the size of the substrate 10 is 2 in, 3 in, 100 mm, 125 mm, 6 in, 8 in or 12 in, that is, the substrate 10 has a size of 2 to 12 in, and the substrate 10 has a thickness of 279 μm, 381 μm, 525 μm, 625 μm, 675 μm, 725 μm or 775 μm, that is, the substrate The thickness of 10 is 279 to 775 μm. The substrate 10 has a first surface 100 and a second surface 101, and the first surface 100 is opposite to the second surface 101. The substrate 10 is a carrier plate.

S2, performing a polishing process or a polishing process on the substrate 10. For example, if the first surface 100 is the front side of the substrate, the first surface 100 is subjected to a polishing process, and the polishing process can be a double-side polishing process. (double sided polishing, DSP), a chemical mechanical polishing (CMP) or a fixed-abrasive polishing (FAP) process.

If the second surface 101 is the back surface of the substrate, the second surface 101 is subjected to a polishing process, which can be a chemical mechanical polishing process.

Because the substrate 10 is subjected to the polishing process and the polishing process described above, the thickness of the substrate 10 is reduced to a first set thickness, and the first set thickness is 10 to 500 μm. For example, the first set thickness can be 10, 11, 12, 13, ..., 400, 401, 402, ..., 500 μm, that is, the first set thickness can be any one of 10 to 500 μm, but in order to avoid the specification of the present case too It is tedious, so only a few thickness descriptions are given. As with any of the above 10 to 500 μm thicknesses, including 10 or 500 μm, the present invention can be practically implemented.

As described above, the first surface 100 can be subjected to a polishing process. If the first surface 100 is a polishing process, the second surface 101 is a polishing process, so the polishing process and the polishing process can be performed according to the actual process. The first side 100 or the second side 101.

S3, performing an etching process on the substrate 10, as shown in FIG. 3 and FIG. 2, etching the first surface 100 or the second surface 101 of the substrate 10 such that the first surface 100 or the second surface 101 forms a Rough surface, if the first surface 101 is etched, the first surface 101 is formed as the first rough surface 103, and if the second surface 102 is etched, the second surface The surface 102 is formed as a second rough surface 104; or the first surface 100 and the second surface 101 of the substrate 10 are etched, and the first surface 100 and the second surface 101 form a first rough surface 103 and a second rough surface, respectively. 104.

Because the substrate 10 is subjected to the etching process described above, the thickness of the substrate 10 is reduced to a second set thickness, and the second set thickness is 1 to 495 μm. For example, the second set thickness is 1, 2, 3, 4, 5, ..., 380, 381, ... 495 μm, that is, the second set thickness can be any one of 1 to 495 μm, but in order to avoid the description of the present invention being too long, only The description of the thicknesses, as in any of the above-mentioned numerical thicknesses of 1 to 495 μm, including 1 or 495 μm, can be practically implemented in the present invention.

The etching process has an etching time of 20 seconds to 60 minutes. For example, the etching time can be 20 seconds, 25 seconds, 30 seconds, ... 60 seconds, 2 minutes, 3 minutes, ... 60 minutes, that is, The etching time is any one of 20 seconds to 60 minutes, as described above, and only a few etching time descriptions are given, like any of the aforementioned 20 seconds to 60 minutes, including 20 seconds. Or 60 minutes, the present invention can be practically implemented, especially first.

The etching process has a roughness of 0.02 to 5 μm. For example, the roughness can be 0.2, 0.21, 0.22, ..., 0.3, ..., 5 μm, that is, the roughness is 0.02 to 5 μm. The numerical unit, as described above, is exemplified by a few roughness descriptions, as in any of the aforementioned 0.02 to 5 μm digital units, including 0.02 μm or 5 μm, and the present invention can be practically implemented.

The uniformity of the etching process is less than 6%. For example, the uniformity can be equal to any of 0.001%, 1%, 1.5%, and 5.99%.

The etching rate of the etching process is from 0.1 μm/sec to 10 μm/sec. For example, the etching rate can be any one of 0.11 μm/sec, 0.12 μm/sec, . . . , 10 μm/sec.

As described above, the rough surface, the first rough surface 103 or the second rough surface 104 is a particle junction, an angular junction or a pit junction. These junctions can be obtained by observing a rough surface by a scanning electron microscope (SEM).

S4, as shown in FIG. 4, at least one insulating layer 11 is formed on at least one rough surface, and the insulating layer 11 is formed on the rough surface by a high temperature oxidation method or a deposition method, such as the above S3, rough surface. The one surface of the insulating layer 11 has any of the above-mentioned various junctions, so that the surface of the insulating layer 11 facing the rough surface and the surface away from the rough surface are identical or approximately the shape of the junction of the insulating layer. Therefore, at least one side of the insulating surface 11 forms an insulating rough surface 110.

If the rough surface is formed on either or both sides of the substrate as described in S3, if the rough surface is formed only on a single surface of the substrate, as described above, the insulating layer on the side of the substrate having no rough surface The surface away from the substrate is a smooth surface. Similarly, if the rough surface is located on two sides of the substrate, the insulating layer 11 on the two rough surfaces is equal to or approximately the same as the insulating layer. The shape of the junction.

S5, as shown in FIG. 5, a metal layer 12 is formed on the insulating rough surface 110 of the insulating layer 11. The metal layer 12 is formed on the insulating layer 11 by a vapor deposition method and a sputtering method. The vapor deposition method is a chemical vapor deposition method.

The metal layer has a third set thickness. The metal layer 12 is formed by stacking two different metal layers. One metal layer is a titanium layer, and the other metal layer is a copper layer. The third set thickness is a titanium layer. The sum of the thickness and the thickness of the copper layer.

If the titanium layer has a thickness of 0.07 to 0.3 μm, for example, any one of 0.07 to 0.3 μm, including 0.07 μm or 0.3 μm, the present invention can be practically implemented. In the embodiment, the thickness is preferably 0.1, 0.15 or 0.2 μm.

If it is a copper layer, its thickness is 0.2 to 1.5 μm, for example, any one of 0.2 to 1.5 μm, including 0.2 μm or 1.5 μm, the present invention can be practically implemented, especially In the embodiment, the thickness is preferably 0.3, 0.5, 0.6, 0.9, 1, 1.2 or 1.4 μm.

As shown in FIG. 5, the surface of the insulating layer 11 away from the substrate 10 may be caused by the first rough surface 102 or the second rough surface 103, so that the surface forms the insulating rough surface 110. Similarly, when the metal layer 12 is formed. When the insulating rough surface 110 of the insulating layer 11 is on, the side of the metal layer 12 away from the insulating layer 12 may have an irregular undulation or approximation. The insulating rough surface 110 of the insulating layer 11.

Referring to FIG. 6 , since the metal layer 12A is formed by vapor deposition or sputtering, the side of the metal layer 12A away from the insulating layer 11 is a smooth surface.

Referring to FIG. 2, the present invention is a carrier board comprising a substrate 10, two insulating layers 11 and two metal layers 12.

The substrate 10 has a first rough surface 103 and a second rough surface 104.

The two insulating layers 11 are respectively located on the first rough surface 103 and the second rough surface 104, and at least one surface of each insulating layer 11 is an insulating rough surface 110.

Each of the metal layers 12 is respectively disposed on the insulating rough surface 110 of each of the insulating layers 12, and the titanium layer can be regarded as a first metal layer, and the copper layer can be regarded as a second metal layer, so the first The sum of the thicknesses of the metal layer and the second metal layer is equivalent to the third set thickness. The composition of each metal layer 12 has been discussed in the above process for improving the strength of the raft plate, so it will not be described again.

In summary, the present invention provides at least one rough surface on at least one side of the substrate, and when the insulating layer is disposed on the rough surface, the insulating layer is away from the side of the substrate, and an insulating rough surface is also formed, so when having the third set thickness When the metal layer is disposed on the insulating rough surface, the combination of the metal layer and the insulating layer can be more tight, and the bonding relationship between the metal and the coffin can be improved, and the coffin is the material of the substrate, so the third setting When the thickness value of the thickness is increased, the above-mentioned rough surface can still maintain a tight bond between the metal layer and the substrate.

The metal layer having the third set thickness can make the load-bearing plate have a relatively high strength, so that the chip can be prevented from being damaged or damaged due to the stress in the subsequent process, thereby improving the subsequent process. Yield.

The specific embodiments described above are only used to exemplify the features and functions of the present invention, and are not intended to limit the scope of the present invention, and may be used without departing from the spirit and scope of the invention. Equivalent changes and modifications made to the disclosure of the invention are still covered by the scope of the following claims.

S1~S5‧‧‧Steps

Claims (8)

The invention relates to a process for improving the strength of a carrier board, comprising: providing a substrate; reducing the thickness of the substrate to a first set thickness; forming at least one side of the substrate as a rough surface, and reducing the thickness of the substrate to a second set thickness; an insulating layer is formed on the rough surface, at least one side of the insulating layer is formed as an insulating rough surface; and a metal layer is formed on the insulating rough surface of the insulating layer, the metal layer has a The third set thickness, the metal layer has a first metal layer and a second metal layer, and the sum of the thicknesses of the first metal layer and the second metal layer is equal to the third set thickness. The process of improving the strength of the load-bearing plate according to claim 1, wherein the substrate has a first surface and a second surface, and the first surface and the second surface are subjected to a polishing process or a polishing process. And reducing the thickness of the substrate to the first set thickness, the polishing process is a double-side polishing process, a chemical mechanical polishing process or a fixed abrasive polishing process, the polishing process is a chemical mechanical polishing process; The substrate has a size of 2 to 12 in. The substrate 10 has a thickness of 279 to 775 μm; the first set thickness is 10 to 500 μm; and the second set thickness is 1 to 495 μm. The process for improving the strength of the ruthenium plate as described in claim 1, wherein the etching time of the etching process is 20 seconds to 60 minutes; the roughness of the etching process is 0.02 to 5 μm; the uniformity of the etching process is Less than 6%; the etching rate of the etching process is 0.1 μm / sec to 10 μ m / sec; the rough surface is a particle junction, an horn junction or a pit junction. The process for improving the strength of the load-bearing plate according to claim 1, wherein the insulating layer is formed on the rough surface by a high temperature oxidation method or a deposition method. The process for improving the strength of the load-bearing plate according to claim 1, wherein the metal layer is formed on the insulating layer by a vapor deposition method and a sputtering method, and the vapor deposition method is a chemical vapor phase. Deposition method. The process for improving the strength of the load-bearing plate according to claim 1, wherein the first metal layer is a titanium layer, the second metal layer is a copper layer, and the third set thickness is a thickness of the titanium layer. The sum of the thicknesses of the copper layers, the thickness of the titanium layer is 0.07 to 0.3 μm, and the thickness of the copper layer is 0.2 to 1.5 μm. An armor plate comprising: a substrate having a second set thickness, at least one side of the substrate being a rough surface; at least one insulating layer disposed on the rough surface, at least one side of the insulating layer being formed An insulating rough surface; and at least one metal layer disposed on the insulating rough surface of the insulating layer, the metal layer having a third set thickness, the metal layer having a first metal layer and a second metal layer The sum of the thicknesses of the first metal layer and the second metal layer is equal to the third set thickness. The 矽 carrier board of claim 7, wherein the second set thickness is 1 to 495 μm; the first metal layer has a thickness of 0.07 to 0.3 μm, and the two metal layers have a thickness of 0.2 to 1.5 μm; The rough surface is a particle joint, an angular joint or a pit joint.