TWI543262B - Method for manufacturing barrier layer, semiconductor device and method for manufacturing the same - Google Patents
Method for manufacturing barrier layer, semiconductor device and method for manufacturing the same Download PDFInfo
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- TWI543262B TWI543262B TW103114279A TW103114279A TWI543262B TW I543262 B TWI543262 B TW I543262B TW 103114279 A TW103114279 A TW 103114279A TW 103114279 A TW103114279 A TW 103114279A TW I543262 B TWI543262 B TW I543262B
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- 238000000034 method Methods 0.000 title claims description 103
- 230000004888 barrier function Effects 0.000 title claims description 56
- 239000004065 semiconductor Substances 0.000 title claims description 53
- 238000004519 manufacturing process Methods 0.000 title claims description 44
- 230000008569 process Effects 0.000 claims description 64
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 48
- 229910052802 copper Inorganic materials 0.000 claims description 48
- 239000010949 copper Substances 0.000 claims description 48
- 239000000758 substrate Substances 0.000 claims description 47
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 38
- 229910052732 germanium Inorganic materials 0.000 claims description 37
- 238000005240 physical vapour deposition Methods 0.000 claims description 37
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 27
- 229910052715 tantalum Inorganic materials 0.000 claims description 24
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 claims description 24
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 claims description 19
- 229910052707 ruthenium Inorganic materials 0.000 claims description 19
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 18
- 229910052782 aluminium Inorganic materials 0.000 claims description 17
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 17
- RVSGESPTHDDNTH-UHFFFAOYSA-N alumane;tantalum Chemical compound [AlH3].[Ta] RVSGESPTHDDNTH-UHFFFAOYSA-N 0.000 claims description 15
- 239000007789 gas Substances 0.000 claims description 13
- 238000005546 reactive sputtering Methods 0.000 claims description 13
- LEHUDBPYSAPFFO-UHFFFAOYSA-N alumane;bismuth Chemical compound [AlH3].[Bi] LEHUDBPYSAPFFO-UHFFFAOYSA-N 0.000 claims description 8
- 239000002131 composite material Substances 0.000 claims description 7
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 claims description 7
- 229910001873 dinitrogen Inorganic materials 0.000 claims description 7
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 claims description 7
- -1 germanium aluminum Chemical compound 0.000 claims 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims 2
- 229920005591 polysilicon Polymers 0.000 claims 2
- 238000007747 plating Methods 0.000 claims 1
- 238000005019 vapor deposition process Methods 0.000 claims 1
- 239000010408 film Substances 0.000 description 96
- 239000011521 glass Substances 0.000 description 27
- 229910052757 nitrogen Inorganic materials 0.000 description 10
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 10
- 230000000052 comparative effect Effects 0.000 description 8
- PSNPEOOEWZZFPJ-UHFFFAOYSA-N alumane;yttrium Chemical compound [AlH3].[Y] PSNPEOOEWZZFPJ-UHFFFAOYSA-N 0.000 description 6
- 239000008367 deionised water Substances 0.000 description 5
- 229910021641 deionized water Inorganic materials 0.000 description 5
- 238000005137 deposition process Methods 0.000 description 5
- 238000009792 diffusion process Methods 0.000 description 5
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- 238000000151 deposition Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 239000004973 liquid crystal related substance Substances 0.000 description 3
- 229910052758 niobium Inorganic materials 0.000 description 3
- 239000010955 niobium Substances 0.000 description 3
- GUCVJGMIXFAOAE-UHFFFAOYSA-N niobium atom Chemical compound [Nb] GUCVJGMIXFAOAE-UHFFFAOYSA-N 0.000 description 3
- 230000008021 deposition Effects 0.000 description 2
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 2
- 239000013077 target material Substances 0.000 description 2
- NIPNSKYNPDTRPC-UHFFFAOYSA-N N-[2-oxo-2-(2,4,6,7-tetrahydrotriazolo[4,5-c]pyridin-5-yl)ethyl]-2-[[3-(trifluoromethoxy)phenyl]methylamino]pyrimidine-5-carboxamide Chemical compound O=C(CNC(=O)C=1C=NC(=NC=1)NCC1=CC(=CC=C1)OC(F)(F)F)N1CC2=C(CC1)NN=N2 NIPNSKYNPDTRPC-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- VYBYZVVRYQDCGQ-UHFFFAOYSA-N alumane;hafnium Chemical compound [AlH3].[Hf] VYBYZVVRYQDCGQ-UHFFFAOYSA-N 0.000 description 1
- UBADKKCCQHYPIX-UHFFFAOYSA-N aluminum oxygen(2-) ruthenium(3+) Chemical compound [O-2].[Al+3].[Ru+3].[O-2].[O-2] UBADKKCCQHYPIX-UHFFFAOYSA-N 0.000 description 1
- VQLOCUKZAJRPAO-UHFFFAOYSA-N aluminum oxygen(2-) tantalum(5+) Chemical compound [O--].[O--].[O--].[O--].[Al+3].[Ta+5] VQLOCUKZAJRPAO-UHFFFAOYSA-N 0.000 description 1
- JNDMLEXHDPKVFC-UHFFFAOYSA-N aluminum;oxygen(2-);yttrium(3+) Chemical compound [O-2].[O-2].[O-2].[Al+3].[Y+3] JNDMLEXHDPKVFC-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 125000004435 hydrogen atom Chemical class [H]* 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- HWLDNSXPUQTBOD-UHFFFAOYSA-N platinum-iridium alloy Chemical class [Ir].[Pt] HWLDNSXPUQTBOD-UHFFFAOYSA-N 0.000 description 1
- 239000010970 precious metal Substances 0.000 description 1
- 239000002243 precursor Substances 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 229910052703 rhodium Inorganic materials 0.000 description 1
- 239000010948 rhodium Substances 0.000 description 1
- MHOVAHRLVXNVSD-UHFFFAOYSA-N rhodium atom Chemical compound [Rh] MHOVAHRLVXNVSD-UHFFFAOYSA-N 0.000 description 1
- 238000005389 semiconductor device fabrication Methods 0.000 description 1
- 239000002002 slurry Substances 0.000 description 1
- 238000004381 surface treatment Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- XJDNKRIXUMDJCW-UHFFFAOYSA-J titanium tetrachloride Chemical compound Cl[Ti](Cl)(Cl)Cl XJDNKRIXUMDJCW-UHFFFAOYSA-J 0.000 description 1
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- Physical Vapour Deposition (AREA)
Description
本發明是有關於一種半導體元件之製造技術,且特別是有關於一種阻障層之製造方法。 The present invention relates to a semiconductor device fabrication technique, and more particularly to a method of fabricating a barrier layer.
大尺寸、高更新頻率、高解析度、觸控式操作以及窄邊框是目前平面顯示器及觸控面板的發展趨勢。銅的導電性及抗電致能力皆優於鋁,因此在平面顯示器及觸控面板中的導線改用銅製程已成為重要的發展趨勢。然而,銅容易在矽薄膜中擴散,導致製造品質不佳。因此,一般會在銅與矽薄膜之間設置一層阻障層。此阻障層除了具備防止銅擴散至矽薄膜中之功能外,也必須要與銅薄膜有良好的附著性,以提升產品的穩定性。 Large size, high update frequency, high resolution, touch operation and narrow bezel are the current trends in flat panel displays and touch panels. Copper's conductivity and electrical resistance are superior to aluminum, so the use of copper in flat-panel displays and touch panels has become an important development trend. However, copper is easily diffused in the tantalum film, resulting in poor manufacturing quality. Therefore, a barrier layer is generally provided between the copper and tantalum films. In addition to the function of preventing copper from diffusing into the germanium film, the barrier layer must also have good adhesion to the copper film to improve the stability of the product.
針對目前所面臨之問題,目前有數種解決方案提出。美國專利公告號第US6271131號提出一種利用化學氣相沉積(CVD)法形成含銠阻絕層的方法,其係利用銠或銠鉑合金作為擴散阻絕層。然而,銠和鉑為貴金屬,其價格高昂,且產量不足以應付平面顯示器的量產需求。 There are several solutions to the current problems. U.S. Patent No. 6,271,131 discloses a method of forming a ruthenium-containing barrier layer by chemical vapor deposition (CVD) using a tantalum or iridium platinum alloy as a diffusion barrier layer. However, rhodium and platinum are precious metals, which are expensive and insufficiently produced to meet the mass production needs of flat panel displays.
美國專利公開號第20050070097號提出一種用於 半導體元件的多層擴散阻絕層及其製造方法,其係利用厚度只有幾個原子厚度堆疊高的多層膜來作為阻絕層。然而,若要形成厚度很薄的多層膜,需要非常精密的製作工藝才能達到阻絕的效果,並非一般量產設備可以產出此種膜層。 U.S. Patent Publication No. 20050070097 proposes a A multilayer diffusion barrier layer of a semiconductor element and a method of manufacturing the same, which are used as a barrier layer by using a multilayer film having a thickness of only a few atomic thickness. However, in order to form a multilayer film having a very small thickness, a very precise manufacturing process is required to achieve a barrier effect, and it is not a general production facility that can produce such a film.
中華民國專利公告編號第I198198提出一種電漿氮化的鈦基阻障層之製造方法,其揭示氯化鈦、氫氣等前驅物,透過化學氣相沉積製程沉積鈦金薄膜後,進行氮化電漿表面處理形成阻絕層。在此專利中所使用的化學氣相沉積製程的操作溫度為490℃。由於此溫度已超過平面顯示器及觸控面板所使用的玻璃基板的軟化溫度,故此方法無法應用在平面顯示器及觸控面板的銅製程中。 The Republic of China Patent Publication No. I198198 proposes a method for producing a plasma-nitrided titanium-based barrier layer, which discloses a precursor such as titanium chloride or hydrogen, which is deposited by a chemical vapor deposition process and then nitrided. The surface treatment of the slurry forms a barrier layer. The chemical vapor deposition process used in this patent has an operating temperature of 490 °C. Since this temperature has exceeded the softening temperature of the glass substrate used in the flat panel display and the touch panel, the method cannot be applied to the copper process of the flat panel display and the touch panel.
因此,本發明之一目的是在提供一種阻障層之製造方法與半導體元件及其製造方法,其係利用矽鋁靶材進行物理氣相沉積製程,並採用氮氣作為製程氣體,以在半導體元件之矽薄膜層上形成矽鋁氮化物來作為阻障層。此矽鋁氮化物阻障層可有效阻絕銅擴散至矽薄膜中,並可維持銅薄膜之品質。此外,以矽及鋁作為靶材材料在製作成本上較低,可降低生產成本。 SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a method for fabricating a barrier layer, a semiconductor device, and a method for fabricating the same, which utilize a bismuth aluminum target for a physical vapor deposition process and use nitrogen as a process gas for the semiconductor device. A tantalum aluminum nitride is formed on the thin film layer as a barrier layer. The bismuth aluminum nitride barrier layer can effectively prevent copper from diffusing into the ruthenium film and maintain the quality of the copper film. In addition, the use of niobium and aluminum as target materials is relatively low in production cost, which can reduce production costs.
本發明之另一目的是在提供一種阻障層之製造方法與半導體元件及其製造方法,其係使用一般物理氣相沉積製程來進行阻障層的沉積,因此利用現有的沉積設備即可生產出品質符合標準的阻障層。而且,本發明所使用之 物理氣相沉積製程為低溫製程,在製作應用在液晶顯示面板的半導體元件時,不會造成基板的軟化,進而可提升產品良率。 Another object of the present invention is to provide a method for fabricating a barrier layer and a semiconductor device and a method for fabricating the same, which use a general physical vapor deposition process for depositing a barrier layer, and thus can be produced by using an existing deposition apparatus. A barrier layer of quality conforming to the standard. Moreover, the invention is used The physical vapor deposition process is a low-temperature process, and when the semiconductor component used in the liquid crystal display panel is fabricated, the softening of the substrate is not caused, and the product yield can be improved.
根據本發明之上述目的,提出一種阻障層之製造方法。阻障層之製造方法包含以下步驟。提供基板,其中基板上形成矽薄膜。利用矽鋁靶材進行物理氣相沉積製程,以形成阻障層覆蓋在矽薄膜上,其中矽鋁靶材由鋁與矽所組成,且物理氣相沉積製程之製程氣體包含氮氣。 According to the above object of the present invention, a method of manufacturing a barrier layer is proposed. The manufacturing method of the barrier layer includes the following steps. A substrate is provided in which a tantalum film is formed on the substrate. The physical vapor deposition process is performed by using a tantalum aluminum target to form a barrier layer covering the tantalum film, wherein the tantalum aluminum target is composed of aluminum and tantalum, and the process gas of the physical vapor deposition process contains nitrogen.
依據本發明之一實施例,上述之矽鋁靶材包含15wt%至75wt%的鋁。 According to an embodiment of the invention, the above-described tantalum aluminum target comprises 15% by weight to 75% by weight of aluminum.
依據本發明之另一實施例,上述之阻障層係一複合層,且阻障層包含氮化矽及氮化鋁。 According to another embodiment of the present invention, the barrier layer is a composite layer, and the barrier layer comprises tantalum nitride and aluminum nitride.
依據本發明之又一實施例,上述之物理氣相沉積製程包含利用直流式真空磁控濺鍍方式、射頻式真空磁控濺鍍方式或反應性濺鍍方式。 According to still another embodiment of the present invention, the physical vapor deposition process comprises a direct current vacuum magnetron sputtering method, a radio frequency vacuum magnetron sputtering method or a reactive sputtering method.
依據本發明之再一實施例,上述之矽薄膜為多晶矽薄膜或非晶矽薄膜。 According to still another embodiment of the present invention, the tantalum film is a polycrystalline germanium film or an amorphous germanium film.
根據本發明之上述目的,另提出一種半導體元件之製造方法。半導體元件之製造方法包含以下步驟。提供基板。利用矽靶材進行第一物理氣相沉積製程,以形成矽薄膜覆蓋在基板上。利用矽鋁靶材進行第二物理氣相沉積製程,以形成阻障層覆蓋在矽薄膜上,其中矽鋁靶材由鋁與矽所組成,且第二物理氣相沉積製程之製程氣體包含氮氣。利用銅靶材進行第三物理氣相沉積製程,以形成銅薄 膜覆蓋在阻障層上。 According to the above object of the present invention, a method of manufacturing a semiconductor device is further proposed. The method of manufacturing a semiconductor device includes the following steps. A substrate is provided. The first physical vapor deposition process is performed using the tantalum target to form a tantalum film covering the substrate. The second physical vapor deposition process is performed by using a tantalum aluminum target to form a barrier layer covering the tantalum film, wherein the tantalum aluminum target is composed of aluminum and tantalum, and the process gas of the second physical vapor deposition process comprises nitrogen gas. . Performing a third physical vapor deposition process using a copper target to form a thin copper The film is covered on the barrier layer.
依據本發明之一實施例,上述之矽鋁靶材包含15wt%至75wt%的鋁。 According to an embodiment of the invention, the above-described tantalum aluminum target comprises 15% by weight to 75% by weight of aluminum.
依據本發明之另一實施例,上述之阻障層係一複合層,且阻障層包含氮化矽及氮化鋁。 According to another embodiment of the present invention, the barrier layer is a composite layer, and the barrier layer comprises tantalum nitride and aluminum nitride.
依據本發明之又一實施例,上述之第二物理氣相沉積製程包含利用直流式真空磁控濺鍍方式、射頻式真空磁控濺鍍方式或反應性濺鍍方式。 According to still another embodiment of the present invention, the second physical vapor deposition process comprises a direct current vacuum magnetron sputtering method, a radio frequency vacuum magnetron sputtering method or a reactive sputtering method.
依據本發明之再一實施例,上述之第一物理氣相沉積製程及第三物理氣相沉積製程包含利用直流式真空磁控濺鍍方式或射頻式真空磁控濺鍍方式。 According to still another embodiment of the present invention, the first physical vapor deposition process and the third physical vapor deposition process include a direct current vacuum magnetron sputtering method or a radio frequency vacuum magnetron sputtering method.
依據本發明之再一實施例,上述之矽薄膜層為多晶矽薄膜或非晶矽薄膜。 According to still another embodiment of the present invention, the ruthenium film layer is a polycrystalline germanium film or an amorphous germanium film.
根據本發明之上述目的,另提出一種半導體元件。此半導體元件包含基板、矽薄膜、阻障層以及銅薄膜。矽薄膜設置在基板上。阻障層設置在矽薄膜上,其中阻障層係一複合層,且阻障層包含氮化矽及氮化鋁。銅薄膜設置在阻障層上。 According to the above object of the present invention, a semiconductor element is further proposed. The semiconductor element includes a substrate, a tantalum film, a barrier layer, and a copper film. The tantalum film is placed on the substrate. The barrier layer is disposed on the germanium film, wherein the barrier layer is a composite layer, and the barrier layer comprises tantalum nitride and aluminum nitride. A copper film is disposed on the barrier layer.
依據本發明之一實施例,上述之矽薄膜層為多晶矽薄膜或非晶矽薄膜。 According to an embodiment of the invention, the ruthenium film layer is a polycrystalline germanium film or an amorphous germanium film.
100‧‧‧半導體元件之製造方法 100‧‧‧Methods for manufacturing semiconductor components
102‧‧‧步驟 102‧‧‧Steps
104‧‧‧步驟 104‧‧‧Steps
106‧‧‧步驟 106‧‧‧Steps
108‧‧‧步驟 108‧‧‧Steps
201‧‧‧基板 201‧‧‧Substrate
203‧‧‧矽薄膜 203‧‧‧矽film
205‧‧‧阻障層 205‧‧‧Barrier layer
207‧‧‧銅薄膜 207‧‧‧ copper film
為讓本發明之上述和其他目的、特徵、優點與實施例能更明顯易懂,所附圖式之說明如下: The above and other objects, features, advantages and embodiments of the present invention will become more apparent and understood.
第1圖係繪示依照本發明之一實施方式的一種半導體元件之製造方法的流程圖。 1 is a flow chart showing a method of fabricating a semiconductor device in accordance with an embodiment of the present invention.
第2A圖與第2D圖係繪示依照本發明之一實施方式的一種半導體元件之製造方法的各步驟的製程剖面圖。 2A and 2D are cross-sectional views showing processes of various steps of a method of fabricating a semiconductor device in accordance with an embodiment of the present invention.
請同時參照第1圖及第2A圖至第2D圖,其中第1圖係繪示依照本發明之一實施方式的一種半導體元件之製造方法的流程圖,第2A圖與第2D圖係繪示依照本發明之一實施方式的一種半導體元件之製造方法的各步驟的製程剖面圖。在本實施方式中,進行第1圖所示之半導體元件之製造方法100時,可先如步驟102所述,提供如第2A圖所示之基板201。在一些實施例中,基板201可例如為矽晶片、玻璃基板或塑膠基板。 Please refer to FIG. 1 and FIG. 2A to FIG. 2D simultaneously. FIG. 1 is a flow chart showing a method of manufacturing a semiconductor device according to an embodiment of the present invention, and FIG. 2A and FIG. 2D are diagrams. A process cross-sectional view of each step of a method of fabricating a semiconductor device in accordance with an embodiment of the present invention. In the present embodiment, when the method 100 for manufacturing a semiconductor device shown in FIG. 1 is performed, the substrate 201 as shown in FIG. 2A can be provided as described in step 102. In some embodiments, the substrate 201 can be, for example, a germanium wafer, a glass substrate, or a plastic substrate.
接著,如第1圖之步驟104所述,利用矽靶材進行第一物理氣相沉積製程,藉以形成矽薄膜203覆蓋在基板201表面上。在一些實施例中,第一物理氣相沉積製程可利用直流式真空磁控濺鍍方式或射頻式真空磁控濺鍍方式來進行。而且,如第2B圖所示,因應半導體元件之不同應用,此矽薄膜203可為多晶矽薄膜或非晶矽薄膜。例如,當半導體元件係應用在液晶顯示器時,此矽薄膜203可為非晶矽薄膜。 Next, as described in step 104 of FIG. 1, the first physical vapor deposition process is performed using the germanium target, whereby the germanium film 203 is formed to cover the surface of the substrate 201. In some embodiments, the first physical vapor deposition process can be performed using a direct current vacuum magnetron sputtering method or a radio frequency vacuum magnetron sputtering method. Moreover, as shown in FIG. 2B, the tantalum film 203 may be a polycrystalline germanium film or an amorphous germanium film in response to different applications of the semiconductor device. For example, when a semiconductor element is applied to a liquid crystal display, the germanium film 203 may be an amorphous germanium film.
在將矽薄膜203形成於基板201的表面上後,可如步驟106所述,利用矽鋁靶材進行第二物理氣相沉積製程,以形成阻障層205覆蓋在矽薄膜203上,如第2C圖所示。 在本實施例中,矽鋁靶材由鋁與矽所組成。在一些實施例中,矽鋁靶材包含15wt%至75wt%的鋁含量,而剩餘部分則為矽之含量。而且,進行本實例之第二物理氣相沉積製程所使用之製程氣體包含氮氣。因此,在一些實施例中,阻障層205為包含氮化矽及氮化鋁之複合層。在一些實施例中,第二物理氣相沉積製程可利用直流式真空磁控濺鍍方式、射頻式真空磁控濺鍍方式或反應性濺鍍方式來進行。 After the germanium film 203 is formed on the surface of the substrate 201, a second physical vapor deposition process may be performed using the tantalum aluminum target as described in step 106 to form a barrier layer 205 overlying the germanium film 203. Figure 2C shows. In this embodiment, the tantalum aluminum target is composed of aluminum and tantalum. In some embodiments, the hafnium aluminum target comprises an aluminum content of from 15 wt% to 75 wt%, with the balance being the content of niobium. Moreover, the process gas used in the second physical vapor deposition process of this example contains nitrogen gas. Therefore, in some embodiments, the barrier layer 205 is a composite layer comprising tantalum nitride and aluminum nitride. In some embodiments, the second physical vapor deposition process can be performed using a direct current vacuum magnetron sputtering method, a radio frequency vacuum magnetron sputtering method, or a reactive sputtering method.
請繼續參照第1圖及第2D圖,在將阻障層205覆蓋在矽薄膜203上後,可如步驟108所述,利用銅靶材進行第三物理氣相沉積製程,以形成銅薄膜207覆蓋在阻障層205上。在一些實施例中,第三物理氣相沉積製程可利用直流式真空磁控濺鍍方式或射頻式真空磁控濺鍍方式來進行。 Continuing to refer to FIG. 1 and FIG. 2D, after the barrier layer 205 is overlaid on the ruthenium film 203, a third physical vapor deposition process may be performed using a copper target as described in step 108 to form a copper film 207. Covered on the barrier layer 205. In some embodiments, the third physical vapor deposition process can be performed using a direct current vacuum magnetron sputtering method or a radio frequency vacuum magnetron sputtering method.
以下利用比較例1、比較例2以及實施例1-3來說明利用本案之半導體元件之製造方法所製備之半導體元件的功效,然其並非用以限定本發明。本發明技術領域中具有通常知識者,在不脫離本發明之精神和範圍內,當可作各種之更動與潤飾。 Hereinafter, the effects of the semiconductor element produced by the method for producing a semiconductor device of the present invention will be described using Comparative Example 1, Comparative Example 2, and Example 1-3, but it is not intended to limit the present invention. Those skilled in the art can make various changes and modifications without departing from the spirit and scope of the invention.
在製造比較例1的半導體元件時,首先提供玻璃基板,並以去離子水洗淨玻璃基板後,再以氮氣吹乾玻璃基板表面的殘留水滴,然後將玻璃基板置於烘箱中以120℃的溫度烘乾。接著,利用矽靶材進行沉積製程,以形成矽薄膜覆蓋在玻璃基板上。隨後,利用銅靶材進行沉積製程,以形成銅薄膜於矽薄膜上,而完成比較例1之半導體元件 的製作。將完成之比較例1的半導體元件置於烘箱中以溫度350℃烘烤1小時後取出於室溫下冷卻。由烘烤後的半導體元件可看出銅薄膜已擴散至矽薄膜中。 When manufacturing the semiconductor device of Comparative Example 1, a glass substrate was first provided, and after the glass substrate was washed with deionized water, the residual water droplets on the surface of the glass substrate were blown dry with nitrogen, and then the glass substrate was placed in an oven at 120 ° C. Dry at temperature. Next, a deposition process is performed using a germanium target to form a germanium film over the glass substrate. Subsequently, a deposition process was performed using a copper target to form a copper film on the tantalum film, and the semiconductor device of Comparative Example 1 was completed. Production. The completed semiconductor device of Comparative Example 1 was placed in an oven and baked at a temperature of 350 ° C for 1 hour, and then taken out and cooled at room temperature. It can be seen from the baked semiconductor component that the copper film has diffused into the tantalum film.
此外,在製造比較例2的半導體元件時,首先提供玻璃基板,並以去離子水洗淨玻璃基板後,再以氮氣吹乾玻璃基板表面的殘留水滴,然後將玻璃基板置於烘箱中以120℃的溫度烘乾。接著,利用矽靶材進行沉積製程,以形成矽薄膜覆蓋在玻璃基板上。隨後,利用75wt%矽-25wt%鋁靶材進行反應性濺鍍製程,且製程氣體為氧氣,以形成矽鋁氧化物薄膜於矽薄膜上。然後,利用銅靶材進行沉積製程,以形成銅薄膜於矽鋁氧化物薄膜上,而完成比較例2之半導體元件的製作。將完成之比較例2的半導體元件置於烘箱中以溫度350℃烘烤1小時後取出於室溫下冷卻。由烘烤後的半導體元件可看出銅薄膜已擴散至矽薄膜中。這表示,矽鋁氧化物薄膜並無法有效阻擋銅在矽薄膜中擴散。 Further, in the manufacture of the semiconductor element of Comparative Example 2, a glass substrate was first provided, and after the glass substrate was washed with deionized water, the residual water droplets on the surface of the glass substrate were blown dry with nitrogen, and then the glass substrate was placed in an oven at 120 Dry at °C. Next, a deposition process is performed using a germanium target to form a germanium film over the glass substrate. Subsequently, a reactive sputtering process was performed using a 75 wt% 矽-25 wt% aluminum target, and the process gas was oxygen to form a ruthenium aluminum oxide film on the ruthenium film. Then, a deposition process was performed using a copper target to form a copper film on the tantalum aluminum oxide film, and the fabrication of the semiconductor device of Comparative Example 2 was completed. The completed semiconductor device of Comparative Example 2 was placed in an oven and baked at a temperature of 350 ° C for 1 hour, and then taken out and cooled at room temperature. It can be seen from the baked semiconductor component that the copper film has diffused into the tantalum film. This means that the yttrium aluminum oxide film does not effectively block the diffusion of copper in the ruthenium film.
另一方面,在製造實施例1的半導體元件時,首先提供玻璃基板,並以去離子水洗淨玻璃基板後,再以氮氣吹乾玻璃基板表面的殘留水滴,然後將玻璃基板置於烘箱中以120℃的溫度烘乾。接著,利用矽靶材進行物理氣相沉積製程,以形成矽薄膜覆蓋在玻璃基板上。隨後,利用85wt%矽-15wt%鋁靶材,且採用氮氣為製程氣體來進行反應性濺鍍製程,以形成矽鋁氮化物薄膜於矽薄膜上。然後,利用銅靶材進行物理氣相沉積製程,以形成銅薄膜於矽鋁氮化物薄膜上,而完成實施例1之半導體元件的製作。將 完成之實施例1的半導體元件置於烘箱中以溫度350℃烘烤1小時後取出於室溫下冷卻。由烘烤後的半導體元件可知,銅薄膜仍維持原有的型態及顏色。也就是說,銅薄膜並未擴散至矽薄膜中,因此可確保矽薄膜與銅薄膜之品質。由此可知,在銅薄膜與矽薄膜之間形成之矽鋁氮化物薄膜具有阻絕銅擴散至矽薄膜之功效。 On the other hand, in the manufacture of the semiconductor element of Example 1, a glass substrate was first provided, and after the glass substrate was washed with deionized water, the residual water droplets on the surface of the glass substrate were blown dry with nitrogen, and then the glass substrate was placed in an oven. Dry at a temperature of 120 °C. Next, a physical vapor deposition process is performed using a germanium target to form a germanium film over the glass substrate. Subsequently, a reactive sputtering process was performed using 85 wt% 矽-15 wt% aluminum target and using nitrogen as a process gas to form a yttrium aluminum nitride film on the ruthenium film. Then, a physical vapor deposition process was performed using a copper target to form a copper film on the tantalum aluminum nitride film, and the fabrication of the semiconductor device of Example 1 was completed. will The completed semiconductor device of Example 1 was placed in an oven and baked at a temperature of 350 ° C for 1 hour, and then taken out and cooled at room temperature. It is known from the baked semiconductor element that the copper film maintains its original form and color. That is to say, the copper film is not diffused into the ruthenium film, so that the quality of the ruthenium film and the copper film can be ensured. It can be seen that the tantalum aluminum nitride film formed between the copper film and the tantalum film has the effect of blocking the diffusion of copper to the tantalum film.
此外,實施例2也利用矽鋁靶材來進行反應性濺鍍製程,並在反應性濺鍍製程中通入氮氣作為製程氣體。在製造實施例2的半導體元件時,同樣先提供玻璃基板,並以去離子水洗淨玻璃基板後,再以氮氣吹乾玻璃基板表面的殘留水滴,然後將玻璃基板置於烘箱中以120℃的溫度烘乾。接著,利用矽靶材進行物理氣相沉積製程,以形成矽薄膜覆蓋在玻璃基板上。隨後,以50wt%矽-50wt%鋁靶材,且採用氮氣為製程氣體來進行反應性濺鍍製程,以形成矽鋁氮化物薄膜於矽薄膜上。然後,利用銅靶材進行物理氣相沉積製程,以形成銅薄膜於矽鋁氮化物薄膜上,而完成實施例2之半導體元件的製作。將完成之實施例2的半導體元件置於烘箱中以溫度350℃烘烤1小時後取出於室溫下冷卻。由烘烤後的半導體元件可知,銅薄膜仍維持原有的型態及顏色,意即銅薄膜並未擴散至矽薄膜中,因此可確保矽薄膜與銅薄膜之品質。而且,將完成之實施例2的半導體元件進行百格附著性測試之結果可知,銅薄膜與矽鋁氮化物薄膜之附著性良好,可達到ASTM D3359所規範之最佳的5B等級。這表示,矽鋁氮化物薄膜不但可阻絕銅 擴散至矽薄膜,且與銅薄膜的附著性也良好,進而可提升半導體元件之產品品質。 In addition, in Example 2, a reactive sputtering process was also performed using a bismuth aluminum target, and nitrogen gas was introduced as a process gas in the reactive sputtering process. In the manufacture of the semiconductor device of Example 2, the glass substrate was also provided first, and after the glass substrate was washed with deionized water, the residual water droplets on the surface of the glass substrate were blown dry with nitrogen, and then the glass substrate was placed in an oven at 120 ° C. The temperature is dried. Next, a physical vapor deposition process is performed using a germanium target to form a germanium film over the glass substrate. Subsequently, a reactive sputtering process was performed with a 50 wt% 矽-50 wt% aluminum target and nitrogen gas as a process gas to form a yttrium aluminum nitride film on the ruthenium film. Then, a physical vapor deposition process was performed using a copper target to form a copper film on the tantalum aluminum nitride film, and the fabrication of the semiconductor device of Example 2 was completed. The completed semiconductor device of Example 2 was placed in an oven and baked at a temperature of 350 ° C for 1 hour, and then taken out and cooled at room temperature. It can be seen from the semiconductor element after baking that the copper film maintains its original shape and color, meaning that the copper film does not diffuse into the ruthenium film, thereby ensuring the quality of the ruthenium film and the copper film. Further, as a result of performing the Baige adhesion test on the semiconductor element of Example 2, it was found that the adhesion between the copper film and the yttrium aluminum nitride film was good, and the optimum 5B level as specified in ASTM D3359 was achieved. This means that the yttrium aluminum nitride film not only blocks copper. The film is diffused to the tantalum film and has good adhesion to the copper film, thereby improving the product quality of the semiconductor element.
同樣地,實施例3也利用矽鋁靶材來進行反應性濺鍍製程,並在反應性濺鍍製程中通入氮氣作為製程氣體。在製造實施例3的半導體元件時,同樣先提供玻璃基板,並以去離子水洗淨玻璃基板後,再以氮氣吹乾玻璃基板表面的殘留水滴,然後將玻璃基板製於烘箱中以120℃的溫度烘乾。接著,利用矽靶材進行物理氣相沉積製程,以形成矽薄膜覆蓋在玻璃基板上。隨後,以75wt%矽-25wt%鋁靶材,且採用氮氣為製程氣體來進行反應性濺鍍製程,以形成矽鋁氮化物薄膜於矽薄膜上。然後,利用銅靶材進行物理氣相沉積製程,以形成銅薄膜於矽鋁氮化物薄膜上,而完成實施例3之半導體元件的製作。將完成之實施例3的半導體元件置於烘箱中以溫度350℃烘烤1小時後取出於室溫下冷卻。由烘烤後的半導體元件可知,銅薄膜仍維持原有的型態及顏色,意即銅薄膜並未擴散至矽薄膜中,而可確保矽薄膜與銅薄膜之品質。 Similarly, in Example 3, a reactive sputtering process was also performed using a bismuth aluminum target, and nitrogen gas was introduced as a process gas in the reactive sputtering process. In the manufacture of the semiconductor device of Example 3, a glass substrate was also provided first, and the glass substrate was washed with deionized water, and then the residual water droplets on the surface of the glass substrate were blown dry with nitrogen, and then the glass substrate was placed in an oven at 120 ° C. The temperature is dried. Next, a physical vapor deposition process is performed using a germanium target to form a germanium film over the glass substrate. Subsequently, a reactive sputtering process was performed with a 75 wt% 矽-25 wt% aluminum target using nitrogen as a process gas to form a yttrium aluminum nitride film on the ruthenium film. Then, a physical vapor deposition process was performed using a copper target to form a copper film on the tantalum aluminum nitride film, and the fabrication of the semiconductor device of Example 3 was completed. The completed semiconductor device of Example 3 was placed in an oven and baked at a temperature of 350 ° C for 1 hour, and then taken out and cooled at room temperature. It can be seen from the baked semiconductor element that the copper film maintains its original shape and color, meaning that the copper film does not diffuse into the ruthenium film, and the quality of the ruthenium film and the copper film can be ensured.
由上述之實施方式可知,本發明係利用矽鋁靶材進行物理氣相沉積製程,並採用氮氣作為製程氣體,以在半導體元件之矽薄膜層上形成矽鋁氮化物來作為阻障層。此矽鋁氮化物阻障層可有效阻絕銅擴散至矽薄膜中,並可維持原有之銅薄膜的品質。此外,以矽及鋁作為靶材材料在製作成本上較低,可降低生產成本。 It can be seen from the above embodiments that the present invention utilizes a bismuth aluminum target for a physical vapor deposition process and uses nitrogen as a process gas to form yttrium aluminum nitride on the ruthenium film layer of the semiconductor device as a barrier layer. The bismuth aluminum nitride barrier layer can effectively block the diffusion of copper into the ruthenium film and maintain the quality of the original copper film. In addition, the use of niobium and aluminum as target materials is relatively low in production cost, which can reduce production costs.
由上述之實施方式可知,本發明可使用一般物理氣 相沉積製程來進行阻障層的沉積,因此利用現有的沉積設備即可生產出品質符合標準的阻障層。而且,本發明所使用之物理氣相沉積製程為低溫製程,在製作應用在液晶顯示面板的半導體元件時,不會造成基板的軟化,進而可提升產品良率。 It can be seen from the above embodiments that the present invention can use general physical gas. The phase deposition process is used to deposit the barrier layer, so that the existing deposition equipment can be used to produce a quality-compliant barrier layer. Moreover, the physical vapor deposition process used in the present invention is a low-temperature process, and when the semiconductor device used in the liquid crystal display panel is fabricated, the substrate is not softened, and the product yield can be improved.
雖然本發明已以實施方式揭露如上,然其並非用以限定本發明,任何熟習此技藝者,在不脫離本發明之精神和範圍內,當可作各種之更動與潤飾,因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。 Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and the present invention can be modified and modified without departing from the spirit and scope of the present invention. The scope is subject to the definition of the scope of the patent application attached.
100‧‧‧半導體元件之製造方法 100‧‧‧Methods for manufacturing semiconductor components
102‧‧‧步驟 102‧‧‧Steps
104‧‧‧步驟 104‧‧‧Steps
106‧‧‧步驟 106‧‧‧Steps
108‧‧‧步驟 108‧‧‧Steps
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