TWI431469B - Can be shared with the card reader memory card slot debugging device - Google Patents

Description

A debugging device that can share a memory card slot with a card reader

The present invention relates to a Debug Card, and more particularly to a debug device that can be used in a personal computer to view a power source to initiate a self-detection code without having to remove the boot case.

The conventional debugging card is applied to a personal computer. The basic input/output system (BIOS) is activated after the power of the personal computer is started. The BIOS is in the process of Power On Self Test. Output and output some power-on self-test codes (POST Codes). The conventional debug card is coupled to the PCI bus or ISA bus of the computer motherboard, and displays the system status by using the light or digital number on the debug card. However, the conventional debug card will occupy a bus slot, thus sacrificing the scalability of the computer system. The conventional debugging card has also been modified to be built directly on the computer motherboard, which saves the use of one slot. When faced with the malfunction of the computer system, the above two conventional methods of debugging the card need to be disassembled, so that the error message displayed on the conventional debugging card can be checked, which is for the user. It is very inconvenient.

The inventor of the present invention has improved the above-mentioned defect of the conventional debugging card, and improved the debugging device which can share the memory card slot with the card reader, and the user can view it without disassembling the casing. The power source initiates a self-test code message.

The invention provides a debugging device capable of sharing a memory card slot with a card reader, and uses the memory card slot of the card reader as an interface of the debugging device, so that the user can view the power source to start self without having to disassemble the casing. Detection code message.

In order to achieve the above object of the present invention, the present invention provides a debug device that can share a memory card slot with a card reader, and includes a card reader controller, a first interface, a second interface, and a debug circuit. The first interface is used to plug in at least one memory card or to plug in the debug external card, and is used to electrically connect the memory card to the card reader controller. The second interface is electrically connected between the computer motherboard and the card reader controller. The utility model is characterized in that: the debugging circuit is electrically connected between the computer motherboard and the first interface, wherein the first interface is multiplexed for the card reader controller and the debugging circuit.

In order to make the above objects, features, and advantages of the present invention more comprehensible, the following detailed description will be made with reference to the accompanying drawings.

The first figure shows a circuit architecture diagram of a debug device that can share a memory card slot with a card reader. The debugging device 10 for sharing the memory card slot with the card reader of the present invention comprises: a card reader controller 101, a debug circuit 102, a first interface 103, a second interface 104, and a switching circuit 105, respectively Internal text. The card reader controller (Card Reader Controller) 101 has the same function as the conventional card reader controller for reading data and writing data to the memory card. The circuit means for inventing the card reader controller 101 can directly adopt the related conventional circuit means.

The first interface 103 is used to plug in at least one memory card 30, and is used to electrically connect the memory card 30 and the card reader controller 101 located in the first interface 103. The specific means of the first interface 103 can be, for example, an electrical connection interface conforming to the SD memory card specification, an electrical connection interface conforming to the CF memory card specification, an electrical connection interface conforming to the SDHC memory card specification, or an MMC memory card specification. One of the electrical connection interface, or the electrical connection interface conforming to the XD memory card specifications, or the electrical connection interface conforming to the MS memory card specifications.

The second interface 104 is electrically connected between the computer motherboard 201 (see the fourth figure) and the card reader controller 101. The specific means of the second interface 104 can directly adopt one of the bus interface interfaces such as an ISA interface, a PCI interface, a PCI-E interface, and a USB interface. The external memory card 30 can be electrically connected to the computer motherboard 201 via the first interface 103, the card reader controller 101, and the second interface 104.

The debug circuit 102 is electrically connected between the computer motherboard 201 and the first interface 103. After the computer 20 is turned on, the BIOS enters and outputs some basic input/output systems (BIOS_POST_CODES) during the power-on self-test (POST) process. For example, the BIOS transmits the output.埠80 (Port 80) Output basic input and output system _ power start self-test code. The function of the debugging circuit 102 is to receive the BIOS_POST_CODES, and then transmit the received signals of the BIOS_POST_CODES to the display circuit, and then display them by the display circuit. The specific means of the debug circuit 102 can directly adopt the related circuit of the Port 80 conventional error detection card.

The switching circuit 105 is used to switch between selecting the card reader controller 101 or the debug circuit 102. When the switching circuit 105 switches to select the card reader controller 101, the card reader controller 101 is enabled (Enable). When the switching circuit 105 switches the selection debug circuit 102, the debug circuit 102 is enabled.

The two sets of input ends of the multiplexer 107 are respectively connected to the card reader controller 101 and the debug circuit 102, and the output end is connected to the first interface 103, and the data selection signal end is connected to the switching circuit 105.

Referring to the second figure, the switching circuit 105 employs a switching switch. The switching switch 105' can be used to select the input of the multiplexer 107 and to enable the card reader controller 101 or the debug circuit 102.

Referring to the third figure, the switching circuit 105 adopts a logic circuit. The input end of the logic circuit 105' is connected to a part of the pin (Pins) of the first interface 103, and the output end of the logic circuit 105' is connected to The data selection signal terminal of the processor 107 is used to select the input of the multiplexer 107, and the output of the logic circuit 105' is used to enable the card reader controller 101 or the debug circuit 102. Logic circuit 105' can be based on the signal at the input (eg, SD memory card specification) SD_CD#, SD_CMD#, etc., and automatically determine whether the external card inserted in the first interface 103 is the memory card 30 or the debug external card 40. In the second and third figures, the debug circuit 102 is electrically connected to the second interface 104, and the debug circuit 102 is electrically connected to other components on the computer motherboard 201 through the second interface 104. Furthermore, the debug circuit 102 can be modified to be directly electrically connected to the components of the computer motherboard 201. For example, the debug circuit 102 is directly electrically connected to the south bridge wafer.

The debug circuit 102 and the card reader controller 101 can be integrated into one integrated circuit. Alternatively, the debug circuit 102, the card reader controller 101, and the switching circuit 105 can be integrated into one integrated circuit.

The first interface 103 is multiplexed by the card reader controller 101 and the debug circuit 102. Under the action of the switching circuit 105, the card reader controller 101 and the debug circuit 102 do not mutually rob each other of the first interface 103.

The fourth figure shows a schematic diagram of the architecture of a computer having the debug device of the present invention. When the switching circuit 105 switches to select the card reader controller 101, the first interface 101 is used as a transmission interface of the memory card 30. The user inserts the memory card 30 into the first interface 101. Thus, reading, writing, copying, and the like of the data can be performed between the computer 20 and the memory card 30. When the switching circuit 105 switches the selection error detecting circuit 102, the first interface 101 is used as the transmission interface of the BIOS_POST_CODES for the debugging circuit 102. The user inserts the debug external card 40 into the first interface 101, so that the user can debug from outside. The display element 401 of the card 40 is aware of the BIOS_POST_CODES.

The fifth figure shows the circuit architecture diagram of the debug external card used by the debugging circuit of the present invention, and the sixth diagram shows the appearance of the debug external card of the fifth figure. The debug external card 40 includes a plurality of electrical connections 401, a display circuit 403, and at least one display element 405. The electrical connection terminals 401, the display circuit 403, and the display elements 405 are disposed on a single board body 407. In the sheet body 407, the front half portion 407a including the electrical connection ends 401 can be inserted into the first interface 101. For example, if the first interface 103 is implemented as an electrical connection interface conforming to the SD memory card specification, the first half area 407a adopts the same specifications as the SD memory card, and the shapes of the electrical connection terminals 401 are the same as those of the SD memory card. The specification is such that the user conveniently plugs the debug external card 40 into the first interface 103 implemented as an SD memory card slot, as in the case of an SD memory card.

The display circuit 403 receives the BIOS_POST_CODES signals from the debug circuit 102 via the electrical connections 401. The display elements 405 are connected to the display circuit 403. The display circuit 403 can directly use the conventional BCD to convert to a 7-digit display (BCD to 7 Segment display) display circuit, and the display elements 405 can adopt a conventional 7-segment digital light-emitting diode display.

The debugging device 10 of the present invention uses the memory card slot of the card reader as an interface, so that the user can check the power source to start self-detection without having to disassemble the casing. The code message, this feature is not known for the skill of the art, which is the advantage of the invention.

In the above, the present invention has been described in the above preferred embodiments, and is not intended to limit the invention, and various modifications and changes may be made without departing from the spirit and scope of the invention. Therefore, the scope of the invention is defined by the scope of the appended claims.

10‧‧‧Detection device

20‧‧‧ computer

30‧‧‧ memory card

40‧‧‧Detection External Card

101‧‧‧Reader Controller

102‧‧‧Detection circuit

103‧‧‧ first interface

104‧‧‧Second interface

105‧‧‧Switching circuit

107‧‧‧Multiplexer

201‧‧‧Computer motherboard

401‧‧‧Electrical connection

403‧‧‧Display circuit

405‧‧‧Display components

407‧‧‧ board

407a‧‧‧ the first half of the area

The first figure shows a circuit architecture diagram of a debug device that can share a memory card slot with a card reader.

The second figure shows a schematic diagram of an embodiment of the debug device of the present invention.

The third figure shows a schematic diagram of another embodiment of the debug device of the present invention.

The fourth figure shows a schematic diagram of the architecture of a computer having the debug device of the present invention.

The fifth figure shows the circuit architecture diagram of the debug external card used in conjunction with the debug circuit of the present invention.

The sixth figure shows the appearance of the debug external card of the fifth figure.

10‧‧‧Detection device

101‧‧‧Reader Controller

102‧‧‧Detection circuit

103‧‧‧ first interface

104‧‧‧Second interface

105‧‧‧Switching circuit

107‧‧‧Multiplexer

Claims (11)

A debugging device capable of sharing a memory card slot with a card reader, comprising: a card reader controller; a first interface for plugging in at least one memory card or for plugging in an error detection external connection a card, and is used to electrically connect the memory card with the card reader controller; a second interface is electrically connected between a computer motherboard and the card reader controller; The wrong circuit is electrically connected between the computer motherboard and the first interface; wherein the first interface is multiplexed for the card reader controller and the debug circuit. The debugging device capable of sharing a memory card slot with the card reader according to the first aspect of the patent application, wherein the debugging circuit is electrically connected between the second interface and the first interface, thereby detecting The wrong circuit is electrically connected to the computer motherboard through the second interface. The debugging device capable of sharing a memory card slot with the card reader according to the first aspect of the patent application, wherein the debugging circuit and the card reader controller are integrated into one integrated circuit. The debugging device capable of sharing a memory card slot with the card reader according to the first aspect of the patent application, wherein the first interface is selected from an electrical connection interface conforming to the SD memory card specification, and conforming to the CF memory card specification Electrical connection interface, an electrical connection interface conforming to SDHC memory card specifications, an electrical connection conforming to MMC memory card specifications The interface, an electrical connection interface conforming to the XD memory card specification, one of the electrical connection interfaces conforming to the MS memory card specification. The debugging device for sharing the memory card slot with the card reader according to the first aspect of the patent application, wherein the second interface is selected from an ISA interface, a PCI interface, a PCI-E interface, and a USB interface. One of them. The debugging device capable of sharing a memory card slot with the card reader according to the first aspect of the patent application, wherein the debugging circuit is a chip group electrically connected to the computer motherboard. The debugging device capable of sharing a memory card slot with the card reader according to the first aspect of the patent application, wherein the debugging device is disposed on the computer motherboard. The debugging device capable of sharing a memory card slot with the card reader according to the first aspect of the patent application, wherein the debugging device includes at least one for receiving a basic input/output system_Power Start Self-Detection Code (BIOS POST) CODES) circuit. A debug device capable of sharing a memory card slot with a card reader as described in claim 8 of the patent application, wherein the circuit is a PORT 80 decoding circuit. A debugging device capable of sharing a memory card slot with a card reader as described in claim 8 wherein the debug external card has at least one display component, wherein the display components are used to display The output basic input/output system _ power starts the self-test code. The debugging device capable of sharing a memory card slot with the card reader according to the first aspect of the patent application, further comprising: a switching circuit for switching to enable the one of the card reader controllers or The debug circuit.