TWI430427B - Stacked chip set, package with stacked chip set and preparation method thereof - Google Patents

Description

Stacked chip set, package with stacked chip set and preparation method thereof

The present invention relates to a package and a method of manufacturing the same, and more particularly to a package having a stacked chip set and a method of fabricating the same.

At present, electronic products are required to have high-electricity efficiency, high-power function, lightness and shortness. In response to the trend of functional integration of electronic products, the industry actively develops technologies for integrating multiple wafer stacks into the same package. Meet the aforementioned product characteristics. The wafer stacking technology includes: Chip to Chip, Chip to Wafer, Wafer to Wafer, etc., and in various ways, each component (wafer or wafer) The gap between the gaps needs to be filled with a rubber material to protect the conductive bumps for electrically connecting the components, so that the filled wafer module can be connected to electronic components (such as a package substrate, a motherboard, etc.).

Please refer to Figures 1A and 1B for the main technology used in the industry to fill the adhesive. As shown in FIG. 1A, a stacked chip set is formed by using Flip Chip in Flex (FCF), that is, a layer of adhesive film is attached to a wafer, and after being singulated, the wafer is diced. On the adhesive film 11 of 10, another wafer 12 is attached to the adhesive film 11. However, if a multi-layer wafer is to be stacked, the adhesive film 11 needs to be attached to each layer, resulting in a long process time.

Furthermore, as shown in FIG. 1B, a stacked wafer set is formed by using a No-flow Underfill (NUF) dispensing method, that is, a glue 11' is coated on a wafer 10', and another wafer 12 is laminated. The glue is on 11'. However, the amount of glue in the dispensing method is not easy to control, resulting in a problem of overflowing after laminating another wafer 12, and if multiple layers of wafers are to be stacked, each layer needs to be dispensed, resulting in a lengthy process time; In the face of the high number of pins, the distance between the conductive bumps 100 will be reduced to less than 40 μm, resulting in problems such as difficulty in dispensing, increased working time, and reduced yield.

In addition, a stacked wafer set can also be formed by using Wafer Level Underfill (WLUF), that is, a semi-cured adhesive film is formed by spin coating on a wafer, and after the single-cut process, another wafer is bonded to On the adhesive film. However, the formation of the adhesive film is not only complicated in process, but also cumbersome in time, and the adhesive film is formed by spin coating, which may cause problems of overflowing at the edge of the wafer, thereby affecting product appearance, reliability, and contamination of the machine. The problem, and if a multi-layer wafer is to be stacked, each layer needs to be spin-coated with a semi-cured adhesive film, resulting in a lengthy process.

Therefore, how to provide a method for stacking wafers can avoid various shortcomings of the prior art, which is an important issue.

The present invention provides a package having a stacked wafer set, comprising: a package substrate; a stacked wafer set, disposed and electrically connected to the package substrate, the stacked wafer set having a first wafer and being laminated on the first wafer At least one second wafer is electrically connected to the second wafer, and the stacked wafer is disposed on the package substrate by the second wafer, and the thickness of the first wafer is greater than the first a thickness of the two wafers; and a first adhesive material disposed between the gap between the first wafer and the second wafer and a gap between each of the second wafers.

In the above package, the first wafer is electrically connected to the second wafer by conductive bumps, and each of the second wafers is electrically connected to each other by conductive bumps, and the second wafer is electrically conductive. The bump is electrically connected to the package substrate. In addition, the side surfaces of the first wafer, the second wafer, and the first adhesive are flush.

The foregoing package further includes a second adhesive material disposed between the package substrate and the second wafer.

The present invention further provides a stacked wafer set, comprising: a first wafer; a second wafer is disposed on the first wafer, and the first wafer is electrically connected to the second wafer, and the thickness of the first wafer is greater than a thickness of the second wafer; and a first adhesive material disposed between the first wafer and the second wafer.

In the foregoing stacked wafer set, the first wafer is electrically connected to the second wafer by conductive bumps.

In the foregoing stacked wafer set, there are a plurality of second wafers stacked one on another. The first adhesive material is disposed in a gap between each of the second wafers. Each of the second wafers is electrically connected to each other by conductive bumps.

In the foregoing stacked wafer set, the side surfaces of the first wafer, the second wafer and the first adhesive are flush.

The invention provides a method for manufacturing a package with a stacked wafer set, comprising: providing a stacked wafer set having a first wafer and disposed on the first wafer and laminated on the first wafer At least one second wafer for electrically connecting the first wafer to the second wafer; providing a container containing the first adhesive material, and placing the stacked wafer assembly into the first adhesive material of the container a glue material flows into a gap between the first wafer and the second wafer, and a gap between each of the second wafers; moving the stacked wafer group out of the container; removing the first side on the side of the stacked wafer group a glue; curing the first glue; and arranging and electrically connecting the stacked wafer set to the package substrate.

In the above method, the thickness of the first wafer is greater than the thickness of the second wafer, and the first wafer is electrically connected to the second wafer by conductive bumps, each of the second wafers being electrically conductive with each other Electrical connection.

In the above method, the stacked wafer set is electrically connected to the package substrate by conductive bumps, and the conductive bumps are disposed on the second wafer. According to the method, before the curing of the first adhesive, the first adhesive covering the conductive bumps for electrically connecting the package substrate is removed to expose the conductive bumps. . The method further includes forming a second glue between the package substrate and the second wafer after the stacked wafer is disposed on the package substrate.

In addition, in the above method, the first adhesive material of the side of the stacked wafer set is removed by cutting, so that the first wafer, the second wafer and the first adhesive material are flush with each other.

It can be seen from the above that the package with the stacked chip set of the present invention and the manufacturing method thereof are obtained by immersing the stacked wafer set in the first glue material, causing the first glue material to flow between each layer of the wafer, and then removing the stack. Compared with the prior art, the present invention does not need to form a glue layer layer by layer, thereby simplifying the process and shortening the process time, and by removing the excess first glue, Maintain product appearance, improve product reliability, and avoid contamination of the machine.

The other embodiments of the present invention will be readily understood by those skilled in the art from this disclosure.

It is to be understood that the structure, the proportions, the size, and the like of the present invention are intended to be used in conjunction with the disclosure of the specification, and are not intended to limit the invention. The conditions are limited, so it is not technically meaningful. Any modification of the structure, change of the proportional relationship or adjustment of the size should remain in this book without affecting the effects and the objectives that can be achieved by the present invention. The technical content disclosed in the invention can be covered. In the meantime, the terms "upper", "lower", "one" and "two" are used in the description, and are not intended to limit the scope of the invention. Changes or adjustments to a relationship are considered to be within the scope of the invention, without departing from the scope of the invention.

Please refer to FIGS. 2A to 2E , which are a method for fabricating a package with a stacked chip set according to the present invention.

As shown in FIG. 2A, a stacked wafer set 2 is provided. The stacked wafer set 2 has a first wafer 21 and two second wafers 22 stacked on the first wafer 21 (taking two second wafers as an example). And the first wafer 21 is electrically connected to the second wafer 22 by the conductive bumps 20a, and each of the second wafers 22 is electrically connected to each other by the conductive bumps 20b to make the first wafer 21 The second wafer 22 is electrically connected. In this embodiment, the exposed side of the lowermost second wafer 22 is also provided with a conductive bump 20c, and the thickness t of the first wafer 21 is greater than the thickness h of the single second wafer 22 to facilitate the first wafer. 21 is used for carrying the second wafer 22.

As shown in FIG. 2B, a container 3 having a first adhesive material 30 is provided, and a non-actuating surface of the first wafer 21 of the stacked wafer set 2 is adsorbed by a vacuum nozzle (not shown). The stacked wafer set 2 is immersed in the first glue 30 of the container 3, so that the first glue 30 flows into the gap between the first wafer 21 and the second wafer 22, and between the second wafers 22 a gap to cover the conductive bumps 20a, 20b, 20c.

As shown in FIG. 2C, the stacked wafer group 2 is removed from the container 3, and the side portion 2a of the stacked wafer group 2 is removed by, for example, cutting a predetermined cutting line S to remove the stacked wafer group 2. The first adhesive material 30a on the side surface makes the first wafer 21, the second wafer 22 and the first adhesive material 30 have a side surface flush. Then, the first adhesive material 30b on the outer side of the lowermost second wafer 22 (that is, one side of the conductive bumps 20c) is removed by plasma, and the conductive bumps 20c are exposed. Next, the vacuum nozzle is removed.

As shown in FIG. 2D, the remaining first glue 30 is cured to fix the first wafer 21 and the two second wafers 22.

Therefore, the present invention provides a stacked wafer set 2, comprising: a first wafer 21; a second wafer 22 is disposed on the first wafer 21, and the first wafer 21 is electrically connected to the second wafer 22, The thickness t of the first wafer 21 is greater than the thickness h of the second wafer 22; and the first adhesive 30 is disposed between the first wafer 21 and the second wafer 22.

The first wafer 21 is electrically connected to the second wafer 22 by the conductive bumps 20a.

The second wafer 22 has a plurality of electrodes stacked on each other such that the first adhesive material 30 is disposed in a gap between the second wafers 22, and each of the second wafers 22 is formed by conductive bumps. 20b is electrically connected to each other.

The side surfaces of the first adhesive material 30, the first wafer 21 and the second wafer 22 are flush.

As shown in FIG. 2E, the stacked wafer group 2 is disposed on a package substrate 4, and the stacked wafer group 2 is electrically connected to the package substrate 4 by the conductive bumps 20c on the lowermost second wafer 22. . Next, a second adhesive material 5 is formed between the package substrate 4 and the lowermost second wafer 22 to cover the conductive bumps 20c.

The invention directly immerses the stacked wafer set 2 in the first glue 30 to allow the first glue 30 to flow between each layer of wafers, and then remove the excess first glue on the outside of the stacked wafer set 2. The materials 30a, 30b, compared with the prior art, the invention does not need to form a glue layer layer by layer, so the invention not only has a simple process, but also can greatly shorten the process time. Moreover, the excess first rubber material 30a, 30b is also removed by cutting and plasma to overcome the problems of the appearance of the product, reliability, and contamination of the machine by the excess glue of the prior art.

Moreover, regardless of the size of the distance between the conductive bumps 20a, 20b, and 20c, the first adhesive material 30 can flow between each layer of the wafer, which is not only simple in process, fast in operation time, but also improves yield and contributes to fine pitch. The design.

The present invention further provides a package having a stacked wafer set, comprising: a package substrate 4, a stacked wafer set 2 disposed on the package substrate 4, and a first glue 30.

The stacked wafer set 2 has a first wafer 21 and at least one second wafer 22 stacked on the first wafer 21, so that the first wafer 21 is electrically connected to the second by the conductive bumps 20a. The second wafer 22 is electrically connected to each other by the conductive bumps 20b, and the stacked wafer group 2 is disposed on the package substrate 4 by the second wafer 22, and the first wafer 21 is The thickness t is greater than the thickness h of the second wafer 22. In addition, the stacked wafer set 2 is electrically connected to the package substrate 4 by the conductive bumps 20c of the second wafer 22.

The first adhesive material 30 is disposed in a gap between the first wafer 21 and the second wafer 22 and a gap between the second wafers 22 .

The package further includes a second adhesive 5 disposed between the package substrate 4 and the second wafer 22 .

In summary, the package with the stacked chip set of the present invention and the method for manufacturing the same are prepared by directly immersing the stacked wafer set in the first adhesive material, so that the first adhesive material flows between each layer of the wafer, and then removes The first adhesive material is external to the stacked wafer set, so the invention does not need to form a glue material layer by layer, thereby effectively simplifying the process and effectively shortening the process time. Furthermore, by removing the excess first glue, the appearance of the product is maintained, the reliability of the product is improved, and the machine is prevented from being contaminated.

The above embodiments are intended to illustrate the principles of the invention and its effects, and are not intended to limit the invention. Any of the above-described embodiments may be modified by those skilled in the art without departing from the spirit and scope of the invention. Therefore, the scope of protection of the present invention should be as set forth in the appended claims.

10, 10', 12. . . Wafer

100, 20a, 20b, 20c. . . Conductive bump

11. . . Adhesive film

11’. . . Plastic material

2. . . Stacked chip set

2a. . . Side

twenty one. . . First wafer

twenty two. . . Second chip

3. . . container

30, 30a, 30b. . . First glue

4. . . Package substrate

5. . . Second glue

S. . . Cutting line

t, h. . . thickness

1A and 1B are schematic cross-sectional views of a conventional stacked wafer set; and Figs. 2A to 2E are schematic cross-sectional views showing a method of manufacturing a package having a stacked wafer set.

2. . . Stacked chip set

20a, 20b, 20c. . . Conductive bump

twenty one. . . First wafer

twenty two. . . Second chip

30. . . First glue

4. . . Package substrate

5. . . Second glue

t, h. . . thickness

Claims (21)

A package having a stacked chip set, comprising: a package substrate; a stacked chip set disposed on the electrical circuit board, the stacked wafer set having a first wafer and at least a second wafer The first wafer is electrically connected to the second wafer, and the stacked wafer is disposed on the package substrate by the second wafer, and the thickness of the first wafer is greater than the second wafer The thickness of the first adhesive is a gap between the first wafer and the second wafer, and a gap between each of the second wafers. The package of the stacked wafer set of claim 1, wherein the first wafer is electrically connected to the second wafer by a conductive bump. The package of the stacked wafer set according to claim 1, wherein each of the second wafers is electrically connected to each other by a conductive bump. The package of the stacked wafer set of claim 1, wherein the second wafer is electrically connected to the package substrate by conductive bumps. The package with a stacked chip set as described in claim 1 further comprises a second adhesive material disposed between the package substrate and the second wafer. The package of the stacked wafer set according to claim 1, wherein the first wafer, the second wafer and the first adhesive have a side surface flush. A stacked wafer set includes: a first wafer; a second wafer is disposed on the first wafer, and the first wafer is electrically connected to the second wafer, and the first wafer has a thickness greater than the second wafer a thickness; and a first adhesive material disposed between the first wafer and the second wafer. The stacked wafer set of claim 7, wherein the first wafer is electrically connected to the second wafer by a conductive bump. The stacked wafer set according to claim 7, wherein the second wafer has a plurality of layers and are stacked one on another. The stacked wafer set of claim 9, wherein the first adhesive material is disposed in a gap between each of the second wafers. The stacked wafer set of claim 9, wherein each of the second wafers is electrically connected to each other by a conductive bump. The stacked wafer set according to claim 7, wherein the first wafer, the second wafer and the first adhesive have a side surface flush. A method of fabricating a package having a stacked wafer set, comprising: providing a stacked wafer set having a first wafer and at least one second wafer stacked on the first wafer to make the first wafer Electrically connecting the second wafer, and the thickness of the first wafer is greater than the thickness of the second wafer; providing a container containing the first glue, and placing the stacked wafer set into the first glue of the container, Having the first glue flow into the first wafer and a gap between the second wafers, and a gap between each of the second wafers; moving the stacked wafer set out of the container; removing the first glue on the side of the stacked wafer set; curing the first glue And arranging and electrically connecting the stacked wafer set to the package substrate. The method of manufacturing a package with a stacked chip set according to claim 13 , wherein the first chip is electrically connected to the second wafer by a conductive bump. The method of manufacturing a package with a stacked chip set according to claim 13 , wherein each of the second chips is electrically connected to each other by a conductive bump. The method of manufacturing a package with a stacked chip set according to claim 13 , wherein the stacked chip set is electrically connected to the package substrate by conductive bumps. The method of manufacturing a package having a stacked chip set according to claim 16 , wherein the conductive bumps are disposed on the second wafer. The method for manufacturing a package with a stacked chip set according to claim 17 is the method of removing the coating on the second wafer for electrically connecting the package substrate before curing the first adhesive material. The first glue of the conductive bumps is exposed to expose the conductive bumps. The method for manufacturing a package with a stacked chip set according to claim 18, further comprising forming a second glue on the package substrate and the second wafer after the stacked wafer is assembled on the package substrate between. A package having a stacked chip set as described in claim 13 The method of cutting, wherein the first glue on the side of the stacked wafer set is removed by cutting. The method for manufacturing a package with a stacked chip set according to claim 20, wherein the first wafer, the second wafer, and the first wafer are removed by removing the first glue on the side of the stacked wafer group. The side surfaces of one of the three materials are flush.