TWI428605B - Method of Making High Frequency Probe Card - Google Patents
Method of Making High Frequency Probe Card Download PDFInfo
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- TWI428605B TWI428605B TW100122385A TW100122385A TWI428605B TW I428605 B TWI428605 B TW I428605B TW 100122385 A TW100122385 A TW 100122385A TW 100122385 A TW100122385 A TW 100122385A TW I428605 B TWI428605 B TW I428605B
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- 238000004519 manufacturing process Methods 0.000 title claims description 30
- 239000000523 sample Substances 0.000 claims description 177
- 239000000758 substrate Substances 0.000 claims description 95
- 239000004020 conductor Substances 0.000 claims description 49
- 238000000034 method Methods 0.000 claims description 27
- 238000003475 lamination Methods 0.000 claims description 11
- 239000012212 insulator Substances 0.000 claims description 9
- 239000000919 ceramic Substances 0.000 claims description 6
- 238000005553 drilling Methods 0.000 claims description 4
- 239000000463 material Substances 0.000 claims description 4
- 229910052732 germanium Inorganic materials 0.000 claims description 3
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 3
- 239000011521 glass Substances 0.000 claims description 3
- 238000005245 sintering Methods 0.000 claims description 3
- 238000007747 plating Methods 0.000 claims 1
- 238000012360 testing method Methods 0.000 description 10
- 239000011810 insulating material Substances 0.000 description 5
- 230000000694 effects Effects 0.000 description 4
- 238000013461 design Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000009713 electroplating Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 238000004458 analytical method Methods 0.000 description 1
- 238000010344 co-firing Methods 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000003672 processing method Methods 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000007711 solidification Methods 0.000 description 1
- 230000008023 solidification Effects 0.000 description 1
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Description
本發明係有關一種探針卡,尤指一種高頻探針卡之製作方法。The invention relates to a probe card, in particular to a method for manufacturing a high frequency probe card.
半導體進行測試時,測試機須透過一探針卡(probe card)接觸待測物(device under test, 簡稱DUT),並藉由傳輸、分析電性訊號,以獲得待測物的測試結果。探針卡通常包含一基板以及若干個設置於該基板上尺寸精密的探針,每一探針產生均勻的變形量與應力而接觸待測物上的對應銲墊,以確實傳遞來自測試機的測試訊號;同時,配合探針卡及測試機之控制、分析程序,達到量測待測物的目的。When the semiconductor is tested, the test machine must contact the device under test (DUT) through a probe card, and transmit and analyze the electrical signal to obtain the test result of the test object. The probe card usually comprises a substrate and a plurality of precision-sized probes disposed on the substrate, each probe generating a uniform deformation amount and stress to contact a corresponding solder pad on the object to be tested, so as to reliably transmit the test device. Test signal; at the same time, with the control and analysis procedures of the probe card and the test machine, the purpose of measuring the object to be tested is achieved.
由上述說明可以得知,探針卡製作之精密度非常重要,隨著積體電路技術的進步,晶片的體積越來越小,為了進行每一顆晶片的量測,探針卡上之複數探針之間的距離逐漸減小,除此之外,晶片的處理速度也隨著科技的進步而提升,因此,探針卡的量測頻率也必須隨之提升才能銜接上晶片的需求。而高頻探針卡的精準度更大大的影響了量測的精準度,如何於製作過程中精準的進行基板以及探針的對位,實為相關企業所欲解決之問題。It can be known from the above description that the precision of probe card fabrication is very important. With the advancement of integrated circuit technology, the volume of the wafer is getting smaller and smaller. In order to measure each wafer, the number on the probe card is plural. The distance between the probes is gradually reduced. In addition, the processing speed of the wafer is also improved with the advancement of technology. Therefore, the measurement frequency of the probe card must also be increased to meet the demand of the wafer. The accuracy of the high-frequency probe card greatly affects the accuracy of the measurement. How to accurately perform the alignment of the substrate and the probe during the production process is a problem that the relevant enterprise wants to solve.
而如美國發明專利公告第7656175號之「Inspection unit」,其揭露了一種探針卡結構,一般之探針卡係分別製作基板、上蓋以及下蓋,於組裝時,先於基板上插入探針後,在分別將上蓋及下蓋利用對位的方式與基板進行組裝,而將探針固定於探針卡中,基板的製作通常由工廠進行製造,而組裝對位的程序大部分由購買基板的廠商進行。另如美國專利公告第4724180號,專利名稱為「Electrically shielded connectors」,其揭露之探針卡亦同樣的必須先行製造兩段基板,在於插入探針卡後進行組裝對位以固定探針卡,同樣的,一般來說,組裝對位的過程是由購買基板的廠商自行處理。如上述所提,於高頻探針的模組中,組裝對位所要求的精準度相當高,因而費時耗力,實不符合現今廠商的需求。For example, the "Inspection unit" of the U.S. Patent No. 7,651,715 discloses a probe card structure. Generally, the probe card is made separately from the substrate, the upper cover and the lower cover. When assembling, the probe is inserted before the substrate. Then, the upper cover and the lower cover are respectively assembled with the substrate by means of alignment, and the probe is fixed in the probe card. The manufacture of the substrate is usually manufactured by a factory, and the procedure for assembling the alignment is mostly purchased from the substrate. The vendor is conducting. In addition, as disclosed in U.S. Patent No. 4,724,180, the patent name is "Electrically shielded connectors", and the probe card disclosed therein must also be manufactured in two stages, and the probe card is inserted and aligned to fix the probe card. Similarly, in general, the process of assembling the alignment is handled by the manufacturer who purchased the substrate. As mentioned above, in the module of the high-frequency probe, the precision required for assembly alignment is quite high, which is time-consuming and labor-intensive, which does not meet the needs of today's manufacturers.
本發明之主要目的,在於降低探針卡的製作時間及成本。The main object of the present invention is to reduce the production time and cost of the probe card.
本發明之另一目的,在於提高探針卡的對位精準度。Another object of the present invention is to improve the alignment accuracy of the probe card.
為達上述目的,本發明提供一種高頻探針卡之製作方法,其包含有以下步驟:To achieve the above objective, the present invention provides a method for fabricating a high frequency probe card, which comprises the following steps:
S1:製造一探針基板,該探針基板係以層疊方式製作成多層結構,其中於製作該探針基板之層疊製作過程中,設置至少兩導電部於多層結構之中,且該至少兩導電部各具有一探針環體及一接地段,該探針環體係與該接地段電性連接,該至少兩導電部係對應且相互平行設置;S1: manufacturing a probe substrate, which is formed into a multilayer structure by lamination, wherein at least two conductive portions are disposed in the multilayer structure during the lamination process for fabricating the probe substrate, and the at least two conductive layers are Each of the portions has a probe ring body and a grounding portion, and the probe ring system is electrically connected to the grounding portion, and the at least two conductive portions are corresponding to each other and disposed in parallel with each other;
S2:於每一該探針環體之內環區域上及每一該接地段內分別形成一訊號孔及一接地孔,且該訊號孔之孔徑小於該探針環體之內徑;S2: forming a signal hole and a grounding hole in each inner ring region of each probe ring body and each of the grounding segments, and the signal hole has a smaller aperture than the inner diameter of the probe ring body;
S3:設置一第一接地導電體,該第一接地導電體設置在每一該探針環體的區域中,且該第一接地導電體與每一該探針環體電性連接;S3: a first grounding conductor is disposed, the first grounding conductor is disposed in a region of each of the probe ring bodies, and the first grounding conductor is electrically connected to each of the probe ring bodies;
S4:置入探針,完成上述之該訊號孔、該接地孔及該第一接地導電體之設置後,對應該訊號孔及該接地孔之位置分別設置一訊號探針及一接地探針,該接地探針接觸每一該接地段。S4: inserting a probe to complete the setting of the signal hole, the grounding hole and the first grounding conductor, respectively, and setting a signal probe and a grounding probe respectively corresponding to the position of the signal hole and the grounding hole, The ground probe contacts each of the ground segments.
藉由上述之製作流程,基板、該訊號孔及該接地孔已於工廠生產時一併製作完成,購買基板的廠商在拿到基板之後僅需要將探針置入即可,其不需要精準的對位程序,亦可減少組裝對位的時間成本。Through the above manufacturing process, the substrate, the signal hole and the grounding hole are completed at the time of factory production, and the manufacturer who purchases the substrate only needs to put the probe after receiving the substrate, which does not need to be precise. The alignment program can also reduce the time cost of assembly alignment.
有關本發明之詳細說明及技術內容,現就配合圖式說明如下:The detailed description and technical contents of the present invention will now be described as follows:
請參閱「圖1」及「圖2A」至「圖2G」,「圖1」係本發明一較佳實施例之立體結構示意圖,「圖2A」至「圖2G」係本發明一較佳實施例之製作流程示意圖,如圖所示:本發明係為一種高頻探針卡之製作方法,其包含有以下步驟:Please refer to FIG. 1 and FIG. 2A to FIG. 2G. FIG. 1 is a perspective view of a preferred embodiment of the present invention. FIG. 2A to FIG. 2G are a preferred embodiment of the present invention. A schematic diagram of a production process, as shown in the figure: The present invention is a method for manufacturing a high frequency probe card, which comprises the following steps:
S1:製造一探針基板10,該探針基板10係以層疊方式製作成多層結構,其中於製作該探針基板10之層疊製作過程中,設置至少兩導電部13於多層結構之中,在本發明實施例的圖式中,以兩導電部13為代表,依照該探針基板10電路佈局的設計,該導電部13並不侷限於特定的設計結構,可以為「圖1」的片狀結構或者其他結構,而該兩導電部13係為對稱結構,並間隔一段距離,藉此達到阻抗匹配的功能,該探針基板10為絕緣物質所製成。絕緣材料可為多層陶瓷基板(Multi-Layer Ceramic, MLC)、多層有機基板(multi-layer organic, MLO)、玻璃基板、矽基板或印刷電路板,於本實施例中,其係為低溫共燒多層陶瓷(Low-Temperature Co-fired Ceramics, LTCC)。請配合參閱「圖2A」及「圖2B」,於層疊方式製作該探針基板10時,導電部13係設置於探針基板10中,於此,該導電部13分別設置於該探針基板10的兩側接近表面處。若該探針基板10為多層陶瓷基板,可透過燒結製作該探針基板10。S1: manufacturing a probe substrate 10 which is formed into a multilayer structure by lamination, wherein at least two conductive portions 13 are disposed in the multilayer structure during the lamination process for fabricating the probe substrate 10, In the embodiment of the present invention, the two conductive portions 13 are representative, and the conductive portion 13 is not limited to a specific design structure according to the circuit layout design of the probe substrate 10, and may be a sheet shape of "FIG. 1". The structure or other structure, and the two conductive portions 13 are symmetric structures and spaced apart to achieve the function of impedance matching, and the probe substrate 10 is made of an insulating material. The insulating material may be a multi-layer ceramic substrate (MLC), a multi-layer organic (MLO), a glass substrate, a germanium substrate or a printed circuit board. In this embodiment, it is a low-temperature co-firing. Low-Temperature Co-fired Ceramics (LTCC). Referring to FIG. 2A and FIG. 2B, when the probe substrate 10 is formed by lamination, the conductive portion 13 is provided in the probe substrate 10. Here, the conductive portion 13 is respectively disposed on the probe substrate. The sides of 10 are close to the surface. When the probe substrate 10 is a multilayer ceramic substrate, the probe substrate 10 can be formed by sintering.
S2:形成複數置針孔,請配合參閱「圖2C」所示,於該探針基板10上形成複數該置針孔,其包含有一訊號置針孔71及一接地置針孔72,該訊號置針孔71及該接地置針孔72分別與該導電部13連接。在「圖2C」中,該訊號置針孔71及該接地置針孔72是在該探針基板10上以鑽孔或其它的方式貫穿該探針基板10的兩側表面。S2: forming a plurality of pinholes, as shown in FIG. 2C, forming a plurality of pinholes on the probe substrate 10, including a signal pinhole 71 and a ground pinhole 72, the signal The pin hole 71 and the ground pin hole 72 are connected to the conductive portion 13, respectively. In FIG. 2C, the signal pinhole 71 and the ground pinhole 72 are drilled or otherwise penetrated on both sides of the probe substrate 10 on the probe substrate 10.
S3:設置一第一接地導電體40,請配合參閱「圖2D」,該第一接地導電體40形成於該訊號置針孔71之內壁周緣,於本實施例中,該第一接地導電體40係在該訊號置針孔71完成後,以電鍍的方式設置於該訊號置針孔71的內壁表面。S3: a first grounding conductor 40 is disposed. Please refer to FIG. 2D. The first grounding conductor 40 is formed on the inner wall of the signal pinhole 71. In this embodiment, the first grounding conductor is electrically conductive. The body 40 is disposed on the inner wall surface of the signal pinhole 71 by electroplating after the signal pinhole 71 is completed.
在步驟S3之中,更具有一步驟S3A:設置一第二接地導電體41,該第二接地導電體41同樣以電鍍的製作方式形成於該接地置針孔72的內壁周圍,於完成該第二接地導電體41之設置後,該第二接地導電體41內部形成之穿孔為一接地孔12,在步驟S3中,第二接地導電體41並非是必須製作的製程步驟,若沒有第二接地導電體41,則在「圖2C」的接地置針孔72就不需要作其他的加工,接地置針孔72可視為接地孔12。在步驟S3之中,由於接地孔(即接地置針孔72)與該導電部13為連通,在製程最後將接地探針30放入接地孔(接地置針孔72)時,接地探針30與該導電部13將電性接觸,而在步驟S3A中,第二接地導電體41之設置是為了加強該導電部13與接地探針30之間的電性連接,而接地探針30將置放於接地孔12。In the step S3, there is a step S3A: a second grounding conductor 41 is disposed, and the second grounding conductor 41 is also formed in the manner of electroplating around the inner wall of the grounding pinhole 72. After the second grounding conductor 41 is disposed, the through hole formed in the second grounding conductor 41 is a grounding hole 12. In the step S3, the second grounding conductor 41 is not a manufacturing process that must be made. When the ground conductor 41 is used, the ground pin hole 72 of "FIG. 2C" does not need to be processed otherwise, and the ground pin hole 72 can be regarded as the ground hole 12. In step S3, since the grounding hole (ie, the grounding pinhole 72) is in communication with the conductive portion 13, the grounding probe 30 is grounded at the end of the process when the grounding probe 30 is placed in the grounding hole (the grounding pinhole 72). Electrically contacting the conductive portion 13, and in step S3A, the second grounding conductor 41 is disposed to strengthen the electrical connection between the conductive portion 13 and the grounding probe 30, and the grounding probe 30 is placed. Placed in the grounding hole 12.
S4:設置一絕緣體50,請配合參閱「圖2E」,該絕緣體50是設置在該第一接地導電體40內壁,進一步來說,在該第一接地導電體40設置完成之後,填充絕緣物質於該第一接地導電體40的內側的穿孔,再使該絕緣物質固化,接著再以鑽孔的方式在絕緣物質上貫穿該探針基板10的兩側表面形成穿孔,因而形成該絕緣體50,而這邊形成的穿孔即是一訊號孔11。S4: an insulator 50 is provided. Please refer to FIG. 2E. The insulator 50 is disposed on the inner wall of the first grounding conductor 40. Further, after the first grounding conductor 40 is disposed, the insulating material is filled. Forming a through hole on the inner side of the first grounding conductor 40 to cure the insulating material, and then forming a through hole through the two sides of the probe substrate 10 on the insulating material by drilling, thereby forming the insulator 50, The perforation formed here is a signal hole 11.
S5:置入複數探針,請配合參閱「圖2F」,將訊號探針20放置到對應該訊號孔11中,接地探針30放置到該接地孔12中,該訊號探針20藉由該絕緣體50與該第一接地導電體40電性隔離,該接地探針30則與設置在該接地孔12內的第二接地導電體41連接。需特別說明的是,若該接地置針孔72並未設置該第二接地導電體41,則該接地探針30則直接設置於該接地置針孔72內。訊號探針20及接地探針30為彈簧針(Pogo pin)的結構。由於訊號探針20及接地探針30需對應待測物(未圖示)上銲墊的位置進行排列,因此,訊號探針20及接地探針30之間的間距是固定無法調整控制的,藉由該導電部13連接該第一接地導電體40及該第二接地導電體41的結構設計,使訊號探針20與該第一接地導電體40之間接地的間距(pitch)可以受到控制,以讓訊號探針20與該第一接地導電體40具有阻抗匹配的效果,達到高頻測試的目的。進一步來說,上述的製程步驟,是控制絕緣體50的內、外徑(即訊號探針20與該第一接地導電體40之間的間距)及訊號探針20與第一接地導電體40兩者的尺寸。S5: Inserting a plurality of probes, please refer to FIG. 2F, and placing the signal probe 20 into the corresponding signal hole 11 into which the grounding probe 30 is placed. The signal probe 20 is used by the signal probe 20 The insulator 50 is electrically isolated from the first ground conductor 40, and the ground probe 30 is connected to the second ground conductor 41 disposed in the ground hole 12. It should be noted that if the grounding pin hole 72 is not provided with the second grounding conductor 41, the grounding probe 30 is directly disposed in the grounding pinhole 72. The signal probe 20 and the ground probe 30 are in the form of a pogo pin. Since the signal probe 20 and the grounding probe 30 are arranged corresponding to the positions of the pads on the object to be tested (not shown), the spacing between the signal probe 20 and the grounding probe 30 is fixed and cannot be adjusted. The pitch of the grounding probe 20 and the first grounding conductor 40 can be controlled by the structural design of the first grounding conductor 40 and the second grounding conductor 41. In order to achieve the effect of impedance matching between the signal probe 20 and the first ground conductor 40, the purpose of high frequency testing is achieved. Further, the above process steps are to control the inner and outer diameters of the insulator 50 (ie, the distance between the signal probe 20 and the first ground conductor 40) and the signal probe 20 and the first ground conductor 40. The size of the person.
除了上述之實施方式之外,本發明亦可設置一步驟S6:設置一底層基板60,請配合參閱「圖2G」,其係設置於該探針基板10鄰近一待測物(未圖示)之一側,且該底層基板60上具有一訊號固定孔61及一接地固定孔62,該訊號固定孔61之孔徑小於該訊號孔11,該接地固定孔62之孔徑小於該接地孔12。一般來說,探針基板10上方會設置在ㄧ具有空間轉換功能的基板(未圖示)上,此基板在上表面的相鄰接點具有一第一間距,下表面的相鄰接點具有一第二間距,該第一間距大於該第二間距,上述空間轉換的定義是指將基板上表面的第一間距轉換成下表面的第二間距,而在探針基板10的下方處會放置待測物以使該訊號探針20及該接地探針30點測待測物,為了避免該訊號探針20及該接地探針30的滑落,步驟S5所設置之底層基板60可用以避免該訊號探針20及該接地探針30向待測物的方向滑落。In addition to the above embodiments, the present invention may also provide a step S6: providing an underlying substrate 60, please refer to FIG. 2G, which is disposed adjacent to an object to be tested (not shown) on the probe substrate 10. On one side, the bottom substrate 60 has a signal fixing hole 61 and a ground fixing hole 62. The signal fixing hole 61 has a smaller aperture than the signal hole 11. The ground fixing hole 62 has a smaller aperture than the ground hole 12. Generally, the probe substrate 10 is disposed on a substrate (not shown) having a space conversion function, and the substrate has a first pitch at adjacent contacts on the upper surface, and adjacent contacts on the lower surface have a second pitch, the first pitch being greater than the second pitch, wherein the spatial conversion is defined as converting a first pitch of the upper surface of the substrate into a second pitch of the lower surface, and placing the lower pitch of the probe substrate 10 The test object is used to make the signal probe 20 and the ground probe 30 point to test the object to be tested. In order to avoid the sliding of the signal probe 20 and the ground probe 30, the bottom substrate 60 provided in step S5 can be used to avoid the object. The signal probe 20 and the ground probe 30 slide down in the direction of the object to be tested.
再者,請參閱「圖3」所示,其係本發明之第二實施例之立體結構示意圖,請一併參閱「圖4A」至「圖4E」所示,其為探針基板10a於「圖3」A-A的剖視圖,而需特別說明,「圖4A」至「圖4E」係根據「圖3」A-A位置所看到的製程示意圖,並非為正規的剖面圖,其步驟包含:In addition, please refer to FIG. 3, which is a schematic perspective view of a second embodiment of the present invention. Please refer to FIG. 4A to FIG. 4E for the probe substrate 10a. 3A is a cross-sectional view of AA, and it is necessary to specifically explain that "FIG. 4A" to "FIG. 4E" are schematic diagrams of the process seen according to the AA position of FIG. 3, which is not a regular sectional view, and the steps thereof include:
S1:製造一探針基板10a,請配合參閱「圖4A」,該探針基板10a係以層疊方式製作成多層結構,其中於製作該探針基板10a之層疊製作過程中,設置至少兩導電部13a於多層結構之間,在本發明實施例的圖式中,以兩導電部13a為代表,且每個該導電部13a具有一探針環體131及一接地段132,且該探針環體131與該接地段132係電性相連接,需特別說明的是,該探針環體131之內環區域的中空部位填充有與該探針基板10a相同的板材,該探針基板10a之材質係選自於由多層陶瓷基板、多層有機基板、玻璃基板、矽基板及印刷電路板所組成之群組,如「圖3」所示,兩導電部13a須對應且相互平行設置,且分別設置於該探針基板10a的兩側接近表面處。S1: manufacturing a probe substrate 10a, which is referred to as "FIG. 4A". The probe substrate 10a is formed into a multilayer structure by lamination, wherein at least two conductive portions are provided during the lamination process for fabricating the probe substrate 10a. 13a between the multilayer structure, in the embodiment of the present invention, represented by two conductive portions 13a, and each of the conductive portions 13a has a probe ring body 131 and a grounding portion 132, and the probe ring The body 131 is electrically connected to the grounding portion 132. Specifically, the hollow portion of the inner ring region of the probe ring body 131 is filled with the same plate material as the probe substrate 10a, and the probe substrate 10a is The material is selected from the group consisting of a multilayer ceramic substrate, a multilayer organic substrate, a glass substrate, a germanium substrate, and a printed circuit board. As shown in FIG. 3, the two conductive portions 13a are required to be corresponding to each other and arranged in parallel with each other. It is disposed on both sides of the probe substrate 10a near the surface.
S2:於該探針環體131內環區域上及該接地段132內形成一訊號孔11a及一接地孔12a,請配合參閱「圖4B」,該訊號孔11a及該接地孔12a係利用鑽孔或其他加工方式形成,且該訊號孔11a之孔徑小於該探針環體131之內徑,因而該訊號孔11a與該探針環體131之間具有一定距離之間隔,使該訊號孔11a與該導電部13a之間有探針基板10a本身的材料作電性絕緣,於本實施例中,該接地段132需要有該接地孔12a的設置,才能在後面的步驟中放置探針到該接地孔12a中,因此使該接地段132形成環狀結構。S2: a signal hole 11a and a ground hole 12a are formed in the inner ring region of the probe ring body 131 and the grounding portion 132. Please refer to FIG. 4B. The signal hole 11a and the ground hole 12a are drilled. A hole or other processing manner is formed, and the aperture of the signal hole 11a is smaller than the inner diameter of the probe ring body 131, so that the signal hole 11a and the probe ring body 131 are separated by a certain distance, so that the signal hole 11a The material of the probe substrate 10a itself is electrically insulated from the conductive portion 13a. In this embodiment, the grounding portion 132 needs to be disposed with the grounding hole 12a, so that the probe can be placed in the subsequent step. In the grounding hole 12a, the grounding section 132 is thus formed into a ring structure.
S3:設置一第一接地導電體40a,該第一接地導電體40a設置在該探針環體131的區域中,且該第一接地導電體40a與該探針環體131電性連接。而於本發明中,如「圖4C」及「圖4D」所示,其係利用鑽孔或其他加工方式對探針基板10a相應於該探針環體131之位置進行加工,需注意的是,需在該探針環體131之區域中加工,以形成一孔洞42,接著灌入導電溶液,固化後形成該第一接地導電體40a,或者,在形成該孔洞42後,直接於該孔洞42中放入導線,以作為該第一接地導電體40a。在此實施例中共設置四個第一接地導電體40a,其係以相隔90度的方式設置在該探針環體131的區域中。另需強調的是,因為孔洞42與該訊號孔11a及該接地孔12a之設置並無絕對順序關係,步驟S2及步驟S3可對調順序完成。S3: A first grounding conductor 40a is disposed. The first grounding conductor 40a is disposed in a region of the probe ring body 131, and the first grounding conductor 40a is electrically connected to the probe ring body 131. In the present invention, as shown in FIG. 4C and FIG. 4D, the position of the probe substrate 10a corresponding to the probe ring body 131 is processed by drilling or other processing methods. It is processed in the region of the probe ring body 131 to form a hole 42 and then poured into the conductive solution to form the first ground conductor 40a after solidification, or directly after the hole 42 is formed. A wire is placed in 42 as the first ground conductor 40a. In this embodiment, a total of four first ground conductors 40a are disposed, which are disposed in the region of the probe ring body 131 at a distance of 90 degrees. It should be emphasized that since the arrangement of the hole 42 and the signal hole 11a and the ground hole 12a is not in an absolute order relationship, the steps S2 and S3 can be completed in the order of the adjustment.
S4:置入探針,請參閱「圖4E」所示,完成上述之該訊號孔11a及接地孔12a及該第一接地導電體40a之設置後,對應該訊號孔11a及該接地孔12a之位置分別設置一訊號探針20及一接地探針30。該接地探針30係置入該接地孔12a,藉由該接地探針30接觸該接地段132的內壁而與該接地段132電性連接。在該訊號探針20與該探針環體131之間,藉由該探針基板10a可以間隔兩者,並使兩者絕緣。在製作探針基板10a時,控制該第一接地導電體40a與訊號孔11a的間距,可以控制訊號探針20的阻抗匹配,以達到高頻探測的目的。S4: Inserting the probe, as shown in FIG. 4E, after the signal hole 11a, the grounding hole 12a, and the first grounding conductor 40a are disposed, the corresponding signal hole 11a and the grounding hole 12a are disposed. A signal probe 20 and a ground probe 30 are respectively disposed at positions. The grounding probe 30 is placed in the grounding hole 12a, and the grounding probe 30 is electrically connected to the grounding section 132 by contacting the inner wall of the grounding section 132. Between the signal probe 20 and the probe ring body 131, the probe substrate 10a can be spaced apart to insulate the two. When the probe substrate 10a is fabricated, the distance between the first ground conductor 40a and the signal hole 11a is controlled, and the impedance matching of the signal probe 20 can be controlled to achieve the purpose of high frequency detection.
S5:設置一底層基板(未圖示),本發明亦可相同於第一實施例而設置底層基板,藉此固定該訊號探針20及該接地探針30。該底層基板係設置於該探針基板10a鄰近一待測物之一側,且該底層基板上具有一訊號固定孔及一接地固定孔,該訊號固定孔之孔徑小於該訊號孔11a,該接地固定孔之孔徑小於該接地孔12a。S5: An underlying substrate (not shown) is provided. The present invention can also provide an underlying substrate in the same manner as the first embodiment, thereby fixing the signal probe 20 and the grounding probe 30. The bottom substrate is disposed on a side of the probe substrate 10a adjacent to an object to be tested, and the bottom substrate has a signal fixing hole and a ground fixing hole. The signal fixing hole has a smaller aperture than the signal hole 11a. The aperture of the fixing hole is smaller than the grounding hole 12a.
上述的各實施例中,探針基板要達到高頻探針卡的效果,係在探針基板內部設置至少兩個導電部,該兩導電部須分別設置於該探針基板的兩側接近表面處,且該兩導電部需互相平行,這兩導電部可視為一組訊號探針的阻抗匹配結構,該兩導電部可將接地探針的接地電位電性連接到訊號探針的周圍,以達到同軸或阻抗匹配的效果,當然兩導電部需要位在訊號探針兩端(該探針基板的兩側接近表面處),才可使訊號探針具有阻抗匹配的效果。在本發明的探針基板中,可以同時設置多組的阻抗匹配結構(兩導電部)。In each of the above embodiments, the probe substrate has the effect of a high-frequency probe card, and at least two conductive portions are disposed inside the probe substrate, and the two conductive portions are respectively disposed on the two sides of the probe substrate. Wherein, the two conductive portions need to be parallel to each other, and the two conductive portions can be regarded as an impedance matching structure of a set of signal probes, and the two conductive portions can electrically connect the ground potential of the ground probe to the periphery of the signal probe, To achieve the effect of coaxial or impedance matching, of course, the two conductive parts need to be located at both ends of the signal probe (the two sides of the probe substrate are close to the surface), so that the signal probe has the effect of impedance matching. In the probe substrate of the present invention, a plurality of sets of impedance matching structures (two conductive portions) can be simultaneously provided.
綜上所述,由於本發明利用上述之製作流程,基板以及探針孔已於工廠生產時一併製作或燒結完成,購買基板的廠商在拿到基板之後僅需要將探針置入即可,其不需要精準的對位程序,亦可減少組裝對位的時間成本。尤其是在導電部內置的狀況下,藉由本發明直接於生產工廠進行燒結動作或者其他相關製程,可避免如習知技術中,必須分成三個基板,而在將探針置入後在進行上下基板的組裝對位,造成有對位困難的問題。因此本發明極具進步性及符合申請發明專利之要件,爰依法提出申請,祈 鈞局早日賜准專利,實感德便。In summary, since the present invention utilizes the above-described manufacturing process, the substrate and the probe hole have been fabricated or sintered at the time of factory production, and the manufacturer who purchases the substrate only needs to insert the probe after receiving the substrate. It does not require precise alignment procedures and reduces the time cost of assembly alignment. In particular, in the case where the conductive portion is built in, the sintering operation or other related processes are directly performed in the production plant by the present invention, and it is possible to avoid the fact that, as in the prior art, it is necessary to divide into three substrates, and after the probe is placed, it is carried out. The assembly of the substrate is aligned, causing problems in alignment. Therefore, the present invention is highly progressive and conforms to the requirements of the invention patent application, and the application is filed according to law, and the praying office grants the patent as soon as possible.
以上已將本發明做一詳細說明,惟以上所述者,僅爲本發明之一較佳實施例而已,當不能限定本發明實施之範圍。即凡依本發明申請範圍所作之均等變化與修飾等,皆應仍屬本發明之專利涵蓋範圍內。The present invention has been described in detail above, but the foregoing is only a preferred embodiment of the present invention, and is not intended to limit the scope of the invention. That is, the equivalent changes and modifications made by the scope of the present application should remain within the scope of the patent of the present invention.
10、10a‧‧‧探針基板10, 10a‧‧‧ probe substrate
11、11a‧‧‧訊號孔11, 11a‧‧‧ signal hole
12、12a‧‧‧接地孔12, 12a‧‧‧ grounding hole
13、13a‧‧‧導電部13, 13a‧‧‧Electrical Department
131‧‧‧探針環體131‧‧‧ probe ring
132‧‧‧接地段132‧‧‧ Grounding section
20‧‧‧訊號探針20‧‧‧Signal probe
30‧‧‧接地探針30‧‧‧ Grounding probe
40、40a‧‧‧第一接地導電體40, 40a‧‧‧First grounding conductor
41‧‧‧第二接地導電體41‧‧‧Second grounding conductor
42‧‧‧孔洞42‧‧‧ holes
50‧‧‧絕緣體50‧‧‧Insulator
60‧‧‧底層基板60‧‧‧Bottom substrate
61‧‧‧訊號固定孔61‧‧‧ Signal fixing hole
62‧‧‧接地固定孔62‧‧‧Ground fixing hole
71‧‧‧訊號置針孔71‧‧‧ Signal pinhole
72‧‧‧接地置針孔72‧‧‧ Ground pinhole
圖1,係本發明一較佳實施例之立體結構示意圖。Figure 1 is a perspective view of a preferred embodiment of the present invention.
圖2A-圖2G,係本發明一較佳實施例之製作流程示意圖。2A-2G are schematic diagrams showing a manufacturing process of a preferred embodiment of the present invention.
圖3,係本發明之第二實施例之立體結構示意圖。Fig. 3 is a perspective view showing the structure of a second embodiment of the present invention.
圖4A-圖4E,係本發明之第二實施例之製程示意圖。4A-4E are schematic views showing a process of a second embodiment of the present invention.
10‧‧‧探針基板 10‧‧‧Probe substrate
13‧‧‧導電部 13‧‧‧Electrical Department
20‧‧‧訊號探針 20‧‧‧Signal probe
30‧‧‧接地探針 30‧‧‧ Grounding probe
40‧‧‧第一接地導電體 40‧‧‧First grounding conductor
41‧‧‧第二接地導電體 41‧‧‧Second grounding conductor
50‧‧‧絕緣體 50‧‧‧Insulator
Claims (10)
S1:製造一探針基板,該探針基板係以層疊方式製作成多層結構,其中於製作該探針基板之層疊製作過程中,設置至少兩導電部於多層結構之中,且該至少兩導電部各具有一探針環體及一接地段,該探針環體係與該接地段電性連接,該至少兩導電部係對應且相互平行設置;
S2:於每一該探針環體之內環區域上及每一該接地段內分別形成一訊號孔及一接地孔,且該訊號孔之孔徑小於該探針環體之內徑;
S3:設置一第一接地導電體,該第一接地導電體設置在每一該探針環體的區域中,且該第一接地導電體與每一該探針環體電性連接;
S4:置入探針,完成上述之該訊號孔、該接地孔及該第一接地導電體之設置後,對應該訊號孔及該接地孔之位置分別設置一訊號探針及一接地探針,該接地探針接觸每一該接地段。A method for manufacturing a high frequency probe card, comprising the following steps:
S1: manufacturing a probe substrate, which is formed into a multilayer structure by lamination, wherein at least two conductive portions are disposed in the multilayer structure during the lamination process for fabricating the probe substrate, and the at least two conductive layers are Each of the portions has a probe ring body and a grounding portion, and the probe ring system is electrically connected to the grounding portion, and the at least two conductive portions are corresponding to each other and disposed in parallel with each other;
S2: forming a signal hole and a grounding hole in each inner ring region of each probe ring body and each of the grounding segments, and the signal hole has a smaller aperture than the inner diameter of the probe ring body;
S3: a first grounding conductor is disposed, the first grounding conductor is disposed in a region of each of the probe ring bodies, and the first grounding conductor is electrically connected to each of the probe ring bodies;
S4: inserting a probe to complete the setting of the signal hole, the grounding hole and the first grounding conductor, respectively, and setting a signal probe and a grounding probe respectively corresponding to the position of the signal hole and the grounding hole, The ground probe contacts each of the ground segments.
S1:製造一探針基板,該探針基板係以層疊方式製作成多層結構,其中於製作該探針基板之層疊製作過程中,設置至少兩導電部於多層結構之中;
S2:形成複數置針孔,於該探針基板上形成複數該置針孔,其包含有一訊號置針孔及一接地置針孔,該訊號置針孔及該接地置針孔分別與該至少兩導電部連接;
S3:形成一第一接地導電體,該第一接地導電體形成於該訊號置針孔之內壁周緣;
S4:設置一絕緣體,該絕緣體設置於該第一接地導電體之內壁周緣,並形成一訊號孔;
S5:置入複數探針,於該訊號孔及該接地置針孔內分別設置一訊號探針及一接地探針,該接地探針接觸該至少兩導電部。A method for manufacturing a high frequency probe card, comprising the following steps:
S1: manufacturing a probe substrate, wherein the probe substrate is formed into a multilayer structure by lamination, wherein at least two conductive portions are disposed in the multilayer structure during the lamination process for fabricating the probe substrate;
S2: forming a plurality of pinholes, forming a plurality of pinholes on the probe substrate, comprising: a signal pinhole and a ground pinhole, the signal pinhole and the ground pinhole respectively and the pinhole Connecting two conductive portions;
S3: forming a first grounding conductor, the first grounding conductor is formed on a periphery of an inner wall of the signal pinhole;
S4: an insulator is disposed, the insulator is disposed on a periphery of an inner wall of the first grounding conductor, and forms a signal hole;
S5: Inserting a plurality of probes, respectively, a signal probe and a grounding probe are disposed in the signal hole and the grounding pinhole, and the grounding probe contacts the at least two conductive portions.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW100122385A TWI428605B (en) | 2011-06-27 | 2011-06-27 | Method of Making High Frequency Probe Card |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW100122385A TWI428605B (en) | 2011-06-27 | 2011-06-27 | Method of Making High Frequency Probe Card |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW201300785A TW201300785A (en) | 2013-01-01 |
| TWI428605B true TWI428605B (en) | 2014-03-01 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW100122385A TWI428605B (en) | 2011-06-27 | 2011-06-27 | Method of Making High Frequency Probe Card |
Country Status (1)
| Country | Link |
|---|---|
| TW (1) | TWI428605B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP3676619B1 (en) * | 2017-08-30 | 2023-09-27 | FormFactor, Inc. | Vertical probe array having a tiled membrane space transformer |
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2011
- 2011-06-27 TW TW100122385A patent/TWI428605B/en not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| TW201300785A (en) | 2013-01-01 |
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