TWI411206B - Power factor correction circuit of power converter - Google Patents

Abstract

The invention concerns a power factor correction circuit for power converter, coupled with a power converter in order to adjust one power factor of the power converter. The correction of power factor is realized by generating a voltage command signal from a voltage feedback circuit in accordance with the output signal of the power converter; an operation circuit receives the voltage input signal, the current sense signal, and the voltage command signal of the power converter; the operation circuit generates one multiplication signal in accordance with the voltage input signal and the voltage command signal, and a first reference signal in accordance with the voltage input signal and one current sense signal. The operation circuit then generates a control signal in accordance with the multiplication signal and the first reference signal; a switch circuit generates one switch signal in accordance with the control signal and one second reference signal to switch on/off the power converter. The invention uses a multiplier instead of a division device for providing a power factor correction circuit with a simple structure and thereby achieves the purpose of minimizing the power factor correction circuit and reducing the cost.

Description

Power factor correction circuit for power converter

The present invention relates to a power factor correction circuit, and more particularly to a power factor correction circuit for a power converter.

According to the current supply and demand of high-quality power supply providers, power supply and demand has always been the goal of all countries in the world. However, the construction of a large number of power plants is not the only way to solve the problem. On the one hand, the energy supply of electricity is improved, and on the other hand, electrical products are improved. The power factor or efficiency can effectively solve the problem. The main function of the power factor corrector is to make the input voltage of the electrical product and the input current have the same phase, and the load of the electrical product is similar to the resistive load to achieve the high power factor of the power supply.

There are three main types of power factor correctors. The first is the critical conduction mode (CRM PFC), and the second is the discontinuous current conduction mode (DCM PFC). The third type is Continuous Current Conduction Mode (CCM PFC).

Please refer to the first figure, which is a circuit diagram of a power factor correction circuit of the prior art. As shown in the figure, the power factor correction circuit of the prior art is a continuous power factor corrector (CCM PFC), and the commonly used control method is a so-called average current (average The control mode, as in the first figure, when the AC power source AC is rectified by a bridge rectifier 10' into an input voltage Vin of a waveform similar to an m shape, an operation circuit 20' obtains a voltage error signal A through the voltage loop compensation circuit 30' or Referring to the voltage command, the difference between the output voltage Vout*Kf and the expected (reference) voltage Vref generates a voltage error signal A via a compensation circuit, and an input signal B is taken out from the input voltage Vin through a pre-circuit 40'. The square signal of the average value C of the input voltage Vin (ie, C^2 signal). The multiplier 22' of the arithmetic circuit 20' multiplies the processing voltage error signal A and the input signal B, and then divides the divider 24' of the operation circuit 20' by the square signal C^2 to output a waveform. A m-like current command signal Iref. The reason why the arithmetic circuit 20' is divided by the square signal C^2 is because it is not desirable that the power factor of the power factor corrector changes with the magnitude of the input voltage Vin, and the voltage error signal A is considered if the output voltage changes. In the following, the voltage stabilization effect can still be achieved by changing the switching of the transistor Q by the control circuit 50'.

Please refer to the second figure together, which is a waveform diagram of the power factor correction circuit of the first figure. As shown in the figure, the gate driving pulse wave VG is a result obtained by comparing the triangular wave Ipwm and the current command signal Ic. The gate driving pulse wave VG has the widest duty cycle near the current command signal Ic valley and the narrowest near the peak. In the second figure, it can be seen that the transistor Q is controlled by the gate driving pulse wave VG to obtain the inductance L. The current waveform iL, which is filtered by the capacitance Cin at the input end, can obtain an approximate waveform of the sine wave current iL(avg) at the input end. The current waveform of the approximate sine wave is in phase with the input voltage Vin, and the correction of the power factor is achieved. The manner in which the arithmetic circuit 20' is used in the above description produces a result in which the input current waveform of the approximate sine wave is in phase with the input voltage Vin, and the correction of the power factor is achieved.

However, since the divider 24' is used in the arithmetic circuit 20', the number of individual components is Much and complicated design.

Therefore, how to solve the above problem and propose a novel power converter power factor correction circuit, which can avoid the use of a divider, so that the power factor correction circuit is simple in design, thereby reducing the cost, so that the above problems can be solved.

One of the main aspects of the present invention is to provide a power factor correction circuit for a power converter, which avoids the use of a divider by a multiplier, so that the power factor correction circuit has a simple structure, thereby reducing the volume of the power factor correction circuit, and The power factor correction circuit is simple in structure, thereby reducing the cost.

The power factor correction circuit of the power converter of the present invention is coupled to a power converter for adjusting a power factor of the power converter. The power factor correction circuit includes a feedback circuit, an operation circuit and a switching circuit. The feedback circuit is coupled to an output end of the power converter, and generates a feedback signal according to one of the output signals of the power converter, and the operation circuit is coupled to the input end of the power converter and the feedback circuit And receiving an input signal of the power converter and a sensing signal and the feedback signal, the operation circuit generates a multiplication signal according to the input signal and the feedback signal, and generates the signal according to the input signal and a sensing signal. a first reference signal, the operation circuit generates a control signal according to the multiplication signal and the first reference signal, the switching circuit is coupled to the operation circuit, and generates a switch according to the control signal and a second reference signal. A signal for switching one of the power converter switches. Thus, the present invention avoids the use of a divider by a multiplier, so that the power factor correction circuit has a simple structure, thereby reducing the size of the power factor correction circuit and achieving cost reduction.

Conventional technology:

10'‧‧‧Bridge Rectifier

20’‧‧‧Operating circuit

22’‧‧‧ Multiplier

24'‧‧‧ divider

30'‧‧‧Voltage Amplifier

40'‧‧‧ Front Circuit

50'‧‧‧Control circuit

this invention:

1‧‧‧Power factor correction circuit

10‧‧‧Voltage feedback circuit

100‧‧‧Voltage loop compensator

102‧‧‧ Third adjuster

12‧‧‧Operating circuit

120‧‧‧First reference signal generation circuit

1200‧‧‧Second multiplier

1202‧‧‧ third multiplier

1203‧‧‧ arithmetic unit

1204‧‧‧First adjuster

1206‧‧‧Second adjuster

1208‧‧‧Low-pass filter

122‧‧‧First multiplier

124‧‧‧ Current loop compensator

14‧‧‧Switching circuit

2‧‧‧Power Converter

20‧‧‧Rectifier circuit

The first diagram is a circuit diagram of a power factor correction circuit of the prior art; the second diagram is a waveform diagram of the power factor correction circuit of the first diagram; and the third diagram is a circuit diagram of a preferred embodiment of the present invention; The fourth figure is a circuit diagram of another preferred embodiment of the present invention.

In order to provide a better understanding and understanding of the structural features and the efficacies of the present invention, please refer to the preferred embodiment and the detailed description, as explained below: please refer to the third figure. A circuit diagram of a preferred embodiment of the invention. As shown in the figure, the power factor correction circuit 1 of the power converter of the present invention is coupled to a power converter 2 for adjusting a power factor of the power converter 2. The power factor correction circuit 1 includes a voltage feedback circuit. 10. An arithmetic circuit 12 and a switching circuit 14. The voltage feedback circuit 10 is coupled to one of the output terminals of the power converter 2, and the voltage feedback circuit 10 generates a voltage command signal Vea according to one of the output signals Vout of the power converter 2, that is, the voltage feedback circuit 10 is based on power conversion. The voltage difference between the output signal Vout of the device 2 and the reference voltage Vref is generated by a compensation circuit (ie, the voltage loop compensator 100) to generate a voltage command signal Vea. A common compensation circuit is implemented as a proportional (Pport) controller. Proportional-Integral (PI) controller or Proportional-Integral-Different (PID) controller, the computing circuit 12 is coupled to a voltage input terminal of the power converter 2, the current input terminal and the voltage return The circuit 10, the arithmetic circuit 12 receives a voltage input signal Vin of the power converter 2 and a current sensing signal I and a voltage command signal Vea, wherein the voltage input signal Vin is an alternating current power signal Vac through the rectifier circuit of the power converter 2 20 input after rectification The signal input signal Vin is multiplied by the first regulator 1204 and multiplied by the voltage command signal Vea to generate a multiplication signal Iref, and the operation circuit 12 generates a first according to the input voltage signal Vin and the sense current signal I. After the reference signal Isen, the operation circuit 12 generates a control signal Ic via a current loop compensator 124 according to the multiplication signal Iref and the first reference signal Isen. The switching circuit 14 is coupled to the operation circuit 12, and the switching circuit 14 is controlled according to the control. The signal and a second reference signal Ipwm generate a switching signal for switching a switch Q of the power converter 2, wherein the switch Q is a power switch and is a field effect transistor (MOS FET). Thus, the present invention avoids the use of the divider by the arithmetic circuit 12, making the power factor correction circuit 1 simpler in structure, thereby reducing the size of the power factor correction circuit 1 and achieving cost reduction. The second reference signal Ipwm is a sawtooth wave signal.

As described above, the arithmetic circuit 12 of the present invention includes a first reference signal generating circuit 120, a first multiplier 122 and a current loop compensation 124. The first reference signal generating circuit 120 is coupled to the input end of the power converter 2, and the first reference signal generating circuit 120 generates a multiplication signal Iref according to the voltage input signal Vin and the current sensing signal I, and the first multiplier 122 is coupled. The input end of the power converter 2 is connected to the voltage feedback circuit 10, and the first multiplier 122 is multiplied by the voltage command signal Vea and the voltage input signal Vin, wherein the voltage input signal Vin can also pass through the first amplifier 1204. A multiplier 122 can multiply the voltage command signal Vea and the input signal (Vin*Kv) to generate a multiplicative signal Iref. The current loop compensator 124 is coupled to the first reference signal generating circuit 120 and the first multiplier 122, and the current loop compensator The 124 compares the first reference signal Isen with the multiplication signal Iref to generate a control signal Ic for transmission to the switching circuit 14. Thus, the arithmetic circuit 12 of the present invention uses only the first multiplier 122, but is not used. The divider makes the power factor correction circuit simple in structure, thereby reducing the size and reducing the cost of the power factor correction circuit.

The first reference signal generating circuit 120 includes a second multiplier 1200, a third multiplier 1202, a first adjuster 1204, a second adjuster 1206 and a low pass filter 1208. The first regulator 1204 is configured to adjust the intensity of the voltage input signal Vin. In this embodiment, the first regulator 1204 is configured to amplify/reduce the voltage input signal Vin, and transmit the adjusted voltage input signal Vin to the filter. The device 1208 is coupled to the first multiplier 122. In addition, the first adjuster 1204 generates a signal B and transmits the signal B to the first multiplier 122. The second regulator 1206 is configured to adjust the intensity of the current sensing signal I, that is, to amplify/reduce the current sensing signal I, and transmit the adjusted current sensing signal I to the second multiplier 1200. The second multiplier 1200 is coupled to the input end of the power converter 2, and multiplies the square signal (ie, C^2 signal) of the average value C of the voltage input signal Vin and the current sensing signal I to generate a first reference signal. Isen, the third multiplier 1202 is coupled to the output of the low pass filter 1208, and generates a square signal (ie, C^2 signal) of the average value C of the voltage input signal Vin, and averages the voltage input signal Vin. The squared signal of C goes to the second multiplier 1200. The low pass filter 1208 is coupled to the input of the power converter 2 and filters the voltage input signal Vin to calculate an average value of the voltage input signal Vin.

In addition, the present invention can use an operation unit 1203 instead of the third multiplier 1202 (as shown in the fourth figure), the operation unit 1203 is coupled to the input end of the power converter 2, and the square voltage input signal Vin according to a correspondence table. And transmitting the squared voltage input signal Vin to the second multiplier 1200. In this embodiment, the operation unit 1203 is coupled to the output end of the low pass filter 1208 to generate an average value C of the voltage input signal Vin. Square signal (ie C^2 signal), and the voltage input signal Vin flat The squared signal of the mean C is sent to the second multiplier 1200.

Referring to the third figure, the voltage feedback circuit 10 includes a voltage loop compensator 100 and a third regulator 102. The voltage loop compensator 100 is coupled to the output of the power converter 2 and the arithmetic circuit 12, and the voltage loop compensator 100 compares the output signal Vout with a threshold signal Vref to generate a voltage command signal Vea. The third regulator 102 is coupled to the output of the power converter 2 and the voltage loop compensator 100, and the third regulator 102 is configured to adjust the intensity of the output signal Vout of the power converter 2, in this embodiment, The three regulators 102 amplify/reduce the output signal Vout of the power converter 2 and transmit the adjusted output signal Vout to the voltage loop compensator 100.

The switching circuit 14 of the present invention may be a second comparator coupled to the operation circuit 12 and the power converter 2, and compares the control signal Ic and the second reference signal Ipwm outputted by the operation circuit 12 to generate a switching signal to switch the switch. Q, and the correction of the power factor of the power converter 2 is achieved.

As can be seen from the above, since the multiplication signal Iref is equal to the voltage command signal Vea multiplied by the signal B, the first reference signal Isen is equal to the adjusted current sense signal I multiplied by the signal C ² , and the current sense signal I is equal to the power converter 2 The input current Iin, when the system is stable, the first reference signal Isen is equal to the multiplication signal Iref, so the input power Pin of the power converter 2 is equal to the voltage input voltage Vin multiplied by the input current Iin, which is equal to the voltage input voltage Vin multiplied by the first The reference signal Isen is divided by the signal C ² , that is, the voltage input voltage Vin is multiplied by the signal B and the voltage command signal Vea and then divided by the signal C ² , and since the signal B is the adjusted voltage input voltage Vin, the power converter The input power Pin of 2 is equal to the square of the voltage input voltage Vin multiplied by the voltage command signal Vea, divided by the signal C ² , and the square signal C ^{2 is} equivalent to the voltage input voltage Vin, or several times the voltage input voltage Vin, therefore, The input power Pin is equal to several times the signal Vea. As such, the present invention avoids the use of a divider by a multiplier, making the power factor correction circuit simple and easy to implement, thereby reducing the size of the power factor correction circuit and reducing the cost.

In summary, the power factor correction circuit of the power converter of the present invention generates a voltage command signal by a feedback circuit according to one of the output signals of the power converter, and the operation circuit receives a voltage input signal of the power converter and a The current sensing signal and the voltage command signal are transmitted, and the operation circuit generates a multiplication signal according to the voltage input signal and the voltage command signal, and generates a first reference signal according to the voltage input signal and the current sensing signal, and then the operation circuit is further multiplied according to the multiplication method. The signal and the first reference signal generate a control signal, and the switching circuit generates a switching signal for switching one of the power converters according to the control signal and the second reference signal. Thus, the present invention avoids the use of a divider by a multiplier, so that the power factor correction circuit has a simple structure, thereby reducing the size of the power factor correction circuit and achieving cost reduction.

The invention is a novelty, progressive and available for industrial use, and should meet the requirements of the patent application stipulated in the Patent Law of China, and the invention patent application is filed according to law, and the prayer bureau will grant the patent as soon as possible. prayer.

However, the above description is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention, and the shapes, structures, features, and spirits described in the claims are equivalently changed. Modifications are intended to be included in the scope of the patent application of the present invention.

1‧‧‧Power factor correction circuit

10‧‧‧Voltage feedback circuit

100‧‧‧Voltage loop compensator

102‧‧‧ Third adjuster

12‧‧‧Operating circuit

120‧‧‧First reference signal generation circuit

1200‧‧‧Second multiplier

1202‧‧‧ third multiplier

1204‧‧‧First adjuster

1206‧‧‧Second adjuster

1208‧‧‧Low-pass filter

122‧‧‧First multiplier

124‧‧‧ Current loop compensator

14‧‧‧Switching circuit

2‧‧‧Power Converter

20‧‧‧Rectifier circuit

Claims (8)

A power factor correction circuit of a power converter coupled to a power converter for adjusting a power factor of the power converter, the power factor correction circuit comprising: a voltage feedback circuit coupled to the power converter An output terminal generates a voltage command signal according to one of the power converter output signals; an operation circuit is coupled to the input end of the power converter and the voltage feedback circuit, the operation circuit includes: a first a reference signal generating circuit is coupled to the input end of the power converter, and generates a first reference signal according to a voltage input signal and a current sensing signal of the power converter; a first multiplier coupled The input end of the power converter and the voltage feedback circuit multiply the voltage command signal and the voltage input signal to generate a multiplication signal; a current loop compensator coupled to the first reference signal generation circuit and The first multiplier compares the first reference signal with the multiplication signal to generate a control signal; and a switching circuit coupled to the operation circuit, and According to the control signal and a second reference signal, and generating a switching signal for switching one of the switches of the power converter. The power factor correction circuit of claim 1, wherein the first reference signal generating circuit comprises: a second multiplier coupled to the input end of the power converter and multiplied by the voltage input signal and The current senses a signal to generate the first reference signal. The power factor correction circuit of claim 2, wherein the first reference signal generating circuit further comprises: a third multiplier coupled to the input end of the power converter and squaring the voltage input signal, And transmitting the squared voltage input signal to the second multiplier. The power factor correction circuit of claim 3, wherein the first reference signal generating circuit further comprises: an arithmetic unit coupled to the input end of the power converter, and squaring the voltage according to a correspondence table The signal is input, and the squared voltage input signal is input to the second multiplier. The power factor correction circuit of claim 1, wherein the first reference signal generating circuit further comprises: a first adjuster for adjusting the intensity of the voltage input signal; and a second adjuster for To adjust the intensity of the sensing signal. The power factor correction circuit of claim 1, wherein the first reference signal generating circuit further comprises: a low pass filter coupled to the input end of the power converter, and filtering the voltage input signal, And transmitting the filtered voltage input signal to a third multiplier. The power factor correction circuit of claim 1, wherein the feedback circuit comprises: a voltage loop compensator coupled to the output of the power converter, and comparing the output signal with a threshold signal, and The voltage command signal is generated. The power factor correction circuit of claim 7, wherein the voltage feedback circuit further comprises: an adjuster coupled to the output end of the power converter for adjusting the output signal The intensity is transmitted to the adjusted voltage loop compensator.