TWI497902B - An oscillator start-up circuit - Google Patents

Description

Oscillation start circuit

The present invention relates to an oscillation start circuit, and more particularly to an oscillation start circuit which ensures oscillation of an oscillator.

The biggest difference between an oscillator and other circuits is that it only has an output signal but no input signal. The oscillator can generate an output signal without an input signal, but the external oscillator must provide energy to keep the oscillator oscillating. The method is by placing an amplifier inside the oscillator, and the energy required by the amplifier comes from an external DC power supply.

As shown in the first figure, it is a circuit diagram of the conventional oscillator 1. Since the oscillator is necessarily a loop, the principle is based on positive feedback, and the noise is repeatedly amplified to achieve the desired oscillation. The noises N1 and N2 are input through the first input terminal 11 and the second input terminal 12 of the oscillator, and are outputted from the output terminals 13 and 14 and then fed back to the first input terminal 11 and the second input terminal 12. However, the oscillator 1 tends to suffer from the problem of oscillation failure because the injected noises N1, N2 are too small. Furthermore, by injecting the noises N1 and N2 into the oscillator to generate an oscillation, there is also a problem that the oscillation time is too long.

Accordingly, how to provide an oscillation start circuit to ensure the occurrence of oscillator oscillation and reduce the oscillation oscillation time has become an urgent problem to be solved in the industry.

In view of the above, the embodiment of the present invention provides an oscillating start circuit for an oscillator, including an oscillating initiator and an oscillating signal detector.

The oscillating signal detector receives one of the output signals of the oscillator output, and if the level of the detected output signal is substantially fixed, outputs one of the enable signals.

The oscillating initiator, when the initial signal is enabled, generates a first input signal of opposite polarity and a second input signal to the first input and the second input of the oscillator.

Accordingly, the oscillation start circuit of the present invention can ensure that the signals input to the first input end and the second input end of the oscillator have opposite polarities to cause the oscillator to oscillate, and can reduce the time for the oscillator to establish oscillation. In addition, the oscillating start circuit has a detection function to prevent interference to the oscillator after the oscillation is established.

1‧‧‧ oscillator

11‧‧‧ first input

12‧‧‧ second input

13, 14‧‧‧ output

2‧‧‧Shock start circuit

21‧‧‧Shock starter

211‧‧‧ first initial output

212‧‧‧Toggle switch

212A‧‧‧Multiplexer

212A1‧‧‧ first input

212A2‧‧‧ second input

212A3‧‧‧Control terminal

212A4‧‧‧ output

212B‧‧‧Transmission gate

213‧‧‧First Inverter

214‧‧‧second starting output

215‧‧‧Transmission gate

22‧‧‧Shock Signal Detector

222‧‧‧Input signal actuation switch

222A‧‧‧First input signal level pull-up switch

222A1‧‧‧ input

222A2‧‧‧ output

222B‧‧‧Second input signal level pull-up switch

222B1‧‧‧ input

222B2‧‧‧ output

222C‧‧‧Second inverter

222D‧‧‧First Input Signal Level Holder

222E‧‧‧Second input signal level maintainer

223‧‧‧Logical switch

223A‧‧‧Logic Gate

223A1‧‧‧first logic signal input

223A2‧‧‧second logic signal input

223A3‧‧‧ output

223B‧‧‧ third inverter

Vdd‧‧‧ power terminal

GND‧‧‧ ground terminal

IN1‧‧‧ first input signal

IN2‧‧‧ second input signal

O1‧‧‧ first output signal

O2‧‧‧second output signal

S‧‧‧ start signal

E‧‧‧ logical signal

E1‧‧‧ first logic signal

E2‧‧‧second logic signal

The first figure is a circuit diagram of a conventional oscillator; the second figure is a schematic diagram of the oscillation start circuit of the present invention; and the third figure is a circuit diagram of the oscillation start circuit of the present invention.

The ordinal terms used in the scope of the patent application, such as "first", "second", etc., to modify the scope of the patent application, do not themselves represent any priority, order or order between the elements of the patent application. Or the chronological order in which the steps of the method are performed, but It is only used as an indication to distinguish between a component of the patent claim that has a certain name and another component of the same name (but used in the ordinal term) to distinguish the components of the claims.

The second figure is a schematic diagram of an oscillation start circuit 2 in accordance with an embodiment of the present invention. The oscillating start circuit 2 is used for the oscillator 1, and includes an oscillating starter 21 and an oscillating signal detector 22. The oscillating signal detector 22 receives the first output signal O1 or the second output signal O2 outputted from the output 13 or the output 14 of the oscillator 1, in this example, the second output signal O2 of the receiving output 14 is example. If the oscillating signal detector 22 detects that the level of the second output signal O2 is substantially fixed, indicating that the oscillator 1 has not oscillated, the oscillating signal detector 22 outputs an enable signal S to the oscillating initiator 21 The oscillating starter 21 generates the first input signal IN1 and the second input signal IN2 of the opposite polarity to the first input end 11 and the second input end 12 of the oscillator 1, so that the oscillator 1 can start to oscillate; when the oscillating signal When the detector 22 detects that the first output signal O1 or the second output signal O2 of the oscillator 1 has the opposite polarity, it indicates that the oscillator 1 has successfully generated the oscillation, so the oscillation signal detector 22 outputs one of the non-enables. The signal S is connected to the oscillation starter 21, and the oscillation starter 21 is disconnected from the oscillator 11.

The oscillating start circuit 2 further includes a first start output 211 and a second start output 214. The first initial output terminal 211 and the second initial output terminal 214 are electrically connected to the oscillation starter 21, and are electrically connected to the first input end 11 and the second input end 12 of the oscillator 1, respectively. When the oscillating initiator 21 receives the enabled start signal S, the oscillating initiator 21 receives the first input signal IN1 via the first start output 211, and generates a second input signal IN2 of opposite polarity, via the second The initial output terminal 214 inputs the second input signal IN2 to the second input terminal 12 of the oscillator 1, so that the oscillator 1 can Start to oscillate. In addition, the first input end 211 and the second start output end 214 are also electrically connected to the second input end 12 and the first input end 11 of the oscillator 1 respectively, which are not limited thereto.

The oscillation starting circuit 2 further includes a power terminal Vdd and a ground terminal GND (shown in the third figure, respectively). The power terminal Vdd and the ground GND are electrically connected to the oscillating signal detector 22 and the oscillating initiator 21, so that the power is supplied to the oscillating signal detector 22 and the oscillating initiator 21 via the power terminal Vdd, and the detailed connection relationship can be Referring to the third figure, it will not be repeated here.

The oscillating signal detector 22 includes an input signal actuation switch 222 and a logic switch 223. The input signal actuation switch 222 is electrically connected to the power supply terminal Vdd and the ground terminal GND, receives the second output signal O2 outputted by the oscillator 1, and outputs the logic signal E according to the level of the second output signal O2. In this embodiment, the input signal actuation switch 222 receives the second output signal O2 outputted from the output 14 of the oscillator 1, but in other embodiments, the input signal actuation switch 222 can also receive the output of the oscillator 1 output 13. The first output signal O1. The logic switch 223 is electrically connected to the input signal actuation switch 222, and enables the start signal S according to the logic signal E.

The third figure is a circuit diagram of the oscillation start circuit 2 according to an embodiment of the present invention. The oscillation starter 21 includes a changeover switch 212 and a first inverter 213. The first inverter 213 has an input end and an output end for inverting the signal. The switch 212 is electrically connected to the first start output 211, the second start output 214, and the ground GND, and receives the start signal S. When the start signal S is enabled, the switch 212 electrically connects the first input 11 of the oscillator 1 to the input of the first inverter 213 via the first start output 211; when the start signal S is When not enabled, the switch 212 is disconnected from the oscillator 1 .

The changeover switch 212 includes a multiplexer 212A and a transfer gate 212B. The multiplexer 212A includes a first input terminal 212A1, a second input terminal 212A2, a control terminal 212A3, and an output terminal 212A4. The first input terminal 212A1 is electrically connected to the first initial output terminal 211, the second input terminal 212A2 is electrically connected to the ground terminal GND, the control terminal 212A3 receives the start signal S, and the output terminal 212A4 is electrically connected to the input of the first inverter 213. end. The transfer gate 212B is electrically connected between the output of the first inverter 213 and the second start output 214.

As described above, the switch 212 switches the connection state of the first input terminal 212A1 and the second input terminal 212A2 of the multiplexer 212A according to the start signal S output from the logic switch 223 of the received oscillation signal detector 22. Further, when the start signal S is enabled, the multiplexer 212A selectively connects the first input terminal 212A1 to the output terminal 212A4, so that the first input signal IN1 of the first input end 11 of the oscillator 1 passes through the first An initial output terminal 211 and a first input terminal 212A1 and an output terminal 212A4 of the multiplexer 212A are input to the input end of the first inverter 213 to generate a second input signal IN2 of opposite polarity by the first inverter 213. And transmitting, from the output end of the first inverter 21, the second input signal IN2 to the oscillator 1 through the conductive transmission gate 212B, the second initial output terminal 214 and the second input terminal 12; if the start signal S is not When enabled, the multiplexer 212A selects to electrically connect the second input 212A2 to its output 212A4, and the transfer gate 212B is also disconnected, causing the oscillating initiator 21 to open the electrical connection with the oscillator 1.

The input end of the first inverter 213 receives the signal output from the output terminal 212A4 of the multiplexer 212A. In this embodiment, the input terminal receives the first input signal IN1 to generate a second input of opposite polarity from the output end. Signal IN2 to transmission gate 212B.

The transmission gate 212B is used for transmitting signals. In this embodiment, the second input signal IN2 is transmitted, so that the second input signal IN2 is input from the second initial output terminal 214 to the second input terminal 12 of the oscillator 1. In addition, in the embodiment of the present invention, the first input signal IN1 and the second input signal IN2 may be, for example, a sine wave. Therefore, when the first input signal IN1 is, for example, a sine wave, the first inverter 213 is generated. The second input signal IN2 is opposite to the polarity of the sine wave.

As described above, when the oscillating signal detector 22 detects that the first output signal O1 or the second output signal O2 of the oscillator 1 has opposite polarities, it indicates that the oscillator 1 has successfully generated an oscillation, and the start signal S is not When the switch 212 is enabled, the electrical connection between the oscillation starter 21 and the oscillator 11 is disconnected; when the oscillation signal detector 22 detects the level of the first output signal O1 or the second output signal O2, When fixed, the start signal S is enabled, and the multiplexer 212A of the switch 212 electrically connects the first start output 211 to the input of the first inverter 213, so that the second start output 214 The input signal is inverted with the input signal of the first start output terminal 211, that is, when the first input signal IN1 and the second input signal IN2 are inverted, the oscillator 11 starts to oscillate.

The logic switch 223 of the oscillating signal detector 22 includes a NAND logic gate 223A and a third inverter 223B. The NAND logic gate 223A has a first logic signal input terminal 223A1, a second logic signal input terminal 223A2, and an output terminal 223A3. The first logic signal E1 and the second logic signal E2 are received by the first logic signal E1 and the second logic signal E2, respectively. The first logic signal input terminal 223A1 and the second logic signal input terminal 223A2 receive the first logic signal E1 and the second logic signal E2, respectively. Produce a logical judgment result. The third inverter 223B has an input end and an output end, and the input end is electrically connected to the output end 223A3 of the NAND logic gate 223A to receive the logic judgment result, and the output end The inverted logic decision result is output to generate the start signal S to the oscillation starter 21 to switch the control terminal 212A3 of the switch 212A.

The input signal actuation switch 222 of the oscillating signal detector 22 includes a first input signal level pull-up switch 222A, a second inverter 222C, a second input signal level pull-up switch 222B, and a first input. The signal level maintainer 222D and a second input signal level maintainer 222E. It is important to note that the switches described here have the characteristics of "on" and "off", indicating that the switch is "on" or "non-conducting" for the signal. Those skilled in the art should be able to understand the meaning. This will not be described in detail here.

The first input signal level pull-up switch 222A is electrically connected to the power supply terminal Vdd and has an input terminal 222A1 and an output terminal 222A2. The output terminal 222A2 is electrically connected to the first logic signal input terminal 223A1 of the NAND logic gate 223A, and the input terminal 222A1 receives the second output signal O2 outputted from the oscillator 1 so that the first input signal level pull-up switch 222A is based on the second output signal. The level of O2 is turned on or off to generate the first logic signal E1 from the output terminal 222A2 to the first logic signal input terminal 223A1 of the NAND logic gate 223A. In addition, in this embodiment, when the first input signal level pull-up switch 222A is turned on, the first logic signal E1 is a power supply (Vdd) level (high level).

The second inverter 222C has an input end and an output end. The input end is electrically connected to the input end 222A1 of the first input signal level pull-up switch 222A, and receives the second output signal O2 outputted by the oscillator 1 for An inverted first output signal O1 is generated to the output.

The second input signal level pull-up switch 222B is electrically connected to the power supply terminal Vdd and has an input terminal 222B1 and an output terminal 222B2. The output terminal 222B2 is electrically connected to the NAND logic gate The second logic signal input terminal 223A2 of the 223A receives the inverted first output signal O1 from the output end of the second inverter 222C, so that the second input signal level pull-up switch 222B is based on the inverted first output. The signal O1 is turned on or off to generate the second logic signal E2 from the output terminal 222B2 to the second logic signal input terminal 223A2 of the NAND logic gate 223A. In this embodiment, when the second input signal level pull-up switch 222B is turned on, the second logic signal E2 is a power supply level.

The first input signal level keeper 222D is electrically connected between the first logic signal input terminal 223A1 and the ground GND for opening the first input signal when the first input signal level pull-up switch 222A is turned off. The bit keeper 222D generates the first logic signal E1 to the first logic signal input terminal 223A1. In this embodiment, when the first input signal level keeper 222D is turned on, the first logic signal E1 is a ground (GND) level (low level).

The second input signal level keeper 222E is electrically connected between the second logic signal input terminal 223A2 and the ground GND for opening the second input signal when the second input signal level pull-up switch 222B is turned off. The bit keeper 222E generates a second logic signal E2 to a second logic signal input terminal 223A2. In this embodiment, when the second input signal level maintainer 222E is turned on, the second logic signal E2 is a ground level.

According to the above, the power level and the grounding level of the first logic signal E1 and the second logic signal E2 are based on the first input signal level pull-up switch 222A, the second input signal level pull-up switch 222B, and the first The state when the input signal level maintainer 222D and the second input signal level maintainer 222E are turned on or off is known, and the person skilled in the art should understand the meaning thereof, and will not be described in detail herein.

In addition, when the first input signal level pull-up switch 222A and the second input signal level pull-up switch 222B are turned on according to the level of the second output signal O2 outputted by the oscillator 1, the first logic signal E1 and the first generated signal are generated. When the second logic signal E2 is the power supply level, the logical control result of the grounding level is outputted to the input end of the third inverter 223B by the logic switch 223, and is determined by the inverse logic of the third inverter 223B. The result is a starting signal S that produces a power level.

When the first input signal level pull-up switch 222A and the second input signal level pull-up switch 222B are turned off according to the level of the second output signal O2 outputted by the oscillator 1, the first logic signal E1 and the second logic signal E2 are caused. When the grounding level is set, the logic control 223 outputs a logic judgment result of the power supply level to the input end of the third inverter 223B, and the third inverter 223B inverts the logic determination result to generate a The start signal S of the grounding level.

When the first input signal level pull-up switch 222A and the second input signal level pull-up switch 222B are respectively turned on and off according to the level of the second output signal O2 outputted by the oscillator 1, the first logic signal E1 is used as the power source. When the bit and the second logic signal E2 are grounded, the logic switch 223 outputs a logic judgment result of the power supply level to the input end of the third inverter 223B, and is inverted by the third inverter 223B. The phase logic determines the result to generate a start signal S of a ground level.

When the first input signal level pull-up switch 222A and the second input signal level pull-up switch 222B are respectively turned off and on according to the level of the second output signal O2 outputted by the oscillator 1, the first logic signal E1 is grounded. When the bit and the second logic signal E2 are at the power supply level, the logical control result of the power supply level is outputted by the logic switch 223 to the input of the third inverter 223B. And the third inverter 223B inverts the logic to determine the result to generate a ground level initial signal S.

As described above, when the start signal S is at the ground level, the first input terminal 212A1 of the multiplexer 212A of the switch 212 is electrically connected to the first start output terminal 211 and the output terminal 212A4, and is outputted by the output terminal 212A4. Outputting the first input signal IN1 to the input end of the first inverter 213; when the start signal S is the power supply level, the first input end 212A1 of the multiplexer 212A is electrically connected to the ground GND to disconnect the oscillation The starter 21 is electrically connected to the oscillator 1. In other words, when the initial oscillating circuit 2 of the present invention generates the second inverting first input signal IN1 and the second input signal IN2 to the oscillator 1, after the oscillator 1 is oscillated, it can be output by the logic switch 223. The first signal S is switched to the switch 212 to electrically connect the first input 212A1 of the multiplexer 212A of the switch 212 to the ground GND to avoid interference with the operation of the oscillator 1.

In the embodiment of the present invention, the first input signal level maintaining unit 222D and the second input signal level maintaining unit 222E respectively include an impedance and a parallel capacitor; the first input signal level pull-up switch 222A and the second input The signal level pull-up switch 222B includes a PMOS.

In summary, the oscillation start circuit of the present invention provides a two-phase input signal to the oscillator to ensure oscillation of the oscillator. Furthermore, the oscillation start circuit of the present invention can also reduce the time during which the oscillator establishes oscillation. In addition, the oscillating start circuit also has a detection function for detecting the state of the oscillator output signal to ensure that after the oscillator is oscillated, the electrical connection between the oscillating start circuit and the oscillator is disconnected to avoid oscillating oscillation. Interference.

The above description is only the preferred embodiment of the present invention, and is not intended to limit the scope of the present invention; all other equivalent changes or modifications which are not departing from the spirit of the invention should be included in the following Within the scope of the patent application.

1‧‧‧ oscillator

11‧‧‧ first input

12‧‧‧ second input

2‧‧‧Shock start circuit

21‧‧‧Shock starter

211‧‧‧ first initial output

214‧‧‧second starting output

22‧‧‧Shock Signal Detector

222‧‧‧Input signal actuation switch

223‧‧‧Logical switch

IN1‧‧‧ first input signal

IN2‧‧‧ second input signal

O1‧‧‧ first output signal

O2‧‧‧second output signal

S‧‧‧ start signal

E‧‧‧ logical signal

Claims (14)

An oscillating start circuit is used for an oscillator, comprising: an oscillating signal detector, receiving an output signal of the oscillator output, and if the level of the output signal is substantially fixed, the output is enabled. a first start output and a second start output are respectively electrically connected to the first input end and the second input end of the oscillator, and electrically connected to the oscillation starter; An oscillating initiator, when the initial signal is enabled, generating a first input signal and a second input signal of opposite polarity to one of the first input and the second input of the oscillator, and The oscillating initiator includes: a first inverter having an input end and an output end for inverting the first input signal or the second input signal; and a switch switch when the start signal is When the first input terminal of the oscillator is electrically connected to the input end of the first inverter, the output end of the first inverter is connected to the first inverter The second initial output is electrically connected to the second of the oscillator The terminal; and when electrically connected to the starting signal is non-enabled, then the switch is turned off and the oscillation start of the oscillator. The oscillating start circuit of claim 1, wherein the switch comprises: a multiplexer, comprising: a first input end electrically connected to the first start output end; and a second input end electrically Connected to a ground terminal; a control terminal receives the start signal; and an output terminal electrically connected to the input end of the first inverter, wherein the control terminal starts from the received start signal When the start signal is enabled, The first input end is electrically connected to the output end, when the start signal is disabled, the second input end is electrically connected to the output end; and a transfer gate is electrically connected to the first end Between the output of the inverter and the second initial output, the first input signal or the second input signal outputted from the output of the first inverter is transmitted. The oscillating start circuit of claim 2, wherein the oscillating signal detector comprises: an input signal actuating switch electrically connected to a power terminal and a ground end, and receiving an output signal of the oscillator output, And outputting a logic signal according to the output signal; and a logic switch electrically connecting the input signal actuation switch, and generating the start signal according to the logic signal; wherein the logic signal includes a first logic signal and a The second logical signal. The oscillating start circuit of claim 3, wherein the logic switch comprises: a NAND logic gate having a first logic signal input terminal, a second logic signal input terminal and an output terminal, the first The logic signal input end and the second logic signal input end respectively receive the first logic signal and the second logic signal to generate a logic determination result; and a third inverter is electrically connected to the NAND logic gate The output terminal inverts the logic determination result to generate the start signal to the control end of the switch. The oscillating start circuit of claim 4, wherein the input signal actuating switch comprises: a first input signal level pull-up switch electrically connected to the power terminal and having an input end and an output end The input end receives the output signal of the oscillator output, so that the first input signal The level pull-up switch is turned on or off according to the output signal to generate the first logic signal from the output end to the first logic signal input end; a second inverter has an input end and an output end, The input end is electrically connected to the input end of the first input signal level pull-up switch, and receives the output signal of the oscillator output for inverting the output signal; a second input signal level pull-up switch, the electric The power terminal is connected to the power terminal and has an input end and an output end. The input end receives the inverted output signal, so that the second input signal level pull-up switch is turned on or off according to the inverted output signal. The second logic signal is generated from the output terminal to the second logic signal input terminal; a first input signal level maintainer is electrically connected to the first logic signal input terminal and the first input signal level Between the output end of the pull-up switch and a ground terminal, when the first input signal level pull-up switch is turned off, turning on the first input signal level keeper to generate the first logic signal to the first logic News An input terminal; and a second input signal level maintaining device electrically connected between the second logic signal input end and the output end of the second input signal level pull-up switch and the ground end, When the second input signal level pull-up switch is turned off, the second input signal level maintainer is turned on to generate the second logic signal to the second logic signal input end. The oscillating start circuit of claim 5, wherein the first logic signal and the second logic signal are a power level and/or a ground level. The oscillating start circuit of claim 5, wherein the first input signal level keeper and the second input signal level keeper respectively comprise an impedance and a parallel capacitor. The oscillating start circuit of claim 5, wherein the first input signal level pull-up switch and the second input signal level are pulled apart to be a PMOS. The oscillating start circuit of claim 6, wherein the first input signal level pull-up switch and the second input signal level pull-up switch are turned on according to an output signal of the oscillator output, so that the When the first logic signal and the second logic signal are the power level, the start signal is a power level. The oscillating start circuit of claim 6, wherein when the first input signal level pull-up switch and the second input signal level pull-up switch are turned off according to the output signal of the oscillator output, When the first logic signal and the second logic signal are the ground level, the start signal is a ground level. The oscillating start circuit of claim 6, wherein the first input signal level pull-up switch and the second input signal level pull-up switch are respectively turned on and off according to an output signal of the oscillator output. When the first logic signal is the power level and the second logic signal is the ground level, the start signal is a ground level. The oscillating start circuit of claim 6, wherein the first input signal level pull-up switch and the second input signal level pull-up switch are respectively turned off and on according to an output signal of the oscillator output. When the first logic signal is the ground level and the second logic signal is the power level, the start signal is a ground level. The oscillating start circuit of claim 9, wherein the first input end of the multiplexer of the switch is electrically connected to the ground when the start signal is a power level. The oscillating start circuit according to claim 10, the scope of claim 11 or the oscillating start circuit of claim 12, wherein when the start signal is a ground level, the multiplexer of the switch The first input end is electrically connected to the first start output end, and the output end of the multiplexer of the switch switch outputs the first input signal or the second input signal.