TWI491967B - Pixel structure and display panel - Google Patents

Description

Pixel structure and display panel

The present invention relates to a pixel structure and a display panel, and more particularly to a high-resolution pixel structure and a display panel including the pixel structure.

In recent years, with the maturity of optoelectronic technology and semiconductor manufacturing technology, the flat panel display has been booming. Liquid crystal displays have replaced traditional cathode ray tube displays based on their low voltage operation, no radiation scattering, light weight and small size, and have become the mainstream of display products in recent years. However, liquid crystal displays still have problems with limited viewing angles. At present, technologies capable of achieving wide viewing angle requirements include twisted nematic (TN) liquid crystals, wide viewing film, in-plane switching (IPS) liquid crystal displays, and fringe electric fields. A Fringe Field Switching (FFS) liquid crystal display and a multi-domain vertical alignment (MVA) liquid crystal display.

Taking a fringe field switching liquid crystal display as an example, each pixel structure includes A scan line, a data line, an active component, a pixel electrode, and a common electrode. The active component is connected to the scan line and the data line, wherein the scan line is used to control the opening and closing of the active component to input the signal transmitted by the data line into the pixel electrode. The pixel electrode is connected to the active component, and the common electrode is connected to a common voltage. In general, the storage capacitance in the pixel structure mainly comes from the overlapping area between the common electrode and the pixel electrode. However, as the pixel resolution increases, the unit pixel area gradually shrinks, and the overlap area between the common electrode and the pixel electrode also shrinks, resulting in a decrease in the storage capacitance of the pixel structure. As a result, the pixel structure of a high-resolution Pixel per pitch (PPI) product is subject to a situation where the V-feed through effect is too severe.

The invention provides a pixel structure, has high resolution and large storage capacitance, avoids dark state light leakage, and reduces power consumption of data line signal conversion.

The invention provides a display panel with better display quality.

The pixel structure of the present invention is disposed on a substrate, and includes a data line, a scan line, an active component, a pixel electrode, a first common electrode, and a second common electrode. The scan line and the data line are arranged to cross each other. The active component is electrically connected to the data line and the scan line. The pixel electrode is electrically connected to the active component, wherein the pixel electrode has a first projection distance from the data line. The first common electrode is disposed above the pixel electrode and overlaps the pixel electrode, and the first common electrode has a plurality of openings to expose the pixel electrode. The second common electrode is disposed under the pixel electrode and the projection thereof overlaps with the pixel electrode, wherein the second common electrode and the data line have a second projection distance And the second projection distance is smaller than the first projection distance.

The display panel of the present invention includes a first substrate, a second substrate, a display medium, a data line, a scan line, an active device, a pixel electrode, a first common electrode, and a second common electrode. The display medium is disposed between the first substrate and the second substrate. The data line is disposed on the first substrate. The scan lines are disposed on the first substrate, and the data lines are disposed to cross each other. The active component is disposed on the first substrate and electrically connected to the data line and the scan line. The pixel electrode is disposed on the first substrate and electrically connected to the active component, wherein the pixel electrode and the data line have a first projection distance. The first common electrode is disposed on the first substrate, disposed above the pixel electrode and overlaps the pixel electrode, and the first common electrode has a plurality of openings to expose the pixel electrode. The second common electrode is disposed on the first substrate, disposed under the pixel electrode and has a projection overlapped with the pixel electrode, wherein the second common electrode and the data line have a second projection distance, and the second projection distance is smaller than the second projection electrode A projection distance.

In an embodiment of the invention, the first common electrode is not overlapped with the data line.

In an embodiment of the invention, the first common electrode further includes at least one opening exposing the data line.

In an embodiment of the invention, the first common electrode further includes at least one slit exposing the data line.

In an embodiment of the invention, a gate insulating layer is further disposed between the second common electrode and the pixel electrode.

In an embodiment of the invention, a dielectric layer is further disposed on the first Between the common electrode and the pixel electrode.

In an embodiment of the invention, the material of the second common electrode comprises a transparent conductive material.

In an embodiment of the invention, the material of the pixel electrode comprises a transparent conductive material.

Based on the above, in the pixel structure and the display panel of the present invention, the first common electrode and the second common electrode are disposed above and below the pixel electrode, and the second projection distance between the second common electrode and the data line is smaller than The first projection distance between the pixel electrode and the data line. The second common electrode shields the electric field from the data line to avoid dark state light leakage, and a storage capacitor is formed between the second common electrode and the pixel electrode to effectively increase the storage capacitance of the pixel, thereby improving the feed. Pass voltage problem. As a result, the display panel using the pixel structure has better display quality and enables the high-resolution product to have lower power consumption.

The above described features and advantages of the invention will be apparent from the following description.

100‧‧‧ pixel structure

102‧‧‧Substrate

104‧‧‧ gate insulation

106‧‧‧Dielectric layer

110‧‧‧pixel electrodes

120‧‧‧First common electrode

122‧‧‧ openings

124‧‧‧slit

130‧‧‧Second common electrode

200‧‧‧ display panel

220‧‧‧second substrate

230‧‧‧Display media

D1‧‧‧first projection distance

D2‧‧‧second projection distance

C‧‧‧ channel

D‧‧‧汲

G‧‧‧ gate

T‧‧‧ active components

S‧‧‧ source

BM‧‧‧ shading pattern

DL‧‧‧ data line

SL‧‧‧ scan line

1A is a schematic cross-sectional view of a pixel structure in accordance with an embodiment of the present invention.

Figure 1B is an exemplary top plan view of Figure 1A, wherein Figure 1A corresponds to line I-I' of Figure 1B.

2A is a schematic cross-sectional view of a pixel structure in accordance with an embodiment of the present invention.

Figure 2B is an exemplary top plan view of Figure 2A, wherein Figure 2A corresponds to line I-I' of Figure 2B.

3 is a cross-sectional view of a display panel in accordance with an embodiment of the present invention.

4A and 4B are diagrams showing electric field intensity and electric field distribution in a pixel structure of a display panel according to an experimental example of the present invention.

5A and 5B are electric field intensity and electric field distribution diagrams in a pixel structure of a display panel according to a comparative example.

6 is a diagram showing a relationship between a second projection distance d2 between a second common electrode and a data line and a degree of light leakage according to an experimental example of the present invention.

1A is a schematic cross-sectional view of a pixel structure in accordance with an embodiment of the present invention, and FIG. 1B is an exemplary top view of FIG. 1A, wherein FIG. 1A corresponds to line I-I' of FIG. 1B. Referring to FIG. 1A and FIG. 1B , the pixel structure 100 is disposed on a substrate 102 , and includes a data line DL , a scan line SL , an active device T , a pixel electrode 110 , a first common electrode 120 , and a The second common electrode 130. The material of the substrate 102 may be glass, quartz, organic polymer, or an opaque/reflective material or other applicable materials, wherein the opaque/reflective material is, for example, a conductive material, a wafer, a ceramic, or the like. Suitable materials. In particular, Although the pixel structure having the cross-sectional structure shown in FIG. 1A is taken as an example in FIG. 1B in this embodiment, the present invention is not limited thereto, in other words, the pixel structure having the cross-sectional structure shown in FIG. 1A may be There are other top views other than FIG. 1B, and FIG. 1B is only one illustrative example.

The scan line SL and the data line DL are arranged to cross each other. The active device T is electrically connected to the data line DL and the scan line SL. In the present embodiment, the active device T is, for example, a thin film transistor including a gate G, a channel C, a source S, and a drain D. The gate G is electrically connected to the scan line SL. The channel C is, for example, located above the gate G. In addition, the pixel structure 100 further includes a gate insulating layer 104 disposed between the gate G and the channel C. The source S and the drain D are, for example, located above the channel C, and the source S is electrically connected to the data line DL. Moreover, the pixel structure 100 further includes a dielectric layer 106 that covers the active device T. The channel C material may be any semiconductor material, such as a germanium semiconductor material or a metal oxide semiconductor material, such as an amorphous germanium, a germanium germanium, a single crystal germanium, etc., and the metal oxide semiconductor material is, for example, indium gallium zinc oxide. (IGZO), aluminum zinc oxide (AZO), etc., but are not limited thereto. The material of the data line DL and the source S and the drain D may be a metal material or other conductive material or a stacked layer of a metal material and other conductive materials, including an alloy, a nitride of a metal material, and an oxidation of a metal material. Nitrogen oxides of materials, metallic materials, or other suitable materials. The material of the scan line SL and the gate G may be a metal material or other conductive material or a stacked layer of a metal material and other conductive materials, including an alloy, a nitride of a metal material, an oxide of a metal material, a metal material. Nitrogen oxides, or other suitable materials.

The pixel electrode 110 is electrically connected to the active device T, wherein the pixel electrode 110 and the data line DL have a first projection distance d1. In this embodiment, the pixel electrode 110 is electrically connected to the drain D. The pixel electrode 110 is disposed, for example, on the gate insulating layer 104. In other words, the pixel electrode 110 is placed on the gate insulating layer 104 together with the data line DL. The first projection distance d1 is, for example, 2 um to 10 um _, but is not limited thereto. The material of the pixel electrode 110 may be a transparent conductive material including a metal oxide such as indium tin oxide, indium zinc oxide, aluminum tin oxide, aluminum zinc oxide, indium antimony zinc oxide, or other suitable. An oxide, or a stacked layer of at least two of the foregoing.

The first common electrode 120 is disposed above the pixel electrode 110 and overlaps the pixel electrode 110, and the first common electrode 120 has a plurality of openings 122 to expose the pixel electrode 110. In the present embodiment, the shape of the opening 122 is, for example, elongated. In this embodiment, the first common electrode 120 and the data line DL do not overlap, for example, that is, the width of the at least one opening 122 of the first common electrode 120 is, for example, greater than or equal to the width of the data line DL to expose The entire data line DL. The width of the opening 122 is, for example, 2 um to 20 um, but is not limited thereto. In an embodiment, the first common electrode 120 may also expose a portion of the data line DL, and a portion of the first common electrode 120 overlaps with a portion of the data line DL. Since the first common electrode 120 does not overlap with the data line DL or has a small overlapping area, the compensation capacitor Cdc is not formed between the first common electrode 120 and the data line DL or has a small compensation capacitance Cdc. The material of the first common electrode 120 may be a transparent conductive material including a metal oxide such as indium tin oxide, indium zinc oxide, aluminum tin oxide, aluminum zinc oxide, indium antimony zinc oxide, or other suitable An oxide, or a stacked layer of at least two of the foregoing. In addition, the first A common electrode 120 is electrically connected, for example, to a common voltage.

The second common electrode 130 is disposed under the pixel electrode 110 and has a projection overlapped with the pixel electrode 110. The second common electrode 130 and the data line DL have a second projection distance d2, and the second projection distance d2 is smaller than the second projection electrode d1. A projection distance d1. That is, part of the second common electrode 130 completely overlaps the pixel electrode 110, and the area of the second common electrode 130 is larger than the area of the pixel electrode 110. In the present embodiment, the second common electrode 130 is disposed on the substrate 102, for example, and the second common electrode 130 is formed, for example, after the scan line SL and before the gate insulating layer 104. Specifically, the second projection distance d2 is smaller than the first projection distance d1, wherein the second projection distance d2 may be a value that is less than, equal to, or greater than zero. When the second projection distance d2 is a value equal to or larger than 0 (as shown in FIG. 1A), the second common electrode 130 does not overlap with the data line DL. However, in another embodiment, the second common electrode 130 may also overlap with the data line DL, that is, the second projection distance d2 is less than zero. The second projection electrode 130 has a second projection distance d2 of, for example, -1 to 3 μm, but is not limited thereto. In this embodiment, the material of the second common electrode 130 may be a transparent conductive material including a metal oxide such as indium tin oxide, indium zinc oxide, aluminum tin oxide, aluminum zinc oxide, indium antimonide zinc. An oxide, or other suitable oxide, or a stacked layer of at least two of the foregoing. The second common electrode 130 is electrically connected to a common voltage, for example.

In the present embodiment, the gate insulating layer 104 is disposed between the second common electrode 130 and the pixel electrode 110, for example. The material of the gate insulating layer 104 may be tantalum oxide, tantalum nitride or other suitable material. The dielectric layer 106 is, for example, more configured A common electrode 120 is interposed between the pixel electrode 110 and the pixel electrode 110. The material of the dielectric layer 106 can be tantalum oxide, tantalum nitride or other suitable materials.

In this embodiment, the first common electrode 120 has a plurality of openings 122 as an example, but in another embodiment, as shown in FIG. 2A and FIG. 2B, the first common electrode 120 may have a plurality of slits. 124, wherein at least one slit 124 exposes the data line DL. The width of the slit 124 is, for example, 2 um to 8 um, but is not limited thereto.

In the above embodiment, the first common electrode 120 and the second common electrode 130 are disposed above and below the pixel electrode 110, and the second projection distance d2 between the second common electrode 130 and the data line DL is smaller than the pixel electrode. The first projection distance d1 between the 110 and the data line DL. That is, the second common electrode 130 completely overlaps the pixel electrode 110 and the size of the second common electrode 130 is larger than the size of the pixel electrode 110, so a storage capacitor is formed between the second common electrode 130 and the pixel electrode 110. In addition, the storage capacitance between the second common electrode 130 and the pixel electrode 110 is connected in parallel with the storage capacitance between the first common electrode 120 and the pixel electrode 110 to effectively increase the storage capacitance in the pixel. On the other hand, the second common electrode 130 can shield the electric field from the data line DL as a shielding metal. In detail, the first common electrode 120 and the data line DL are disposed so as not to overlap or the opening 122 of the first common electrode 120 exposes at least part of the data line DL, which can effectively reduce the relationship between the first common electrode 120 and the data line DL. Compensation capacitor Cdc, but this may cause serious light leakage. However, in the present embodiment, the second common electrode 130 shields the electric field from the data line DL, and can effectively avoid dark state light leakage. Therefore, the pixel structure has a small compensation capacitor Cdc, a small parasitic capacitance Cpd, and a large storage capacitor. Cst, and can avoid dark state light leakage and reduce the feedthrough voltage, so that the pixel structure has better component characteristics.

3 is a cross-sectional view of a display panel in accordance with an embodiment of the present invention. Referring to FIG. 3 , the display panel 200 includes a first substrate 102 , a second substrate 220 , a display medium 230 , a data line DL , a scan line SL , an active device T , a pixel electrode 110 , and a first The common electrode 120 and a second common electrode 130 are shared. It should be noted that although only one of the pixel structures in the display panel is illustrated in FIG. 3 as an example. It should be understood by those skilled in the art that the display panel is composed of a plurality of arrayed pixel structures. The data line DL is disposed on the first substrate 102.

The second substrate 220 is disposed opposite to the first substrate 102. The second substrate 220 is, for example, a color filter substrate, which includes a substrate (not shown), an electrode layer (not shown), a color filter pattern (not shown), and a light shielding pattern (not shown). The display medium 230 is disposed between the first substrate 102 and the second substrate 220. Display medium 230 can include liquid crystal molecules, electrophoretic display media, or other suitable media. In the present embodiment, the display medium 230 is, for example, a liquid crystal molecule as an example, but is not limited thereto. Further, the liquid crystal molecules are preferably exemplified by liquid crystal molecules which can be rotated or switched by a horizontal electric field or liquid crystal molecules which can be rotated or switched by a lateral electric field, but are not limited thereto. In other words, the display panel 200 of the present embodiment may be a fringe field conversion type liquid crystal display or other liquid crystal display.

The scan lines SL are disposed on the first substrate 102 and are disposed to cross each other with the data lines DL. The active device T is disposed on the first substrate 102, and the data line DL and the scan The line SL is electrically connected. The pixel electrode 110 is disposed on the first substrate 102 and electrically connected to the active device T, wherein the pixel electrode 110 and the data line DL have a first projection distance d1. The first common electrode 120 is disposed on the first substrate 102 , and is disposed above the pixel electrode 110 and overlaps the pixel electrode 110 . The first common electrode 120 has a plurality of openings 122 to expose the pixel electrode 110 . The second common electrode 130 is disposed on the first substrate 102 and disposed under the pixel electrode 110 and has a projection overlapped with the pixel electrode 110. The second common electrode 130 and the data line DL have a second projection distance d2. And the second projection distance d2 is smaller than the first projection distance d1. The arrangement and material of the data line DL, the scan line SL, the active device T, the pixel electrode 110, the first common electrode 120, and the second common electrode 130 can be referred to in the previous embodiment, and will not be described herein. Furthermore, in FIG. 3, the first common electrode 120 has an opening 122 as an example, but the first common electrode 120 may have a slit 124 as shown in FIGS. 2A and 2B.

In general, as the unit pixel area is gradually reduced, the pixel structure will face an excessive feedthrough voltage due to a drop in storage capacitance. In addition, the size of the shading pattern will gradually shrink with the area of the pixel, which may cause serious light leakage. However, in the pixel structure of the display panel 200 of the present embodiment, the second common electrode 130 shields the electric field from the data line DL, and the light leakage phenomenon can be effectively avoided. In addition, the first common electrode 120 and the data line DL have a reduced compensation capacitance Cdc, the data line DL and the pixel electrode 110 have a reduced parasitic capacitance Cpd, and between the second common electrode 130 and the pixel electrode 110. The storage capacitor is connected in parallel with the storage capacitor between the first common electrode 120 and the pixel electrode 110 to effectively increase the pixel Storage capacitors. In this way, the feedthrough voltage of the pixel structure can be effectively reduced, and the dark state light leakage can be avoided. Therefore, the display panel can have better display quality, higher resolution, and lower power consumption.

Next, the display panel of the present invention will be described as an experimental example to have the effect of avoiding light leakage. 4A and FIG. 4B are diagrams showing electric field intensity and electric field distribution in a pixel structure of a display panel according to an experimental example of the present invention, and FIGS. 5A and 5B are electric fields in a pixel structure of a display panel according to a comparative example. The intensity and electric field distribution maps are shown in FIG. 4B and FIG. 5B for the corresponding pixel structure and the relative position of the light-shielding pattern (BM). For the pixel structure, reference may be made to the foregoing embodiments, and details are not described herein. In the experimental example, the second projection distance d2 between the second common electrode 130 and the data line DL is smaller than the first projection distance d1 between the pixel electrode 110 and the data line DL, and in the comparative example, the second common electrode The second projection distance d2 between the 130 and the data line DL is greater than the first projection distance d1 between the pixel electrode 110 and the data line DL, wherein the signal intensity of the data line DL is 8V. 4A to 5B, the experimental example has a narrow electric field and a reduced light leakage area as compared with the comparative example having a wider electric field and an increase in the light leakage area. That is, in order to reduce the light leakage area, the display panel shown in the comparative example must increase the area of the light shielding pattern, thus causing a decrease in the aperture ratio of the pixel structure. However, in the pixel structure of the experimental example of the present invention, the second common electrode can effectively shield the electric field from the data line to achieve the purpose of avoiding light leakage. Therefore, the pixel structure of the experimental example of the present invention can have a high aperture ratio.

6 is a display panel, a second common electrode according to an experimental example of the present invention. A relationship diagram between the second projection distance d2 and the degree of light leakage between the data lines. As can be seen from FIG. 6 , taking the width of the light-shielding pattern as 8 μm as an example, when the second projection distance d2 is smaller than the first projection distance d1, when the second projection distance d2 is −1 μm to 3 μm, the setting of the second common electrode is indeed It can greatly reduce the occurrence of light leakage.

As described above, in the pixel structure and the display panel of the present invention, the first common electrode and the second common electrode are disposed above and below the pixel electrode, and the second projection between the second common electrode and the data line The distance is less than the first projection distance between the pixel electrode and the data line. The second common electrode shields the electric field from the data line, and can effectively avoid dark state light leakage. In addition, a storage capacitor is formed between the second common electrode and the pixel electrode, which can effectively increase the storage capacitance of the pixel, thereby reducing the feedthrough voltage of the pixel structure. Therefore, the display panel using this pixel structure has better display quality and enables high-resolution products to have lower power consumption.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and any one of ordinary skill in the art can make some changes and refinements without departing from the spirit and scope of the present invention. The scope of the invention is defined by the scope of the appended claims.

100‧‧‧ pixel structure

102‧‧‧Substrate

104‧‧‧ gate insulation

106‧‧‧Dielectric layer

110‧‧‧pixel electrodes

120‧‧‧First common electrode

122‧‧‧ openings

130‧‧‧Second common electrode

D1‧‧‧first projection distance

D2‧‧‧second projection distance

DL‧‧‧ data line

Claims (9)

A pixel structure is disposed on a substrate, comprising: a data line; a scan line disposed opposite to the data line; an active component electrically connected to the data line and the scan line; a pixel electrode, Electrically connecting with the active device, wherein the pixel electrode and the data line have a first projection distance; a first common electrode disposed above the pixel electrode and overlapping the pixel electrode, and the first The common electrode has a plurality of openings exposing the pixel electrode; and a second common electrode disposed under the pixel electrode and having a projection overlapping the pixel electrode, wherein the second common electrode and the data line are There is a second projection distance, and the second projection distance is smaller than the first projection distance. The pixel structure of claim 1, wherein the first common electrode does not overlap the data line. The pixel structure of claim 1, wherein the first common electrode further comprises at least one opening exposing the data line. The pixel structure of claim 1, wherein the first common electrode further comprises at least one slit exposing the data line. The pixel structure of claim 1, further comprising a gate insulating layer disposed between the second common electrode and the pixel electrode. The pixel structure of claim 1, further comprising a dielectric layer disposed between the first common electrode and the pixel electrode. The pixel structure of claim 1, wherein the material of the second common electrode comprises a transparent conductive material. The pixel structure of claim 1, wherein the material of the pixel electrode comprises a transparent conductive material. A display panel includes: a first substrate; a second substrate; a display medium disposed between the first substrate and the second substrate; a data line disposed on the first substrate; a scan line, Disposed on the first substrate, and the data lines are disposed to cross each other; an active component is disposed on the first substrate, electrically connected to the data line and the scan line; and a pixel electrode is disposed in the first The substrate is electrically connected to the active device, wherein the pixel electrode and the data line have a first projection distance; a first common electrode is disposed on the first substrate and disposed above the pixel electrode And overlapping with the pixel electrode, wherein the first common electrode has a plurality of openings to expose the pixel electrode; and a second common electrode is disposed on the first substrate, disposed under the pixel electrode and projected And overlapping with the pixel electrode, wherein the second common electrode and the data line have a second projection distance, and the second projection distance is smaller than the first projection distance.