TWI487252B

TWI487252B - Variable frequency variable current driver

Info

Publication number: TWI487252B
Application number: TW102102277A
Authority: TW
Inventors: Chih Ling Yang; Chih Shuo Yang; Chao Hua Yang
Original assignee: Chang Mei Ling
Priority date: 2013-01-22
Filing date: 2013-01-22
Publication date: 2015-06-01
Also published as: TW201431257A

Description

Variable frequency converter

本發明技術特徵之一在於整合電子學與電力電子學上電路分析與設計的新發明，並融入以微處理機為主之監控軟體與波形產生軟體，而使變頻變壓(或變頻變流)驅動器之數位-數位控制模式改善成數位-類比控制模式。 One of the technical features of the present invention is to integrate a new invention of circuit analysis and design in electronics and power electronics, and incorporate a microprocessor-based monitoring software and waveform generating software to convert the variable frequency (or variable frequency converter). The digital-digital control mode of the driver is improved to a digital-analog control mode.

目前用以連接負載14之習知變頻變壓或變頻變流的變頻器，請參考圖一所示，皆以PWM(Pulse-Width Modulation)為核心控制模式，再結合數位電橋電路13，並由以微處理機為主之監控軟體(即，監控系統10)加以統整，而完成系統功能。因為是以PWM作為控制模式，故微處理機就須負起快速運算能力與快速數位類比資料轉換功能，所以需選用高效能微處理器。 At present, the frequency converter for connecting the load 14 with the conventional variable frequency variable voltage or variable frequency variable current, as shown in FIG. 1 , adopts PWM (Pulse-Width Modulation) as the core control mode, and combines the digital bridge circuit 13 , and The system functions are completed by the microprocessor-based monitoring software (ie, the monitoring system 10). Because PWM is used as the control mode, the microprocessor must be equipped with a fast computing capability and a fast digital analog data conversion function, so a high-performance microprocessor is required.

除此之外，因為是由PWM控制模式產生變頻變壓或變頻變流功能，故數位電橋電路13與其相關介面電路12之開關切換元件(如BJT或MOSFET等)，就需採用高效能、高品質產品。 In addition, since the variable frequency transformer or variable frequency converter function is generated by the PWM control mode, the digital switching circuit 13 and its switching interface components (such as BJT or MOSFET) of the interface circuit 12 need to adopt high efficiency. High quality products.

為了減少切換損耗與提升電路效率，零電壓/零電流(ZVS/ZCS)切換架構則需借用，故整體電路設計就更複雜，更不容易穩定。 In order to reduce switching losses and improve circuit efficiency, the zero-voltage/zero-current (ZVS/ZCS) switching architecture needs to be borrowed, so the overall circuit design is more complicated and less stable.

就因為採用高頻PWM控制模式切換之數位電橋電路13架構，所以會產生強烈的電磁干擾，而造成系統之不穩定，同時為了滿足電磁干擾之安規需求，一組複雜的防止電磁干擾電路與機構也是必須加入的。 Because of the high-frequency PWM control mode switching digital bridge circuit 13 architecture, it will generate strong electromagnetic interference, which will cause system instability, and in order to meet the safety requirements of electromagnetic interference, a complex set of electromagnetic interference prevention circuits and Organizations must also join.

本發明主要技術特徵之一請先參考圖二，再對照圖七。 One of the main technical features of the present invention is first referred to FIG. 2, and then to FIG.

監控系統20之多組輸入/輸出端分別接至介面電路22、類比電橋電路23、負載24以讀取相關電壓、電流、頻率、溫度等參數資料，並適時適當的送出所需的調控信號V _cs21，以利系統順利的工作於所設訂之模式。 The plurality of sets of input/output terminals of the monitoring system 20 are respectively connected to the interface circuit 22, the analog bridge circuit 23, and the load 24 to read parameter data related to voltage, current, frequency, temperature, etc., and appropriately send out required control signals in a timely manner. V _cs 21, in order to facilitate the smooth operation of the system in the set mode.

請再參考圖七。電晶體Q ₁706、電晶體Q ₂707、電晶體Q ₃708、電晶體Q ₄709等主動元件、以及電阻R _e3710、電阻R _e4711等被動元件組成類比電橋電路23。負載Z _L714則接至二端橋臂。直流電源V _dc712分別接至電晶體Q ₁706、電晶體Q ₂707。 Please refer to Figure 7 again. The active elements such as the transistor Q ₁ 706, the transistor Q ₂ 707, the transistor Q ₃ 708, the transistor Q ₄ 709, and the passive elements such as the resistors R _{e 3} 710 and the resistors R _{e 4} 711 constitute an analog bridge circuit 23. The load Z _L 714 is connected to the two-end bridge arm. The DC power source V _dc 712 is connected to the transistor Q ₁ 706 and the transistor Q ₂ 707, respectively.

監控系統700之多組輸入/輸出端介面分別接至介面電路702、介面電路703、介面電路704、介面電路705、電晶體Q ₁706、電晶體Q ₂707、電晶體Q ₃708、電晶體Q ₄709、負載Z _L714以讀取相關電壓、電流、頻率、溫度等參數資料，並適時適當的送出所需的不同頻率與大小的調控信號V _cs701。 The plurality of sets of input/output interfaces of the monitoring system 700 are respectively connected to the interface circuit 702, the interface circuit 703, the interface circuit 704, the interface circuit 705, the transistor Q ₁ 706, the transistor Q ₂ 707, the transistor Q ₃ 708, and the transistor. Q ₄ 709, load Z _L 714 to read the relevant voltage, current, frequency, temperature and other parameter data, and timely send the required different frequency and size of the control signal V _cs 701.

調控信號V _cs701是可變頻變壓，其藉由監控系統700分析已設訂參數資料與讀取相關即時參數資料後才產生並送出，並分別接至介面電路702、介面電路703、介面電路704、介面電路705而產生控制信號V ₁715、控制信號V ₂716、控制信號V _re3717、控制信號V _re4718。其所產生相關波形與時序請再參考圖七所示圖形。 The control signal V _cs 701 is a variable frequency variable voltage, which is generated and sent by the monitoring system 700 after analyzing the set parameter data and reading the relevant real-time parameter data, and is respectively connected to the interface circuit 702, the interface circuit 703, and the interface circuit. 704. The interface circuit 705 generates a control signal V ₁ 715, a control signal V ₂ 716, a control signal V _{re 3} 717, and a control signal V _{re 4} 718. Refer to the graph shown in Figure 7 for the relevant waveforms and timings generated.

因此直流電源V _dc712送出之電流i _d713其波形之頻率與大小，就雷同調控信號V _cs701，而流經負載Z _L714之電流i _L719就如同一交流電流且是可變頻率與大小，故負載Z _L714就有如接至一變頻變流之電源。 Therefore, the frequency and magnitude of the waveform of the current i _d 713 sent from the DC power source V _dc 712 is the same as the regulation signal V _cs 701 , and the current i _L 719 flowing through the load Z _L 714 is like the same alternating current and is variable frequency and The size, so the load Z _L 714 is like a power supply connected to a variable frequency converter.

電晶體Q ₁706、電晶體Q ₂707、電晶體Q ₃708、電晶體Q ₄709可以是BJT或MOSFET等主動元件。 The transistor Q ₁ 706, the transistor Q ₂ 707, the transistor Q ₃ 708, and the transistor Q ₄ 709 may be active elements such as BJT or MOSFET.

本發明主要技術特徵之一的直流電壓、電流同相結構，請參考圖三。根據電子學理論可知，當主動元件Q31處於工作區，該主動元件Q31是BJT或MOSFET等電晶體，其直流電源V _dc35之輸出電流I _dc必等於I _c且約為V _re/R _e的值，其間並不會隨直流電源V _dc35、電阻R _L32大小改變而改變，故直流電源將會輸出一固定電流，其大小約為V _re/R _e，V _re是可調控的，其大小可利用外部介面電路34、參考電源V _ref36之電路設計來達成此功效。本發明另一技術特徵則是利用電阻負載原理設計的脈動電流產生結構，請參考圖四，並對照圖三。若主動元件Q41(電晶體)處於工作區，則，且不因直流電源V _dc45、電阻負載R _L42大小而改變。若V _re為一脈動直流電壓，則電流i _d47也必然是脈動直流電流，其相關波形、時序，請再參考圖四所示圖形。V _re是可調控的，其大小可利用外部介面電路44與參考電源V _ref46之電路設計來達成此功效。 Refer to Figure 3 for the DC voltage and current in-phase structure of one of the main technical features of the present invention. According to the electronic theory, when the active device Q31 is in the working area, the active device Q31 is a transistor such as a BJT or a MOSFET, and the output current I _{dc of} the DC power supply V _dc 35 must be equal to I _c and about V _re / R _e The value does not change with the change of the DC power supply V _dc 35 and the resistance R _L 32. Therefore, the DC power supply will output a fixed current, which is about V _re / R _e , and V _re is controllable. The size can be achieved by the circuit design of the external interface circuit 34 and the reference power source V _ref 36. Another technical feature of the present invention is a pulsating current generating structure designed by the principle of resistive load, please refer to FIG. 4 and refer to FIG. If the active component Q41 (transistor) is in the working area, then It does not change due to the DC power supply V _dc 45 and the resistive load R _L 42 . If V _re is a pulsating DC voltage, the current i _d 47 must also be a pulsating DC current. For the relevant waveform and timing, please refer to the figure shown in Figure 4. V _re is controllable and can be sized to achieve this with the circuit design of external interface circuit 44 and reference power supply V _ref 46.

本發明又一技術特徵則是利用阻抗負載原理設計的脈動電流產生結構，請參考圖五，並對照圖四。若主動元件Q51(電晶體)處於工作區，則，且不因直流電源V _dc55，阻抗負載Z _L52大小而改變；若V _re為一脈動直流電壓，則電流i _d57也必然是脈動直流電流，其相關波形、時序，請再參考圖五所示圖形。V _re是可調控的，其大小可利用外部介面電路54與參考電源V _ref56之電路設計來達成此功效。 Another technical feature of the present invention is a pulsating current generating structure designed by the impedance load principle. Please refer to FIG. 5 and refer to FIG. If the active component Q51 (transistor) is in the working area, then And does not change due to the DC power supply V _dc 55, the impedance load Z _L 52; if V _re is a pulsating DC voltage, the current i _d 57 is also necessarily the pulsating DC current, and its related waveform and timing, please refer to the figure. Five graphics shown. V _re is controllable and can be sized to utilize the circuit design of external interface circuit 54 and reference power supply V _ref 56 to achieve this effect.

本發明再一技術特徵是利用所述之脈動直流驅動電路或電器，其結構請參考圖六，並對照圖五。 A further technical feature of the present invention is to utilize the pulsating DC drive circuit or the electric appliance. For the structure, please refer to FIG. 6 and refer to FIG.

監控系統61依據來至人機介面設訂之資料參數和透過其多組輸入/輸出端與介面電路63，分別接至介面電路63、主動元件Q64(電晶體)、負載Z _L66、電流i _d68等讀取相關電壓、電流、頻率、溫度等參數資料，作綜合分析與計算而產生調控信號V _cs62，此調控信號V _cs62是可改變大小與頻率。調控信號V _cs62則接至介面電路63、主動元件Q64、R _e65之組合而產生V _re69，故V _re69與調控信號V _cs62是同頻同相但大小不同，因為電流i _d68與V _re69是同頻同相，所以也必與調控信號V _cs62同頻同相，故流經負載Z _L66之電流是可變大小與頻率(i _d68)，也就是俗稱的變頻變流驅動。其相關波形與時序請再參考圖六所示圖形。其中監控系統61之多組輸入/輸出端也分別接至介面電路63、主動元件Q64、負載Z _L66等，以讀取相關電壓、電流、頻率、溫度等參數資料。並適時適當的送出所需的調控信號V _cs62，以利系統順利的工作於所設訂之模式，並確保主動元件Q64處於工作區。 The monitoring system 61 is connected to the interface circuit 63, the active device Q64 (transistor), the load Z _L 66, the current i according to the data parameters set to the human machine interface and through the plurality of sets of input/output terminals and interface circuits 63. _d 68 and so on read the relevant voltage, current, frequency, temperature and other parameter data for comprehensive analysis and calculation to generate the control signal V _cs 62, the control signal V _cs 62 can change the size and frequency. The control signal V _cs 62 is connected to the combination of the interface circuit 63 and the active elements Q64 and R _e 65 to generate V _re 69 , so the V _re 69 and the control signal V _cs 62 are in the same frequency but different in size because the current i _d 68 It is in phase with V _re 69, so it must be in phase with the regulation signal V _cs 62, so the current flowing through the load Z _L 66 is variable size and frequency ( i _d 68), also known as variable frequency converter drive. Please refer to the figure shown in Figure 6 for the relevant waveform and timing. The plurality of sets of input/output terminals of the monitoring system 61 are also respectively connected to the interface circuit 63, the active component Q64, the load Z _L 66, etc., to read related parameter data such as voltage, current, frequency and temperature. The required control signal V _cs 62 is sent appropriately in time to facilitate the smooth operation of the system in the set mode and ensure that the active component Q64 is in the working area.

本發明變頻變流驅動器或電路設計之實施例，請參考圖七。電晶體Q ₁706、電晶體Q ₂707、電晶體Q ₃708、電晶體Q ₄709等主動元件、以及電阻R _e3710、電阻R _e4711等被動元件組合一類比電橋電路23，負載Z _L714則接至二橋臂，其中電晶體Q ₁706與電晶體Q ₄709、電阻R _e4711是一組，電晶體Q ₂707、電晶體Q ₃708、電阻R _e3710則是另外一組。電晶體Q ₁706與電晶體Q ₂707是被設計當開關(ON/OFF)使用，故工作於飽和區/截止區。電晶體Q ₃708、電晶體Q ₄709是被設計於作綫性放大，故工作於工作區。 For an embodiment of the design of the variable frequency converter or circuit of the present invention, please refer to FIG. An active element such as a transistor Q ₁ 706, a transistor Q ₂ 707, a transistor Q ₃ 708, a transistor Q ₄ 709, and a passive element such as a resistor R _{e 3} 710 and a resistor R _{e 4} 711 are combined with an analog bridge circuit 23, The load Z _L 714 is connected to the second bridge arm, wherein the transistor Q ₁ 706 and the transistor Q ₄ 709 and the resistor R _{e 4} 711 are a group, the transistor Q ₂ 707, the transistor Q ₃ 708, and the resistor R _{e 3} 710 It is another group. The transistor Q ₁ 706 and the transistor Q ₂ 707 are designed to operate in the saturation/cutoff area when the switch (ON/OFF) is used. Transistor Q ₃ 708, Q ₄ 709 electric crystal is designed for use as a linear amplification, so that the work of the working area.

當電晶體Q ₁706 ON、電晶體Q ₄709動作(電晶體Q ₂707 OFF、電晶體Q ₃708不能動作-也是OFF)，電流i _d713便由直流電源V _dc712流出，經電晶體Q ₁706、負載Z _L714、電晶體Q ₄709、電阻R _e4711再流回直流電源V _dc712。 When the transistor Q ₁ 706 ON and the transistor Q ₄ 709 operate (the transistor Q ₂ 707 OFF, the transistor Q ₃ 708 does not operate - also OFF), the current i _d 713 flows out from the DC power source V _dc 712 through the transistor. Q ₁ 706, load Z _L 714, transistor Q ₄ 709, and resistor R _{e 4} 711 flow back to DC power source V _dc 712.

當電晶體Q ₂707 ON、電晶體Q ₃708動作(電晶體Q ₁706 OFF、電晶體Q ₄709不能動作-也是OFF)，電流i _d713便由直流電源V _dc712流出，經電晶體Q ₂707、負載Z _L714、電晶體Q ₃708、電阻R _e3710再流回直流電源V _dc712，故對負載Z _L714而言就如同接上一交流電源，但其大小與頻率是可變的，其相關的波形與時序請再參考圖七所示圖形。 When the transistor Q ₂ 707 ON and the transistor Q ₃ 708 operate (the transistor Q ₁ 706 OFF, the transistor Q ₄ 709 does not operate - also is OFF), the current i _d 713 flows out from the DC power source V _dc 712 through the transistor. Q ₂ 707, load Z _L 714, transistor Q ₃ 708, and resistor R _{e 3} 710 flow back to the DC power source V _dc 712, so that the load Z _L 714 is connected to an AC power source, but its size and frequency. It is variable, please refer to the figure shown in Figure 7 for its related waveforms and timing.

電流i _d713是由控制信號V _re3717、控制信號V _re4718所決定。而控制信號V _re3717、控制信號V _re4718又是由調控信號V _cs701經介面電路704、介面電路705、電晶體Q ₃708、電晶體Q ₄709、電阻R _e3710、電阻R _e4711之組合所產生，調控信號V _cs701是可變大小與變頻率，故電流i _d713也就如同調控信號V _cs701也是可變大小與頻率。 The current i _d 713 is determined by the control signal V _{re 3} 717 and the control signal V _{re 4} 718. The control signal V _{re 3} 717 and the control signal V _{re 4} 718 are further controlled by the control signal V _cs 701 via the interface circuit 704, the interface circuit 705, the transistor Q ₃ 708, the transistor Q ₄ 709, the resistor R _{e 3} 710, and the resistor. The combination of R _{e 4} 711 produces that the regulation signal V _cs 701 is of variable magnitude and variable frequency, so that the current i _d 713 is also variable and the frequency as the regulation signal V _cs 701.

調控信號V _cs701是可變大小與頻率是由監控系統700分析已設訂參數資料與讀取相關參數資料後產才產生，監控系統700之多組輸入/輸出端也分別接至介面電路702、介面電路703、介面電路704、介面電路705、電晶體Q ₁706(主動元件)、電晶體Q ₂707(主動元件)、電晶體Q ₃708(主動元件)、電晶體Q ₄709(主動元件)、負載Z _L714等，以讀取相關電壓、電流、頻率、溫度等參數資料。並適時適當的送出所需的調控信號V _cs701，以利系統順利的工作於所設訂之模式，並確保電晶體Q ₃708(主動元件)、電晶體Q ₄709(主動元件)處於工作區。 The control signal V _cs 701 is variable size and frequency generated by the monitoring system 700 after analyzing the set parameter data and reading the relevant parameter data, and the plurality of sets of input/output terminals of the monitoring system 700 are also respectively connected to the interface circuit 702. Interface circuit 703, interface circuit 704, interface circuit 705, transistor Q ₁ 706 (active device), transistor Q ₂ 707 (active device), transistor Q ₃ 708 (active device), transistor Q ₄ 709 (active Component), load Z _L 714, etc., to read the relevant voltage, current, frequency, temperature and other parameters. And timely send out the required control signal V _cs 701, in order to facilitate the smooth operation of the system in the set mode, and ensure that the transistor Q ₃ 708 (active component), transistor Q ₄ 709 (active component) is working. Area.

負載Z _L714是雙端等效負載，由電阻、電容、電感所組合。 The load Z _L 714 is a double-ended equivalent load, which is a combination of resistors, capacitors, and inductors.

將上述技術特徵具體呈現的本發明另一實施例，請參考圖八並對照圖七。其中交流馬達(AC Motor)814直接取代負載Z _L714，電晶體Q ₁806、電晶體Q ₂807、電晶體Q ₃808、電晶體Q ₄809等主動元件、以及電阻R _e3810、電阻R _e4811等被動元件組合一類比電橋電路23，交流馬達(AC Motor)814則接至二橋臂，其中電晶體Q ₁806與電晶體Q ₄809、電阻R _e4811是一組，電晶體Q ₂807、電晶體Q ₃808、電阻R _e3810則是另外一組。電晶體Q ₁806與電晶體Q ₂807是被設計當開關(ON/OFF)使用，故工作於飽和區/截止區，電晶體Q ₃808、電晶體Q ₄809是被設計於作綫性放大，故工作於工作區。 For another embodiment of the present invention in which the above technical features are specifically presented, please refer to FIG. 8 and refer to FIG. Wherein the alternating current motor (AC Motor) 814 directly substituted load Z _L 714, transistor Q ₁ 806, transistor Q ₂ 807, the transistor Q ₃ 808, transistor Q ₄ 809, etc. an active element, and a resistor R _{e 3} 810, resistor The passive components such as R _{e 4} 811 are combined with an analog bridge circuit 23, and the AC motor 814 is connected to the second bridge arm, wherein the transistor Q ₁ 806 and the transistor Q ₄ 809 and the resistor R _{e 4} 811 are a group. The transistor Q ₂ 807, the transistor Q ₃ 808, and the resistor R _{e 3} 810 are another group. The transistor Q ₁ 806 and the transistor Q ₂ 807 are designed to be used in the saturation/cutoff region when the switch (ON/OFF) is used, and the transistor Q ₃ 808 and the transistor Q ₄ 809 are designed to be linear. Zoom in, so work in the work area.

當電晶體Q ₁806 ON、電晶體Q ₄809動作(電晶體Q ₂807 OFF、電晶體Q ₃808不能動作-也是OFF)，電流i _d813便由直流電源V _dc812流出，經電晶體Q ₁806、交流馬達(AC Motor)814、電晶體Q ₄809、電阻R _e4811再流回直流電源V _dc812。 When transistor Q ₁ 806 ON, the transistor Q ₄ 809 operation (transistor Q ₂ 807 OFF, the transistor Q ₃ 808 inoperable - is OFF), current i _d 813 will flow from the DC power source V _dc 812, through transistor Q ₁ 806, AC motor 814, transistor Q ₄ 809, and resistor R _{e 4} 811 flow back to DC power source V _dc 812.

當電晶體Q ₂807 ON、電晶體Q ₃808動作(電晶體Q ₁806 OFF、電晶體Q ₄809不能動作-也是OFF)，電流i _d813便由直流電源V _dc812流出，經電晶體Q ₂807、交流馬達(AC Motor)814、電晶體Q ₃808、電阻R _e3810再流回直流電源V _dc812。故對交流馬達(AC Motor)814而言尤如接上一交流電源，但其大小與頻率是可變的。其相關的波形與時序請再參考圖八所示圖形。 When the transistor Q ₂ 807 ON and the transistor Q ₃ 808 operate (the transistor Q ₁ 806 OFF, the transistor Q ₄ 809 does not operate - also is OFF), the current i _d 813 flows out from the DC power source V _dc 812 through the transistor. Q ₂ 807, AC motor 814, transistor Q ₃ 808, and resistor R _{e 3} 810 flow back to DC power source V _dc 812. Therefore, the AC motor 814 is connected to an AC power source, but its size and frequency are variable. Please refer to the figure shown in Figure 8 for its related waveforms and timing.

電流i _d813是由控制信號V _re3817、控制信號V _re4818所決定。而控制信號V _re3817、控制信號V _re4818又是由調控信號V _acr801經介面電路804、介面電路805、電晶體Q ₃808、電晶體Q ₄809、電阻R _e3810、電阻R _e4811之組合所產生。調控信號V _acr801是可變大小與變頻率，故電流i _d813也就如同調控信號V _acr801也是可變大小與頻率。 Current i _d 813 is determined by control signal V _{re 3} 817 and control signal V _{re 4} 818. The control signal V _{r e3} 817 and the control signal V _{re 4} 818 are again controlled by the control signal V _acr 801 via the interface circuit 804, the interface circuit 805, the transistor Q ₃ 808, the transistor Q ₄ 809, the resistor R _{e 3} 810, and the resistor. A combination of R _{e 4} 811 is produced. The regulation signal V _acr 801 is of variable magnitude and variable frequency, so the current i _d 813 is also variable size and frequency as the regulation signal V _acr 801.

調控信號V _acr801是可變大小與頻率是由監控系統800分析已設訂資料與讀取相關資料後產才產生，監控系統800之多組輸入/輸出端也分別接至介面電路802、介面電路803、介面電路804、介面電路805、電晶體Q ₁806(主動元件)、電晶體Q ₂807(主動元件)、電晶體Q ₃808(主動元件)、電晶體Q ₄809(主動元件)、交流馬達(AC Motor)814等，以讀取相關電壓、電流、頻率、溫度等參數資料。並適時適當的送出所需的調控信號V _acr801，以利系統順利的工作於所設訂之模式，並確保電晶體Q ₃808、電晶體Q ₄809等主動元件處於工作區。 The control signal V _acr 801 is variable size and frequency generated by the monitoring system 800 after analyzing the set data and the read related data, and the plurality of sets of input/output terminals of the monitoring system 800 are also respectively connected to the interface circuit 802 and the interface. Circuit 803, interface circuit 804, interface circuit 805, transistor Q ₁ 806 (active component), transistor Q ₂ 807 (active component), transistor Q ₃ 808 (active component), transistor Q ₄ 809 (active component) AC motor 814, etc., to read the relevant voltage, current, frequency, temperature and other parameters. And timely send out the required control signal V _acr 801, in order to facilitate the smooth operation of the system in the set mode, and ensure that the active components such as transistor Q ₃ 808, transistor Q ₄ 809 are in the working area.

R_L、R_e‧‧‧電阻 R _L , R _e ‧‧‧resistance

Z_L‧‧‧電阻、電容、電感組合而成的雙端等效零件(負載) Z _L ‧‧‧Double-end equivalent parts (load) made up of resistors, capacitors and inductors

V_re3、V_re4‧‧‧電阻R_e3、R_e4二端電壓 V _re3 , V _{re4 ‧‧ ‧} resistance R _{e 3} , R _{e 4} terminal voltage

V_re‧‧‧電阻R_e二端電壓 V _re ‧‧‧resistance R _e two-terminal voltage

Q ₁、Q ₂、Q ₃、Q ₄‧‧‧主動元件(電晶體，如BJT或MOSFET) Q ₁ , Q ₂ , Q ₃ , Q ₄ ‧‧‧ active components (transistors such as BJT or MOSFET)

R _e3、R _e4‧‧‧被動元件 R _{e 3} , R _{e 4} ‧‧‧ Passive components

i_e、i_c、i_b‧‧‧電流 i _e , i _c , i _b ‧‧‧ current

V_dc/I _dc‧‧‧直流電源 V _dc / I _dc ‧‧‧DC power supply

I_e、I_c、I_b‧‧‧電流 I _e , I _c , I _b ‧‧‧ current

10‧‧‧監控系統 10‧‧‧Monitoring system

12‧‧‧介面電路 12‧‧‧Interface circuit

13‧‧‧數位電橋電路 13‧‧‧Digital bridge circuit

14‧‧‧負載14 14‧‧‧Load 14

20‧‧‧監控系統 20‧‧‧Monitoring system

21‧‧‧調控信號V _cs 21‧‧‧Regulatory signal V _cs

22‧‧‧介面電路 22‧‧‧Interface circuit

23‧‧‧類比電橋電路 23‧‧‧ analog bridge circuit

24‧‧‧負載24 24‧‧‧Load 24

31‧‧‧主動元件Q 31‧‧‧Active component Q

32‧‧‧電阻R _L 32‧‧‧Resistor R _L

34‧‧‧介面電路 34‧‧‧Interface circuit

35‧‧‧直流電源V _dc 35‧‧‧DC power supply V _dc

36‧‧‧參考電源V _ref 36‧‧‧Reference power supply V _ref

41‧‧‧主動元件Q 41‧‧‧Active component Q

42‧‧‧負載R _L 42‧‧‧Load R _L

44‧‧‧介面電路44 44‧‧‧Interface circuit 44

45‧‧‧直流電源V _dc 45‧‧‧DC power supply V _dc

46‧‧‧參考電源V _ref 46‧‧‧Reference power supply V _ref

47‧‧‧電流i _d 47‧‧‧current i _d

51‧‧‧主動元件Q 51‧‧‧Active component Q

52‧‧‧負載Z _L 52‧‧‧Load Z _L

54‧‧‧介面電路 54‧‧‧Interface circuit

55‧‧‧直流電源V _dc 55‧‧‧DC power supply V _dc

56‧‧‧參考電源V _ref 56‧‧‧Reference power supply V _ref

57‧‧‧電流i _d 57‧‧‧current i _d

61‧‧‧監控系統 61‧‧‧Monitoring system

62‧‧‧調控信號V _cs 62‧‧‧Regulatory signal V _cs

63‧‧‧介面電路 63‧‧‧Interface circuit

64‧‧‧主動元件Q 64‧‧‧Active component Q

66‧‧‧負載Z _L 66‧‧‧Load Z _L

68‧‧‧電流i _d 68‧‧‧current i _d

700‧‧‧監控系統 700‧‧‧Monitoring system

701‧‧‧調控信號V _cs 701‧‧‧Regulatory signal V _cs

702、703、704、705‧‧‧介面電路 702, 703, 704, 705‧‧ interface circuit

706‧‧‧電晶體Q ₁ 706‧‧‧Transistor Q ₁

707‧‧‧電晶體Q ₂ 707‧‧•Transistor Q ₂

708‧‧‧電晶體Q ₃ 708‧‧•Transistor Q ₃

709‧‧‧電晶體Q ₄ 709‧‧•Transistor Q ₄

710‧‧‧電阻R _e3 710‧‧‧Resistor R _{e 3}

711‧‧‧電阻R _e4 711‧‧‧Resistor R _{e 4}

712‧‧‧直流電源V _dc 712‧‧‧DC power supply V _dc

713‧‧‧電流i _d 713‧‧‧current i _d

714‧‧‧負載Z _L 714‧‧‧Load Z _L

715‧‧‧控制信號V ₁ 715‧‧‧Control signal V ₁

716‧‧‧控制信號V ₂ 716‧‧‧Control signal V ₂

717‧‧‧控制信號V _re3 717‧‧‧Control signal V _{re 3}

718‧‧‧控制信號V _re4 718‧‧‧Control signal V _{re 4}

719‧‧‧電流i _L 719‧‧‧current i _L

800‧‧‧監控系統 800‧‧‧Monitoring system

801‧‧‧調控信號V _acr 801‧‧‧Regulatory signal V _acr

802‧‧‧介面電路 802‧‧‧ interface circuit

803‧‧‧介面電路 803‧‧‧Interface circuit

804‧‧‧介面電路 804‧‧‧Interface circuit

805‧‧‧介面電路 805‧‧‧Interface circuit

806‧‧‧電晶體Q ₁ 806‧‧•Transistor Q ₁

807‧‧‧電晶體Q ₂ 807‧‧‧Transistor Q ₂

808‧‧‧電晶體Q ₃ 808‧‧‧Transistor Q ₃

809‧‧‧電晶體Q ₄ 809‧‧‧Transistor Q ₄

810‧‧‧電阻R _e3 810‧‧‧Resistor R _{e 3}

811‧‧‧電阻R _e4 811‧‧‧Resistor R _{e 4}

812‧‧‧直流電源V _dc 812‧‧‧DC power supply V _dc

813‧‧‧電流i _d 813‧‧‧current i _d

814‧‧‧交流馬達 814‧‧‧AC motor

817‧‧‧控制信號V _re3 817‧‧‧Control signal V _{re 3}

818‧‧‧控制信號V _re4 818‧‧‧Control signal V _{re 4}

圖一習知PWM數位、數位變頻器之架構 Figure 1 Architecture of a conventional PWM digital and digital converter

圖二本發明數位、類比變頻器之架構 Figure 2 Architecture of the digital and analog inverter of the present invention

圖三本發明應用之直流電壓、電流同相原理 Figure 3 DC voltage and current phase principle applied in the invention

圖四本發明脈動電流產生原理(電阻負載) Figure 4 Pulsating current generation principle (resistive load) of the present invention

圖五本發明脈動電流產生原理(阻抗負載) Figure 5 Pulsating current generation principle (impedance load) of the present invention

圖六本發明脈動電流驅動電路基本結構 Figure 6 Basic structure of the pulsating current drive circuit of the present invention

圖七本發明變頻變流驅動器實施例電路架構 Figure 7 Circuit structure of the embodiment of the variable frequency converter driver of the present invention

圖八本發明變頻變流驅動器具體實施例電路架構 Figure 8 Circuit structure of a specific embodiment of the variable frequency converter driver of the present invention

700‧‧‧監控系統 700‧‧‧Monitoring system

714‧‧‧負載Z _L 714‧‧‧Load Z _L

701‧‧‧調控信號V _cs 701‧‧‧Regulatory signal V _cs

706‧‧‧電晶體Q ₁ 706‧‧‧Transistor Q ₁

707‧‧‧電晶體Q ₂ 707‧‧•Transistor Q ₂

708‧‧‧電晶體Q ₃ 708‧‧•Transistor Q ₃

709‧‧‧電晶體Q ₄ 709‧‧•Transistor Q ₄

710‧‧‧電阻R _e3 710‧‧‧Resistor R _{e 3}

711‧‧‧電阻R _e4 711‧‧‧Resistor R _{e 4}

712‧‧‧直流電源V _dc 712‧‧‧DC power supply V _dc

713‧‧‧電流i _d 713‧‧‧current i _d

715‧‧‧控制信號V ₁ 715‧‧‧Control signal V ₁

716‧‧‧控制信號V ₂ 716‧‧‧Control signal V ₂

717‧‧‧控制信號V _re3 717‧‧‧Control signal V _{re 3}

718‧‧‧控制信號V _re4 718‧‧‧Control signal V _{re 4}

710‧‧‧電流i _L 710‧‧‧current i _L

Claims

A variable frequency converter driver comprises: an analog bridge circuit: consisting of an active component and a passive component, the input end of which is connected to the output end of the monitoring system, and the output end thereof is connected to the load, so that the load has a connection to the The normal function of the AC power supply with the same function, wherein the analog bridge circuit is a single-phase bridge structure or a multi-phase bridge structure; the monitoring system: the connection interface circuit reads the relevant data required and interprets it, and then passes through the interface circuit. Sending appropriate control signals to make the overall system operate correctly and stably in a set mode of operation, wherein the interface circuit is connected to the monitoring system, and the connection structure of the active components and passive components of the analog bridge circuit; analog bridge The bridge arm of the circuit is composed of two active components and one passive component, and is analogous to two active components on the bridge arm of the bridge circuit, one of which is used as a switch, operates in a saturation zone or a cutoff zone, and the other works in operation. The zone is a linear amplification function.

As for the variable frequency converter driver described in claim 1, the active component is one of BJT and MOSFET.

The variable frequency converter driver according to claim 1, wherein the passive component is a resistor, and the resistor is connected to the active component.

For example, the variable frequency converter driver described in claim 1 of the patent scope has the same function as the active functions of the two active components on the bridge arm of the bridge circuit, mainly in accordance with the phase sequence of the control signal sent by the monitoring system. .

The variable frequency converter driver according to claim 1, wherein the monitoring system is connected to the active component and the passive component of the load, the analog bridge circuit via the interface circuit, and reads the parameter data to obtain a control signal, so that The system works steadily.

The variable frequency converter driver according to claim 1 is a device for an electrical product.