TWI473379B - Battery management system transmission receiver - Google Patents
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Description
本發明是有關於一種電池管理系統，特別是一種電池管理系統之傳送接收器。
The present invention relates to a battery management system, and more particularly to a transmission receiver for a battery management system.
請參閱台灣新型專利申請第100218018號「電源管理系統」，該電源管理系統包括多個電池、一電池檢測單元與至少一調整單元。其中，電池檢測單元耦接多個電池，且其電池檢測單元包括一訊號處理器與一感應電阻。其中，訊號處理器以通過感應電阻之一電流方向導致該感應電阻兩端之電壓差，判斷多個電池之電量增減，並根據多個電池之相鄰兩電池之電壓差與一參考電壓之比較結果回應輸出一調整訊號。各調整單元，分別耦接至電池檢測單元與多個電池之兩相鄰電池之中間，接收調整訊號以調整多個電池之相鄰兩電池之電壓差，但習知電源管理系統並無抵抗高壓之設計，若發生高壓故障時，該電源管理系統會因通過電流過大而燒毀。
Please refer to Taiwan New Patent Application No. 100218018 "Power Management System", which includes a plurality of batteries, a battery detecting unit and at least one adjusting unit. The battery detecting unit is coupled to the plurality of batteries, and the battery detecting unit includes a signal processor and a sensing resistor. Wherein, the signal processor determines the voltage difference between the two batteries by the voltage difference between the two sides of the sensing resistor, and determines the voltage difference between the adjacent two batteries of the plurality of batteries and a reference voltage. The comparison result responds with an output adjustment signal. Each adjustment unit is coupled between the battery detection unit and two adjacent batteries of the plurality of batteries, and receives the adjustment signal to adjust the voltage difference between the adjacent two batteries of the plurality of batteries, but the conventional power management system does not resist the high voltage. The design, in the event of a high voltage fault, the power management system will burn out due to excessive current flow.
本發明的主要目的在於提供設置於電池模組內之傳送器及接收器，接收器以電阻分壓的方式可避免接收器接收過大電壓而燒毀，而傳送器藉由交叉偶合電路使得傳送速率增快。
本發明之一種電池管理系統之傳送接收器包含一第一電路及複數個第二電路，該第一電路，設置於一第一電池模組內，並具有一第一傳送器及一第一接收器，該第一傳送器具有一第一差動對、一第一交叉偶合電路、一第一輸出端及一第二輸出端，該第一交叉偶合電路電性連接該第一差動對，該第一輸出端及該第二輸出端電性連接該第一差動對及該第一交叉偶合電路，該第一接收器具有一第一接收端、一第二接收端、一第一運算放大器、一第二運算放大器及一第一比較器，該第一運算放大器及該第二運算放大器電性連接該第一接收端及該第二接收端，該第一比較器電性連接該第一運算放大器及該第二運算放大器，各該第二電路分別設置於各第二電池模組內，並具有一第二傳送器及一第二接收器，該第二接收器具有一第三接收端、一第四接收端、一第三運算放大器、一第四運算放大器及一第二比較器，該第三接收端電性連接該第一輸出端，該第四接收端電性連接該第二輸出端，該第三運算放大器及該第四運算放大器電性連接該第三接收端及該第四接收端，該第二比較器電性連接該第三運算放大器及該第四運算放大器，該第二傳送器具有一第二差動對、一第二交叉偶合電路、一第三輸出端及一第四輸出端，該第二交叉偶合電路電性連接該第二差動對，該第三輸出端電性連接該第二差動對、該第二交叉偶合電路及該第一接收端，該第四輸出端電性連接該第二差動對、該第二交叉偶合電路及該第二接收端，本發明藉由該第一電路之該第一傳送器及該第一接收器與該第二電路之該第二傳送器及該第二接收器，使得該第一電路及該第二電路可互相快速地傳送及接收資料，可避免每一電池模組中之量測單元與控制單元因訊號電位差異而無法進行溝通，而傳送速率可達2
Mbps，且本發明之架構可適用於電池模組的電壓在15~34V之範圍。The main object of the present invention is to provide a transmitter and a receiver disposed in a battery module. The receiver can prevent the receiver from receiving excessive voltage and burn out by resistor voltage division, and the transmitter increases the transmission rate by the cross coupling circuit. fast.
The transmission receiver of the battery management system of the present invention comprises a first circuit and a plurality of second circuits, the first circuit being disposed in a first battery module and having a first transmitter and a first receiving The first transmitter has a first differential pair, a first cross-coupling circuit, a first output end, and a second output end. The first cross-coupling circuit is electrically connected to the first differential pair. The first output end and the second output end are electrically connected to the first differential pair and the first cross-coupling circuit, the first receiver has a first receiving end, a second receiving end, a first operational amplifier, a second operational amplifier and a first comparator, the first operational amplifier and the second operational amplifier are electrically connected to the first receiving end and the second receiving end, and the first comparator is electrically connected to the first operation An amplifier and the second operational amplifier, each of the second circuits is disposed in each of the second battery modules, and has a second transmitter and a second receiver, the second receiver has a third receiving end, and a second receiving unit Fourth receiving end, one first An operational amplifier, a fourth operational amplifier and a second comparator, the third receiving end is electrically connected to the first output end, the fourth receiving end is electrically connected to the second output end, the third operational amplifier and the third operational amplifier The fourth operational amplifier is electrically connected to the third receiving end and the fourth receiving end, the second comparator is electrically connected to the third operational amplifier and the fourth operational amplifier, and the second transmitter has a second differential pair a second cross-coupling circuit, a third output end, and a fourth output end, the second cross-coupling circuit is electrically connected to the second differential pair, and the third output end is electrically connected to the second differential pair The second cross-coupling circuit and the first receiving end are electrically connected to the second differential pair, the second cross-coupling circuit and the second receiving end, and the first circuit of the present invention is The first transmitter and the first receiver and the second transmitter and the second receiver of the second circuit enable the first circuit and the second circuit to transmit and receive data to each other quickly. Avoid measuring the measurement in each battery module And the control unit due to the potential difference signal can not communicate, while the transfer rate up to 2 Mbps, and the architecture of the present invention is applicable to a voltage of the battery module in the range of 15 ~ 34V.
請參閱第1圖，為本發明之一實施例，一種電池管理系統之傳送接收器100包含一第一電路110及複數個第二電路120。該第一電路110設置於一第一電池模組(圖未示)內，並具有一第一傳送器130及一第一接收器140。各該第二電路120分別設置於各第二電池模組(圖未示)內，並具有一第二傳送器150及一第二接收器160。該第二接收器160電性連接該第一傳送器130，該第二傳送器150電性連接該第一接收器140。該第一電路110及該第二電路120可互相傳輸資料，例如電壓訊號。Referring to FIG. 1 , a transmission receiver 100 of a battery management system includes a first circuit 110 and a plurality of second circuits 120. The first circuit 110 is disposed in a first battery module (not shown) and has a first transmitter 130 and a first receiver 140. Each of the second circuits 120 is disposed in each of the second battery modules (not shown) and has a second transmitter 150 and a second receiver 160. The second receiver 160 is electrically connected to the first transmitter 130, and the second transmitter 150 is electrically connected to the first receiver 140. The first circuit 110 and the second circuit 120 can transmit data, such as voltage signals, to each other.
該電池管理系統之傳送接收器100更包括一量測單元A1與一控制單元B1，該量測單元A1及該控制單元B1設置於該第一電池模組內。該量測單元A1輸出訊號給該第一傳送器130，且該控制單元B1接收該第一接收器140所輸出之訊號。The transmission receiver 100 of the battery management system further includes a measuring unit A1 and a control unit B1. The measuring unit A1 and the control unit B1 are disposed in the first battery module. The measuring unit A1 outputs a signal to the first transmitter 130, and the control unit B1 receives the signal output by the first receiver 140.
請參閱第2圖，該第一電路110之該第一傳送器130具有一第一輸出端130a、一第二輸出端130b、一第一差動對131、一第一交叉偶合電路(cross-coupled circuit)132、一第一緩衝器133、一第二緩衝器134、一第一電晶體135及一第二電晶體136，該第一交叉偶合電路132電性連接該第一差動對131，該第一輸出端130a及該第二輸出端130b電性連接該第一差動對131及該第一交叉偶合電路132，該第一差動對131具有一第一差動電晶體131a及一第二差動電晶體131b，該第一交叉偶合電路132具有一第三電晶體132a及一第四電晶體132b，該第三電晶體132a之汲極端132c電性連接該第一差動電晶體131a之汲極端131c、該第四電晶體132b之閘極端132f及該第一輸出端130a，該第四電晶體132b之汲極端132e電性連接第二差動電晶體131b之汲極端131e、該第三電晶體132a之閘極端132d及該第二輸出端130b。當該第一差動電晶體131a之閘極端131d的電壓及該第二差動電晶體131b之閘極端131f的電壓相異時，流經該第一差動電晶體131a的電流及流經該第二差動電晶體131b的電流產生改變，因此，藉由該第一交叉偶合電路132，該第一差動電晶體131a之汲極端131c的電壓及該第二差動電晶體131b之汲極端131e的電壓會快速改變為高電位或低電位，而由該第一輸出端130a及該第二輸出端130b輸出一組無相位差之差動訊號。在本實施例中，該第一緩衝器133之輸入端133a電性連接該第一差動電晶體131a之汲極端131c及該第三電晶體132a之汲極端132c，該第一緩衝器133之輸出端133b電性連接該第一輸出端130a，該第二緩衝器134之輸入端134a電性連接該第二差動電晶體131b之汲極端131e及該第四電晶體132b之汲極端132e，該第二緩衝器134之輸出端134b電性連接該第二輸出端130b，該第一電晶體135之汲極端135a及該第一電晶體135之閘極端135b電性連接該第一差動電晶體131a之汲極端131c及該第三電晶體132a之汲極端132c，該第二電晶體136之汲極端136a及該第二電晶體136之閘極端136b電性連接該第二差動電晶體131b之汲極端131e及該第四電晶體132b之汲極端132e。該第一電晶體135、該第二電晶體136、該第一緩衝器133及該第二緩衝器134可使該第一輸出端130a的電壓及該第二輸出端130b的電壓更快速的升高或下降至高電位或低電位。
請參閱第3圖，該第一電路110之該第一接收器140具有一第一接收端140a、一第二接收端140b、一第一運算放大器141、一第二運算放大器142、一第一電阻143a、一第二電阻143b、一第三電阻143c、一第一回授電阻144、一第四電阻145a、一第五電阻145b、一第六電阻145c、一第二回授電阻146及一第一比較器147，該第一運算放大器141及該第二運算放大器142電性連接該第一接收端140a及該第二接收端140b，該第一比較器147電性連接該第一運算放大器141及該第二運算放大器142。在本實施例中，該第一電阻143a電性連接該第一接收端140a及該第一運算放大器141之負極端141a，該第二電阻143b電性連接該第二接收端140b及該第一運算放大器141之正極端141b，該第三電阻143c電性連接該第一運算放大器141之正極端141b，該第一回授電阻144電性連接該第一運算放大器141之負極端141a及該第一運算放大器141之輸出端141c，該第四電阻145a電性連接該第二接收端140b及該第二運算放大器142之負極端142a，該第五電阻145b電性連接該第一接收端140a及該第二運算放大器142之正極端142b，該第六電阻145c電性連接該第二運算放大器142之正極端142b，該第二回授電阻146電性連接該第二運算放大器142之負極端142a及該第二運算放大器142之輸出端142c，該第一比較器147之二輸入端147a分別電性連接該第一運算放大器141之輸出端141c及該第二運算放大器142之輸出端142c。由於相異之電池模組的電路之間並不共地，於相異之電池模組的電路之間傳送資料會有電位差的問題存在，因此該第一接收器140藉由該第一運算放大器141、該第一電阻143a、該第二電阻143b、該第三電阻143c、該第一回授電阻144、該第二運算放大器142、該第四電阻145a、該第五電阻145b、該第六電阻145c及該第二回授電阻146，將該第一接收端140a及該第二接收端140b所接收到的電壓訊號降壓，再由該第一比較器147輸出所需之訊號。
請參閱第4圖，各該第二電路120之該第二傳送器150具有一第三輸出端150a、一第四輸出端150b、一第二差動對151、一第二交叉偶合電路152、一第三緩衝器153、一第四緩衝器154、一第五電晶體155及一第六電晶體156，該第二交叉偶合電路152電性連接該第二差動對151，該第三輸出端150a電性連接該第二差動對151、該第二交叉偶合電路152及該第一接收端140a，該第四輸出端150b電性連接該第二差動對151、該第二交叉偶合電路152及該第二接收端140b，該第二傳送器150之該第二差動對151具有一第三差動電晶體151a及一第四差動電晶體151b，該第二交叉偶合電路152具有一第七電晶體153a及一第八電晶體153b，該第七電晶體153a之汲極端153c電性連接該第三差動電晶體151a之汲極端151c、該第八電晶體153b之閘極端153e及該第三輸出端150a，該第八電晶體153b之汲極端153e電性連接第四差動電晶體151b之汲極端151e、該第七電晶體153a之閘極端153d及該第四輸出端150b。該第三輸出端150a及該第二輸出端150b輸出一組無相位差之差動訊號至該第一接收器140之該第一接收端140a及該第二接收端140b。在本實施中，該第三緩衝器153之輸入端153a電性連接該第三差動電晶體151a之汲極端151c及該第七電晶體153a之汲極端153c，該第三緩衝器153之輸出端153b電性連接該第三輸出端150a，該第四緩衝器154之輸入端154a電性連接該第四差動電晶體151b之汲極端151e及該第八電晶體153b之汲極端153e，該第四緩衝器154之輸出端154b電性連接該第四輸出端150b，該第五電晶體155之汲極端155a及該第五電晶體155之閘極端155b電性連接該第三差動電晶體151a之汲極端151c及該第七電晶體153a之汲極端153c，該第六電晶體156之汲極端156a及該第六電晶體156之閘極端156b電性連接該第四差動電晶體151b之汲極端151e及該第八電晶體153b之汲極端153e。該第二傳送器150與該第一傳送器130具有相同功效，該第五電晶體155、該第六電晶體156、該第三緩衝器153及該第四緩衝器154可使該第三輸出端150a的電壓及該第四輸出端150b的電壓更快速的升高或下降至高電位或低電位。
請參閱第5圖，各該第二電路120之該第二接收器160具有一第三接收端160a、一第四接收端160b、一第三運算放大器161、一第四運算放大器162、一第七電阻163a、一第八電阻163b、一第九電阻163c、一第三回授電阻164、一第十電阻165a、一第十一電阻165b、一第十二電阻165c、一第四回授電阻166及一第二比較器167，該第三接收端160a電性連接該第一輸出端130a，該第四接收端160b電性連接該第二輸出端130b，該第三運算放大器161及該第四運算放大器162電性連接該第三接收端160a及該第四接收端160b，以接收該第一輸出端130a及該第二輸出端130b所輸出之差動訊號，該第二比較器167電性連接該第三運算放大器161及該第四運算放大器162，該第七電阻163a電性連接該第三接收端160a及該第三運算放大器161之負極端162a，該第八電阻163b電性連接該第四接收端160b及該第三運算放大器161之正極端161b，該第九電阻163c電性連接該第三運算放大器161之正極端161b，該第三回授電阻164電性連接該第三運算放大器161之負極端161a及該第三運算放大器161之輸出端161c，該第十電阻165a電性連接該第四接收端160b及該第四運算放大器162之負極端162a，該第十一電阻165b電性連接該第三接收端160a及該第四運算放大器162之正極端162b，該第十二電阻165c電性連接該第四運算放大器162之正極端162b，該第四回授電阻166電性連接該第四運算放大器162之負極端162a及該第四運算放大器162之輸出端162c，該第二比較器167之二輸入端167a分別電性連接該第三運算放大器161之輸出端161c及該第四運算放大器162之輸出端162c。該第二接收器160藉由該第三運算放大器161、該第七電阻163a、該第八電阻163b、該第九電阻163c、該第三回授電阻164、該第四運算放大器162、該第十電阻165a、該第十一電阻165b、該第十二電阻165c及該第四回授電阻166將該第三接收端160a及該第四接收端160b所接收到的電壓訊號降壓，再由該第二比較器167輸出所需之訊號，此外，該第一接收器140及該第二接收器160之該些電阻皆為可耐
高壓電阻。因此，當該第一接收器140及該第二接收器160發生過壓故障時，可避免第一接收器140及該第二接收器160燒毀。Referring to FIG. 2, the first transmitter 130 of the first circuit 110 has a first output end 130a, a second output end 130b, a first differential pair 131, and a first cross-coupling circuit (cross- a first circuit 133, a first buffer 133, a second buffer 134, a first transistor 135 and a second transistor 136. The first cross-coupling circuit 132 is electrically connected to the first differential pair 131. The first output terminal 130a and the second output terminal 130b are electrically connected to the first differential pair 131 and the first cross-coupling circuit 132. The first differential pair 131 has a first differential transistor 131a and a second differential transistor 131b, the first cross-coupling circuit 132 has a third transistor 132a and a fourth transistor 132b, and the first terminal 132c of the third transistor 132a is electrically connected to the first differential The anode 131c of the crystal 131a, the gate terminal 132f of the fourth transistor 132b, and the first output end 130a, the meandering end 132e of the fourth transistor 132b is electrically connected to the first end 131e of the second differential transistor 131b, The gate terminal 132d of the third transistor 132a and the second output terminal 130b. When the voltage of the gate terminal 131d of the first differential transistor 131a and the voltage of the gate terminal 131f of the second differential transistor 131b are different, the current flowing through the first differential transistor 131a flows through the current The current of the second differential transistor 131b is changed. Therefore, the voltage of the 汲 terminal 131c of the first differential transistor 131a and the 汲 terminal of the second differential transistor 131b are caused by the first cross coupling circuit 132. The voltage of 131e is rapidly changed to a high potential or a low potential, and the first output terminal 130a and the second output terminal 130b output a set of differential signals having no phase difference. In this embodiment, the input end 133a of the first buffer 133 is electrically connected to the first end 131c of the first differential transistor 131a and the first end 132c of the third transistor 132a. The first buffer 133 The output end 133b is electrically connected to the first output end 130a, and the input end 134a of the second buffer 134 is electrically connected to the top end 131e of the second differential transistor 131b and the top end 132e of the fourth transistor 132b. The output terminal 134b of the second buffer 134 is electrically connected to the second output terminal 130b. The first terminal 135a of the first transistor 135 and the gate terminal 135b of the first transistor 135 are electrically connected to the first differential power. The 汲 terminal 131c of the crystal 131a and the 汲 terminal 132c of the third transistor 132a, the 汲 terminal 136a of the second transistor 136 and the gate terminal 136b of the second transistor 136 are electrically connected to the second differential transistor 131b. The extreme end 131e and the top end 132e of the fourth transistor 132b. The first transistor 135, the second transistor 136, the first buffer 133 and the second buffer 134 can make the voltage of the first output terminal 130a and the voltage of the second output terminal 130b rise faster. High or falling to high or low.
Referring to FIG. 3, the first receiver 140 of the first circuit 110 has a first receiving end 140a, a second receiving end 140b, a first operational amplifier 141, a second operational amplifier 142, and a first a resistor 143a, a second resistor 143b, a third resistor 143c, a first feedback resistor 144, a fourth resistor 145a, a fifth resistor 145b, a sixth resistor 145c, a second feedback resistor 146 and a a first comparator 147, the first operational amplifier 141 and the second operational amplifier 142 are electrically connected to the first receiving end 140a and the second receiving end 140b, the first comparator 147 is electrically connected to the first operational amplifier 141 and the second operational amplifier 142. In this embodiment, the first resistor 143a is electrically connected to the first receiving end 140a and the negative terminal 141a of the first operational amplifier 141, and the second resistor 143b is electrically connected to the second receiving end 140b and the first The positive terminal 141b of the operational amplifier 141 is electrically connected to the positive terminal 141b of the first operational amplifier 141. The first feedback resistor 144 is electrically connected to the negative terminal 141a of the first operational amplifier 141 and the first An output terminal 141c of the operational amplifier 141, the fourth resistor 145a is electrically connected to the second receiving end 140b and the negative terminal 142a of the second operational amplifier 142. The fifth resistor 145b is electrically connected to the first receiving end 140a and The positive terminal 142b of the second operational amplifier 142 is electrically connected to the positive terminal 142b of the second operational amplifier 142. The second feedback resistor 146 is electrically connected to the negative terminal 142a of the second operational amplifier 142. The output terminal 142c of the second operational amplifier 142 is electrically connected to the output terminal 141c of the first operational amplifier 141 and the output terminal 142c of the second operational amplifier 142, respectively. Since the circuits of the different battery modules are not common to each other, there is a problem that the potential difference is transmitted between the circuits of the different battery modules, so the first receiver 140 is provided by the first operational amplifier 141. The first resistor 143a, the second resistor 143b, the third resistor 143c, the first feedback resistor 144, the second operational amplifier 142, the fourth resistor 145a, the fifth resistor 145b, and the sixth The resistor 145c and the second feedback resistor 146 step down the voltage signals received by the first receiving end 140a and the second receiving end 140b, and the first comparator 147 outputs the desired signal.
Referring to FIG. 4, the second transmitter 150 of each of the second circuits 120 has a third output end 150a, a fourth output end 150b, a second differential pair 151, and a second cross-coupling circuit 152. a third buffer 153, a fourth buffer 154, a fifth transistor 155 and a sixth transistor 156, the second cross-coupling circuit 152 is electrically connected to the second differential pair 151, the third output The terminal 150a is electrically connected to the second differential pair 151, the second cross-coupling circuit 152 and the first receiving end 140a. The fourth output end 150b is electrically connected to the second differential pair 151 and the second cross-coupling The circuit 152 and the second receiving end 140b, the second differential pair 151 of the second transmitter 150 has a third differential transistor 151a and a fourth differential transistor 151b, and the second cross-coupling circuit 152 There is a seventh transistor 153a and an eighth transistor 153b. The NMOS terminal 153c of the seventh transistor 153a is electrically connected to the 汲 terminal 151c of the third differential transistor 151a and the gate terminal of the eighth transistor 153b. 153e and the third output end 150a, the 汲 terminal 153e of the eighth transistor 153b is electrically connected to the fourth differential electric The drain terminal 151b body 151e, the seventh transistor gate electrode terminal 153d and 153a of the fourth output terminal 150b. The third output terminal 150a and the second output terminal 150b output a set of differential signals having no phase difference to the first receiving end 140a and the second receiving end 140b of the first receiver 140. In this embodiment, the input end 153a of the third buffer 153 is electrically connected to the 汲 terminal 151c of the third differential transistor 151a and the 汲 terminal 153c of the seventh transistor 153a, and the output of the third buffer 153 The terminal 153b is electrically connected to the third output end 150a. The input end 154a of the fourth buffer 154 is electrically connected to the 汲 terminal 151e of the fourth differential transistor 151b and the 汲 terminal 153e of the eighth transistor 153b. The output end 154b of the fourth buffer 154 is electrically connected to the fourth output end 150b, and the 汲 terminal 155a of the fifth transistor 155 and the gate terminal 155b of the fifth transistor 155 are electrically connected to the third differential transistor.汲 汲 汲 151 151 151 151 151 151 151 151 153 153 153 153 153 153 153 153 153 153 153 153 153 153 153 153 153 153 153 153 153 153 153 153 153 153 153 153 153 153 153 153 153 153 153 153 153 153 153 153 153 153 153 The 汲 extreme 151e and the 汲 extreme 153e of the eighth transistor 153b. The second transmitter 150 has the same function as the first transmitter 130, and the fifth transistor 155, the sixth transistor 156, the third buffer 153, and the fourth buffer 154 can make the third output The voltage of the terminal 150a and the voltage of the fourth output terminal 150b rise or fall more rapidly to a high potential or a low potential.
Referring to FIG. 5, the second receiver 160 of each of the second circuits 120 has a third receiving end 160a, a fourth receiving end 160b, a third operational amplifier 161, a fourth operational amplifier 162, and a first a seventh resistor 163a, an eighth resistor 163b, a ninth resistor 163c, a third feedback resistor 164, a tenth resistor 165a, an eleventh resistor 165b, a twelfth resistor 165c, and a fourth feedback resistor 166 and a second comparator 167, the third receiving end 160a is electrically connected to the first output end 130a, the fourth receiving end 160b is electrically connected to the second output end 130b, the third operational amplifier 161 and the first The fourth operational amplifier 162 is electrically connected to the third receiving end 160a and the fourth receiving end 160b to receive the differential signal output by the first output end 130a and the second output end 130b. The second comparator 167 is electrically The third operational amplifier 161 and the fourth operational amplifier 162 are electrically connected to the third receiving end 160a and the negative terminal 162a of the third operational amplifier 161. The eighth resistor 163b is electrically connected. The fourth receiving end 160b and the third operational amplifier 161 are positive The ninth resistor 163 is electrically connected to the positive terminal 161b of the third operational amplifier 161. The third feedback resistor 164 is electrically connected to the negative terminal 161a of the third operational amplifier 161 and the third operational amplifier 161. The output terminal 161c is electrically connected to the fourth receiving end 160b and the negative terminal 162a of the fourth operational amplifier 162. The eleventh resistor 165b is electrically connected to the third receiving end 160a and the fourth operation. The positive terminal 162b of the amplifier 162 is electrically connected to the positive terminal 162b of the fourth operational amplifier 162. The fourth feedback resistor 166 is electrically connected to the negative terminal 162a of the fourth operational amplifier 162 and the first The output terminal 162c of the fourth operational amplifier 162 is electrically connected to the output terminal 161c of the third operational amplifier 161 and the output terminal 162c of the fourth operational amplifier 162, respectively. The second receiver 160 includes the third operational amplifier 161, the seventh resistor 163a, the eighth resistor 163b, the ninth resistor 163c, the third feedback resistor 164, the fourth operational amplifier 162, and the third The tenth resistor 165a, the eleventh resistor 165b, the twelfth resistor 165c, and the fourth feedback resistor 166 step down the voltage signals received by the third receiving end 160a and the fourth receiving end 160b, and then The second comparator 167 outputs the desired signal. In addition, the resistors of the first receiver 140 and the second receiver 160 are all high voltage resistant. Therefore, when the first receiver 140 and the second receiver 160 have an overvoltage fault, the first receiver 140 and the second receiver 160 can be prevented from being burned.
請再參閱第1圖，在本實施例中，該第二電路120另具有一第三傳送器170及一第三接收器180，該第三接收器180電性連接另一第二電路120之該第二傳送器150，該第三傳送器170電性連接另一第二電路120之該第二接收器160，以使該第二電路120與另一第二電路120互相傳送資料，例如電壓訊號。Referring to FIG. 1 again, in the embodiment, the second circuit 120 further has a third transmitter 170 and a third receiver 180. The third receiver 180 is electrically connected to another second circuit 120. The second transmitter 150 is electrically connected to the second receiver 160 of the other second circuit 120, so that the second circuit 120 and the other second circuit 120 transmit data to each other, such as a voltage. Signal.
電池管理系統更包括多個量測單元A2與多個控制單元B2，該一個量測單元A2與該一個控制單元B2個別設置於該每一個第二電池模組內。各該量測單元A2輸出訊號給該第二傳送器150及第三傳送器170，且各該控制單元B2接收該第二接收器160及第三接收器180所輸出之訊號。藉由該量測單元A2與控制單元B2，該些第二電路120之任一者的資料可傳送至其他任一者。The battery management system further includes a plurality of measuring units A2 and a plurality of control units B2. The one measuring unit A2 and the one control unit B2 are separately disposed in each of the second battery modules. Each of the measuring units A2 outputs signals to the second transmitter 150 and the third transmitter 170, and each of the control units B2 receives the signals output by the second receiver 160 and the third receiver 180. With the measuring unit A2 and the control unit B2, the data of any of the second circuits 120 can be transmitted to any other one.
本發明藉由該第一電路110之該第一傳送器130及該第一接收器140與該第二電路120之該第二傳送器150及該第二接收器160，使得該第一電路110及該第二電路120可互相快速地傳送及接收資料，可避免每一電池模組中之量測單元與控制單元因訊號電位差異而無法進行溝通，而傳送速率可達2Mbps，且本發明之架構可適用於電池模組的電壓在15~34V之範圍。The first circuit 110 of the first circuit 110 and the first receiver 140 and the second transmitter 150 and the second receiver 160 of the second circuit 120 enable the first circuit 110 And the second circuit 120 can transmit and receive data quickly with each other, so that the measurement unit and the control unit in each battery module can be prevented from communicating due to the signal potential difference, and the transmission rate can reach 2 Mbps, and the present invention The architecture can be applied to battery modules with voltages ranging from 15 to 34V.
本發明之保護範圍當視後附之申請專利範圍所界定者為準，任何熟知此項技藝者，在不脫離本發明之精神和範圍內所作之任何變化與修改，均屬於本發明之保護範圍。
The scope of the present invention is defined by the scope of the appended claims, and any changes and modifications made by those skilled in the art without departing from the spirit and scope of the invention are within the scope of the present invention. .
100．．．電池管理系統之傳送接收器100. . . Battery management system transmission receiver
110．．．第一電路110. . . First circuit
120．．．第二電路120. . . Second circuit
130．．．第一傳送器130. . . First transmitter
130a．．．第一輸出端130a. . . First output
130b．．．第二輸出端130b. . . Second output
131．．．第一差動對131. . . First differential pair
131a．．．第一差動電晶體131a. . . First differential transistor
131b．．．第二差動電晶體131b. . . Second differential transistor
131c．．．汲極端131c. . . Extreme
131d．．．閘極端131d. . . Gate extreme
131e．．．汲極端131e. . . Extreme
131f．．．閘極端131f. . . Gate extreme
132．．．第一交叉偶合電路132. . . First cross coupling circuit
132a．．．第三電晶體132a. . . Third transistor
132b．．．第四電晶體132b. . . Fourth transistor
132c．．．汲極端132c. . . Extreme
132d．．．閘極端132d. . . Gate extreme
132e．．．汲極端132e. . . Extreme
132f．．．閘極端132f. . . Gate extreme
133．．．第一緩衝器133. . . First buffer
133a．．．輸入端133a. . . Input
133b．．．輸出端133b. . . Output
134．．．第二緩衝器134. . . Second buffer
134a．．．輸入端134a. . . Input
134b．．．輸出端134b. . . Output
135．．．第一電晶體135. . . First transistor
135a．．．汲極端135a. . . Extreme
135b．．．閘極端135b. . . Gate extreme
136．．．第二電晶體136. . . Second transistor
136a．．．汲極端136a. . . Extreme
136b．．．閘極端136b. . . Gate extreme
140．．．第一接收器140. . . First receiver
140a．．．第一接收端140a. . . First receiving end
140b．．．第二接收端140b. . . Second receiving end
141．．．第一運算放大器141. . . First operational amplifier
141a．．．負極端141a. . . Negative terminal
141b．．．正極端141b. . . Positive extreme
141c．．．輸出端141c. . . Output
142．．．第二運算放大器142. . . Second operational amplifier
142a．．．負極端142a. . . Negative terminal
142b．．．正極端142b. . . Positive extreme
142c．．．輸出端142c. . . Output
143a．．．第一電阻143a. . . First resistance
143b．．．第二電阻143b. . . Second resistance
143c．．．第三電阻143c. . . Third resistance
144．．．第一回授電阻144. . . First feedback resistor
145a．．．第四電阻145a. . . Fourth resistor
145b．．．第五電阻145b. . . Fifth resistor
145c．．．第六電阻145c. . . Sixth resistor
146．．．第二回授電阻146. . . Second feedback resistor
147．．．第一比較器147. . . First comparator
147a．．．輸入端147a. . . Input
150．．．第二傳送器150. . . Second transmitter
150a．．．第三輸出端150a. . . Third output
150b．．．第四輸出端150b. . . Fourth output
151．．．第二差動對151. . . Second differential pair
151a．．．第三差動電晶體151a. . . Third differential transistor
151b．．．第四差動電晶體151b. . . Fourth differential transistor
151c．．．汲極端151c. . . Extreme
151d．．．閘極端151d. . . Gate extreme
151e．．．汲極端151e. . . Extreme
151f．．．閘極端151f. . . Gate extreme
152．．．第二交叉偶合電路152. . . Second cross coupling circuit
152a．．．第七電晶體152a. . . Seventh transistor
152b．．．第八電晶體152b. . . Eighth transistor
152c．．．汲極端152c. . . Extreme
152d．．．閘極端152d. . . Gate extreme
152e．．．汲極端152e. . . Extreme
152f．．．閘極端152f. . . Gate extreme
153．．．第三緩衝器153. . . Third buffer
153a．．．輸入端153a. . . Input
153b．．．輸出端153b. . . Output
154．．．第四緩衝器154. . . Fourth buffer
154a．．．輸入端154a. . . Input
154b‧‧‧輸出端154b‧‧‧output
155‧‧‧第五電晶體155‧‧‧ fifth transistor
155a‧‧‧汲極端155a‧‧‧汲 Extreme
155b‧‧‧閘極端155b‧‧ ‧ extreme
156‧‧‧第六電晶體156‧‧‧ sixth transistor
156a‧‧‧汲極端156a‧‧汲 Extreme
156b‧‧‧閘極端156b‧‧ ‧ gate extreme
160‧‧‧第二接收器160‧‧‧second receiver
160a‧‧‧第三接收端160a‧‧‧ third receiving end
160b‧‧‧第四接收端160b‧‧‧fourth receiving end
161‧‧‧第三運算放大器161‧‧‧ Third operational amplifier
161a‧‧‧負極端161a‧‧‧Negative end
161b‧‧‧正極端161b‧‧‧ positive end
161c‧‧‧輸出端161c‧‧‧output
162‧‧‧第四運算放大器162‧‧‧4th operational amplifier
162a‧‧‧負極端162a‧‧‧Negative end
162b‧‧‧正極端162b‧‧‧ positive end
162c‧‧‧輸出端162c‧‧‧output
163a‧‧‧第七電阻163a‧‧‧ seventh resistor
163b‧‧‧第八電阻163b‧‧‧ eighth resistor
163c‧‧‧第九電阻163c‧‧‧ ninth resistor
164‧‧‧第三回授電阻164‧‧‧ Third feedback resistor
165a‧‧‧第十電阻165a‧‧‧10th resistor
165b‧‧‧第十一電阻165b‧‧‧Eleventh resistor
165c‧‧‧第十二電阻165c‧‧‧12th resistor
166‧‧‧第四回授電阻166‧‧‧ Fourth feedback resistor
167‧‧‧第二比較器167‧‧‧Second comparator
167a‧‧‧輸入端167a‧‧‧ input
170‧‧‧第三傳送器170‧‧‧ third transmitter
180‧‧‧第三接收器180‧‧‧ third receiver
A1‧‧‧量測單元A1‧‧‧Measurement unit
A2‧‧‧量測單元A2‧‧‧Measurement unit
B1‧‧‧控制單元B1‧‧‧Control unit
B2‧‧‧控制單元B2‧‧‧Control unit
第1圖：依據本發明之一實施例，一種電池管理系統之傳送接收器之方塊示意圖。
第2圖：依據本發明之一實施例，一第一傳送器之電路圖。
第3圖：依據本發明之一實施例，一第一接收器之電路圖。
第4圖：依據本發明之一實施例，一第二傳送器之電路圖。
第5圖：依據本發明之一實施例，一第二接收器之電路圖。
1 is a block diagram of a transmission receiver of a battery management system in accordance with an embodiment of the present invention.
Figure 2 is a circuit diagram of a first transmitter in accordance with an embodiment of the present invention.
Figure 3 is a circuit diagram of a first receiver in accordance with an embodiment of the present invention.
Figure 4 is a circuit diagram of a second transmitter in accordance with an embodiment of the present invention.
Figure 5 is a circuit diagram of a second receiver in accordance with an embodiment of the present invention.
100．．．電池管理系統之傳送接收器100. . . Battery management system transmission receiver
110．．．第一電路110. . . First circuit
120．．．第二電路120. . . Second circuit
130．．．第一傳送器130. . . First transmitter
140．．．第一接收器140. . . First receiver
150．．．第二傳送器150. . . Second transmitter
160．．．第二接收器160. . . Second receiver
170．．．第三傳送器170. . . Third transmitter
180．．．第三接收器180. . . Third receiver
A1．．．量測單元A1. . . Measuring unit
A2．．．量測單元A2. . . Measuring unit
B1．．．控制單元B1. . . control unit
B2．．．控制單元B2. . . control unit
Claims (10)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW101148536A TWI473379B (en) | 2012-12-19 | 2012-12-19 | Battery management system transmission receiver |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW101148536A TWI473379B (en) | 2012-12-19 | 2012-12-19 | Battery management system transmission receiver |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW201427217A TW201427217A (en) | 2014-07-01 |
| TWI473379B true TWI473379B (en) | 2015-02-11 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW101148536A TWI473379B (en) | 2012-12-19 | 2012-12-19 | Battery management system transmission receiver |
Country Status (1)
| Country | Link |
|---|---|
| TW (1) | TWI473379B (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW201042415A (en) * | 2009-04-24 | 2010-12-01 | Triquint Semiconductor Inc | Voltage regulator circuit |
| TW201214076A (en) * | 2010-09-27 | 2012-04-01 | Himax Tech Ltd | Voltage regulation circuit |
| TW201251389A (en) * | 2011-02-07 | 2012-12-16 | Access Business Group Int Llc | System and method of providing communications in a wireless power transfer system |
-
2012
- 2012-12-19 TW TW101148536A patent/TWI473379B/en not_active IP Right Cessation
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW201042415A (en) * | 2009-04-24 | 2010-12-01 | Triquint Semiconductor Inc | Voltage regulator circuit |
| TW201214076A (en) * | 2010-09-27 | 2012-04-01 | Himax Tech Ltd | Voltage regulation circuit |
| TW201251389A (en) * | 2011-02-07 | 2012-12-16 | Access Business Group Int Llc | System and method of providing communications in a wireless power transfer system |
Also Published As
| Publication number | Publication date |
|---|---|
| TW201427217A (en) | 2014-07-01 |
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