TWI462556B - Synchronization apparatus and method thereof used in orthogonal frequency division multiplexing receiver - Google Patents

Description

Synchronizing device for orthogonal carrier frequency division multiplexing receiver and method thereof

The present invention relates to a communication device, and more particularly to a synchronization device for a Orthogonal Frequency Division Multiplexing (OFDM) receiver and a method thereof.

Orthogonal frequency division multiplexing can be regarded as a special case of multi-carrier transmission. It has the ability of high-speed data transmission, and it can effectively resist the frequency selective attenuation, and gradually gains attention and adoption. For example, most of the current wireless local area network standards, such as IEEE 802.11 or HIPERLAN2, use orthogonal frequency division and multi-operation as the modulation mode of the physical signal.

However, orthogonal frequency division multiplexing symbols are susceptible to synchronization errors, resulting in a decrease in the performance of receivers in communication systems, such as synchronization time estimation errors, carrier frequency offset estimation errors, and fast Fourier transform window boundaries. Estimate errors, etc. Therefore, the orthogonal frequency division multiplexing receiver will be designed with an accurate synchronization device to accurately synchronize the received orthogonal frequency division multiplexing symbols.

In general, most network standards define multiple orthogonal multi-frequency division symbols for each frame transmitted. The data symbols can be divided into multiple data symbols for transmitting data and at least one used as a signal synchronization. A preamble symbol, or a pilot symbol. The preamble may be a known symbol of an orthogonal frequency division multiplexing receiver, and the synchronization device in the orthogonal frequency division multiplexing receiver may obtain the orthogonality of reception according to the ideal preamble and the received preamble. The start and end points of the frequency multiplex symbol and the carrier frequency shift, so as to achieve the effect of synchronous orthogonal frequency division multiplexing symbols.

At present, the synchronization device is mostly performed in the time domain, that is, the preamble in the orthogonal frequency division multiplexing symbol is processed in the time domain to obtain the start point, the end point and the carrier frequency shift of the orthogonal frequency division multiplexing symbol. . Then, after the processed orthogonal frequency division multiplexing symbol is converted into the Fourier transform result of the orthogonal frequency division multiplexing symbol by Fast Fourier Transform (FFT), the orthogonal frequency division multiplexing receiver will be The result of equalization and demodulation of the Fourier transform result of the orthogonal frequency division multiplex symbol.

However, the Fourier transform result of the pre-symbol must be converted by the fast Fourier transform to the orthogonal frequency division multiplex symbol, so there is a problem that the data exchange path is complicated. In addition, the orthogonal frequency division multiplexing symbol is different from the signal processing method of its Fourier transform result. The traditional orthogonal frequency division multiplexing receiver has two sets of different signal processing circuits to process the orthogonal frequency division multiplexing symbol and its Fourier transform results. Therefore, the hardware complexity and manufacturing cost of the conventional orthogonal frequency division multiplexing receiver are high.

The embodiment of the invention provides a synchronization device, which includes a boundary detector, a frequency synchronizer and a time synchronizer. The boundary detector receives the Fourier transform result of the at least one preamble and thereby generates an estimated boundary position to adjust the fast Fourier transform window of the fast Fourier transform. The frequency synchronizer receives the plurality of Fourier transform results of the plurality of preambles, and thereby generates a carrier frequency offset value by using a pseudo carrier frequency offset algorithm to control the digitally controlled oscillator to compensate the orthogonal frequency division multiplex symbol Carrier frequency offset. The time synchronizer obtains a plurality of Fourier transform results of a plurality of different sampling phase preamble symbols, and thereby generates an estimated sampling phase to control the sampling phase of the analog digital converter.

The embodiment of the invention provides a synchronization method, and the flow of the synchronization method is described as follows. The boundary detector is used to receive the Fourier transform result of at least the preamble, and thereby the estimated boundary position is used to adjust the fast Fourier transform window of the fast Fourier transform. Using a frequency synchronizer to receive a plurality of Fourier transform results of a plurality of consecutive preambles, and thereby generating a carrier frequency offset value by a pseudo carrier frequency offset algorithm to control the digitally controlled oscillator to compensate for the orthogonal frequency division multiplexing symbol Carrier frequency offset. A time synchronizer is used to obtain a plurality of Fourier transform results of a plurality of different sampling phase preamble symbols, and thereby generating an estimated sampling phase to control the sampling phase of the analog digital converter.

Embodiments of the present invention provide an orthogonal frequency division multiplexing receiver, which includes an antenna, an RF and an intermediate frequency front end circuit of an electrically connected antenna, and an analogy of an electrical connection RF and an intermediate frequency front end circuit. Digital converter, digitally controlled oscillator electrically connected to digital converter, fast Fourier converter electrically connected to digitally controlled oscillator, channel estimator with electrical connection fast Fourier converter, electrical connection channel estimator An equalizer with a fast Fourier converter, a demodulator of an electrical equalizer, a forward error correction code decoder and a synchronization device electrically connected to the demodulator. The input end of the synchronization device is electrically connected to the output end of the fast Fourier converter, and the plurality of output ends of the synchronization device are electrically connected to the control terminals of the analog digital converter, the digitally controlled oscillator and the fast Fourier converter, wherein the synchronization device is used The estimated boundary position, the carrier frequency offset value and the estimated sampling phase are respectively output to the fast Fourier converter, the digitally controlled oscillator and the analog digital converter.

In summary, the synchronization device and the method thereof are synchronized in the frequency domain, which is different from the synchronization device in the time domain. Accordingly, the data exchange path complexity between the orthogonal frequency division multiplex symbol and its Fourier transform result is reduced.

For a better understanding of the technical features and the contents of the present invention, reference should be made to the accompanying drawings and the accompanying drawings.

Different from the conventional synchronization device, the synchronization device and the method thereof are performed in the frequency domain, so that the orthogonal frequency division multiplexing symbol and the Fourier transform result can be reduced. Data exchange path complexity. In other words, the synchronizing means processes the Fourier transform result of the preamble output by the fast Fourier transformer to thereby synchronize the orthogonal multi-frequency symbols.

First, please refer to FIG. 1. FIG. 1 is a block diagram of an orthogonal frequency division multiplexing receiver according to an embodiment of the present invention. The orthogonal frequency division multiplexing receiver 1 includes an antenna 10, an RF and intermediate frequency front end circuit 11, an Analog-Digital Converter (ADC) 12, a Numeric Control Oscillator (NCO) 13, and a fast Fourier. Converter 14, Channel Estimator 15, Equalizer 16, de-modulator 17, de-Forward Error Coder (de-FEC) 18 and synchronization device 19.

The antenna 10 is electrically connected to the RF and IF front end circuit 11, and the RF and IF front end circuit 11 is electrically connected to the analog digital converter 12. The analog digital converter 12 is electrically coupled to the digitally controlled oscillator 13 and the digitally controlled oscillator 13 is electrically coupled to the fast Fourier transformer 14. The fast Fourier transformer 14 is electrically connected to the equalizer 16 and the channel estimator 15, and the channel estimator 15 is electrically connected to the equalizer 16. The equalizer 16 is electrically connected to the demodulator 17. The demodulator 17 is electrically coupled to the forward error correction code decoder 18. The input end of the synchronizing device 19 is electrically connected to the output end of the fast Fourier transformer 14, and the three output terminals of the synchronizing device 19 are electrically connected to the analog digital converter 12, the digitally controlled oscillator 13 and the fast Fourier transformer 14 respectively. end.

The antenna 10 is configured to receive orthogonal frequency division multiplex symbols from the wireless channel. The RF and IF front end circuit 11 is configured to down-convert the orthogonal frequency division multiplex symbols received by the antenna 10. The analog-to-digital converter 12 is used for analog-to-digital conversion of the orthogonal frequency division multiplex symbols output by the radio frequency and intermediate frequency front end circuits 11. The digitally controlled oscillator 13 is used to compensate for the carrier frequency shift of the orthogonal frequency division multiplex symbol output by the analog-to-digital converter 12. The fast Fourier transformer 14 is configured to perform fast Fourier transform on the orthogonal frequency division multiplexing symbols output by the digitally controlled oscillator 13 to obtain a Fourier transform result of the orthogonal frequency division multiplexing symbol. The channel estimator 15 is configured to obtain channel state information (CSI) according to the Fourier transform result of the orthogonal frequency division multiplex symbol. The equalizer 16 is configured to equalize the Fourier transform result of the orthogonal frequency division multiplex symbol according to the channel state information. The demodulator 17 is configured to demodulate the Fourier transform result output by the equalizer 16 to obtain bit information carried by the orthogonal frequency division multiplexing symbol. The forward error correction code decoder 18 performs error correction on the bit information output by the demodulator 17.

The synchronization device 19 receives the Fourier transform result of the preamble symbol in the orthogonal frequency division multiplex symbol, thereby obtaining synchronization information, wherein the synchronization information includes the estimated boundary position of the fast Fourier converter, the carrier frequency offset value and the estimation The sampling phase (the estimated sampling phase can be used to represent the time start of the orthogonal frequency division multiplex symbol, that is, the synchronization time can be represented using the estimated sampling phase) and the like. The estimated sampling phase, the carrier frequency offset value, and the estimated boundary position of the fast Fourier converter are sent to the analog terminals of the analog to digital converter 12, the digitally controlled oscillator 13, and the fast Fourier transformer 14, respectively. The analog-to-digital converter 12 adjusts the phase of the orthogonal frequency division multiplexing symbol according to the estimated sampling phase, and the digitally controlled oscillator 13 adjusts the orthogonal frequency division multiplexing symbol according to the carrier frequency offset value, and the fast Fourier transformer 14 estimates the The orthogonal frequency division multiplex symbol in the boundary position performs fast Fourier transform.

The synchronization device 19 includes a boundary detector 190, a frequency synchronizer 191, and a time synchronizer 192. The boundary detector 190, the frequency synchronizer 191 and the input of the time synchronizer 192 are electrically coupled to the output of the fast Fourier transformer 14. The outputs of the boundary detector 190, the frequency synchronizer 191 and the time synchronizer 192 are electrically coupled to the control terminals of the fast Fourier transformer 14, the digitally controlled oscillator 13, and the analog digital converter 12, respectively.

The time synchronizer 192 controls the analog digital converter 12 to obtain preambles of different sampling phases (preambles of different sampling phases can be used to represent preambles of different delay times). The Fourier transform results of the preambles of these different sampling phases are compared with the Fourier transform results of the ideal preamble to obtain an estimated sampling phase. More precisely, the sampling phase of the Fourier transform result of the presymbols of these different sampling phases that is most similar to the Fourier transform result of the ideal preamble is set to the estimated sampling phase. The control analog digital converter 12 can control the phase of the orthogonal frequency division multiplex symbol of its output according to the estimated sampling phase, thereby time synchronizing the orthogonal frequency division multiplexing signal.

The frequency synchronizer 191 is configured to detect a carrier frequency offset value of the orthogonal frequency division multiplex symbol. The frequency synchronizer 191 acquires the Fourier transform result of three consecutive preambles, and obtains the carrier frequency offset value according to the Fourier transform result of the three preambles through the pseudo carrier frequency offset algorithm. Thus, the digitally controlled oscillator 13 can adjust the orthogonal frequency division multiplexing symbol according to the carrier frequency offset value to compensate the carrier frequency offset of the orthogonal frequency division multiplexing symbol.

The boundary detector 190 cross-correlates the Fourier transform results of the various ideal pre-symbols with the Fourier transform results of the received pre-symbols, and finds the ideal pre-symbol corresponding to the maximum cross-correlation value to obtain a corresponding estimate. Measure the boundary position. The fast Fourier transformer 14 can adjust the position of the fast Fourier transform window based on this estimated boundary position to obtain a suitable boundary.

Next, the manner in which the time synchronizer 192 obtains the estimated sampling phase will be described in more detail. Please refer to FIG. 2. FIG. 2 is a flowchart of obtaining an estimated sampling phase in a synchronization method according to an embodiment of the present invention. First, in step S20, the time synchronizer 192 initializes the sampling phase index value i, the estimated sampling phase phase _estimated and the maximum cross-correlation value correlation _max , wherein the sampling phase index value i, the estimated sampling phase phase _estimated and the maximum cross-correlation value The initial values of correlation _max are 1, 0 and 0, respectively.

Next, in step S21, the time synchronizer 192 controls the digital analog converter 12 to adjust the sampling phase of the received preamble according to the sampling phase index value to obtain an adjustment preamble. For example, by adjusting the sampling phase phase _i of the preamble output by the analog-to-digital converter 12 (the sampling phase phase _i is the sampling phase corresponding to the sampling phase index value i), the adjustment pre-symbol preamble _{i is obtained} .

Next, in step S22, the time synchronizer 192 calculates the front over the preamble preamble _ideal results of Fourier transform FFT (preamble _ideal) and adjustment preamble preamble _i results of Fourier transform FFT (preamble _i) cross-correlation value correlation _i , wherein adjusting preamble preamble _i results of Fourier transform FFT (preamble _i) which is obtained through the fast Fourier transformation FFT converter 14 adjustment preamble _i preamble, preamble and over the front of the Fourier transform symbol preamble _ideal results The FFT (preamble _ideal ) is stored in advance in the storage device of the time synchronizer 192.

Then, in step S23, the time synchronizer 192 determines whether the cross-correlation value correlation _i is greater than the maximum cross-correlation value correlation _max1 . If the cross-correlation value correlation _{i is} greater than the maximum cross-correlation value correlation _max1 , step S24 is performed, and if the cross-correlation value correlation _{i is} not greater than the maximum cross-correlation value correlation _max1 , step S25 is performed. In step S24, the time synchronizer 192 updates the maximum cross-correlation value correlation _max1 to the cross-correlation value correlation _i and updates the estimated sampling phase phase _estimated to the sampling phase phase _i corresponding to the sampling phase index value _i .

In step S25, the time synchronizer 192 determines whether the sampling phase index value i is equal to the total number of sampling phases num _phase , wherein the total number of sampling phases num _phase is a positive integer greater than 1, for example, may be three. If the sampling phase index value i is not equal to the total number of sampling phases num _phase , step S26 is performed. If the sampling phase index value i is equal to the total number of sampling phases num _phase , the estimated sampling phase phase _estimated is output to the analog digital converter 12, and the process of obtaining the estimated sampling phase phase _estimated is ended. In step S26, the time synchronizer 192 increments the sampled phase index value i, for example by increasing the sampled phase index value i by 1, i.e., i = i + 1.

Briefly, the synchronizer 192 will identify the time in which the plurality of adjusting preamble preamble _i results of Fourier transform FFT (preamble _i) with the front over the preamble preamble _ideal results of Fourier transform FFT (preamble _ideal) most similar one. This adjustment is located preamble Preamble phase index _i corresponding to the i _i is the sampling phase estimate sampling phase Phase _phase estimated.

Example sampling phase of the _phase estimated flow estimates obtained above, use of a bubble sort is to obtain the maximum cross-correlation value corresponding to the estimated correlation _max1 sampling phase _phase estimated. However, it is noted that the above-described embodiments obtained estimated _phase estimated sampling phase of the process of the present invention is not limited thereto, for example the maximum cross-correlation correlation _max1 sampling phase corresponding to the estimated value of the _phase estimated manner This can be done using other kinds of sorting methods.

Next, the manner in which the frequency synchronizer 191 obtains the carrier frequency offset value will be described in more detail. Please refer to FIG. 3. FIG. 3 is a flowchart of obtaining a carrier frequency offset value in a synchronization method according to an embodiment of the present invention. First, in step S30, the frequency synchronizer 191 initializes the pseudo frequency offset value P-CFO, wherein the initial value of the pseudo frequency offset value CFO _pseudo is a positive number. Next, in step S31, the frequency synchronizer 191 determines three adjustment indices exp[j2πnT _s CFO _pseudo ], exp[j2π(n+N _{s )} according to the polarity of the carrier frequency offset value CFO _actual and the pseudo frequency offset value CFO _pseudo. T _s CFO _pseudo ] and exp[j2π(n+2N _s )T _s CFO _pseudo ], wherein the frequency synchronizer 191 determines whether the carrier frequency offset value CFO _actual is greater than 0 according to the Fourier transform result of two consecutive preambles. To determine the polarity of the carrier frequency offset value CFO _actual . In addition, T _s is the period of the preamble, N _s is the total number of samples of the preamble, and n is the sampling index value of the preamble.

Then, in step S32, the frequency synchronizer 191 converts the three pre-symbols preamble _i , preamble _i+1 and preamble _i+2 of the three received Fourier transform results FFT (preamble _i ), FFT (preamble _i+1) Multiply the FFT (preamble _i+2 ) by the corresponding adjustment index exp[j2πnT _s CFO _pseudo ], exp[j2π(n+N _s )T _s CFO _pseudo ] and exp[j2π(n+2N _s )T _s CFO _pseudo ] to obtain three Fourier transform adjustment results of three pre-symbols R _1,p =FFT(preamble _i )exp[j2πnT _s CFO _pseudo ], R _2,p =FFT(preamble _i+1 )exp[ J2π(n+N _s )T _s CFO _pseudo ] and R _3,p =FFT(preamble _i+2 )exp[j2π(n+2N _s )T _s CFO _pseudo ], where three pre-symbols preamble _i , preamble _{i + 1} and the preamble _{i +} three Fourier transformation result FFT (preamble _{i) 2} a, FFT (preamble _{i + 1)} and FFT (preamble _{i + 2)} is the fast Fourier converter 14 through the three preamble symbols preamble _i Preamble _i+1 and preamble _i+2 are obtained by fast Fourier transform. Next, in step S33, the frequency synchronizer 191 adjusts the results R _1,p , R _2,p and R _3,p according to the three Fourier transforms preamble _i , preamble _i+1 and preamble _i+2 . The estimated frequency offset value CFO _{estimated is} calculated, wherein the calculated estimated frequency offset value CFO _estimated is a positive value. In addition to this, the calculated estimated frequency offset value CFO _estimated =cos ^-1 (z ₁ )/(2πnT _s ), and z ₁ =[Im(R _3,p )Re(R _1,p )- Im(R _1,p )Re(R _3,p )]/2[Im(R _2,p )Re(R _1,p )-Im(R _1,p )Re(R _2,p )].

Thereafter, in step S34, the frequency synchronizer 191 obtains the carrier frequency offset value CFO _actual according to the polarity of the carrier frequency offset value CFO _actual , the estimated frequency offset value CFO _estimated and the pseudo frequency offset value CFO _pseudo , wherein the frequency synchronization The controller 191 determines whether the carrier frequency offset value is greater than 0 according to the Fourier transform result of the two consecutive preambles to determine the polarity of the carrier frequency offset value.

In more detail, if the polarity of the carrier frequency offset value CFO _actual is positive, the frequency synchronizer 191 subtracts the estimated frequency offset value CFO _{estimated from the} pseudo frequency offset value CFO _pseudo to obtain the carrier frequency offset value. CFO _actual . Conversely, if the polarity of the carrier frequency offset value CFO _actual is negative, the frequency synchronizer 191 multiplies the estimated frequency offset value CFO _estimated by -1, plus the pseudo frequency offset value CFO _pseudo to obtain the carrier. The frequency offset value is CFO _actual . Finally, after step S34, the flow of obtaining the carrier frequency offset value CFO _actual is ended, and the carrier frequency offset value CFO _{actual is} output to the digitally controlled oscillator 13.

Briefly, the frequency synchronizer 191 obtains the carrier frequency offset value CFO _actual based on the three Fourier transform results of three consecutive preambles and through the pseudo carrier frequency offset algorithm. However, it should be noted that the above embodiment of the process of obtaining the carrier frequency offset value CFO _actual is not intended to limit the present invention.

Next, the manner in which the boundary detector 190 obtains the estimated boundary position is explained in more detail. Please refer to FIG. 4. FIG. 4 is a flowchart of obtaining an estimated boundary position in a synchronization method according to an embodiment of the present invention. First, in step 400, the boundary detector 190 initializes index j boundary, the boundary position estimated _boundary estimated cross-correlation value and the maximum correlation _max2, wherein the initial value of the index j initialized boundary cross-correlation value and the maximum correlation _max2, respectively 1 and 0. The boundary _{estimate is} used to indicate the start and end points of the fast Fourier transform window, and the initial values of the start and end points can both be zero.

Next, in step S41, the boundary detector 190 calculates a Fourier transform result FFT (preamble _{ideal_j} ) of the ideal preamble preamble _{ideal_j} corresponding to the boundary index value j and a Fourier transform result FFT (preamble _received ) of the preamble _received preamble _received a cross-correlation value correlation _j , wherein the FFT (preamble _{ideal_j} ) of the ideal preamble _{ideal_j} corresponding to the boundary index value j is pre-stored in the storage device of the time synchronizer boundary detector 190, and received _preamble received preamble results in the Fourier transform FFT _(preamble received) is the fast Fourier converter 14 through a pair of front receiving _preamble received symbols for the fast Fourier transform is obtained.

Then, in step S42, the boundary detector 190 determines whether the cross-correlation value correlation _j is greater than the maximum cross-correlation value correlation _max2 . If the cross-correlation value correlation _{j is} greater than the maximum cross-correlation value correlation _max2 , step S43 is performed, and if the cross-correlation value correlation _{j is} not greater than the maximum cross-correlation value correlation _max2 , step S44 is performed. In step S43, the boundary detector 190 updates the maximum cross-correlation value correlation _max2 to the cross-correlation value correlation _j and updates the estimated boundary position boundary _estimate to the boundary position boundary _j corresponding to the boundary index value _j .

In step S44, the boundary detector 190 determines whether the boundary index value j is equal to the total number of boundary index values num _boundary , wherein the total number of boundary index values num _boundary is a positive integer greater than 1, and is related to the wireless network standard. If the boundary index value j is not equal to the total number of boundary index values num _boundary , step S45 is performed. If the boundary value index j is equal to the total number of index boundary value num _boundary, the boundary position estimate is outputted to the _boundary estimated fast Fourier converter 14, and a boundary position estimate obtained at the end of the flow _boundary estimated. In step S45, the boundary detector 190 increments the boundary index value j, for example, increments the boundary index value j by 1, that is, j = j + 1.

Briefly, the boundary detector 190 finds the result of the FFT Fourier transform over a plurality of preamble symbols _preamble ideal_j result of the FFT Fourier transform _(preamble ideal_j) preamble with a preamble reception of _{Received (Received} preamble) most similar one of them. This sector index over the _preamble ideal_j preamble is identified the value j corresponding to the _j boundary position of the boundary is a boundary position estimated _boundary estimated.

Example _boundary estimated boundary position of the above-obtained estimation process, use of a bubble sort is to obtain the maximum cross-correlation value corresponding to the correlation _max2 boundary position estimated phase _boundary estimated. However, it is noted that the embodiment of the flow _boundary estimated boundary position of the above-obtained estimated not intended to limit the present invention, for example the maximum cross-correlation value corresponding to the estimated correlation _max2 boundary position _boundary estimated manner This can be done using other kinds of sorting methods.

Further, it is worth mentioning that the more the boundary detector 190 may estimate the plurality of estimated successive boundary positions of the plurality of preamble _boundary estimated, and selecting a plurality of boundary estimate the number of identical positions _boundary estimated that estimates Maximum measuring the position of the boundary as the correct estimation of _boundary estimated boundary position _boundary estimated. For example, if the boundary detector 190 estimates three consecutive three preamble symbol _boundary estimated boundary position estimate, and wherein a boundary position estimated _boundary estimated there are two identical, the boundary detector 190 may find this two identical _boundary estimated boundary position estimate for the correct border position estimation _boundary estimated.

In summary, the synchronization device and the method thereof are synchronized in the frequency domain, which is different from the synchronization device in the time domain. Accordingly, the data exchange path complexity between the orthogonal frequency division multiplex symbol and its Fourier transform result is reduced. In addition, since the synchronizing apparatus and the method thereof according to the embodiment of the present invention synchronize in the frequency domain, two sets of different signal processing circuits are not required to process the orthogonal frequency division multiplexing symbol and its Fourier transform result. Therefore, the hardware complexity and manufacturing cost of the orthogonal frequency division multiplexing receiver using the synchronization apparatus and the method thereof according to the embodiment of the present invention can be effectively compared to the orthogonal frequency division multiplexing receiver using the conventional synchronization apparatus. reduce.

The above is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention. Therefore, the equivalent technical changes of the present invention and the contents of the drawings are included in the invention.

1. . . Orthogonal frequency division multiplexing receiver

10. . . antenna

11. . . RF and IF front-end circuits

12. . . Analog digital converter

13. . . Digitally controlled oscillator

14. . . Fast Fourier Transformer

15. . . Channel estimator

16. . . Equalizer

17. . . Demodulator

18. . . Forward error correction code decoder

19. . . Synchronizer

190. . . Boundary detector

191. . . Frequency synchronizer

192. . . Time synchronizer

S20～S26, S30～34, S40～S45. . . Step flow

1 is a block diagram of an orthogonal frequency division multiplexing receiver in accordance with an embodiment of the present invention.

2 is a flow chart showing obtaining an estimated sampling phase in a synchronization method according to an embodiment of the present invention.

FIG. 3 is a flowchart of obtaining a carrier frequency offset value in a synchronization method according to an embodiment of the present invention.

4 is a flow chart for obtaining an estimated boundary position in a synchronization method according to an embodiment of the present invention.

1. . . Orthogonal frequency division multiplexing receiver

10. . . antenna

11. . . RF and IF front-end circuits

12. . . Analog digital converter

13. . . Digitally controlled oscillator

14. . . Fast Fourier Transformer

15. . . Channel estimator

16. . . Equalizer

17. . . Demodulator

18. . . Forward error correction code decoder

19. . . Synchronizer

190. . . Boundary detector

191. . . Frequency synchronizer

192. . . Time synchronizer

Claims (21)

A synchronization device includes: a boundary detector that receives a Fourier transform result of at least one preamble, and thereby generates an estimated boundary position to adjust a fast Fourier transform window of a fast Fourier converter; a frequency synchronization And receiving a plurality of Fourier transform results of the plurality of preambles, and thereby generating a carrier frequency offset value through a pseudo carrier frequency offset algorithm to control a digitally controlled oscillator to compensate for an orthogonal frequency division a carrier frequency offset of the worker symbol; and a time synchronizer that obtains a plurality of Fourier transform results of the preamble of the plurality of different sampling phases, and thereby generates an estimated sampling phase to control an analog-to-digital converter A sampling phase. The synchronization device of claim 1, wherein the Fourier transform result of the preamble is used to represent the preamble on the frequency domain. The synchronization device of claim 1, wherein the boundary detector performs cross-correlation calculation between the Fourier transform result of the various ideal preambles and the received Fourier transform result of the preamble to obtain a plurality of a maximum cross-correlation value of the cross-correlation value, and the boundary detector obtains a boundary position corresponding to the maximum cross-correlation value as the estimated boundary position. The synchronization device of claim 3, wherein the boundary detector continuously obtains a plurality of estimated boundary positions according to the Fourier transform results of the pre-symbols, and selects the same from the estimated boundary positions. The one with the largest number of estimated boundary positions is the correct estimated boundary position. The synchronization device of claim 1, wherein the frequency synchronizer determines three adjustment indices according to the polarity of the carrier frequency offset value and a pseudo frequency offset value, and the frequency synchronizer will continuously receive the three The three Fourier transform results of the pre-symbols are respectively multiplied by the corresponding adjustment indexes to obtain three Fourier transform adjustment results, and the frequency synchronizer calculates the three Fourier transform adjustment results according to the three adjusted pre-symbols. An estimated frequency offset value, the frequency synchronizer obtains the carrier frequency offset value according to the polarity of the carrier frequency offset value, the estimated frequency offset value, and the pseudo frequency offset value, wherein the frequency synchronizer is based on The two Fourier transform results of the two preambles are consecutively determined to determine whether the carrier frequency offset value is greater than 0, to determine the polarity of the carrier frequency offset value, and the initial value of the pseudo frequency offset value and the estimate The measured frequency offset value is a positive value. The synchronization device of claim 5, wherein if the polarity of the carrier frequency offset value is positive, the frequency synchronizer subtracts the estimated frequency offset value from the estimated frequency offset value to obtain The carrier frequency offset value; conversely, if the polarity of the carrier frequency offset value is negative, the frequency synchronizer multiplies the estimated frequency offset value by -1, plus the pseudo frequency offset value, The carrier frequency offset value is obtained. The synchronization device of claim 1, wherein the time synchronizer performs cross-correlation calculation between the Fourier transform results of the preambles of the different sampling phases and the Fourier transform result of an ideal preamble And obtaining a maximum cross-correlation value of the plurality of cross-correlation values, and the side time synchronizer obtains one sampling phase corresponding to the maximum cross-correlation value as the estimated sampling phase. A synchronization method includes: receiving a Fourier transform result of at least one preamble using a boundary detector, and thereby generating an estimated boundary position to adjust a fast Fourier transform window of a fast Fourier converter; using a frequency The synchronizer receives a plurality of Fourier transform results of the plurality of preambles, and thereby generates a carrier frequency offset value through a pseudo carrier frequency offset algorithm to control a digitally controlled oscillator to compensate for an orthogonal frequency division a carrier frequency offset of the worker symbol; and obtaining a plurality of Fourier transform results of the preamble of the plurality of different sampling phases using a time synchronizer, and thereby generating an estimated sampling phase to control an analog-to-digital converter A sampling phase. The synchronization method of claim 8, wherein the Fourier transform result of the preamble is used to represent the preamble on the frequency domain. The synchronization method of claim 8, wherein the step of obtaining the estimated sampling phase by using the boundary detector further comprises: using the boundary detector to perform Fourier transform results of various ideal preambles and received The Fourier transform result of the preamble is subjected to cross-correlation calculation to obtain a maximum cross-correlation value among the plurality of cross-correlation values; and a boundary position corresponding to the maximum cross-correlation value is obtained by using the boundary detector as the Estimate the boundary position. The synchronization method of claim 10, further comprising: using the boundary detector to continuously obtain a plurality of estimated boundary positions according to the Fourier transform results of the pre-symbols, and from the estimated boundaries The estimated boundary position with the highest number of identical positions is selected as the correct estimated boundary position. The synchronization method of claim 8, wherein the frequency synchronizer determines three adjustment indices according to the polarity of the carrier frequency offset value and a pseudo frequency offset value, and the frequency synchronizer will continuously receive the The three Fourier transform results of the three preambles are respectively multiplied by the corresponding adjustment indices to obtain three Fourier transform adjustment results, and the frequency synchronizer adjusts the three Fourier transform adjustment results according to the three adjusted preamble symbols. Calculating an estimated frequency offset value, the frequency synchronizer obtaining the carrier frequency offset value according to the polarity of the carrier frequency offset value, the estimated frequency offset value, and the pseudo frequency offset value, where the frequency synchronizer Determining whether the carrier frequency offset value is greater than 0 according to the two Fourier transform results of the two preambles, determining a polarity of the carrier frequency offset value, and initial values of the pseudo frequency offset value and the The estimated frequency offset value is a positive value. The synchronization method of claim 12, wherein if the polarity of the carrier frequency offset value is positive, the frequency synchronizer subtracts the estimated frequency offset value from the estimated frequency offset value to obtain The carrier frequency offset value; conversely, if the polarity of the carrier frequency offset value is negative, the frequency synchronizer multiplies the estimated frequency offset value by -1, plus the pseudo frequency offset value, The carrier frequency offset value is obtained. The synchronization method of claim 8, wherein the time synchronizer performs cross-correlation calculation between the Fourier transform results of the preambles of the different sampling phases and the Fourier transform result of an ideal preamble And obtaining a maximum cross-correlation value of the plurality of cross-correlation values, and the side time synchronizer obtains one sampling phase corresponding to the maximum cross-correlation value as the estimated sampling phase. An orthogonal frequency division multiplexing receiver includes: an antenna; an RF and intermediate frequency front end circuit electrically connected to the antenna; an analog digital converter electrically connected to the RF and intermediate frequency front end circuit; and a digital control oscillation And electrically connected to the analog digital converter; a fast Fourier converter electrically connected to the digitally controlled oscillator; a channel estimator electrically connected to the fast Fourier transformer; an equalizer, electrically connected to the a channel estimator and the fast Fourier converter; a demodulator electrically connected to the equalizer; a forward error correction code decoder electrically connected to the demodulator; and a synchronization device whose input terminal is electrically An output of the fast Fourier converter is connected to the output terminal of the fast Fourier converter, and the plurality of outputs are respectively electrically connected to the analog digital converter, the digitally controlled oscillator and the control end of the fast Fourier converter, wherein the synchronization device is configured to respectively An estimated boundary position, a carrier frequency offset value, and an estimated sampling phase are output to the fast Fourier transformer, the digitally controlled oscillator, and the analog to digital converter. The orthogonal frequency division multiplexing receiver according to claim 15, wherein the synchronization device comprises: a boundary detector, receiving a Fourier transform result of at least one preamble, and thereby generating the estimated boundary Positioning to adjust a fast Fourier transform window of a fast Fourier converter; a frequency synchronizer receiving a plurality of Fourier transform results of a plurality of consecutive preambles, and thereby generating the carrier frequency through a pseudo carrier frequency offset algorithm An offset value to control a digitally controlled oscillator to compensate for a carrier frequency offset of an orthogonal frequency division multiplex symbol; and a time synchronizer to obtain a plurality of Fourier transform results of the preamble of the plurality of different sampling phases And thereby generating the estimated sampling phase to control a sampling phase of an analog to digital converter. The orthogonal frequency division multiplexing receiver according to claim 16, wherein the boundary detector cross-correlates the Fourier transform result of the various ideal preambles with the received Fourier transform result of the preamble symbol. Calculating to obtain a maximum cross-correlation value of the plurality of cross-correlation values, and the boundary detector obtains a boundary position corresponding to the maximum cross-correlation value as the estimated boundary position. The orthogonal frequency division multiplexing receiver according to claim 17, wherein the boundary detector continuously obtains a plurality of estimated boundary positions according to the Fourier transform results of the pre-symbols, and Estimating the boundary position selects the estimated boundary position with the largest number of identicals as the correct estimated boundary position. The orthogonal frequency division multiplexing receiver according to claim 16, wherein the frequency synchronizer determines three adjustment indexes according to the polarity of the carrier frequency offset value and a pseudo frequency offset value, the frequency synchronizer And multiplying the three Fourier transform results of the three pre-symbols received continuously by the corresponding adjustment indexes to obtain three Fourier transform adjustment results, and the frequency synchronizer adjusts the three of the pre-symbols according to the three Calculating an estimated frequency offset value according to the Fourier transform adjustment result, the frequency synchronizer obtains the carrier frequency offset value according to the polarity of the carrier frequency offset value, the estimated frequency offset value, and the pseudo frequency offset value, The frequency synchronizer determines whether the carrier frequency offset value is greater than 0 according to the two Fourier transform results of the two preambles to determine the polarity of the carrier frequency offset value, and the pseudo frequency offset value The initial value and the estimated frequency offset value are positive values. The orthogonal frequency division multiplexing receiver according to claim 19, wherein if the polarity of the carrier frequency offset value is positive, the frequency synchronizer subtracts the estimated frequency offset value from the pseudo frequency Offset value to obtain the carrier frequency offset value; conversely, if the polarity of the carrier frequency offset value is negative, the frequency synchronizer multiplies the estimated frequency offset value by -1, plus the A pseudo frequency offset value is obtained to obtain the carrier frequency offset value. The orthogonal frequency division multiplexing receiver according to claim 16, wherein the time synchronizer performs the Fourier transform results of the preambles of the different sampling phases and the Fourier transform of an ideal preamble The conversion result is subjected to cross-correlation calculation to obtain a maximum cross-correlation value among the plurality of cross-correlation values, and the edge time synchronizer obtains one sampling phase corresponding to the maximum cross-correlation value as the estimated sampling phase.