TWI442700B - Topology structure of multiple loads - Google Patents

Description

Multiple load topology

The present invention is directed to a multiple load topology architecture.

The development of electronic technology makes the working speed of integrated circuits faster and faster, and the working frequency is getting higher and higher. The load on the design is more and more, so the designer often needs to control the signal at the design end. Connected to two or more wafers for providing signals to the two or more wafers.

Referring to FIG. 1 , it is a conventional multiple load topology diagram including a signal control terminal 10 and four receiving ends 20 , 30 , 40 , 50 , wherein the signal control terminal 10 and four receiving terminals 20 , 30 , 40 . And 50 are connected by a daisy chain topology, which includes three connection points A, B and C.

In this architecture, the driving signal is sent from the signal control terminal 10 to the receiving ends along the transmission line. Since the receiving ends are unevenly distributed, the length of the transmission line from the signal control terminal 10 to the receiving ends may be different. The driving signal is delayed by a certain distance. If the length difference between the two transmission lines is greater than the product of the signal transmission speed of the driving signal and the signal rising time, the receiving end of the two transmission lines receives the signal received by the receiving end. It will be obviously out of sync; in addition, because the distance between the receiving ends is large, the reflected signal of the far receiving end will be reflected to other nearby receiving ends, so that the signal received by the receiving end is generated. Superposition, this will cause its waveform to produce a non-monotonic phenomenon during the rise, affecting the integrity of the signal and its function, resulting in timing and digital operation errors.

Please continue to refer to FIG. 2 , which is a waveform diagram for simulating the signals received by the multiple loads in FIG. 1 , wherein the signal curves 22 , 33 , 44 , and 55 correspond to the signal simulations of the receiving ends 20 , 30 , 40 , and 50 , respectively . Curve, we can see from the figure that the signal simulation curves 22, 44 and 55 corresponding to the receiving terminals 20, 40, 50 generate severe non-monotonic phenomena during the rising period, which may affect the integrity of the signal, more likely Causes timing and digital operation errors.

In view of the above, it is necessary to provide a multi-load topology structure for reducing the non-monotonicity of signals received by the receiving end to improve the stability of the system operation.

A multi-load topology includes a signal control terminal for transmitting a driving signal, the signal control terminal is connected to a first connection point through a transmission line, and the first connection point is respectively connected to a first receiving end through two transmission lines and a second connection point, the second connection point is respectively connected to a second receiving end and a third receiving end through the two transmission lines, and the length of the transmission line between the first receiving end and the second receiving end and the first connecting point The difference value is greater than the product of the signal transmission speed of the driving signal and the signal rising time. The difference between the transmission line length between the second receiving end and the third receiving end and the second connecting point is greater than the signal transmission speed and signal of the driving signal. The product of the rise time, the first receiving end is a receiving end having no data transmission function, and a resistor is connected in series between the second connecting point and the second receiving end.

In the multi-load topology, a resistor is connected in series between the second connection point and the second receiving end, and the resistor can attenuate the signal strength entering the second receiving end and reduce the signal strength of the reflected back signal. It can also increase the signal strength entering the third receiving end to avoid non-monotonic phenomenon. Since the first receiving end is a receiving end that does not have a data transmission function, the resistor is not required to reduce the non-monotonic phenomenon, and the number of resistors in the entire architecture can be reduced to ensure the stability of the system operation.

Referring to FIG. 3, a preferred embodiment of the multiple load topology architecture of the present invention includes a signal control terminal 100, four receiving terminals 200, 300, 400, 500, a resistor RS1, and a plurality of transmission lines, wherein the signal control terminal 100 and the four receiving units The terminals 200, 300, 400, and 500 are connected in a daisy-chain topology. The signal control terminal 100 is connected to a first connection point A through a transmission line. The first connection point A is connected to the receiving end 200 through two transmission lines. And a second connection point B, which is connected to the receiving end 300 and a third connecting point C through two transmission lines respectively, and the third connection point C is connected to the receiving ends 400 and 500 through two transmission lines respectively. The resistor RS1 is connected in series between the second connection point B and the receiving end 300.

In the foregoing daisy chain topology, the length of the transmission line between the receiving end 300 and the second connection point B is greater than the length of the transmission line between the receiving ends 400 and 500 and the second connection point B, and the difference value is greater than The product of the signal transmission speed of the driving signal sent by the signal control terminal 100 and the signal rising time. The length of the transmission line between the receiving ends 400 and 500 and the third connection point C is small, and the difference value is less than or equal to the product of the signal transmission speed of the driving signal sent by the signal control terminal 100 and the signal rising time. . The receiving end 200 is a debugging device, which is only used to assist in detecting the content of the transmission protocol, and has no data transmission function. The receiving ends 300, 400 and 500 are all receiving ends having a data transmission function.

In the multiple load topology, the driving signal is sent from the signal control terminal 100 to the receiving ends 200, 300, 400, and 500 along the transmission line. At this time, the resistor RS1 can attenuate the signal strength entering the receiving terminal 300, thereby reducing the receiving. The terminal 300 reflects the signal strength of the backhaul, and further increases the signal strength entering the third connection point C, so that the signal quality received by the receiving ends 400 and 500 is improved to avoid non-monotonic phenomenon, and the system is ensured. The stability of the operation, wherein the resistance value of the resistor RS1 matches the characteristic impedance of the connected transmission line for reducing the generation of the reflected signal.

Please refer to FIG. 4 , which is a waveform diagram of simulation verification of signals received by multiple loads in the multiple load topology architecture of the present invention, wherein the signal curves 222 , 333 , 444 , and 555 correspond to the receiving ends 200 , 300 , 400 , and 500 , respectively . The signal simulation curve can be seen from the figure. Except that the signal received by the receiving end 200 produces a significant non-monotonic phenomenon, the signals received by other receiving ends are not significantly non-monotonic. Since the receiving end 200 is a debugging device, which is only used to assist in detecting the content of the transmission protocol, the non-monotonic phenomenon of the received signal can be ignored, that is, not between the first connection point A and the second connection point B. Another resistor is provided to enhance the signal strength entering it, thereby reducing the amount of resistance used throughout the daisy-chain topology, saving both cost and delay time to the signals arriving at each receiver. If the receiving end 200 is a receiving end having a data transmission function, another resistor needs to be disposed between the first connection point A and the second connection point B to prevent the signal received by the device from being non-monotonic. The principle is the same as that of the resistor RS1.

The foregoing embodiment is described by taking a three-branch circuit and a three-connection point as an example. It can also be applied to other chrysanthemum topology connection architectures. If the length of the transmission line is different from the length of the other transmission line at the connection point, the value is greater than the signal. The product of the signal transmission speed of the driving signal sent by the control terminal 100 and the signal rising time is set to a resistor on the longer transmission line. If one of the two transmission lines is connected to a debugging device, no resistor is needed to reduce the resistance. The amount of use enhances the stability of the system.

In summary, the present invention complies with the requirements of the invention patent and submits a patent application according to law. The above description is only the preferred embodiment of the present invention, and equivalent modifications or variations made by those skilled in the art will be included in the following claims.

Signal control terminal. . . 100

Receiving end. . . 200, 300, 400, 500

resistance. . . RS1

Figure 1 is a schematic diagram of a conventional multiple load topology architecture.

FIG. 2 is a waveform diagram of simulation verification of the signals received by the multiple loads in FIG. 1.

3 is a schematic structural diagram of a preferred embodiment of a multiple load topology architecture of the present invention.

FIG. 4 is a waveform diagram of simulation verification of the signals received by the multiple loads in FIG.

Signal control terminal. . . 100

Receiving end. . . 200, 300, 400, 500

resistance. . . RS1

Claims (4)

A multi-load topology includes a signal control terminal for transmitting a driving signal, the signal control terminal is connected to a first connection point through a transmission line, and the first connection point is respectively connected to a first receiving end through two transmission lines and a second connection point, the second connection point is respectively connected to a second receiving end and a third receiving end through the two transmission lines, and the length of the transmission line between the first receiving end and the second receiving end and the first connecting point The difference value is greater than the product of the signal transmission speed of the driving signal and the signal rising time. The difference between the transmission line length between the second receiving end and the third receiving end and the second connecting point is greater than the signal transmission speed and signal of the driving signal. The improvement of the product of the rise time is that the first receiving end is a receiving end having no data transmission function, and a resistor is connected in series between the second connecting point and the second receiving end. The multiple load topology structure of claim 1, wherein a third connection point is disposed between the second connection point and the third receiving end, and the third connection point is transmitted through another transmission line and a fourth receiving end. The value of the transmission line length difference between the third receiving end and the fourth receiving end and the third connecting point is less than or equal to the product of the signal transmission speed of the driving signal and the signal rising time. The multiple load topology as described in claim 1, wherein the resistance of the resistor matches the characteristic impedance of the connected transmission line. The multiple load topology architecture of claim 1, wherein the first receiving end is a debugging device.