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TWI332189B - Inverter circuit - Google Patents

Inverter circuit Download PDF

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Publication number
TWI332189B
TWI332189B TW95140736A TW95140736A TWI332189B TW I332189 B TWI332189 B TW I332189B TW 95140736 A TW95140736 A TW 95140736A TW 95140736 A TW95140736 A TW 95140736A TW I332189 B TWI332189 B TW I332189B
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Taiwan
Prior art keywords
transistor
primary winding
circuit
current
resistor
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TW95140736A
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Chinese (zh)
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TW200822046A (en
Inventor
Jin-Liang Xiong
Tong Zhou
Jian-Hui Lu
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Chimei Innolux Corp
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Priority to TW95140736A priority Critical patent/TWI332189B/en
Priority to US11/982,968 priority patent/US7808803B2/en
Publication of TW200822046A publication Critical patent/TW200822046A/en
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Publication of TWI332189B publication Critical patent/TWI332189B/en

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Description

1332189 九、發明說明: 【發明所屬之技術領域】 本發明係關於一種換流電路。 【先前技術】 隨著科技不斷進步,暴頁示技術也在不%的發展以 步。而液晶顯示器以其具有輕薄短小、耗電量低、無輻身 危險、平面直角顯示以及影像穩定不閃爍等優勢,逐漸耳 代傳統陰極射線管顯示ϋ之主流地位。但要想製造出高: 質的液晶顯示器,溫升小,效率冥 σ橄 ^ J 双手问,。口質穩定的換流i (Inverter)設計成為必不可少的條件。 請參閱圖1’其係一種先前技術換流電路之電路结賴 圖。該換流電路10包括一脈寬調變控制電路u、一第°一 電日曰體12、一第二電晶體13、一變壓器14、一濾波電路 15及電源輸入端16。該脈寬調變控制電路1;L具有一第 -輸出端ill及一第二輸出端112,該第一、第二輸出端 1U :112分別與該第一、第二電晶體12、13之閘極電連 f該第-、第二電晶體12、13之没極接地。該電源輸入 端16藉由該濾波電路15接地。 該變壓益14包括一第一初級繞組141、一第二初級繞 ,.且142及一次級繞組143,該第一初級繞組ΐ4ι與該第二 初、·及繞組142間具有一抽頭145,該抽頭145與該電源輸 入鳊16電連接。該第一初級繞組141之另一端與該第一電 7 1332189 :體12之源極電連接,該第二初級繞組⑷之另一端與該 第-電晶H 13之源極電連接。該變壓器14之次級繞組⑷ 的兩端分別連接一燈管(圖未示),該燈管為液晶顯示㈣ 供所需的光源。 該換流電路!0正常卫作時,該脈寬調變控制電路n ,該第帛一電曰曰體12、13之閑極輪流發出控制訊號, 各控制訊號持續時間相等。該第_、第二電晶體Η、η 輪流開啟,且二電晶體開啟時間也相等。 當第-電晶體12開啟、第二電晶體13關閉時,該電 源輸入端16、該抽頭145、該第一初級繞組i4i、該第一 電晶體12之源極及及極構成—迴路。此時,流過該第一初 級繞組141的電流方向為上負下正,該次級繞組143的感 應電流方向也為上負下正。該感應電流用於驅動燈管工作。 當第-電晶體12關閉、第二電晶體13開啟時,該電 源輸入端16、該抽頭W5、該第二初級繞組μ2、該第二 電晶體13之源極及汲極構成一迴路。此時流過該第二初級 繞組142的電流方向為上正下負,該次級繞組143的感應 電流方向也為上正下負。該感應電流用於驅動燈管工作。 該換流電路10的電路結構完全對稱,因此要求電路中 相同元件的參數也必須完全相同。實際上,相同的元件在 規格範圍内存在著參數的離散性差異,例如電晶體的源極 與没極間阻抗一般為(30±5)ΙηΩ,當第一電晶體12的源極 與汲極間阻抗為35m Ω、第二電晶體13的源極與汲極間阻 抗為25mQ時,流經該第一初級繞組14ι的電流較小,流 8 叫1891332189 IX. Description of the invention: [Technical field to which the invention pertains] The present invention relates to a commutation circuit. [Prior Art] With the continuous advancement of technology, the violent page technology is also not being developed. The liquid crystal display has gradually become the mainstream of the conventional cathode ray tube display because of its advantages of lightness and shortness, low power consumption, no radiation risk, flat right angle display, and stable image stabilization. But to create a high: quality liquid crystal display, the temperature rise is small, the efficiency of the 冥 橄 olive ^ J hands asked. The sturdy stable commutation i (Inverter) design is an indispensable condition. Please refer to FIG. 1' for a circuit diagram of a prior art commutation circuit. The converter circuit 10 includes a pulse width modulation control circuit u, a first electric day body 12, a second transistor 13, a transformer 14, a filter circuit 15, and a power input terminal 16. The pulse width modulation control circuit 1; L has a first output terminal ill and a second output terminal 112, and the first and second output terminals 1U: 112 and the first and second transistors 12, 13 respectively The gates of the first and second transistors 12, 13 are grounded. The power input terminal 16 is grounded by the filter circuit 15. The variable pressure benefit 14 includes a first primary winding 141, a second primary winding, and 142 and a primary winding 143 having a tap 145 between the first primary winding ΐ4ι and the second primary winding 142. The tap 145 is electrically coupled to the power input port 16. The other end of the first primary winding 141 is electrically connected to the source of the first electric body 71, and the other end of the second primary winding (4) is electrically connected to the source of the first electric crystal H13. The two ends of the secondary winding (4) of the transformer 14 are respectively connected with a lamp tube (not shown), which is a liquid crystal display (4) for the required light source. The converter circuit! When the normal guard is used, the pulse width modulation control circuit n, the idle poles of the first electrical body 12, 13 alternately emit control signals, and the durations of the control signals are equal. The first and second transistors Η, η are turned on in turn, and the two transistor turn-on times are also equal. When the first transistor 12 is turned on and the second transistor 13 is turned off, the power source input terminal 16, the tap 145, the first primary winding i4i, the source and the terminal of the first transistor 12 constitute a loop. At this time, the direction of the current flowing through the first primary winding 141 is upper and lower, and the direction of the induced current of the secondary winding 143 is also negative and positive. This induced current is used to drive the lamp to work. When the first transistor 12 is turned off and the second transistor 13 is turned on, the power source input terminal 16, the tap W5, the second primary winding μ2, and the source and drain of the second transistor 13 form a loop. At this time, the current flowing through the second primary winding 142 is up and down, and the direction of the induced current of the secondary winding 143 is also positive and negative. This induced current is used to drive the lamp to work. The circuit structure of the commutation circuit 10 is completely symmetrical, so the parameters of the same components in the circuit must be identical. In fact, the same component has discrete differences in parameters within the specification range. For example, the impedance between the source and the pole of the transistor is generally (30 ± 5) Ι ηΩ, when the source and the drain of the first transistor 12 are When the inter-impedance is 35m Ω and the impedance between the source and the drain of the second transistor 13 is 25mQ, the current flowing through the first primary winding 14ι is small, and the flow 8 is called 189.

極發出的控制訊號分別用 v电"丨L孜大。現結合圖2具體說明 的是流經該抽頭145的電流波形,該 向該第一、第二電晶體12、13之閘 列用Vgl、Vg2表示。 、Vg2為尚電平(即第一電晶體12關 開啟)時,電流流經該第二初級繞組 當vgi為低電平、 閉第一電晶體13 f4 由於迴路中電容及電感的作用,流經該抽頭145的電 流緩慢增大’最後達到最大值II。 之後Vgl、Vg2均為低電平(即第一、第二電晶體I。、 ^均關閉一段時間),電流反向,由於電感的特性,該電 流緩慢增大。因為電流n較大,所以在該第一電晶體12 開啟前變壓器14中仍有電流存在。 當Vgl為高電平、Vg2為低電平(即第一電晶體12開 啟、第二電晶體13關閉)時,電流流經該第一初級繞組 141,由電源供給的電流要先抵消變壓器14中之前存在的 電流,即首先使迴路中電流變為〇。之後又由於迴路中電 容及電感的作用,流經該抽頭145的電流緩慢增大,最後 達到最大值12。 之後Vgl、Vg2均為低電平(即第一、第二電晶體12、 13均關閉一段時間),電流反向’由於電感的特性,該電 流缓慢增大。因為電流12較小,所以在該第二電晶體13 開啟前變壓器14中已沒有電流存在。 之後重復上述過程,由此可見’當流經該第—初級繞 組141電流較小,流經該第二初級繞組142電流較大時, 1332189 第一初級繞組141中的電流總是小於第二初級繞組i42中 的電流,由圖2所示的測試波形可知^與12之差約〇 6八。 該第二初級繞組142的溫度高於第一初級繞組141,當工 作時間較長時,該變壓器14有可能被燒毁。 當流經該第一初級繞組141電流較大,流經該第二初 級繞組142電流較小時,也同樣存在上述的問題。 【發明内容】 # *鑑於此,提供一種使變壓器各初級繞組電流均衡的 換流電路實為必需。 一種換流電路,其包括一脈寬調變控制電路、一第— 電晶體、一第二電晶體、一變壓器、一電源輸入端及一電 阻,,該變壓器包括-第-初級繞組及一第二初級繞組,該 二初級繞組間具有一抽頭。該脈寬調變控制電路向該第 一、第二電晶體之閘極發出控制訊號以控制該第一、第二 馨電晶體的導通或截止。該第―、第二電晶體之汲極均接地, 該第一電晶體之源極與該第一初級繞組的另一端電連接, 該第二電晶體之源極與該第二初級繞組的另一端電連接, 該抽頭藉由該電阻與該電源輸入端電連接。 與先前技術相比,本發明在該變壓器的抽頭與該電源 輸入端間串接一電阻,該電阻的阻值遠大於該第一、第二 電晶體的源極與汲極間的阻抗差,因此各迴路的總電阻值 近似相等,流經該第一、第二初級繞組的電流也幾乎相等, 即該換流電路變壓器各初級繞組電流均衡。 1332189 【實施方式】 請參閱圖3 ’其係本發明換流電路之電路結構圖。該 換流電路20包括一脈寬調變控制電路21、一第一電晶體 22、一第二電晶體23、一變壓器24、一電源輸入端26及 一電阻27。該脈寬調變控制電路21具有一第一、第二輸 出端211、212,該第一、第二輸出端211、212分別與該 第一、第二電晶體22、23之閘極電連接,該第一、第二電 籲晶體22、23之汲極接地。該電源輸入端26藉由一濾波電 路25接地。 該變壓器24包括一第一初級繞組241、一第二初級繞 組242及一次級繞組243,該第一初級繞組241與該第二 初級繞組242間具有一抽頭245,該抽頭245藉由該電阻 27與該電源輸入端26電連接。該第一初級繞組241之另 一端與該第一電晶體22之源極電連接,該第二初級繞組 I 242之另一端與該第二電晶體23之源極電連接。該變壓器 24之次級繞組243的兩端分別連接一燈管(圖未示),該燈 管為液晶顯示器提供所需的光源。 該換流電路20正常工作時,該脈寬調變控制電路21 向該第一、第二電晶體22、23之閘極發出控制訊號,各控 制訊號持續時間相等。該第一、第二電晶體22、23輪流開 啟,且二電晶體開啟時間也相等。 當第一電晶體22開啟、第二電晶體23關閉時,該電 源輸入端26、該電阻27、該抽頭245、該第一初級繞組241、 11 1332189 該第一電晶體22之源極及汲極構成一迴 墙、·,/JL ^ ^ 〜吟此時,流過該 第一初級繞組241的電流方向為上負下不 ^也 該次級繞組243 的感應電流方向也為上負下正。該感庫啻泣 发為應電流用於驅動燈管 工作。 當第-電晶體22關閉、第二電晶體23開啟時,該電 源輸入端26、該電阻27、該抽頭245、該第二初級繞组^2、 該第二電晶體23之源極及没極構成一迴路。此時流過該第 二初級繞組242的電流方向為上正下負,該次級繞組243 的感應電流方向也為上正下負。該感應電流用於驅動燈管 工作0 該電阻27⑽值在〇·1Ω〜〇.4Ω之間,考慮到功耗的 影響,本發明採用阻值為〇 2Ω的電阻。當第一電晶體U 的源極與汲極間阻抗為35mi}、第二電晶體23的源^玉與汲 極間阻抗為25πιΩ時,因為電阻27的阻值為2〇〇ιηΩ,其 遠大於該第一、第二電晶體22、23的源極與汲極間的阻ς φ差,所以各迴路的總電阻值近似相等。由於迴路中電容及 電感的作用,電流緩慢增大,最後達到最大值’各迴路中 的電流最大值也幾乎相等,如圖4所示。圖4顯示的是流 、’f該抽頭245的電流波形,該脈寬調變控制電路21向該第 一、第二電晶體22、23之閘極發出的控制訊號分別用 Vgl、Vg2表不。在第一、第二電晶體22、23均關閉的時 間内,該第一初級繞組241或第二初級繞組242中的電流 不能立即消失,由於電感的特性,電流缓慢減小。又因為 各迴路中的電流最大值幾乎相等且小於先前技術中的電流 12 1332189 最大值II,所以在該第一或第二雷s〇 矛电日日體22、23開啟前該 第一初級繞組241或第二初級繞組242中的電流已緩慢變 與先前技術相比,本發明在該變壓器24的抽頭245 與該電源輸入端26間串接一電阻27,該電阻27的阻值遠 大於該第一、第二電晶體22、23的源極與汲極間的阻抗 差’因此各迴路的總電阻值近似相等,流經該第一、第一 初級繞組241、242的電流也幾乎相等,即該換流電路如 _的變壓器24各初級繞組電流均衡。 综上所述’本發明確已符合發明之要件,爰依法提出 專利申請。惟,以上所述者僅為本發明之較佳實施方式, 本發明之範圍並不以上述實施方式為限,舉凡熟習本案技 藝之人士援依本發明之精神所作之等效修飾或變化,皆應 涵蓋於以下申請專利範圍内。 鲁【圖式簡單說明】 圖1係一種先前技術換流電路之電路結構圖。 圖2係圖1所示換流電路的電流波形圖。 圖3係本發明換流電路之電路結構圖。 圖4係圖3所示換流電路的電流波形圖。 【主要元件符號說明】 換流電路 20 電阻 27 脈寬調變控制電路 21 第一輸出端 211 13 1332189 第一電晶體 22 第二輸出端 212 第二雷晶體 23 第一初級繞組 241 變壓器 24 第二初級繞組 242 濾波電路 25 次級繞組 243 電源輸入端 26 抽頭 245 14The control signals sent by the poles are respectively v " The waveform of the current flowing through the tap 145 is specifically illustrated in conjunction with Fig. 2, and the gates of the first and second transistors 12, 13 are denoted by Vgl and Vg2. When Vg2 is still level (ie, the first transistor 12 is turned off), current flows through the second primary winding when vgi is low, and the first transistor 13f4 is closed due to capacitance and inductance in the loop. The current through the tap 145 slowly increases 'finally reaches the maximum II. After that, both Vgl and Vg2 are low level (that is, the first and second transistors I., ^ are all turned off for a period of time), and the current is reversed, and the current is slowly increased due to the characteristics of the inductor. Since the current n is large, there is still current present in the transformer 14 before the first transistor 12 is turned on. When Vgl is at a high level and Vg2 is at a low level (ie, the first transistor 12 is turned on and the second transistor 13 is turned off), a current flows through the first primary winding 141, and a current supplied from the power source first cancels the transformer 14 The current that existed before, that is, the current in the loop is first turned into 〇. The current flowing through the tap 145 then slowly increases due to the capacitance and inductance in the loop, and finally reaches a maximum of 12. After that, both Vgl and Vg2 are at a low level (i.e., the first and second transistors 12, 13 are all turned off for a period of time), and the current is reversed due to the characteristics of the inductor, which gradually increases. Since the current 12 is small, no current is present in the transformer 14 before the second transistor 13 is turned on. Thereafter, the above process is repeated, whereby it can be seen that 'when the current flowing through the first-primary winding 141 is small, and the current flowing through the second primary winding 142 is large, the current in the first primary winding 141 is always smaller than the second primary. The current in winding i42, from the test waveform shown in Figure 2, shows that the difference between ^ and 12 is about 6.8. The temperature of the second primary winding 142 is higher than that of the first primary winding 141, and the transformer 14 may be burned out when the operating time is long. The above problem also exists when the current flowing through the first primary winding 141 is large and the current flowing through the second primary winding 142 is small. SUMMARY OF THE INVENTION # * In view of this, it is necessary to provide a commutation circuit for equalizing the currents of the primary windings of the transformer. A converter circuit includes a pulse width modulation control circuit, a first transistor, a second transistor, a transformer, a power input terminal and a resistor, and the transformer includes a -first primary winding and a first A primary winding having a tap between the two primary windings. The pulse width modulation control circuit sends a control signal to the gates of the first and second transistors to control the on or off of the first and second transistors. The drains of the first and second transistors are both grounded, the source of the first transistor is electrically connected to the other end of the first primary winding, and the source of the second transistor and the second primary winding are One end is electrically connected, and the tap is electrically connected to the power input terminal by the resistor. Compared with the prior art, the present invention has a resistor connected in series between the tap of the transformer and the power input end, and the resistance of the resistor is much larger than the impedance difference between the source and the drain of the first and second transistors. Therefore, the total resistance values of the loops are approximately equal, and the currents flowing through the first and second primary windings are also nearly equal, that is, the currents of the primary windings of the converter circuit transformer are equalized. 1332189 [Embodiment] Please refer to FIG. 3' for a circuit configuration diagram of a commutation circuit of the present invention. The converter circuit 20 includes a pulse width modulation control circuit 21, a first transistor 22, a second transistor 23, a transformer 24, a power input terminal 26, and a resistor 27. The pulse width modulation control circuit 21 has a first and second output terminals 211, 212, and the first and second output terminals 211, 212 are electrically connected to the gates of the first and second transistors 22, 23, respectively. The drains of the first and second electric crystals 22, 23 are grounded. The power input 26 is grounded by a filter circuit 25. The transformer 24 includes a first primary winding 241, a second primary winding 242, and a primary winding 243. The first primary winding 241 and the second primary winding 242 have a tap 245. The tap 245 is formed by the resistor 27 It is electrically connected to the power input terminal 26. The other end of the first primary winding 241 is electrically connected to the source of the first transistor 22, and the other end of the second primary winding I 242 is electrically connected to the source of the second transistor 23. The two ends of the secondary winding 243 of the transformer 24 are respectively connected to a lamp (not shown) which provides a desired light source for the liquid crystal display. When the converter circuit 20 is in normal operation, the pulse width modulation control circuit 21 sends control signals to the gates of the first and second transistors 22 and 23, and the control signals have the same duration. The first and second transistors 22, 23 are turned on in turn, and the two transistor turn-on times are also equal. When the first transistor 22 is turned on and the second transistor 23 is turned off, the power input terminal 26, the resistor 27, the tap 245, the first primary winding 241, 11 1332189, and the source of the first transistor 22 The pole constitutes a wall, ·, /JL ^ ^ ~ 吟 At this time, the direction of the current flowing through the first primary winding 241 is upper and lower, and the direction of the induced current of the secondary winding 243 is also upper and lower. . The sense of weeping is the current used to drive the lamp. When the first transistor 22 is turned off and the second transistor 23 is turned on, the power input terminal 26, the resistor 27, the tap 245, the second primary winding ^2, the source of the second transistor 23, and The pole constitutes a loop. At this time, the direction of the current flowing through the second primary winding 242 is up and down, and the direction of the induced current of the secondary winding 243 is also up and down. The induced current is used to drive the lamp. 0 The resistance 27 (10) is between 〇·1Ω and 〇.4Ω. Considering the influence of power consumption, the present invention uses a resistor with a resistance of 〇 2Ω. When the impedance between the source and the drain of the first transistor U is 35mi}, and the impedance between the source and the drain of the second transistor 23 is 25πιΩ, since the resistance of the resistor 27 is 2〇〇ιηΩ, it is large. Since the resistance φ between the source and the drain of the first and second transistors 22 and 23 is poor, the total resistance values of the respective circuits are approximately equal. Due to the capacitance and inductance in the loop, the current slowly increases and finally reaches the maximum value. The maximum current in each loop is also almost equal, as shown in Figure 4. 4 shows the current waveform of the flow, 'f the tap 245, and the control signals sent by the pulse width modulation control circuit 21 to the gates of the first and second transistors 22 and 23 are respectively indicated by Vgl and Vg2. . In the time when both the first and second transistors 22, 23 are turned off, the current in the first primary winding 241 or the second primary winding 242 cannot be immediately disappeared, and the current is slowly reduced due to the characteristics of the inductance. Moreover, since the maximum values of the currents in the respective circuits are almost equal and smaller than the maximum value II of the current 12 1332189 in the prior art, the first primary windings are turned on before the first or second thunders are turned on. 241 or the current in the second primary winding 242 has slowly changed. Compared with the prior art, the present invention has a resistor 27 connected in series between the tap 245 of the transformer 24 and the power input terminal 26. The resistance of the resistor 27 is much larger than the The impedance difference between the source and the drain of the first and second transistors 22, 23 is such that the total resistance of each circuit is approximately equal, and the current flowing through the first and first primary windings 241, 242 is also substantially equal. That is, the commutation circuit such as the transformer 24 has a primary winding current equalization. In summary, the present invention has indeed met the requirements of the invention and has filed a patent application in accordance with the law. However, the above description is only the preferred embodiment of the present invention, and the scope of the present invention is not limited to the above-described embodiments, and those skilled in the art will be able to make equivalent modifications or changes in accordance with the spirit of the present invention. It should be covered by the following patent application. Lu [Simple Description of the Drawings] Figure 1 is a circuit diagram of a prior art commutation circuit. 2 is a current waveform diagram of the commutation circuit shown in FIG. 1. Fig. 3 is a circuit diagram showing the circuit of the commutation circuit of the present invention. 4 is a current waveform diagram of the commutation circuit shown in FIG. [Main component symbol description] Converter circuit 20 Resistor 27 Pulse width modulation control circuit 21 First output terminal 211 13 1332189 First transistor 22 Second output terminal 212 Second lightning crystal 23 First primary winding 241 Transformer 24 Second Primary winding 242 Filter circuit 25 Secondary winding 243 Power input 26 Tap 245 14

Claims (1)

1332189 十、申請專利範圍 1. 一種換流電路,其包括一脈寬調變控制電路、一第一電 晶體、一第二電晶體、一變壓器、一電源輸入端及一電 阻,該變壓器包括一第一初級繞組及一第二初級繞組, 該二初級繞組間具有一抽頭,該脈寬調變控制電路向該 第一、第二電晶體之閘極發出控制訊號以控制該第一、 第二電晶體的導通或截止,該第―、第二電晶體之沒極 均接地,該第一電晶體之源極與該第一初級繞組的另一 着端電連接,該第二電晶體之源極與該第二初級繞組的另 一端電連接’該抽頭藉由該電阻與該電源輸入端電連接。 2. 如申請專利範圍第1項所述之換流電路,其中,該電阻 之阻值在0.1Ω〜0.4Ω之間。 3. 如申請專利範圍第i項所述之換流電路,其中,該電阻 之阻值為0.2Ω。 4. 如申請專利範圍第i項所述之換流電路,其中,該電源 • 輸入端藉由一濾波電路接地。 151332189 X. Patent Application Range 1. A converter circuit comprising a pulse width modulation control circuit, a first transistor, a second transistor, a transformer, a power input terminal and a resistor, the transformer including a a first primary winding and a second primary winding, and a tap between the two primary windings, the pulse width modulation control circuit sends a control signal to the gates of the first and second transistors to control the first and second The transistor is turned on or off, the first and second transistors are grounded, and the source of the first transistor is electrically connected to the other end of the first primary winding, and the source of the second transistor The pole is electrically coupled to the other end of the second primary winding. The tap is electrically coupled to the power input via the resistor. 2. The converter circuit of claim 1, wherein the resistance of the resistor is between 0.1 Ω and 0.4 Ω. 3. The converter circuit of claim i, wherein the resistance of the resistor is 0.2 Ω. 4. The commutation circuit of claim i, wherein the power supply input is grounded by a filter circuit. 15
TW95140736A 2006-11-03 2006-11-03 Inverter circuit TWI332189B (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
TW95140736A TWI332189B (en) 2006-11-03 2006-11-03 Inverter circuit
US11/982,968 US7808803B2 (en) 2006-11-03 2007-11-05 Inverter circuit with transformer having balanceable input currents

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW95140736A TWI332189B (en) 2006-11-03 2006-11-03 Inverter circuit

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TW200822046A TW200822046A (en) 2008-05-16
TWI332189B true TWI332189B (en) 2010-10-21

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