TWI330503B - Constant current driving circuit and buck_boost led driving system using the same - Google Patents
Constant current driving circuit and buck_boost led driving system using the same Download PDFInfo
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Description
1330503 九、發明說明: 【發明所屬之技術領域】 本發明係關於一種LED驅動系統,詳言之,係有關於一種 疋電流驅動電路及利用其之升降壓型led驅動系統。 【先前技術·】 參考圖1 ’其顯示習知升壓型(boost) LED驅動系統之示意 圖。該習知之升壓型LED電流驅動系統1〇主要包括一驅動電路 11、一電感12、一第一基納二極體13及一第二基納二極體 14。該驅動電路Η用以控制該電感12之儲能與否,該電感12 輸出一驅動電流,使得該第一基納二極體13導通,該驅動電 流能驅動該等LED (發光二極體’ Light Emitting Diode)16、 17 、 18 ° 該習知之升壓型LED電流驅動系統ι〇僅能適用於輸出電壓 大於輸入電壓之升壓情形,因此限制了可驅動LED之數量。另 外’該習知之升壓型LED電流驅動系統1〇之響應時間(response time)較慢。 因此’有必要提供一種創新且具進步性之升降壓型LED驅 動系統,以解決上述問題。 【發明内容】 本發明之目的在於提供一種定電流驅動電路,其包括:一 脈寬調變產生器、一振盪器及一積分器。該脈寬調變產生器 用以產生一脈寬調變控制訊號,該脈寬調變控制訊號包括一 導通時間及一截止時間。該振盪器耦接至該脈寬調變產生 為’該振盈器用以控制該導通時間。該積分器耦接至該脈寬 105565.doc 1330503 調變產生器,用以依據該戴止時間積分處理一取樣電壓,並 輸出一積分電壓至該脈寬調變產生器,以控制一輸出電流固 疋為一设定電流。 本發明之定電流驅動電路可以消除頻率變化時之變動,且 精確地控制該輸出電流為固定之設定值。 本發明另一目的在於提供一種升降壓型LED驅動系統,用 以提供一固定之設定電流給至少一 LED。該升降壓型LED驅動 系統包括:一定電流驅動電路、一開關電路、一電感及一取 樣電阻。該定電流驅動電路包括:一脈寬調變產生器、一振 盪益及一積分器。該脈寬調變產生器用以產生一脈寬調變控 制訊號’該脈寬調變控制訊號包括一導通時間及一截止時 間。該振盈器耦接至該脈寬調變產生器,該振盪器用以控制 該導通時間。該積分器耦接至該脈寬調變產生器,用以依據 該裁止時間積分處理一取樣電壓,並輸出一積分電壓至該脈 寬調變產生器。 該開關電路耦接至一輸入電源及該定電流驅動電路,依據 該脈寬調變控制訊號控制該開關電路之導通與否。該電感耦 接至該定電流驅動電路及該開關電路,用以於該導通時間儲 存能量’於該戴止時間釋放能量’以輸出該設定電流。該取 樣電阻耦接至該定電流驅動電路及該電感,用以提供該定電 流驅動電路之該取樣電壓。 本發明之升降壓型LED驅動系統可輸出固定之輸出電流至 LED,且所驅動led之數量可由使用者任意調整,而不受輸入 電壓大小之限制,故本發明之該升降壓型LED驅動系統可應用 I05565.doc 1330503 於輸出電壓大於或小於輸入電源之升降壓情形。另外,本發 明之該升降壓型LED驅動系統可以設計一最大電流限制值,並 具有内部緩啟動之功效。且本發明之該升降壓型led驅動系統 係為電流模式控制,響應速度較快。 【實施方式】 請參閱圓2’其顯示本發明之定電流驅動電路之方塊示意 圖。本發明定電流驅動電路20包括:一脈寬調變產生器21、 一振盪器22及一積分器23。該脈寬調變(PWM)產生器21用以 產生一脈寬調變控制訊號’該脈寬調變控制訊號包括一導通 時間(T0N)及一截止時間(TOFF)。一週期時間(τ)則為該導通時 間(T〇n)加該截止時間(T〇FF)。該振盪器(〇scillator)22搞接至該 脈寬調變產生器21,該振盪器22用以控制該導通時間(τ0Ν)。 該積分器23耦接至該脈寬調變產生器21,用以依據該截止 時間(toff)積分處理一取樣電壓vSENSE,並輸出一積分電壓 至該脈寬調變產生器21,以控制一輸出電流1〇固定為一設定電 流。在圖2所示之實施例中,該輸出電流係為流經一取樣電阻 Rsense之電流’該輸出電流係經由一控制電路24依據該脈寬調 變控制訊號而產生。有關積分電壓及輸出電流之關係如下式 所示:1330503 IX. Description of the Invention: [Technical Field] The present invention relates to an LED driving system, and more particularly to a 疋 current driving circuit and a buck-boost type LED driving system using the same. [Prior Art] Referring to Fig. 1', there is shown a schematic diagram of a conventional boost LED driving system. The conventional step-up LED current driving system 1 〇 mainly includes a driving circuit 11, an inductor 12, a first kins diode 13 and a second kins diode 14. The driving circuit Η is used to control the energy storage of the inductor 12, and the inductor 12 outputs a driving current, so that the first kins diode 13 is turned on, and the driving current can drive the LEDs (light emitting diodes). Light Emitting Diode) 16, 17, 18 ° This known step-up LED current drive system can only be used for boost situations where the output voltage is greater than the input voltage, thus limiting the number of LEDs that can be driven. In addition, the response time of the conventional boost type LED current drive system is slow. Therefore, it is necessary to provide an innovative and progressive buck-boost LED drive system to solve the above problems. SUMMARY OF THE INVENTION An object of the present invention is to provide a constant current driving circuit including: a pulse width modulation generator, an oscillator, and an integrator. The pulse width modulation generator is configured to generate a pulse width modulation control signal, and the pulse width modulation control signal includes an on time and a off time. The oscillator is coupled to the pulse width modulation to generate a 'the oscillator' for controlling the on time. The integrator is coupled to the pulse width 105565.doc 1330503 modulation generator for processing a sampling voltage according to the wear time integration, and outputting an integrated voltage to the pulse width modulation generator to control an output current. The solid state is a set current. The constant current driving circuit of the present invention can eliminate variations in frequency variation and accurately control the output current to be a fixed set value. Another object of the present invention is to provide a buck-boost LED drive system for providing a fixed set current to at least one LED. The buck-boost LED driving system comprises: a constant current driving circuit, a switching circuit, an inductor and a sampling resistor. The constant current driving circuit comprises: a pulse width modulation generator, an oscillation benefit and an integrator. The pulse width modulation generator is configured to generate a pulse width modulation control signal. The pulse width modulation control signal includes an on time and a cutoff time. The vibrator is coupled to the pulse width modulation generator, and the oscillator is used to control the on time. The integrator is coupled to the pulse width modulation generator for processing a sampling voltage according to the cutting time integration, and outputting an integrated voltage to the pulse width modulation generator. The switch circuit is coupled to an input power source and the constant current drive circuit, and controls whether the switch circuit is turned on or not according to the pulse width modulation control signal. The inductor is coupled to the constant current driving circuit and the switching circuit for storing energy 'release energy at the wearing time' during the on time to output the set current. The sampling resistor is coupled to the constant current driving circuit and the inductor for providing the sampling voltage of the constant current driving circuit. The buck-boost LED driving system of the invention can output a fixed output current to the LED, and the number of the driven led can be arbitrarily adjusted by the user without being limited by the input voltage, so the buck-boost LED driving system of the invention I05565.doc 1330503 can be applied to the case where the output voltage is greater or less than the boost voltage of the input power supply. In addition, the buck-boost LED driving system of the present invention can be designed with a maximum current limit value and has an internal slow start function. Moreover, the buck-boost type LED driving system of the present invention is current mode control, and the response speed is fast. [Embodiment] Please refer to the circle 2' which shows a block diagram of the constant current drive circuit of the present invention. The constant current driving circuit 20 of the present invention comprises a pulse width modulation generator 21, an oscillator 22 and an integrator 23. The pulse width modulation (PWM) generator 21 is configured to generate a pulse width modulation control signal. The pulse width modulation control signal includes an on time (T0N) and a off time (TOFF). One cycle time (τ) is the turn-on time (T〇n) plus the cut-off time (T〇FF). The oscillator scillator 22 is coupled to the pulse width modulation generator 21 for controlling the on time (τ0 Ν). The integrator 23 is coupled to the pulse width modulation generator 21 for integrating a sampling voltage vSENSE according to the off time (toff), and outputting an integrated voltage to the pulse width modulation generator 21 to control one. The output current 1〇 is fixed to a set current. In the embodiment shown in Fig. 2, the output current is a current flowing through a sampling resistor Rsense. The output current is generated via a control circuit 24 in accordance with the pulse width modulation control signal. The relationship between the integrated voltage and the output current is as follows:
^OFF \VSENSE (1)^OFF \VSENSE (1)
由式(1)得知積分電壓vA具有時間之參數成分,輪入至該 105565.doc 1330503 脈寬調變產生器21後,該脈寬調變產生器21會調整使其接近 一參考電壓VREF。再由式(2)得知輸出電流1〇係由積分電壓 vA、取樣電阻rsense及週期丁所決定,昱積分電壓Va、取樣電 阻Rsense及週期T均為定值,因此,輸出電流1〇亦為定值。再 者,由於積分電SVA具有時間之參數成分,且週期丁為時間 函數,二者分別在式(2)之分子及分母,各可以消除頻率變化 時之變動(variation),且取樣電阻Rsense約為±1%誤差,因此 s亥輸出電流1〇係為一精破之固定電流。 請參閱圖3’其顯示本發明之定電流驅動電路之電路示意 圖。本發明定電流驅動電路30包括:一脈寬調變單元31、一 振盪斋32、一積分器33、一第一比例控制器34、一誤差放大 器35、一第二比例控制器36、一比較器37及一正反器%。該 積分器3 3依據該截止時間(T〇FF)積分處理一取樣電壓Vsense, 並輸出一積分電壓VA至該第一比例控制器34 » 該第一比例控制器34係耦接於該積分器33與該誤差放大器 35之間’用以將該積分電壓¥八乘以一第一比例κι。該第一比 例K1可以大於1或小於1,以放大或縮小該積分電壓;該第一 比例K1亦可等於1,亦即該第一比例控制器34可以省略,使該 積分器33直接連接至該誤差放大器35。 該誤差放大器35用以將該經第一比例處理之積分電壓與一 參考電壓VREF比較,以輸出一誤差電壓至該第二比例控制器 36。該第二比例控制器36耦接於該誤差放大器35與該比較器 37之間,用以將該誤差電壓乘以一第二比例K2。該第二比例 K2可以大於1或小於1,以放大或縮小該誤差電壓;該第二比 I05565.doc •9· 1330503 例K2亦可等於1,亦即該第二比例控制器36可以省略,使該誤 差放大器35直接連接至該比較器37。 該比較器37用以將該經第二比例處理之誤差電壓與該取樣 電壓Vsense比較,以輸出一重置訊號至該正反器38之一重置 (RESET)端。該正反器38耦接至該比較器37及該振盪器32,該 正反器38接收該比較器37之該重置訊號及該振盪器32之訊 號’用以依據該重置訊號及該振盪器32之訊號,以控制該脈 寬調變控制訊號之導通時間(T0N)。 該脈寬調變單元31依據該導通時間,產生一脈寬調變控制 訊號’並將該脈寬調變控制訊號之截止時間(TOFF)傳送至該積 分器33 ’使得該積分器33能依據該截止時間積分處理該取樣 電壓。配合參考圖2及圖3,在圖2中之該脈寬調變產生器21可 包括在圖3之該脈寬調變單元31、該第一比例控制器34、該誤 差放大器35、該第二比例控制器36、該比較器37及該正反器 38。 利用圖3之定電流驅動電路30可使得該積分電壓趨近於該參 考電壓VREF ’使得式(2)中之該積分電壓vA為該參考電壓之設 定值’俾可精確地控制該輸出電流為一固定之設定值。因 此,本發明之定電流驅動電路30可以控制該輸出電流為一固 定之設定值。 參考圖4,其顯示本發明定電流驅動電路之積分器之第一實 把例電路示意圖。該第一實施例之積分器40包括:一運算放 大器41、一電阻42、一充電電容43、一輪出電容44及五個切 換開關51、52、53、54、55。該運算放大器41具有一第一輸 105565.doc •10- 1330503 ' 入端(+ )、一第二輸入端㈠及一輸出端,該第一輸入端耦接至 • 該取樣電壓Vsense。該電阻42耦接至該第二輸入端。該充電電 容43耦接至該第二輸入端與該輸出端之間。該輸出電容料耦 接至該輸出端。 配合參考圖4及圖5,以說明該等切換開關之時序。該等切 換開關分別耦接至該第一輸入端、該第二輸入端及該輸出 端,用以依據該脈寬調變控制訊號,控制該等切換開關之導 • 通與否。其中,該第一切換開關(Sl)51耦接至該第一輸入端與 該取樣電壓VSENSE之間,於該導通時間(t〇n)該第一切換開關 51係為開路(0FF) ’於該截止時間(t〇ff)該第一切換開關”係 為短路(ON)。該第二切換開關(S2)52耦接至該第一輸入端與一 接地端之間,於該導通時間(τΟΝ)該第二切換開關52係為短路 (ON) ’於該截止時間(t〇ff)該第二切換開關52係為開路 (OFF) 〇 該第三切換開關(S3)53耦接至該第二輸入端與該輸出端之 •間,亦即與該充電電容43並聯連接,於每一週期之該戴止時 間(toff)前之一脈衝時間該第三切換開關53係為短路(〇N),其 他時間該第三切換開關53係為開路(OFF)。該第四切換開關 (S4)54耦接至該輸出端與該輸出電容之間,於每一週期之該截 止時間(toff)後之一脈衝時間該第四切換開關54係為短路 (ON),其他時間該第四切換開關54係為開路(〇FF卜第五切換 • 開關(S5)55耦接至該第二輸入端與該接地端之間,於每一週期 ’ 之該裁止時間(T〇ff)後之一脈衝時間該第五切換開關55係為短 路(ON) ’其他時間該第五切換開關55係為開路(〇FF)。 105565.doc -II . 1330503 因此,在截止時間(Toff)該第一切換開關51短路,使該運算 放大益4丨、該電阻42及該充電電容43對該取樣電壓Vsense積 分,積分電壓儲存於該充電電容43。積分後,使第四切換開 關54及第五切換開關55短路一脈衝時間,將該充電電容之 積分電壓傳送至該輸出電容44。並且,在下一週期前,使第 二切換開關53短路一脈衝時間,以釋放該充電電容43之積分 電壓。故利用圖4之電路可以積分處理該取樣電壓。 參考圖6,其顯示本發明定電流驅動電路之積分器之第二實 施例電路示意圖。該第二實施例之積分器6〇包括:一運算放 大器61、一電阻62、一充電電容63、一輪出電容以及七個切 換開關、73 ' 74、75、76、77。該第二實施例之積分 态60電路與上述圖4之第一實施例積分器4〇電路不同之處在 於,該第二實施例之積分器6〇電路另包括一第六切換開關 (S6)76及一第七切換開關(S7)77,用以消除偏移電壓 voltage) ° 該第六切換開關76耦接至該充電電容63與該輸出端之間, 於每一週期之該截止時間(t〇ff)前之一脈衝時間該第六切換開 關76係為開路,其他時間該第六切換開關76係為短路。該第 七切換開關77耦接至該第六切換開關76與該接地端之間,於 每一週期之該截止時間(T0FF)前之一脈衝時間該第七切換開關 77係為短路,其他時間該第七切換開關77係為開路。 方忒運算放大器61有偏移電壓v〇s時,同樣地會對充電電容 63積分。因此於每週期對該充電電如充一反相之偏移電 壓,以消除積分時之誤差,如下式所示·· I05565.doc -12- 1330503It is known from the formula (1) that the integral voltage vA has a parameter component of time, and after the wheel pulse is turned into the 105565.doc 1330503 pulse width modulation generator 21, the pulse width modulation generator 21 is adjusted to be close to a reference voltage VREF. . Then, the output current 1〇 is determined by the equation (2), which is determined by the integral voltage vA, the sampling resistor rsense, and the period 昱. The integral voltage Va, the sampling resistor Rsense, and the period T are constant values. Therefore, the output current is also 1〇. Is a fixed value. Furthermore, since the integral electric SVA has a parameter component of time, and the period is a function of time, the two are respectively in the numerator and the denominator of the formula (2), each of which can eliminate the variation when the frequency changes, and the sampling resistance Rsense is about It is ±1% error, so the shai output current 1〇 is a fine fixed current. Referring to Figure 3', there is shown a schematic circuit diagram of a constant current drive circuit of the present invention. The constant current driving circuit 30 of the present invention comprises: a pulse width modulation unit 31, an oscillation module 32, an integrator 33, a first proportional controller 34, an error amplifier 35, a second proportional controller 36, and a comparison. 37 and a flip-flop %. The integrator 3 3 integrates a sampling voltage Vsense according to the cutoff time (T〇FF), and outputs an integrated voltage VA to the first proportional controller 34 » the first proportional controller 34 is coupled to the integrator 33 is used between the error amplifier 35 to multiply the integrated voltage ¥8 by a first ratio κι. The first ratio K1 may be greater than 1 or less than 1 to amplify or reduce the integrated voltage; the first ratio K1 may also be equal to 1, that is, the first proportional controller 34 may be omitted, so that the integrator 33 is directly connected to The error amplifier 35. The error amplifier 35 is configured to compare the first proportional integrated voltage with a reference voltage VREF to output an error voltage to the second proportional controller 36. The second proportional controller 36 is coupled between the error amplifier 35 and the comparator 37 for multiplying the error voltage by a second ratio K2. The second ratio K2 may be greater than 1 or less than 1 to amplify or reduce the error voltage; the second ratio I05565.doc • 9· 1330503, the example K2 may also be equal to 1, that is, the second proportional controller 36 may be omitted. The error amplifier 35 is directly connected to the comparator 37. The comparator 37 is configured to compare the second proportional processing error voltage with the sampling voltage Vsense to output a reset signal to a reset terminal of the flip-flop 38. The flip-flop 38 is coupled to the comparator 37 and the oscillator 32. The flip-flop 38 receives the reset signal of the comparator 37 and the signal of the oscillator 32 for using the reset signal and the The signal of the oscillator 32 controls the on-time (T0N) of the pulse width modulation control signal. The pulse width modulation unit 31 generates a pulse width modulation control signal 'and transmits the off time (TOFF) of the pulse width modulation control signal to the integrator 33 ' according to the on time, so that the integrator 33 can The cutoff time integrates the sampled voltage. Referring to FIG. 2 and FIG. 3, the pulse width modulation generator 21 in FIG. 2 may be included in the pulse width modulation unit 31 of FIG. 3, the first proportional controller 34, the error amplifier 35, and the first The second proportional controller 36, the comparator 37 and the flip-flop 38. The constant current driving circuit 30 of FIG. 3 can make the integrated voltage approach the reference voltage VREF ' such that the integrated voltage vA in the equation (2) is the set value of the reference voltage 俾, and the output current can be accurately controlled. A fixed set value. Therefore, the constant current driving circuit 30 of the present invention can control the output current to be a fixed set value. Referring to Figure 4, there is shown a circuit diagram of a first practical example of an integrator of a constant current drive circuit of the present invention. The integrator 40 of the first embodiment includes an operational amplifier 41, a resistor 42, a charging capacitor 43, a wheel discharging capacitor 44, and five switching switches 51, 52, 53, 54, 55. The operational amplifier 41 has a first input 105565.doc • 10-1330503 'input (+), a second input (one) and an output, the first input being coupled to the sampling voltage Vsense. The resistor 42 is coupled to the second input end. The charging capacitor 43 is coupled between the second input terminal and the output terminal. The output capacitor is coupled to the output. 4 and 5 are used to explain the timing of the switches. The switching switches are respectively coupled to the first input terminal, the second input terminal and the output terminal for controlling the switching of the switching switches according to the pulse width modulation control signal. The first switch (S1) 51 is coupled between the first input terminal and the sampling voltage VSENSE, and the first switch 51 is open (OFF) during the on time (t〇n). The cut-off time (t〇ff) is the short-circuit (ON) of the first switch. The second switch (S2) 52 is coupled between the first input terminal and a ground terminal at the on-time ( τΟΝ) The second switch 52 is short-circuited (ON). The second switch 52 is open (OFF) at the off time (t〇ff), and the third switch (S3) 53 is coupled to the The second input terminal and the output terminal are connected in parallel with the charging capacitor 43. The third switching switch 53 is short-circuited at a pulse time before the wearing time (toff) of each cycle. N), at other times, the third switch 53 is open (OFF). The fourth switch (S4) 54 is coupled between the output and the output capacitor, and the off time of each cycle (toff The fourth switch 54 is short-circuited (ON) at one pulse time, and the fourth switch 54 is open at other times (〇F The fifth switching switch (S5) 55 is coupled between the second input end and the ground end, and the fifth switching is performed at one pulse time after the cutting time (T〇ff) of each period The switch 55 is short-circuited (ON). The fifth switch 55 is open (〇FF) at other times. 105565.doc -II . 1330503 Therefore, the first changeover switch 51 is short-circuited at the off time (Toff), so that The operation voltage is amplified, the resistor 42 and the charging capacitor 43 integrate the sampling voltage Vsense, and the integrated voltage is stored in the charging capacitor 43. After the integration, the fourth switching switch 54 and the fifth switching switch 55 are short-circuited for one pulse time. The integrated voltage of the charging capacitor is transmitted to the output capacitor 44. And, before the next cycle, the second switching switch 53 is short-circuited for one pulse time to release the integrated voltage of the charging capacitor 43. Therefore, the circuit of FIG. 4 can be used for integration. The sampling voltage is processed. Referring to Fig. 6, there is shown a circuit diagram of a second embodiment of the integrator of the constant current driving circuit of the present invention. The integrator 6〇 of the second embodiment comprises: an operational amplifier 61, a resistor 62, and a An electric capacitor 63, a turn-out capacitor, and seven switch switches, 73' 74, 75, 76, 77. The integrated state 60 circuit of the second embodiment is different from the integrator 4 〇 circuit of the first embodiment of FIG. 4 described above. The integrator 6〇 circuit of the second embodiment further includes a sixth switch (S6) 76 and a seventh switch (S7) 77 for canceling the offset voltage voltage). The sixth switch 76 The sixth switching switch 76 is connected to the charging capacitor 63 and the output terminal, and the sixth switching switch 76 is open at a pulse time before the cutoff time (t〇ff) of each cycle, and the sixth switching switch 76 is used at other times. Is a short circuit. The seventh switch 77 is coupled between the sixth switch 76 and the ground, and the seventh switch 77 is short-circuited at a pulse time before the cut-off time (T0FF) of each cycle. The seventh changeover switch 77 is an open circuit. When the square operational amplifier 61 has the offset voltage v 〇 s, the charging capacitor 63 is similarly integrated. Therefore, the charging voltage is charged with an inverted voltage at each cycle to eliminate the error in integration, as shown in the following equation: I05565.doc -12- 1330503
T〇FF \(VsENSE ^05) X ^ R χ 7;--V〇s :c _ ^OS^OFF ~VOS ' T〇FF SENSE X ^ 4 〇 —RC RC J〇FF "~RCT〇FF \(VsENSE ^05) X ^ R χ 7;--V〇s :c _ ^OS^OFF ~VOS ' T〇FF SENSE X ^ 4 〇 —RC RC J〇FF "~RC
-Wos^-Wos^
由式(3)得知,當(T0FF/RC) = 1時,即可有效地消除偏移電 壓所造成之誤差。因此,該第二實施例之積分器60電路可有 效地消除偏移電壓造成之誤差,使積分結果更為準確。It is known from equation (3) that when (T0FF/RC) = 1, the error caused by the offset voltage can be effectively eliminated. Therefore, the circuit of the integrator 60 of the second embodiment can effectively eliminate the error caused by the offset voltage, making the integration result more accurate.
參考圖8,其顯示本發明升降壓型LED驅動系統之第一實施 例示意圖。該第一實施例之升降壓型LED驅動系統80包括:一 定電流驅動電路20、一開關電路81、一電感82、一取樣電阻 83、一緩衝電容84及一個二極體85。該升降壓型LED驅動系統 80用以提供一固定之設定電流給至少一LED88、89等。該定電 流驅動電路20可參考圖2之定電流驅動電路20。該定電流驅動 電路20係輸出一脈寬調變控制訊號至該開關電路81,並由該 取樣電阻(Rsense)83取得該取樣電麼Vsense。 該開關電路81耦接至一輸入電源VIN及該定電流驅動電路 20,依據該定電流驅動電路20之該脈寬調變控制訊號控制該 開關電路81之導通與否。在本實施例中,該開關電路81可為 一電晶體,較佳為一 PMOS電晶體。該電感82耦接至該定電流 驅動電路20及該開關電路81,用以於該導通時間儲存能量, 於該截止時間釋放能量,以輪出一設定電流。該取樣電阻 (Rsense)83耦接至該定電流驅動電路20及該電感82,用以提供 105565.doc -13- 1330503 該定電流驅動電路20之該取樣電壓Vsense β 該升降壓型LED驅動系統80另包括一缓衝電容84及一個二 極體85。該緩衝電容84耦接至該LED88、89,亦即,該緩衝電 容84與該等LED並聯。該二極體85耦接至該緩衝電容82及該電 感84之間。該二極體85可為一基納二極體。該升降壓型LED驅 動系統80另包括一比較電容86及一輸入電容87。該比較電容 86耦接至該定電流驅動電路20及一接地端之間。該輸入電容 87耦接至該輸入電源Vin及該接地端之間。 如上所述,該定電流驅動電路20可輸出一固定之輸出電 流,因此該升降壓型LED驅動系統80可輸出固定之輸出電流1〇 至該等LED88、89。並且該取樣電阻83可應用一精密電阻’以 準確地控制該輸出電流。另外,該等LED之數量可由使用者任 意調整,而不受輸入電壓大小之限制,故本發明之該升降壓 型LED驅動系統80可應用於輸出電壓大於或小於輸入電源之升 降壓情形。 由於該定電流驅動電路20之輸出電流係與週期有關,並以 週期性電流限制(cycle by cycle current limit),故使用者可以 設計一最大電流限制值(maximum current limit value)。再者’ 配合參考圖3及圖8,因該定電流驅動電路30之該誤差放大器 35之輸出C0MP連接該比較電容86,可使得該脈寬調變控制訊 號慢慢增加,以具有内部緩啟動(internal soft start)之功效。由 於本發明之該升降壓型LED驅動系統80係為電流模式控制 (current mode control),故響應速度較快。 參考圖9,其顯示本發明升降壓型LED驅動系統之第二實施 105565.doc -14- 1330503 例示意圖。該第二實施例之升降壓型LED驅動系統90包括:一 定電流驅動電路20、一開關電路91、一電感92、一取樣電阻 93、一比較電容94及一輸入電容95。與上述該第一實施例之 升降壓型LED驅動系統80不同之處在於,該第二實施例之升降 壓型LED驅動系統90省略該緩衝電容84及該二極體85。在省略 該緩衝電容84及該二極體85之情形下,除上述該第一實施例 之升降壓型LED驅動系統80之功效外,該第二實施例之升降壓 型LED驅動系統90可進一步地減少所需之元件以降低成本。 惟上述實施例僅為說明本發明之原理及其功效,而非限制 本發明。因此,習於此技術之人士在不違背本發明之精神對 上述實施例進行修改及變化,應在本發明之申請專利範圍 内。本發明之權利範圍應如後述之申請專利範圍所列。 【圖式簡單說明】 圖1為習知升壓型LED驅動系統之示意圖; 圖2為本發明定電流驅動電路之方塊示意圖; 圖3顯不本發明定電流驅動電路之電路不意圖; 圖4為本發明定電流驅動電路之積分器之第一實施例電路示 意圖; 圖5為本發明定電流驅動電路之積分之第一實施例電路之 切換開關時序示意圖; 圖6為本發明定電流驅動電路之積分器之第二實施例電路示 意圖, 圖7為本發明定電流驅動電路之積分器之第二實施例電路之 切換開關時序示意圖; 105565.doc 15 1330503 圊8為本發明升降壓型LED驅動系統之第一實施例電路之示 意圖;及 圖9為本發明升降壓型LED驅動系統之第二實施例電路之示 意圖。 【主要元件符號說明】 10 習知升壓型LED電流驅動系統 11 驅動電路 12 電感 13 第一基納二極體 14 第二基納二極體 20 本發明之定電流驅動電路 21 脈寬調變產生器 22 振盪器 23 積分器 24 控制電路 30 定電流驅動電路 31 脈寬調變單元 32 振盪器 33 積分器 34 第一比例控制器 35 誤差放大器 36 第二比例控制器 37 tb較器 38 正反器 105565.doc • 16- 1330503Referring to Figure 8, there is shown a schematic view of a first embodiment of a buck-boost LED drive system of the present invention. The step-up and step type LED driving system 80 of the first embodiment comprises: a certain current driving circuit 20, a switching circuit 81, an inductor 82, a sampling resistor 83, a buffer capacitor 84 and a diode 85. The buck-boost LED drive system 80 is configured to provide a fixed set current to at least one of the LEDs 88, 89, and the like. The constant current driving circuit 20 can refer to the constant current driving circuit 20 of FIG. The constant current driving circuit 20 outputs a pulse width modulation control signal to the switching circuit 81, and the sampling resistor (Rsense) 83 obtains the sampling power Vsense. The switch circuit 81 is coupled to an input power supply VIN and the constant current drive circuit 20, and controls whether the switch circuit 81 is turned on or not according to the pulse width modulation control signal of the constant current drive circuit 20. In this embodiment, the switch circuit 81 can be a transistor, preferably a PMOS transistor. The inductor 82 is coupled to the constant current driving circuit 20 and the switching circuit 81 for storing energy during the on time, and discharging energy at the off time to rotate a set current. The sampling resistor (Rsense) 83 is coupled to the constant current driving circuit 20 and the inductor 82 for providing 105565.doc -13 - 1330503. The sampling voltage Vsense β of the constant current driving circuit 20 is the lifting voltage type LED driving system. The 80 further includes a buffer capacitor 84 and a diode 85. The snubber capacitor 84 is coupled to the LEDs 88, 89, that is, the snubber capacitor 84 is connected in parallel with the LEDs. The diode 85 is coupled between the snubber capacitor 82 and the inductor 84. The diode 85 can be a Zener diode. The buck-boost LED drive system 80 further includes a comparison capacitor 86 and an input capacitor 87. The comparison capacitor 86 is coupled between the constant current driving circuit 20 and a ground terminal. The input capacitor 87 is coupled between the input power source Vin and the ground. As described above, the constant current drive circuit 20 can output a fixed output current, so that the buck-boost LED drive system 80 can output a fixed output current 1 至 to the LEDs 88, 89. And the sampling resistor 83 can apply a precision resistor ' to accurately control the output current. In addition, the number of the LEDs can be arbitrarily adjusted by the user without being limited by the magnitude of the input voltage. Therefore, the buck-boost LED driving system 80 of the present invention can be applied to an output voltage having a voltage greater or lower than that of the input power source. Since the output current of the constant current driving circuit 20 is cycle-dependent and is cycle by cycle current limit, the user can design a maximum current limit value. Furthermore, with reference to FIG. 3 and FIG. 8, since the output of the error amplifier 35 of the constant current driving circuit 30 is connected to the comparison capacitor 86, the pulse width modulation control signal can be slowly increased to have an internal slow start. (internal soft start) effect. Since the buck-boost type LED driving system 80 of the present invention is current mode control, the response speed is fast. Referring to Figure 9, there is shown a schematic diagram of a second embodiment 105565.doc - 14-1330503 of the buck-boost LED drive system of the present invention. The buck-boost LED driving system 90 of the second embodiment comprises: a certain current driving circuit 20, a switching circuit 91, an inductor 92, a sampling resistor 93, a comparison capacitor 94 and an input capacitor 95. The difference between the step-up and step type LED driving system 80 of the first embodiment described above is that the snubber capacitor 84 and the diode 85 are omitted from the step-up and step type LED driving system 90 of the second embodiment. In the case where the snubber capacitor 84 and the diode 85 are omitted, the buck-boost LED driving system 90 of the second embodiment can further be used in addition to the above-described effects of the step-up and step type LED driving system 80 of the first embodiment. Reduce the required components to reduce costs. However, the above embodiments are merely illustrative of the principles and effects of the invention and are not intended to limit the invention. Therefore, those skilled in the art can modify and change the above embodiments without departing from the spirit of the invention, and should be within the scope of the invention. The scope of the invention should be as set forth in the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic diagram of a conventional step-up type LED driving system; FIG. 2 is a block diagram of a constant current driving circuit of the present invention; FIG. 3 is a schematic diagram showing a circuit of a constant current driving circuit of the present invention; BRIEF DESCRIPTION OF THE DRAWINGS FIG. 5 is a schematic diagram of a switching switch of a circuit of a first embodiment of a constant current driving circuit according to the present invention; FIG. 6 is a schematic diagram of a switching circuit of a constant current driving circuit of the present invention; FIG. 7 is a schematic diagram of a circuit of a switch of a second embodiment of an integrator of a constant current drive circuit according to the present invention; 105565.doc 15 1330503 圊8 is a buck-boost type LED drive system of the present invention A schematic diagram of a circuit of a first embodiment; and FIG. 9 is a schematic diagram of a circuit of a second embodiment of a buck-boost LED driving system of the present invention. [Major component symbol description] 10 conventional boost type LED current drive system 11 drive circuit 12 inductor 13 first kins diode 14 second kinner diode 20 constant current drive circuit 21 of the present invention pulse width modulation generator 22 Oscillator 23 Integrator 24 Control circuit 30 Constant current drive circuit 31 Pulse width modulation unit 32 Oscillator 33 Integrator 34 First proportional controller 35 Error amplifier 36 Second proportional controller 37 tb comparator 38 Positive and negative device 105565 .doc • 16- 1330503
40 積分器之第一實施例 41 運算放大器 42 電阻 43 充電電容 44 輸出電容 51 第一切換開關 52 第二切換開關 53 第三切換開關 54 第四切換開關 55 第五切換開關 60 積分器之第二實施例 61 運算放大器 62 電阻 63 充電電容 64 輸出電容 71 第一切換開關 72 第二切換開關 73 第三切換開關 74 第四切換開關 75 第五切換開關 76 第六切換開關 77 第七切換開關 80 升降壓型LED驅動系統之第 81 開關電路 實施例 105565.doc 133050340 Integral First Embodiment 41 Operational Amplifier 42 Resistor 43 Charging Capacitor 44 Output Capacitor 51 First Switching Switch 52 Second Switching Switch 53 Third Switching Switch 54 Fourth Switching Switch 55 Fifth Switching Switch 60 Second of Integrator Embodiment 61 Operational amplifier 62 Resistor 63 Charging capacitor 64 Output capacitor 71 First changeover switch 72 Second changeover switch 73 Third changeover switch 74 Fourth changeover switch 75 Fifth changeover switch 76 Sixth changeover switch 77 Seventh changeover switch 80 81st switch circuit embodiment of a profiled LED drive system 105565.doc 1330503
82 電感 83 取樣電阻 84 緩衝電容 85 二極體 86 比較電容 87 輸入電容 88、89 LED 90 升降壓型LED驅動系統之第二實施例 91 開關電路 92 電感 93 取樣電阻 94 比較電容 95 輸入電容 96、97 LED82 Inductor 83 Sampling Resistor 84 Buffer Capacitor 85 Diode Body 86 Comparing Capacitor 87 Input Capacitor 88, 89 LED 90 Bucket-Up LED Driver System Second Embodiment 91 Switching Circuit 92 Inductance 93 Sampling Resistor 94 Comparing Capacitor 95 Input Capacitor 96, 97 LED
105565.doc 18-105565.doc 18-
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| TW095140903A TWI330503B (en) | 2006-11-03 | 2006-11-03 | Constant current driving circuit and buck_boost led driving system using the same |
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| CN103167665B (en) | 2011-12-08 | 2014-10-08 | 昂宝电子(上海)有限公司 | System for regulating light-emitting diode current |
| TWI492661B (en) * | 2013-01-21 | 2015-07-11 | Princeton Technology Corp | Led driver apparatus |
| CN103974487B (en) * | 2013-01-24 | 2016-05-25 | 普诚科技股份有限公司 | LED driver |
| CN104467422B (en) * | 2014-12-22 | 2017-04-26 | 英飞特电子(杭州)股份有限公司 | Constant-current Buck converter and constant-current control circuit thereof |
| US10804865B1 (en) * | 2019-12-30 | 2020-10-13 | Novatek Microelectronics Corp. | Current integrator and related signal processing system |
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