TWI329349B - Substrates including a capping layer on electrically conductive regions - Google Patents

Description

IX. INSTRUCTIONS: I: Invented households in the field of technology 1 Related Applications This application is filed on May 18, 2005, in the benefit of US Patent Application Nos. 11/132, 817 and 11/132,841. FIELD OF THE INVENTION The present invention relates to substrate processing, and more particularly to forming a cover layer over a conductive region of an electronic device. BACKGROUND OF THE INVENTION In the manufacture of various products, a conductive material (usually a metal such as aluminum or copper) and a dielectric material (often a material based on cerium oxide) are formed on, in, or become a substrate. In part, the region of conductive material is separated from other regions of the conductive material by regions of dielectric material to define electrical interconnects between electrical components (eg, transistors, capacitors, resistors) and electrical components. A substrate including a conductive region separated by a dielectric region (something formed or formed thereon) is sometimes referred to herein as an electronic device, for use in a computer, and other such as a flat panel display H. The electronic components of the device (microprocessor, memory chip, etc.) are well known examples of such products. During operation of an electronic device, an electrical system that passes through an electrical interconnect can be electrically and/or interconnected, particularly at or between interfaces with adjacent materials (eg, formed Electro-induced spring shifts of voids, hillocks, or extrusions (such as the '35 atomic flow through a conductive material—the atomic motion of a conductive material) (4) can result in poor current leakage or current flow suppression. As the ultra-dimensions of electrical interconnects of electronic devices become smaller (manufacturers of many different electronic devices now need to manufacture cost-effective electrical interconnects with a feature dimension at the sub-100 nm size scale The need for future electronic devices will be decreasing. The increased current density flowing through the electrical interconnects makes electromigration more of a problem. Fig. 1A is a cross-sectional view of a portion of a semiconductor device 1A including a conductive region 110 separated by a dielectric region 120. The semiconductor device is an electronic device in which the substrate is integrally or functionally meaningfully composed of one or more semiconductor materials. Conductive region 110 and dielectric region 120 are formed over another conductive region 105 (e.g., one or more common axes that are formed after and that are perpendicular to the layer of material formed in the device). Conductive region 110 can be, for example, an interconnect between conductive region 105 and other conductive materials that are subsequently formed as part of a semiconductor device. In current semiconductor devices, copper is often used to form conductive regions and a material based on silica dioxide (for example, FSG, SiCOH, porosity) is often used.

SiC!〇H, MSQ, etc.) to form a dielectric region. In addition, current semiconductor device dielectric regions often include a top portion formed on a dielectric region (such as a region II surface on which a device can be formed after the region is formed) A hard mask layer formed of a material during the subsequent processing (which is often formed of a material such as SiCx, siN SiC Μ Μ 石 为). The semiconductor device 1A of Fig. 1A and IB shown below has a hard mask layer 120a formed on the top of each dielectric region 12''. 1B is a cross-sectional view of a portion of a semiconductor device 1A including a dielectric barrier layer 130 formed on the conductive region 11A and the dielectric region 12A. The 1A and 1B wipes ' also show a dielectric barrier layer ship previously formed on the conductive region 105 of the semiconductor device ι. The dielectric barrier layer is formed in a semiconductor (or other electronic) device on the conductive region and the dielectric region for separating the conductive regions after the conductive region and the dielectric region are planarized. a layer of dielectric material to inhibit diffusion of material from the conductive region into an adjacent region of the semiconductor device (specifically, into a dielectric material formed subsequently over the conductive region, the dielectric barrier layer may also be referred to as a via (4) m Stop layer, dielectric cover or cover layer. The term "dielectric barrier layer" is used here, as discussed in more detail elsewhere, using a cover layer to refer to a different type of layer, which provides a dielectric The function associated with the barrier layer, such as inhibiting the diffusion of material from the conductive region. In current semiconductor devices, a composition comprising germanium along with carbon and/or nitrogen (such as SiCx, SiNx, SiCxNy) is often used to form a dielectric barrier layer. Because these materials have a higher dielectric constant than the dielectric materials originally used (for example, if it is not required or desired to inhibit diffusion from the conductive regions), the electrical barrier is too poor. The effect is that the electrical equipment associated with the structure shown in Figure 1B is increased, which increases power consumption and/or reduces semiconductor device = operating speed. Moreover, the conventional implementation of dielectric barrier layers is not very compatible with semiconductors. The conventional practice of conducting regions in the dielectric. Therefore, these conventional dielectric barrier layers seldom inhibit the electromigration induced in the interface between the conductive region and the dielectric barrier layer in the conductive region. There is a need for improved suppression of the encapsulation in the conductive regions of semiconductors and other electronic devices (and in particular, the interfaces between the conductive regions and other adjacent regions that form formation). There is also a need for semiconductors and other electronic devices. The conductive Sa is also suitable for: the structure of the lead: the structure formed by the pound has a reduced capacitance, and the diffusion of the material maintains the characteristic dimension of the interconnect in the adjacent region formed by other materials. As electronic devices (4) hide (such as electrical power is increasingly strong), some of the demand has been and may continue to become a way to suppress the electromigration between the two, the layer 5 dielectric barrier layer and the conductive region of the pendulum material has been Optionally formed in the conductive region prior to forming the dielectric barrier layer, the material is selectively formed in a region: a surface representing that the material is formed on the region or surface and for the A domain or table Utb See better adhesion in other areas or on the surface. The selectively formed layer can be referred to as a cover layer or a self-aligned barrier layer. A cover layer is selectively formed on the conductive area. The sin is shown in Figures 2A to 2C. The second A1I is a cross-sectional view of a portion of the semiconductor device 2 (8) including a conductive region 21 分离 separated by a dielectric region 22 〇. FIG. 2B is a portion of a semiconductor device 200 The cross-sectional view includes a cover layer 240 selectively formed on the conductive region 21〇 instead of the dielectric region 22〇. FIG. 2C is a cross-sectional view of a portion of the semiconductor device 2〇〇 including a formation The cap layer 240 and the dielectric barrier layer 230 on the dielectric region 220. A number of ways have been attempted to selectively form the cap layer 240 using a variety of different materials and procedures. For example, by selectively depositing a suitable material A conductive layer is formed over the conductive region. Since the metallic material has the property required to catalyze the growth of a layer of copper commonly used to form a conductive region, a metallic material is often used. For example, electrodeless deposition has been used for selective deposition. a metal alloy (such as drill, tungsten and one of the alloys; one of the alloys on the drill and the side; or one of the alloys of nickel, molybdenum and niobium) on the copper area. One type of pathway is described on the stone (T·Ishigami) Et al., "Using a Low-Contamination C〇wp Cover Layer for High-Reliability Cu Interconnects", Proceedings of the 2004 IEEE International Interconnect Technology Conference, June 7-9, 2004, pp. 75-77, The disclosure is incorporated herein by reference. Tungsten has been selectively deposited on steel regions using chemical vapor deposition. One type of pathway is described in "T Sait〇" et al. The strong, deep submicron copper interconnect structure of the metal-covered approach, the minutes of the 1EEE International Interconnect Technology Conference 2004, June 7-9, 2004 'pp. 36-38' However, the selectivity of these approaches is insufficient to inhibit the formation of a capping material (which is electrically conductive) on the dielectric region (in Figures 2B and 2C, a thin layer of capping material is shown in dielectric region 220). Up) the extent to which unacceptable current leakage can be prevented between the conductive regions separated by the dielectric regions (especially as the characteristic dimension of the electrical interconnection of the electronic device becomes smaller). This may be at least partially Due to the residual material of the conductive region remaining on the dielectric region after planarization (chemical mechanical polishing) of the exposed surface from the conductive region, and the dielectric region for the cover layer material (based on its formation for the conductive region) The affinity for the material is chosen to provide a long crystal site. This can significantly reduce the preferential formation of the overcoat material over the conductive regions as compared to the dielectric regions. A cover layer has also been formed by modifying a top portion of each of the conductive regions. For example, deuteration and nitridation (which can be accomplished by wet or dry processing) have been utilized to form a cap layer by chemically modifying the top portion of the copper region. A 1329349 This type of approach is described in LG Gosset et al., "Integration and Efficiency of Alternative Approaches to Self-Aligned Barriers Using Copper Telluride for 45 Nano Technology Node Cu Interconnects," IEEE International 2004 Proceedings of the Interconnect Technology Conference, June 7-9, 2004, pp. 15-17, the disclosure of which is hereby incorporated by reference. However, the cover layer formed in this manner disadvantageously increases the electrical resistance in the conductive region. It has also been proposed to form a layer of organic material on the conductive region of a semiconductor device to inhibit electromigration at the surface of the conductive region (this organic layer may also be referred to as a cap layer). Even though the procedures and materials used to form the organic material are particularly selective in that the organic layer is preferentially formed on the conductive region, the use of an organic material that is a poor electrical conductor can eliminate the occurrence of a coating between the conductive regions. Has the potential for unacceptable current leakage. U.S. Patent Application Publication No. US 2004/0203193 describes a route in which a self-assembled organic monolayer (specifically, a mercaptan self-aligned monolayer) is covalently bonded, 15 to a metallic region. However, it is believed that the thiol described in the φ (10) quasi-monolayer from the φ (10) quasi-monolayer may not be produced in a semiconductor device when formed on steel (as described above, a material commonly used to form a semiconductor, a conductive region of a device) A thermal stability coating that is still continuous and free of madness under conditions. 2. The cover layer formed by this method may not properly suppress electromigration or supply - the ability to remove the dielectric barrier layer steel barrier barrier from the semiconductor device. The embodiment includes a mask layer formed on a dielectric region of an electronic device, whereby the mask layer suppresses the cover layer during a subsequent formation of the cover layer on the conductive region of the electronic device separated by the dielectric region. > is formed on or in the dielectric region. Prior to the formation of the mask layer, the exposed surface of the conductive region and the exposed surface of the dielectric region can be processed in a specified manner (e.g., cleaned, functionalized). A mask layer can be selectively formed over the dielectric region so that no or only a negligible mask layer is formed over the conductive region. Alternatively, the mask layer may be non-selectively formed on both the dielectric region and the conductive region, and the mask layer material formed on the conductive region is subsequently removed. The cover layer can be selectively formed on the conductive region so that no or only negligible cover material is formed on the mask layer. Alternatively, the cover layer may be non-selectively formed on both the conductive region and the mask layer, and the cover layer formed on the mask layer is subsequently removed (the cover layer material may be removed only by the mask layer) This side is achieved by removing some or all of the mask layer and subsequently removing the cover material formed thereon. If the portion of the cover material that has not been removed from the dielectric region is removed, the mask layer may be moved from the dielectric region after the formation of the cover layer, and the case will be formed over the dielectric region. On the mask layer (since the mask layer is on the 'electrical area', in addition to suppressing the formation of the cover layer material on the dielectric region, this effect is additionally). Therefore, unlike one of the conductive materials (such as _cobalt alloy, nickel alloy or crane), it selectively hides on the conductive area, and frosty Λ a - 〇 (1) Μ 成 盖 = = = = = = The material is formed to form an unacceptable current _ between the conductive Q domains. Since the four embodiments inhibit the formation of the cap layer material over the dielectric region... 丄 1 1329349 Φ 10 15 20 干燥, these embodiments are capable of resilience in selecting materials and/or procedures for forming the cap layer, without Regarding the selectivity of the conductive region to the cover material of the dielectric region (and in some embodiments, it is irrelevant to the selectivity of the cover material for any material). For example, materials and/or procedures for forming the cap layer may be selected to enhance adhesion of the cap layer to the conductive regions (thus improving the suppression of electromigration in the conductive regions by the cap layer). The material and/or the process for forming the cap layer may also be selected to produce a cap layer that does not unacceptably or poorly add resistance in the conductive region. For example, a cap layer may be formed; Any material or process that adds or replaces the electrically conductive capping material. The material that can be used to form the capping layer and/or the diffusion can be sufficiently effective to suppress the reduction of the material used to form the conductive region. It is capable of eliminating a dielectric barrier layer from an electronic device or to an embodiment, θ (and with reduced capacitance and related benefits). In part, it has been suppressed that a conventional dielectric barrier layer can be formed. And, because the cover is sounded, the cover layer material is formed on the dielectric ^ 曰 using 曰Μ # . In the case of °, these examples are advantageous. In addition, unlike the above-mentioned approach in which a capping layer is formed by forming a porous dielectric material in a package, a typical self-aligned monolayer of a 1 ^ alcohol is used for a typical operation of many electronic devices; A thermally stable cover layer is produced on the copper. The mask layer of the embodiment which maintains continuous and no fatigue under the condition can be formed, for example, as a single layer (SAM) or a "four-molecular self" "layer, material formation" mask layer can also be And a layer formed of any class of materials known to form a thickness of 12 of the controlled film thickness, such as a multilayer polyelectrolyte. The mask layer can also be, for example, a layer formed on the surface of the dielectric region by catalytic growth of an inorganic or organic material such as a polymer brush. The mask layer can also be, for example, a layer formed from a dendritic polymer 'hyperbranched polymer, or a block copolymer. The mask layer can also be a self-assembled multi-layer or single layer, such as an ionic or electro-chemical reinforcement. In particular, a decane-based material can be used in the embodiment of the invention to form the mask layer. The cover layer may be formed of a conductive material (for example, agglomerated alloy, recorded alloy, crane, tantalum, nitride button, etc.), a semiconductor material, or an electrically insulating material. The cover layer can be formed by any suitable procedure including conventional deposition procedures such as electrodeless deposition, chemical vapor deposition, physical vapor deposition (storing) or atomic layer deposition. These embodiments can be practiced in a substrate made of any type of material or used to process the substrate. In particular, the embodiments may be advantageously implemented in a semiconductor substrate, such as a germanium substrate, an upper insulator substrate, a tantalum carbide substrate, a strained germanium substrate, a germanium substrate, or the like. And / or gallium arsenide substrates. Such embodiments may be practiced in a substrate comprising a conductive region formed using any type of conductive material such as copper and/or aluminum or for processing the substrate. The embodiments may be practiced in a substrate comprising a dielectric region made of any type of electrically insulating material, including a non-porous dielectric material, or to process the substrate 'and which may or may not include a hard cover Curtain layer. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1A is a cross-sectional view of a portion of a semiconductor device showing a conductive region separated by a dielectric region of 1329349; FIG. 1B is a cross-sectional view of a portion of a semiconductor device of FIG. 1A, showing formation a dielectric barrier layer on the conductive region and the dielectric region; FIG. 2A is a cross-sectional view of a portion of the semiconductor device showing a conductive region separated by a dielectric region; FIG. 2B is a second FIG. A cross-sectional view of a portion of a semiconductor device showing a capping layer selectively formed on the exposed surface of the conductive region rather than the exposed surface of the dielectric region; FIG. 2C is a semiconductor device of FIGS. 2A and 2B a cross-sectional view of a portion of the cross-sectional view showing a dielectric barrier layer formed on the exposed surface of the cap layer and the dielectric region; FIG. 3 is a view for separating a cap layer from a dielectric region Flowchart on the conductive area of the electronic device; Figures 4A through 4E are cross-sectional 15 views of a series of a portion of an electronic device, shown in an embodiment for a cover The layer is fabricated at a stage on the conductive region of the electronic device separated by a dielectric region; Figures 5A through 5D are cross-sectional views of a series of a portion of an electronic device, shown in an embodiment to cover a portion The layer is fabricated at a stage on the conductive region of the electronic device separated by a dielectric region; 20 Figures 6A through 6D are cross-sectional views of a series of a portion of an electronic device, shown in an embodiment for The cover layer is fabricated at a stage on the conductive region of the electronic device separated by a dielectric region; Figures 7A through 7C are cross-sectional views of a series of a portion of an electronic device, shown in an embodiment for The cover layer is fabricated at a stage on the conductive region of the electronic device separated by a 14-electrode region; FIGS. 8A to 8E are views showing a view of a portion of a portion of an electronic device; a stage for manufacturing a cover layer on a conductive region of an electronic device separated by a dielectric region in a solid yoke;

a stage on the conductive area of the electronic device separated by the electrical region;

10 is a stage on the conductive area of the electronic device separated by the dielectric region; FIGS. 11A to 11E are cross-sectional views of a series of parts of an electronic device, which are shown in the embodiment for manufacturing a cover layer The stage on the conductive area of the electronic device separated by a dielectric region; FIGS. 12A to 12E are a series of a portion of an electronic device, which is shown in a consistent embodiment for manufacturing a cover layer in a conventional embodiment. The stage on the conductive area of the electronic device separated by a dielectric region; Figures 13A to 13D are a series of one of a part of an electronic device. The J view is shown in a consistent embodiment for fabricating a cover layer on a conductive region of an electronic device separated by an electrical region; Figure 14 is a consistent embodiment including a dielectric Seven of the structure of the area. The top view 'forms a mask layer on the dielectric region, and the 14B to 14D views show the cross-section of the structure of FIG. 14A after further processing to modify the mask layer in a manner that is intended to produce the desired features of the mask layer. The cross-sectional view shows different ways in which the mask layer can be modified in a consistent embodiment; 15 Figure 15A shows a structure including a dielectric region in one embodiment.

k is a cross-sectional view showing a mask layer formed on the read dielectric region, and FIGS. 15B to 15E are cross-sectional views of the structure of the 15A® after further processing to remove the mask layer, in which the cover layer can be used in the embodiment. Different ways of removing. [Implemented Cold Mode] Detailed Description of the Preferred Embodiments (4) 'In-including a substrate having a conductive region separated by a dielectric region (i.e., formed or partially formed thereon or formed therein) (as described above) 'For the sake of the 'this substrate is sometimes referred to as an electronic device here', the mask layer is formed on the dielectric domain to prevent the formation of the cover layer during the formation of the cover layer on the substrate. On or in the dielectric region (in fact, an electronic device will typically include a plurality of such conductive regions and dielectric regions. The conductive regions may be between electrical components of the electronic device (eg, transistor, capacitor, resistor H) New interconnects, and the carrier embodiments are commonly used to create a cover layer on such electrical interconnects. The mask layer can be selectively formed on the dielectric region (4) without or with a negligible cover The curtain material is formed on the conductive domain. Alternatively, the mask layer can be formed non-selectively on the dielectric domain and on the conductive region, and the mask layer material formed on the conductive region is subsequently removed. Cover layer (sometimes referred to as self-aligned barrier layer) The top surface of the H-conducting region is formed after the planarization of the electron-emitting device and is performed to suppress electro-migration in the conductive region, and is different from the dielectric barrier layer originally formed on the conductive region (such as 1329349 Further) inhibiting electromigration in a conductive region. Further, in some cases, as discussed in more detail below, a cover layer inhibits diffusion of material from the conductive region, and in particular, this diffusion can be suppressed to eliminate An original shape, 'the extent of the dielectric barrier layer formed on the cover layer or reduced in thickness. 5 The cover layer can be selectively formed on the conductive area so that no or only negligible cover layer material is formed on the mask layer In particular, materials and/or procedures for forming the mask layer can be customized to inhibit the formation of the cover layer material on the mask layer, so that the cover layer is selectively formed on the conductive region. Non-selectively formed on the conductive region and on the mask layer, and the cover material formed on the mask layer is subsequently removed (for example, by removing part or all of the mask layer) And the cover layer material formed thereon to achieve this effect.) The above alternatives encompass forming the mask layer or cover layer to any degree of selectivity. As described above, a material is selectively formed on a region or surface. The material is formed on the region or surface with a better coverage than the material is formed on other regions or surfaces. In any embodiment, if deemed necessary or desirable, it may be removed and formed a mask layer material on the conductive region or a cover layer material formed on the mask layer. However, as will be discussed in the following, in some cases, for example, when a negligible amount of the mask layer material 20 is formed on the conductive region Or a negligible amount of cover material is formed on the single curtain layer (such as the mask layer or the cover layer selectively forming a dome shape on the remaining conductive region, respectively), and it may not be necessary to remove the cover material formed on the conductive region or A cover layer formed on the mask layer. In the case - in the case, the suppression = the laminate is not formed on the mask layer above the dielectric area (since the mask 17 17329349 layer appears on the dielectric area, on or in the domain, and the female * The covering layer material is formed in the dielectric region 1 to have this effect). Alloy = ==" - where the layer of conductive material _ the previous approach, the cover layer on the electrical region of the embodiment herein prevents the occurrence of between the conductive regions = forming a cover layer with a conductive material = suppressing the cover material Formed in the medium-sized implementation of these implementations, there is considerable flexibility in the use or selection, and the selection of the eight materials and / or procedures ... ... is related to the selectivity of the conductive two-materials in the dielectric region ( And in some embodiments 'it is irrelevant to the selectivity of the cover material for any material). This can be accomplished, for example, by the use of materials and/or procedures that are not sufficiently selective to form a cover layer, such as those described in the Background section above. 15 20 For example, the material and/or procedure used to form the cover layer may be selected to enhance adhesion of the cover layer to the conductive regions, thereby improving the suppression of electromigration in the conductive regions by the cover layer. The material and/or process used to form the cap layer may be selected to produce a cap layer that does not unacceptably or poorly add electrical resistance in the conductive region; for example, a cap layer may be formed without a higher dielectric constant Cover material to replace any material in the conductive area. The material and/or the procedure for forming the overcoat layer may be selected in an additive or substituted manner to produce a coating layer that is sufficiently effective to suppress diffusion of a material such as steel used to form the conductive region, thereby being removable from the electronic device - dielectric The barrier layer or at least reduces its thickness (with a reduced electrical material correlation) = and 'because the mask layer inhibits the formation of the cover material in the dielectric region, the 18 1329349 is useful for the sample A porous dielectric material for electricity. Sub-packaged and medium-sized is increasingly regarded as rational 5

10 further differs from the above-described approach in which a thiol self-aligned monolayer is formed to form a melamine layer, which is capable of being in copper (a material commonly used to form conductive regions of semiconductor devices and other electronic devices). Typical operating conditions for generating-shake multiple electrons (for example, for semiconductor devices, this means that the cover layer should (4) withstand temperatures up to about 45 CTC) and remain connected. * and no (5), that is, based on - or township discrimination The standard has a thermally stable cover layer with a sufficient number of plagues (for example, using any of the above procedures for forming a cover layer by selectively depositing a metallic material). The 4th example can be used to process a substrate made of any type of material. As described in more detail below, the substrate material (4, such as a dielectric region) has desirable properties such as an ideal material, as these embodiments can be practiced.

The function 'is particularly useful for this purpose. As used herein, the function of the material refers to the interaction of the modified material with the "partial features to achieve the additional material that is subsequently formed on the exposed portion of the material." In particular, these can be used to deal with the semi-conductor plate in the electronic industry. Material implementation (4) can be used to process - to make 20 a flat panel display substrate, these substrates are often made (4). The embodiments can be used to process any type of semiconductor substrate, such as a stone substrate, a stone substrate, a carbon-cut substrate, a strained substrate, a stone substrate, or a gallium arsenide substrate. Moreover, the semiconductor substrates used in the electronic components can be used in the manufacture of electronic substrates. The substrates are generally circular and can be used to process substrates used in the manufacture of 19 1329349 flat panel displays. The substrates are generally rectangular. . The embodiments can be used to process small semiconductor substrates having a semiconductor substrate area of less than one (1) square inch (in) to 12 inch (300 mm) semiconductor substrates currently used to fabricate many electronic components; in general, handleable substrates The dimensions are not limited, so these embodiments can be used to process semiconductor chips of various subsequent generations of electronic components. The embodiments can also be used to process relatively large substrates used to produce flat panel displays (now a common rectangular substrate of about one (1) square meter (111) order, but in some cases, it is expected to increase in the future. size). The embodiments can also be scaled for use in roll-to-roll processing applications of flexible substrates having a fixed width, but (theoretically) 10 infinite lengths (one of which is particularly useful in the production of flat panel displays); These substrates can be hundreds of feet long. These embodiments can be used to process electronic devices including conductive and dielectric regions of any type of material. This effect is particularly useful because of the mask layer and in some cases the conductive 15 regions and dielectric regions may have the desired properties of properties such as ideal adhesion and/or diffusion barrier properties. In semiconductor devices for fabricating electronic components, for example, conductive regions are often made of copper or aluminum; such embodiments can be readily utilized to process such substrates. Using a variety of different dielectric materials (such as 'SiCOH dielectric materials, including porous dielectric materials 2, etc.) to form dielectric regions for semiconductor devices used to fabricate electronic components, and such embodiments are compatible with all uses Compatible. In many semiconductor devices, a hard mask layer (which is often formed of a germanium-based material such as SiCx, SiNx, SiCxNy, etc.) is formed on top of a dielectric material from which the dielectric layer is primarily composed; Embodiments can also be readily used to fabricate an electronic device using such a 20 1329349 substrate. It is desirable to use a porous dielectric material in an electronic device (on which a hard mask layer may or may not be formed), particularly for the manufacture of electronics

A semiconductor device of a component. A porous material (in this case, a porous dielectric material) 5 is particularly susceptible to diffusion by other materials. For example, a dielectric region made of a porous dielectric material is particularly susceptible to diffusion of the cover material; especially when the cover material is a metallic material, as in the case of a common case (as described above) The expansion of the material into a dielectric region will add to the possibility of unacceptable current leakage. In addition, as described above, the residual material of the conductive region remaining on a dielectric region after planarization (for example, chemical mechanical polishing) of the exposed surface from the conductive region and the dielectric region 10 region can be provided for the cover layer material. The long crystal address, so significantly reduced - the preferential formation of the cap layer material over the conductive region during the formation of the cap layer. A dielectric region made of a porous dielectric material is particularly susceptible to diffusion of this residual material, thus exacerbating this problem. Therefore, because the mask layer inhibits the diffusion of the material to the porous dielectric material,

Embodiments utilizing a substrate herein for treating a dielectric region comprising a porous dielectric material are particularly absorbent. 20 Figure 3 is a flow diagram of a square (4) (10) for fabricating a cap layer on a conductive region of a % sub-device separated by a dielectric region. In the method 301 and the 3G2 towel, the mask layer is formed on the electronic device so that the mask layer is formed on the m-domain, but the material m is formed after the mask layer is formed in the method finely to 306. The layer is formed on the electronic device such that the cover layer is formed on the conductive region, but the non-dielectric region is on or in the mask layer. The occurrence of a masking layer inhibits the formation of a cover layer material on the dielectric region or in 21 1329349 (which would otherwise have occurred if a mask layer was not present), with the attendant benefits described in more detail elsewhere herein. Also, the method 3 can be carried out in any of several ways as discussed in more detail below to inhibit the formation of the cover material on or in the mask layer. The method 300 produces a cap layer such that the cap layer material is formed over the conductive regions (no or only negligible cap layer material is formed over, over or in the dielectric region used to separate the conductive regions). This eliminates the unacceptable electrical m between the conductive regions, which is already insufficient for the dielectric region to separate the conductive regions, and the cap layer material is preferentially formed over the conductive region 10 for deposition. A problem with previous approaches to a metallic overlay. In the method 3, 7, depending on the nature of the cover layer, a dielectric barrier layer may or may not be formed on the electronic device, as discussed further below. Specific implementations, modifications, and other aspects of method 300 for method 3 are described in greater detail below. 15 Figures 4A to 4E, 5A to 5D, 6A to 6D, 7A to 7c, 8A to 8E, 9A to 9D, 1A to l〇F, 11A to 11E, 12A through 12E, and 13A through 13D are cross-sectional views of each of a portion of an electronic device showing the fabrication of a cover layer 440 in a dielectric region 420 in one embodiment. Above the conductive 2〇 region 410 of the electronic device. Conductive region 410 can be an interconnect between electrical components of an electronic device such as a transistor, a capacitor crying, and a resistor. It is shown that the dielectric region 420 has a hard mask layer 420a' formed as a top portion of the dielectric region 420 as in the case of current electronic devices; however, the dielectric region 420 does not necessarily include the hard mask layer 420a. 22 1329349 As discussed further below, method 300 can be used to generate a cover layer in accordance with various embodiments shown in a set of cross-sectional views of a portion of an electronic device. However, the method 300 may also be different from the 4A to 4E, 5A to 5D, 6A to 6D, 7A to 7C, 8A to 8E, 9A to 5D, 10A to 10F. The embodiment of the present invention shown in Figures 11A through 11E, 12A through 12E, and 13A through 13D provides a cover layer.

Specifically, 4A to 4E, 5A to 5D, 6A to 6D', 7A to 7C, 8A to 8E, 9A to 9D, 10A to 10F, 10, 11A to In the embodiment shown in FIG. 11E, FIGS. 12A to 12E, and 13A to 13D, the imperfect selective or non-selective mask material due to the formation of the mask layer 450 may be formed before the cover layer 440 is formed. Formed on the conductive region 410 of subsequent removal (as shown in Figures 4B, 5B, 6B, 7B, 8B, 9B, 10B, 11B, 12B, and 13B) (eg, 4A '5A, 6A, 7A, 8A) , 9A, 15 l〇A, 11A, 12A, and 13A are shown). However, the formation of the mask layer 450 can also be achieved with greater selectivity, so that no mask layer material is formed on the conductive region 410 (in this example, 4A, 5A, 6A, 7A, 8A will not occur). , the intermediate structure shown in FIG. 9A, 10A, 11A, 12A, and 13A) or such that a negligible amount of the mask layer material is formed on the conductive region 410 that is not necessarily removed from the conductive region 41 (in the In the example, the intermediate structures shown in FIGS. 4B, 5B, 6B, .7B, 8B, 9B '10B, 11B, 12B, and 13B will not occur, and the respective cross-sectional views of a portion of an electronic device are displayed. Subsequent formation of the structure will include a negligible amount of mask layer material formed on conductive region 410. 23 1329349

The exposed surface of the electrically conductive region and the exposed surface of the dielectric region are prepared for processing as described herein prior to forming a masking layer. This surface preparation results in at least one or more cleaning steps (e.g., a deionized water rinse and/or any of a variety of other well known surface cleaning steps) to remove contaminants from the first 5 pretreatments. This cleaning removes some portion of the residual conductive material remaining on a dielectric region after planarizing the conductive regions and dielectric regions, but generally does not remove all of them, and thus does not compromise the present invention. Preventing this residual conductive material from promoting the effectiveness of the poorly grown crystals of the cover layer material over the dielectric regions is discussed elsewhere. 10 Surface preparation can also include other processing steps. For example, the exposed surface of the conductive region and/or the exposed surface of the dielectric region can be functionalized to facilitate selective formation of the mask layer. In particular, the surface of the dielectric region can be functionalized to promote formation of the mask layer, while the exposed surface of the conductive region can be functionalized to inhibit formation of the mask layer. Similarly, the exposed surface of the conductive region 15 and/or the exposed surface of the dielectric region can also be functionalized to facilitate selective formation of the cover layer. In particular, the surface of the dielectric region can be functionalized to inhibit overlayer formation (although using a mask layer in accordance with the present invention would not require this effect, or at least greatly reduce the importance), while the exposed surface of the conductive region can be It is functionalized to promote adhesion of the cover layer. 20 In general, the particular manner in which the surface of the conductive region and/or the surface of the dielectric region is functionalized depends on the nature of the material used to form the conductive region, the dielectric region and the mask layer, and the desired properties to be produced. (eg, passivation, promote material formation). For example, a dielectric region formed from a dielectric material based on a dioxide dioxide can be functionalized to produce a large amount of hydroxyl groups on the surface of the dielectric region 24 1329349's self-assembled monolayer (which can implement a mask layer) It has an attachment affinity for it, so that the mask layer is promoted on the dielectric region. Additionally, a molecule can be formed to form a molecular self-assembled layer to include a head group that is covalently bonded to a 5 exposed hydroxyl group of the material used to form a dielectric region. Although not shown in Figure 3, this surface preparation can be included in Method 3A as an additional step in accordance with certain embodiments. As described above, in the method 3〇1 and 302, a mask layer is formed on an electronic device, so that the mask layer is formed on the dielectric region of the electronic device instead of being the dielectric region. Separating the conductive area of the electronic device. The formation of a mask 10 layer on a dielectric region covers negligible failure of the mask layer to cover the dielectric region, such as without compromising the performance or utilization of a method of an embodiment. The cover layer material of the function of one of the electronic devices manufactured by the method fails. In addition, the fact that a mask layer is not formed on the conductive region covers negligible formation of the mask layer material on the conductive region, that is, 15 does not impair the performance of a method of an embodiment or utilizes an embodiment. A method of fabricating a cover layer material that functions as one of the electronic devices. In 301 of method 300, a mask layer can be selectively formed over the dielectric region or a mask layer can be non-selectively formed over the dielectric region and the conductive region. Selectively forming a mask layer over a dielectric region covers the mask 2 material that is negligibly formed on the conductive region 'for example' without compromising the performance or utilization of a method according to an embodiment A method of the embodiment is to cover a functional cover layer material of an electronic device. The non-selective formation of a mask layer on the dielectric region and the conductive region does not prioritize for the dielectric region or the conductive region, has a certain degree of priority for the conductive region 25 1329349 domain, or has insufficient for the dielectric region In order to cause no or, there is a '. The mask layer material is formed on the conductive region to form a preferential mask layer (for example, the case t is obtained; f is sufficient to make the mask layer selectively formed on the "electric region" first). When the fascia is selectively formed on the dielectric region and the conductive region, all of the mask layer material formed on the conductive region is subsequently removed, as shown in Fig. 3. All the masks formed on the conductive region The removal of the curtain material covers a negligible mask layer material formed on the conductive region, for example, without compromising the performance of a method according to an embodiment or using a method according to an embodiment. - covering the function of the mask layer of the electronic device 10. Figures 4A and 4B, 5A and 5B, 6A and 6B, 7A and 7B, 8A and 8B, 9A and 9B, 10A and 10B, 11A and 11B, 12A and 12B, and 13A and 13B each show a mask layer 450 non-selectively formed on dielectric region 420 and conductive region 410, and then In order to remove all the mask layer materials formed on the conductive regions 41〇15, leaving only the formation The mask layer 450 on the region 42. In general, the mask layer can be utilized to create a function required to achieve the mask layer (e.g., selectively formed on a dielectric region for the overlay material) Any material and process of the mask layer that diffuses to provide a good barrier. The mask layer can be bathed (for example, a substrate is immersed in a chemical bath, and a chemical fluid is sprayed or spun onto a substrate). Or by dry treatment (such as vapor deposition). If wet treatment is used, the flushing process is usually used to clean the electronic device and then a drying process. In addition, if wet processing is used, the amplitude can be specified during processing. / or frequency of vibration (for example, high 26 5 5

10 15

A 20-frequency vibration 'such as ultrasonic or million-cycle vibration is transmitted to the electronic device for profit (acceleration) processing. The mask layer can be deposited or grown on the dielectric region. The mask layer can also be formed by stamping. Since the mask layer is formed in a region where non-conductivity must be present in the finished electronic device, it is often desirable to form the mask layer with an electrically insulating (substantially non-conductive) material. However, in embodiments where the mask layer is completely removed from the electronic device (see, for example, Figures 4D, 5D, 8D, 9D, 10E, and 11E), the mask layer can be formed of a conductive or semiconductor material. If used (10) provides - other advantageous properties of the mask layer (such as 'the mask layer is selectively formed on the dielectric region, a good barrier to the diffusion of the cover material), although it is possible to have conductivity The potential problem caused by 'using this special ingredient may be ideal. As early as possible, I think that the type is functionalized for other modifications (such as chemical, neo-and/or photochemical miscellaneous) to produce the desired properties (such as 'generating _ ideal tendency to form in the material cover Curtains are used for subsequent formation on an electronic device, such as a cover layer or a barrier layer, or some or all of the mask layer can be formed in the cover layer; removed for migration to form a mask The cover riding layer on the layer can be, for example, a molecular self-single layer (SAM) or a multi-reed, I. and an installed layer which can form i-theta and can be formed of organic and/or inorganic materials. < = 'Or the use of chemically activated or modified dielectric regions of the second-new different material layers, by the Ή 屋 3 3 system - molecular self-material layer of the seam layer. Wu and / or chain The ability of length provides the flexibility of the characteristics of the built-in: thick-headed group, terminal base® for the establishment of the cover layer, _ 27 1329349 can be used to produce the desired properties of the grass layer, such as the beta mask The layer may also be, for example, any class of material known to be formed from the thickness of the controlled film (eg, multilayered poly One layer formed by de-solving, etc. The mask layer may also be formed on one surface of the dielectric region 5 by catalytic growth of an inorganic or organic material. An example of this approach is from surface initiated polymerization. Growth of the polymer brush. The surface initiator may be present in the material of the dielectric region or attached to the surface of the #电 region via chemical or physical adsorption. The mask layer may also be a self-dendritic polymer, super-branched The polymeric material, and/or the block copolymer, forms a layer. The masking layer can also be, for example, an ionic 10 or electrochemically enhanced self-assembling multilayer or single layer. It can be used in the embodiments described herein. a decane-based material to form a mask layer. For example, a partially decane-based SAM system has a relatively high collapse temperature, which may be desirable if the mask layer is not removed by subsequent processing by the electronic device. Therefore, the mask layer will not experience failure during operation of the electronic device used to generate high temperatures in the electronic device 15. In addition, as discussed in more detail below, some of the decane-based dielectric material systems are discussed in more detail below. Good adhesion (to form a strong covalent bond with it) a Shixia-based dielectric material (often formed by its t; I electrical region) and not well adhered to metals such as copper (often formed by its conductive regions) The material, because it facilitates the selective formation of the mask layer 20, can be ideally used in some applications. And, as described in more detail below, a decane-based SAM can be customized to facilitate a dielectric The region removes the SAM, which can be used in embodiments where the mask layer is removed from the dielectric region. Further, as described in more detail below, a decane-based Sam can be customized to promote or inhibit the formation of a particular material thereon. It can be used to inhibit the formation of the cover layer 28 1329349 on a mask layer and/or to promote adhesion of a dielectric barrier layer formed on a mask layer.

The features of one of the mask layers formed in an embodiment can be established to produce the desired properties of the mask layer. For example, a molecular type that can be used to form a molecular self-assembled layer can be selected, and molecules such as a head group, a terminal group, and/or a length (such as a carbon atom in a molecule of an organic backbone) can be established. Characterized to produce the desired properties of the molecular self-assembled layer. Wherein the 掣-mask layer (which in turn includes the materials and/or procedures used to form the mask layer) = the specific mode of the lemma may depend on the particular application of the embodiment, such as the nature of the dielectric region ( In particular, including the adhesion of the dielectric regions, avoiding the necessity or ideality of forming the mask layer material on the conductive regions (which may make the adhesion properties of the conductive regions important) to form the cover layer. The characteristics of the materials and/or procedures (specifically, the tendency of the cover material to be formed on and/or diffused into the mask layer), and/or the material used to subsequently form the material on the layer 15 of the mask (eg, 'Mesoscopic barrier layer, such as a carb carbide layer or a tantalum nitride layer, and/or a feature of the program. For example, a material and/or a procedure for forming a mask layer may be established to achieve a basis. - method, or - resulting from the _ portion of the structure - or a plurality of subsequent desirable properties. It may be desirable to use a high selectivity to the dielectric region of 20 (i.e., it is on the conductive region) Produced more well on the dielectric region) to produce - The material and/or procedure of the curtain layer. In some electronic devices, 'SlCOH dielectric material is used; therefore, in some embodiments, it may be necessary to use a high selectivity for the formation of a material for the Dixon - the mask layer Materials and/or procedures. In the Zoufenfenzi installation, - 29 5 The hard mask layer based on yttrium is formed on the top of the dielectric material mainly composed of the dielectric region; therefore, some embodiments are This includes the use of materials and/or procedures that can be used to make a mask layer for the -_-based hard-to-hard layer. It may be necessary to use q to create a good adhesion to a dielectric barrier layer ( It is often formed by a cover layer including Shi Xi together with carbon and/or nitrogen, that is, a group of deductions, siN, and =4, which is formed on the mask layer. (4) and / silk may also be It is necessary to use during the operation of the electronic device during the manufacture of the cover layer 10 (if the mask layer is left to be completed, part of the use) - for the diffusion of the cover material (for example, a core (four) alloy) - good barrier The material and/or procedure of the mask layer. In addition, it is possible :: In addition to some or all of the mask layer (4) its removal may 15 produce two == self-assembled layer - organic backbone. Knife in the material and / or program of sex 20, and if it is ordered by the mask layer The advancement of operation - Qian Lixiang's electronic skirts will remain the same for semi-conducting fresh money. The temperature representative of the object t should be able to withstand up to d degrees ^ if it also represents the layer riding (if it appears) The materials and procedures for the dielectric barrier layer present a chemical composition. It may also be desirable to use materials and/or procedures that can produce a mask layer quickly (e.g., less than about 60 seconds). The features of the mask layer can be established (i.e., Suitable materials and/or procedures are used to produce desirable material forming properties relative to the dielectric and conductive regions. For example, a feature of the mask layer can be established such that the mask layer is formed over the conductive region. It is preferentially formed selectively on the dielectric region. However, as discussed elsewhere, embodiments may be practiced to make the formation of the mask layer non-selective; in this case, the mask layer material formed on the conductive regions may be removed in a subsequent processing step. , as further described below. 1. Accordingly, the embodiments can take advantage of the fact that for materials (such as copper) used to form conductive regions on electronic devices, few materials adhere well to the conductive regions and are selected for selection. The material and/or procedure for forming the mask layer provides greater flexibility. The feature of the mask layer may also be established in an additive or replacement manner to facilitate removal of the mask layer from the dielectric region 15 after formation of the cover layer. 3, for example, a molecule used to form a molecular self-assembled mask layer to include a head group that is more likely to adhere to the dielectric region than the conductive region. For example, one can be specified to form a molecular self. The molecules of the assembled layer comprise a head group 2 which is covalently bonded to an exposed hydroxyl group of the dielectric region. As described above, part of the decane-based SAM is adhered well to the ruthenium-based dielectric material which is commonly used to form a dielectric region without being well adhered to a metallic material such as copper which is commonly used to form a conductive region. It is therefore suitable for use in embodiments of the invention in which the mask layer is selectively formed on the dielectric region. For example, known - with a general formula 31 1329349

Wherein R may be an alkyl group, a substituted alkyl group, an aryl group or an substituted aryl group, and X may be one or more hydrolyzable, such as a halo, alkoxy, aryloxy or amino group. The alternative decane series can form a SAM that exhibits strong covalent or non-covalent attachment to a particular surface. In general, the SAM surface attachment is enhanced on the surface of an acidic function such as a hydroxyl group or a hydroxymethyl sulfonyl group having a relatively high density. The ruthenium-based material surface such as Si〇2, Si〇H, and Si〇C surfaces treat relatively high density hydroxyl groups. Therefore, a decane-based SAM can be expected to have a surface formed by a ruthenium-based material (a dielectric region is often formed therefrom) than a metallic material (where the conductive region 10 is often formed). A surface is more adhesive. Also, a smash-based S AM is reversibly adhered to a surface depending on the nature and replacement of a smashed precursor material. For example, it is known that a Zeolite-based SAM precursor system having a single hydrolyzable substitute (such as having the general formula R1 R2R3SiX) produces a functionalized surface that can be formed under specific reaction conditions (for example, one has A SAM on a relatively high density of acidic functional surfaces) and reversibly detached therefrom. For example, a SAM can be formed on a substrate via a reaction in an organic solvent medium such as 'toluene, hexane, dichloromethane or a mixture thereof. This SAM can be made to be stable to aqueous solvent media in a pH range. This would, for example, allow for subsequent electrodeless deposition with 20 layers of material while maintaining SAM integrity. Removal of the SAM can then be achieved by treatment with a monohydrated or mixed organic/aqueous solution that raises the pH (e.g., NaOH/MeOH/H2 at pH 12). Thus, the adhesion properties of a decane-based SAM can be controlled to facilitate attachment to the dielectric region and then removal of the self-dielectric region after formation of the cap layer. Table 32 1329349 Face Burning A, as discussed in Gordon & Breach Science Publishers, 1986 by Donald E. Leyden, "Silver Burning, Surfaces and Interfaces (Chemically Modified Surfaces, v〇1, this disclosure is incorporated by reference) Incorporated herein; the principles discussed therein can be used to practice the embodiments as can be seen from the description of the material used for the decane-based material. The features of the mask layer can also be established (eg, used) Suitable materials and/or procedures for producing the desired material formation and/or adhesion properties with respect to the material formed on the electronic device after formation of the mask layer. In particular, the features of the mask layer can be established to cover The layer material does not form well on the mask layer 10, thereby facilitating selective formation of the cap layer on the conductive regions. However, as discussed elsewhere, such embodiments may also be practiced such that the formation of the cap layer does not have Selective; in this case, the cover material formed on the mask layer can be removed in a subsequent processing step, as described further below to establish the characteristics of the mask layer to inhibit overlying The layer material is formed on the mask layer and the thickness of the mask layer is reduced. It is also possible to establish the characteristics of the mask layer to enable the barrier layer: the material (if a dielectric barrier layer is formed) adheres well to the mask layer. The first MA is a cross-sectional view of the structure 1400 including the dielectric region 1401. A mask layer 14〇2 is formed on the dielectric region 1401. The mask layer is a self-assembled single layer (SAM). The SAM includes, but is not limited to, a 20% of the head group on the dielectric region 1401 reads a, a connected to the head group a, and a terminal group 1402c attached to the linking group 14G2b. The material may be subsequently formed thereon. Without modification, according to the nature of the terminal group 14〇2c used in the mask layer 1402, the mask layer 14 is formed on the electronic device after the formation of the mask layer. 33 1329349 "It can be used to modify a mask layer. For example, the structure 14" can break the bond between the head group 1402a and the linking group 1402b, resulting in a mask layer 14 〇 2 Removal of linking group 1402b and terminal group 14〇2(); head group 140 remaining on dielectric region 1401 2a provides the required features for the mask layer 14〇2. The bond between the linking group 1402 and the terminal group 1402c can be interrupted resulting in the removal of the terminal group 1402c of the mask layer 1402; The linking group 1402b on the electrical region 1401 provides the desired features for the mask layer 14A. The terminal group 1402c can be functionalized (rather than cut); the modified terminal group 1402c is provided for masking The desired features of layer 1402. In fact, 'in the other general types of pathways described above (eg, tangent head group 1402a, linking group 1402b or terminal group 1402c, or breaking head group 1402a and linking group) In the bond between 1402b or between the linking group 1402b and the terminal group 1402c, the exposed portion of the mask layer 1402 can be functionalized to produce the desired features. 15 has many special ways to modify the above-mentioned general way to modify a mask layer

the way. Particular implementations may depend on the particular structure and/or material of the head group 1402a, the linking group 1402b, and or the terminal group 1402c of the mask layer 1402, and/or the bonds formed therebetween. In view of the specific structure of the head group 1402a of the mask layer 14〇2, the linking group 1402b and/or the terminal group 1402c and/or the material and/or the bond formed therebetween, and as described above, The skilled person understands how such general approaches can be specifically implemented, for example, using appropriate chemical or electrochemical treatments. For example, it may be desirable for the mask layer to inhibit the formation of a material from which the cap layer is formed and to promote adhesion to the material used to form a dielectric barrier layer. This can be achieved by establishing a terminal group of the ''molecule' (ie, the specified molecule includes a specific terminal group) to form a molecular self-assembled mask (eg, SAM) to inhibit formation of the overlay. The material of the layer is I and promotes adhesion to the material used to form a dielectric barrier layer. Or by establishing a terminal group for forming a molecule of a molecular self-assembled mask layer to inhibit the formation of a material used to form the cover layer 'and then modify (ie, cut and/or Functionalized) terminal groups to promote adhesion to the material used to form a dielectric barrier layer. As described above, the decane-based SAM can be customized to promote or inhibit the formation of specific materials thereon, which can effectively facilitate selective formation of a cap layer and/or promote a dielectric barrier formed on a mask layer. The layers are glued. The suitable substituted decane precursor can be used to control the properties of the exposed surface of the decane-based SAM. For example, one of the SAM systems formed from the reaction of octadecyl trioxane is expected to produce an exposed surface having a non-reactive function (i.e., containing only a saturated hydrocarbon group). In contrast, one of the sAM formed from the reaction of aminopropyltrimethoxysilane is expected to produce an exposed surface characterized by a high density of amine functionality. The hydrocarbyl surface is expected to provide a poor surface for the material crystals formed by an electrodeless deposition process, while the amine functionalized surface is expected to promote this crystal growth. More generally, 'a decane precursor having a burn-in, aryl, fluorinated or (iv)-based substitute can be used to produce an unexposed function of one exposed surface (materials that are not suitable for use - non-electrode deposition procedures) And an appropriately substituted hetero-hybrid can be used to produce an exposed SAM surface containing a reaction function such as a silk, an amino group or a slow-acting group (a material suitable for forming a crystal using an __electrodeless deposition process) The technician knows. Thus, the exposed surface properties of a decane-based SAM are controlled to inhibit the formation of the t _ layer material on the SAM. It is also possible to establish the characteristics of a mask layer (i.e., the appropriate materials and 5/or procedures used) to produce the desired diffusion barrier properties. In particular, the features of the mask layer can be established to provide for the diffusion of the mask layer to the cover layer material and/or the material used to form the cover layer (eg, precursor material). The increased porosity of the dielectric material used in one application of the embodiment 'is well established to characterize the mask layer to inhibit diffusion. Chains such as the intended embodiment will sometimes be practiced using a cobalt alloy (e.g., a cobalt-tungsten-disc gold) to form a cover layer. In this example, the features of the mask layer can be established to provide a good wall for the diffusion of the mask layer to the cobalt alloy and/or alloy precursor. As above (and as shown in Figures 4A and 4B, 5A and 5B, 6A and 6B, 7A & 7B, 15 8A and 8B, 9A and 9B, 10A and 10B, 11A and 11B, 12A and UB, i3A and 13B) Embodiments may be practiced such that a mask layer is non-selectively formed on the dielectric region and the conductive region, and then removed from all of the mask layer materials formed in the conductive region ^, leaving only formed in the dielectric layer The mask layer on the electrical area. Any of a variety of different suitable procedures can be used to remove the mask layer material from the conductive region as is known to those skilled in the art; in one embodiment, the particular procedure for removing the mask layer material from the conductive region is particularly The material of the mask layer and the features used to form the conductive regions. For example, a rinsing procedure can be used to remove the physically adsorbed mask layer material or a -_ program can be used to remove the top portion of the conductive region from the small portion of the conductive region (and thus the package 37 1329349 includes the mask formed thereon) Layer material) to achieve removal of the mask layer material formed on a conductive region. Such procedures have been performed to remove other contaminants from the surface of the conductive region as part of the fabrication of the electronic device' and this embodiment can utilize this process to initially form a mask layer non-selectively. The implementation of the method enhances the efficiency of producing a mask layer. As described above, in the method 303 to 3〇6, after the mask layer is formed, a blanket layer is formed on the electronic device to form the cover layer on the conductive region, but not the mask layer and/or On or in the dielectric area. Forming a cap layer on a conductive region covers negligible 10 failures of the cap layer material covering the conductive region, such as without loss of the performance of an embodiment - or by the method of the embodiment - The functional cover material coverage fails. Forming, on or in the mask layer and/or the dielectric region, the formation of the cover layer material on or in the mask layer and/or the dielectric region, ie The loss—the performance of the method of the embodiment or the method of manufacturing the electronic device by the method of the embodiment. In particular, it is convenient to fill the <May as a reference - conductive material to form a cover layer, the cover layer in the mask layer and / or dielectric 2 and the negligible formation on the electrical domain is not between the conductive areas A current leak does not occur between ^I^跫. Unacceptable electricity>"L leakage can represent a dielectric barrier layer formed over the conductive region and the 7-turn electrical region, but the masking layer is formed. The current flow of the conductive region occurring in the electronic device above the conductive region is a worse current leakage. As shown by 303 of method 300, the cover layer may be selectively formed on the conductive 38 region or the cover layer may be Optionally formed on the mask layer and on the conductive region. A cover layer is non-selectively formed on the mask layer and the conductive region is not covered for the conductive region or the mask layer, and has a priority for the mask layer A certain degree of priority, or the formation of a preferential overlayer for the conductive region that is insufficient to cause no or only negligible overcoat material to be formed on or in the mask layer and/or dielectric region. When the ground is formed on the mask layer and the conductive region, all the cover materials formed on the mask layer are subsequently removed, as shown in 304 and 305. 4C, 5C, 6 (: and 7 (: each display) The cover layer 440 is selectively formed on the conductive region 4 1st, and 8th (: and 8〇, 9C and 9D, 10C and 10D, lie and i1D, uc and 12D, 13C and 13D diagrams each show a cover layer 44〇 non-selectively formed on the mask layer 45 The upper and upper conductive regions 410 are then removed from all of the cover material formed on the tip of the mask layer, leaving a cover layer 440 formed only on the conductive regions 41. 'Using a desired or desirable function to create a cover layer to achieve a cover layer (for example, suppressing electromigration in a conductive region on which a cap layer is formed, and suppressing diffusion of a material from a conductive region on which a cap layer is formed) Any material and procedure to form a cover layer. The material used = private order may depend on whether the cover layer is selectively formed. The cover layer may be formed of a conductive, semi-conductive or electrically insulating (substantially non-conductive) material. The use of semiconductors or electrical materials can reduce or eliminate the concern that the cap layer is formed on the mask layer and may otherwise cause unacceptable current leakage between the conductive regions. For example, it can be used to selectively cover the cover. Layer deposition - materials on the conductive domains of semiconductor components (eg, drill alloys, 5 money magnets and slave alloy wires and private alloys; gold, such as recording, .. redundancy or ^ and procedures (such as 'electrodeless deposition, chemistry In the gas phase region - in the embodiment, the shape of the cover layer of the mask is present in the dielectric, which may result in insufficient selection of other materials due to the special materials and procedures and (4), "m as described above. Η 5 may also be used. Buttons or nitride buttons can be used to form the cover layer, such as 2 (such as physical vapor deposition) or atomic layer deposition, etc., such as the cover layer can be covered. - the required force (such as 'four (for) a subsequent barrier such as - dielectric barrier layer, the material on which the desired adhesive properties of the cover layer are produced). The characteristics of a cover layer formed in the 思 η 纟 纟 以 以 以 以 以 以 以 以 以 。 。 。 。 。 。 。 。 。 。 Customization—the specific way in which the features of the overlay (in turn = the material and/or the procedure used to shape the cover) may be based on Example 15 and should be set to the mask layer, the guide field, and/or Or a material in which a cover layer is formed, and a material (such as a dielectric layer) formed by the ruthenium is placed and has a specificity f and a property f. In particular, it may be desirable to establish the characteristics of the overlay (ie, the appropriate material/like material, such as W, material, and selectively formed on the conductive region), such that the overlay layer is on the conductive region. The mask 2〇: the crystal is more well grown in the case of death. The above-mentioned material sequence for depositing the conductive material produces the S-cover layer, which is usually made of metal in the conductive region (4) (譬, (6) The upper layer is raised on the material which is usually made of the layer. The crystal is more well grown. Therefore, it can be ideally used in many applications of the consistent application. Mask S仏 prevents the cover material (via diffusion) Formed on dielectric 40 1329349 5

10 15

= good =:! cover _ ” "electrical area compared to the dielectric process (such as chemical mechanical polishing) two diffusion of porous dielectric material # and also to the cover material must be listed in the upper cover layer Provides increased flexibility in materials and procedures. The use of:::: The embodiment can be used to deposit a conductive chair material = good adhesion of the area, for the conductive layer and because of the appearance of the mask layer By forming an additional material on the conductive region, it is possible to create a cover layer that does not need to be chemically modified to form a cover layer. Thus, the conductive region associated with the cover layer can be avoided. In the above, when the cap layer is non-selectively formed on the mask layer and the conductive region, all of the capping material formed on the mask layer is subsequently removed, 2 such as method 300 And 3〇5, so there is no (or only negligible) cover material appearing above the dielectric region, thereby eliminating the possibility of current leakage between the conductive regions when the conductive material is used to form the cover layer. Forming a cover layer according to the selectivity used in the location, as described above, it is not necessary to remove the cover layer 41 from the mask layer when the cover layer is selectively formed on the conductive region, even in this case, actually Embodiments need to be practiced to remove the cover layer material from the mask layer to form a potentially harmful cover layer material y on the mask layer. The cover layer material can be removed from the mask layer only (in 305) or This effect is achieved by removing portions (for example, the top of the cover material formed over the top. trowel) or all of the mask layer together with the cover layer material formed thereon (in 304). The 11D, 12D, and 13D diagrams show that only the overlay material is removed from the mask layer, while the 8D and 9D diagrams show the removal of all of the mask layer material and the overlay material formed thereon. In general, any A suitable procedure removes the cover material from above the dielectric region. Typically, the removal process includes removing the cover material, or together with some or all of the cover layer of the cover material, and then removing the detached material from the electronic device. Flushing procedure The procedure used may depend on whether only the cover material is removed, along with the cover layer to remove a portion of the mask layer, or all cover layers are removed along with the cover layer. Further, the procedure used may be based on the cover material. The mask layer (especially if all of the mask layer is removed) and the characteristics and properties of the material used to form the dielectric region. For example, a mask layer can be formed (or functionalized) when properly handled A top portion of the mask layer is chopped from the remainder of the mask layer, as further described below, and a molecular self-assembling mask layer can be disassembled and removed when properly handled. A cross-sectional view of a structure 1500 including a dielectric region 1501, a mask layer 1502 is formed over the dielectric region 1501, and a cap layer 15〇3 is formed on the mask layer 1502. The mask layer 1502 is A self-assembled single layer (SAM). The SAM system comprises: a head 1329349 group 1502a' formed on the dielectric region 15〇1, a linking group l5〇2b connected to the head group 15〇23, and a terminal group attached to the linking group 1502b. 1502c, on which materials can be formed subsequently. Figures 15B through 15E are cross-sectional views of the structure 15A after further processing to remove the cover layer 5 1503. Figures 15B through 15E each show a different general type of path that can be used to remove one of the cover layers from above a dielectric region. In Fig. 15B, the entire mask layer 15〇2 is removed from the dielectric region 15〇1; as a result of the removal of the mask layer 1502, the cover layer 1503 is also removed from above the dielectric region 15〇1. In Fig. 15C, the head group i5〇2a of the mask layer 1502 is chopped, 10 together with the cover layer 1503 formed on the mask layer 1502, and the head group 1502a, all of which is removed from the mask layer 1502, is removed. The linking group 15〇2b and all of the terminal groups 1502c (the portion of the head group 15〇2 & remaining in the dielectric region 1501 is labeled "H" in Figure 15C to represent the image with Figure 15A The difference in head group 1502a is not modified). 15 In Fig. 15D, the bonding group 1502b of the mask layer 1502 is chopped, together with the cover layer 1503 formed on the mask layer 1502, the linking group 1502b and all of the portions of the mask layer 15〇2 are removed. The terminal group 1502c (the portion of the linking group 1502b remaining on the dielectric region 1501 is labeled "L" in Figure 15D to represent the difference from the unmodified linking group 1502b of Figure 15A). In the second drawing 15E, the terminal group 1502c of the mask layer 1502 is chopped, together with the cover layer 1503 formed on the mask layer 1502, the terminal group 1502c of the portion of the mask layer 1502 is removed (remaining The portion of the terminal group i5〇2c on the dielectric region 1501 is labeled "Τ" in Figure 15E to represent the difference from the unmodified terminal group 1502c of Figure 15A). 43 1329349 There are other general types of paths not shown in Figures 15B through 15E that can be used to remove the overlay-overlay from above a dielectric region. For example, in the structure 1500, the bond between the head group 15Q2a and the linking group 15A can be interrupted 'along with the overcoat layer formed on the mask layer (10), resulting in the bonding group 15G2b of the mask layer 15G2. And the removal of the terminal group (9). Also, the bonding group 15G2b and the terminal base member can be broken, together with the cover layer 15G3 formed on the mask layer 1502, resulting in the removal of the terminal groups 15〇2c of the mask layer 1502. Alternatively, the cover layer 1503 can be self-masking! 5〇2 removal without affecting the structure of the curtain layer 15〇2, that is, the terminal group 10 1502e, the joint group lion and the county group i5G2a are not untwisted (four) and the bond between them is not interrupted. Finally, two or more of the general approaches described above can be combined; this effect may be required to increase the likelihood that the cap layer 1502 will be properly removed from above the dielectric region 1501. In addition, in any of the above-described approaches of any of the general 15 types in which at least a portion of the mask layer 1502 remains on the dielectric region after the blanket inspection is removed, the exposed surface of the mask layer 15〇2 can be functionally = The required features are produced (not only for the mask layer 15 〇 2, which is true for any type of mask layer according to the present invention). There are a number of special ways in which the above-described general approach can be implemented to perform a removal-coverage layer over a dielectric region. The specific embodiment 2 can be based on the head group 15〇2a of the mask layer 15Q2, the specific structure and/or material of the linking group (10) and/or the terminal group 1502c, the structure and/or material of the overlay layer, And/or the bond formed therebetween, the skilled artisan understands how the head group 15〇2&, the linking group 1502b and/or the terminal group 1502 of the mask layer 15〇2 can be used in view of the above description. The structure and/or material of the temple, the structure and/or material of the cover layer 44 1329349 1503 and/or the bond formed therebetween, such as by using appropriate chemical or electrochemical treatments, to specifically perform such general approaches. The layer is selectively formed on the conductive region in 303 of method 300 or if the cover layer is non-selectively formed on conductive region 5 in 303, only the cover material is removed from mask layer 304 in 304 and 305 In addition, method 300 further provides the possibility of subsequently removing all of the mask layers or modifying (ie, removing/removing portions and/or functionalizing) the mask layer at 306. It may be necessary or desirable to remove all mask layers or Modifying the mask layer to produce a desired feature (such as The surface that adheres well to the dielectric barrier 10 after being formed on the mask layer (eg, the dielectric region or an exposed surface of the mask layer). The latter case (ie, first removed) Covering the layer, then removing or modifying the mask layer, may require or desire to remove some or all of the mask layer after removal of the cover layer (rather than removal of the cover layer) for one or more different reasons ( And/or functionalizing the mask layer. In particular, it may be easier, more or less possible, or may only be produced by first removing the overlay and then further processing • removing or modifying the mask layer— The surface having the desired features. '10E and 11E show the removal of the entire self- dielectric region of the mask layer after the cover material has been removed from the mask layer. Figures 14B to 14D show the mask The layer is a self-assembled single layer - removal of a portion of the mask layer and 20 / or functionalization of the mask layer (this removal or functionalization may also be performed for other types of mask layers). The art knows that it can be used in multiple cases. Anyone of the program removes the mask layer material from the dielectric region. The &a is a member of the art, as is well known in the art, a variety of different appropriate procedures can be used to work with mm 45 1329349, as described above. One or more procedures similar to those used to remove the mask layer material from the conductive region, such as a rinsing process and/or an etching process, may be used to achieve the overall shift of one of the mask layers on a dielectric region. Similarly, the removal of a mask layer of 5 portions formed on a dielectric region can be achieved by one or more of the above procedures to remove a dielectric region formed prior to forming a cap layer. a portion of a mask layer. Also, one or more procedures may be utilized that are identical to the procedure used to remove a portion or all of a mask layer and to form a cover layer thereon (however, due to the presence of a cover layer, It is necessary or desirable to use a different procedure) to remove some or all of the 10% of the mask layer after the cover layer is removed from the mask layer. The particular procedure for removing the mask layer material from the dielectric region and/or functionalizing the mask layer in one embodiment may be based, inter alia, on the characteristics of the mask layer material and may also be used to form the dielectric region. Depending on the material. As noted above, in 307 of method 300, depending on the nature of the cover layer, a dielectric barrier layer may or may not be formed on the electronic device. 4E, 6D, 8E, 10F and 12E each show a dielectric barrier layer 430 formed on the electronic device, and the 5D, 7C, 9D, 11E and 13D diagrams each show a dielectric barrier layer not formed on the electronic device. . If a dielectric barrier layer is formed on the electronic device, this formation can be accomplished using any of the materials and procedures, or in any other manner, as will be appreciated by those skilled in the art. For example, chemical vapor deposition can be used to deposit a tantalum nitride layer or tantalum carbide (such as a barrier low-k dielectric) on an electronic device to create a dielectric barrier layer. As described above, a dielectric barrier layer has been formed on the conductive portion of an electronic device (such as copper) to inhibit diffusion of the conductive material to adjacent materials of the electronic device, such as dielectric materials formed over the conductive material. in. However, if the ^ cover layer provides good for this diffusion, it still improves the properties he needs (such as good (4) for the conductive region to suppress C ' and good selectivity for the transmission domain, so when the cover layer t The material of the sloping cover layer material will not be placed in the conductive region of the current material: it may be possible to reduce the dielectric barrier (4) (four) degrees from the electrons. The portion is formed to form a cover layer to thereby suppress the coating to the secret shot by utilizing a sufficient thickness effect for the case where the dielectric barrier layer is formed with a self-layer. For other implementations, the formation of -== is spread from the conductive region into the adjacent region with a layer sufficient to form a dielectric barrier layer.邶 15 knives to suppress the diffusion of material from the conductive region, H, to suppress the filling. If the dielectric barrier of the lowering degree, the barrier layer is suppressed and no coating layer appears. 20 ^: according to the ability to control the overlay: the order: form the ::::: expansion::: neighbor: domain - according to the embodiment used to form - cover layer, New Zealand and nitride group root or lower The thickness of the electrical barrier layer reduces the speed at which the dielectric barrier layer is removed and/or the operating speed of the electronic device is increased. ::彳 can reduce the selectivity of the important considerations in the power-dissipation area using a cover 47 layer to reduce or eliminate the material and/or private order chosen to form the overlay. Embodiments have opened up new materials and/or procedures for forming a cover layer that provides a good barrier to diffusion of conductive regions in addition to properly suppressing electromigration, thereby enabling the elimination of the conventional dielectric barrier layer 5 or reducing its thickness. Possibility, and has subsidiary advantages.

Figure 3 shows one of the embodiments including a method for making a cover layer with various optional steps. 4A to 4E, 5A to 5D, 6A to 6D,

7A to 7C, 8A to 8E, 9A to 9D, 10A to 10F, 11A to 11E, 12A to 10E& 13A to 13D each show a manner of manufacturing a cover layer according to various embodiments of the present invention. Manufacture according to methods 4A to 4E, 5A to 5D, 6A to 6D, 7A to 7C, 8A to 8E, 9A to 9D, 10A to 10F, 11A to 11E, 12A to 12E, and 13A to 13D, as described below. One of the various embodiments shown in the figures is a cover layer. In the embodiment shown in Figures 4-8 to 4, a mask layer 450 is attached to the method.

301 of 300 is non-selectively formed on the dielectric region 42A and the conductive region 41A (FIG. 4A), and all of the mask layer material is removed from the conductive region 410 in the 3〇2 of the method 300 (No. 4B), the cap layer material is selectively formed on conductive region 410 in 303 of method 300 (FIG. 4C), and all of the mask layer material is removed from dielectric region 420 in step 306 of 20 method 300 ( 4D), and a dielectric barrier layer 430 is formed over cap layer 440 and dielectric region 420 in method 307 of 307 (FIG. 4E). In the embodiment shown in Figs. 5A to 5D, the structures shown in Figs. 5A to 5D are each formed as described above for the structure shown in Figs. 4A to 4D 48 1329349. Unlike the embodiment shown in Figs. 4A to 4E, in the embodiment shown in Figs. 5A to 5D, the cover layer 440 is formed so as not to form a dielectric barrier layer in 307 of the method 300. In the embodiment shown in the second to sixth figures, the structures shown in Figs. 6A to 6D are each formed as described above for the structures shown in Figs. 4 to 4C. Different from the embodiment shown in FIGS. 4 to 4 ε, in the embodiment shown in FIGS. 6 to 6D, 'before forming a dielectric barrier layer 430 in 307 of the method 300', the mask layer material is in the method 3 The 3未6 is not removed from the dielectric region 42〇 (Fig. 6D). 10 7th to 7th (the embodiment shown in the figure, the structures shown in Figs. 7 to 7C are each formed as described above for the structures shown in Figs. 6 to 6c. In the embodiment shown in Figures 6 to 6D, in the example of the drawing shown in Figures 7 to 7C, the cover layer 44 is formed so as not to form a dielectric barrier layer in 307 of the method 300. 15 Sections 8 to 8 In the embodiment shown in the figure, a mask layer 45 is non-selectively formed on the dielectric region 42A and the conductive region 41A in the method 301 of 301 (Fig. 8). The material is removed from the conductive region 410 in the 3〇2 of the method 3〇〇 (Fig. 8). The mask layer material is non-selectively formed on the dielectric region 420 and electrically conductive in the 3〇3 of the method 3〇〇. On the region 41 (Fig. 8c), the 20 mask material (and all of the overlay material formed thereon) is removed from the conductive field 420 in process 300 (Fig. 8D) and one The dielectric barrier layer 430 is formed over the cap layer 440 and the dielectric region 420 in 307 of the method 300 (Fig. 8). In the embodiment shown in Figs. 9 to 9D, the ninth through 91) The illustrated structures are each formed as described above for the structures shown in Figs. 8A to 8D. Unlike the embodiment shown in Figs. 8A to 8E, in the embodiment shown in Figs. 9A to 9D, the cover layer 440 is formed so as not to form a dielectric barrier layer in 307 of the method 300. 5 In the embodiment shown in Figures 10-8 to 101, as shown in Figures 10A to 10C

The structures are each formed as described above for the structures shown in Figs. 8A to 8C. Unlike the embodiment shown in Figures 8A through 8E, in the embodiment shown in Figures iA through 10F, the mask layer material is not removed from dielectric region 420 in 304 of method 300 'but all overlays The material is shifted by 10 in 3〇5 of method 300 (Fig. 1D). Thereafter all of the mask layer material is removed from dielectric region 420 in method 306 of 306 (Fig. 10E), followed by A dielectric barrier layer 430 is formed over cap layer 440 and dielectric region 420 in process 307 of method 300 (FIG. 10F).

In the embodiment shown in Figs. 11A to 11E, the 15 structures shown in Figs. 11A to 11E are each formed as described above for the structures shown in Figs. 10A to 10E. Unlike the embodiment shown in Figs. 10A to 10F, in the embodiment shown in Figs. 11A to 11E, the cover layer 440 is formed so as not to form a dielectric barrier layer in 307 of the method 300. In the embodiment shown in Figs. 12A to 12E, the 20 structures shown in Figs. 12A to 12D are each formed as described above for the structures shown in Figs. 10A to 10D. Unlike the embodiment shown in FIGS. 10A through 10F, in the embodiment shown in FIGS. 12A through 12E, the mask layer material is not self-contained in method 306 of method 300 prior to forming a dielectric barrier layer in method 307. The dielectric region 420 is removed (Fig. 12E). 50 1329349

In the embodiment shown in Figs. 13A to 13D, the structures shown in Figs. 13A to 13D are each formed as described above for the structures shown in Figs. 12A to 12E. Unlike the embodiment shown in Figs. 12a to 12E, in the embodiment shown in Figs. 13A to 13D, the cover layer 44 is formed so as not to form a dielectric barrier layer in 307 of the method 300. The above embodiment includes a device containing first and second conductive regions

* 10 settings. The device of an embodiment includes a dielectric region for separating the first and second conductive regions. The device of the embodiment comprises at least a portion of the mask layer formed on at least a portion of the dielectric region, wherein the mask layer is absent from the first and second conductive regions. - Implementing a contact device comprising - forming a cover layer on the first and first conductive regions. 15

- The layering system of the embodiment. Included - a molecular self-mixing layer. - The mask (4) of the embodiment includes the material based on the material, and the material based on the stone shochu comprises organic Wei, Qi Wei, ς. 垸, ethoxy Wei, methoxy Wei, and the basestone One or more. - The mask layer of the embodiment comprises one or more of polyelectrolytic f, dendritic polybranched polymer, polymer brush, and block copolymer - the mask layer of the embodiment comprises a single layer and a plurality of layers The device of the embodiment 1 includes a dielectric barrier layer above. The thickness of the device of the dielectric cap layer of one embodiment formed on the cover layer and the mask layer. The thickness of the barrier layer is (4) thinner than that of the coating. The coating of the embodiment is configured to inhibit the diffusion of material from the first and second conductive regions into adjacent regions. The cover layer of an embodiment is configured to exclude the use of a dielectric barrier layer over the first and second conductive regions and the dielectric regions. The cover layer of an embodiment comprises a conductive material. The cover layer of an embodiment includes one or more of a cobalt alloy, a nickel alloy tungsten, tantalum, and a gasification group. The cover layer of an embodiment comprises an electrically insulating material. The dielectric region of an embodiment includes an oxide, a nitride, an oxynitride, a cerium-containing oxide, a cerium-containing carbide, a cerium-containing nitride, a carbon-containing oxide, a nitrogen-containing oxide, a porous dielectric, and At least one of low dielectric constant materials having a dielectric constant of less than 2.5. The dielectric region of an embodiment includes a hard mask layer formed on a dielectric material of the dielectric region. The electronic device of an embodiment is selected from the group consisting of a semiconductor device, an optoelectronic device, a data storage device, a magnetoelectronic device, a magneto-optical device, a molecular electro-device, a photovoltaic device, and an electroluminescence. Device, photoluminescence device, photonic device, gray package device. The above embodiments include a method of providing an electronic device including a conductive region separated by a dielectric region. The method of an embodiment includes forming a mask layer over at least a portion of the dielectric region. The method of the embodiment includes forming a cover layer on at least the conductive region. The method of an embodiment includes selectively forming a mask layer material over the dielectric region. The method of an embodiment comprises forming a mask layer by forming a molecular self-assembled layer 1329349. The method of an embodiment comprises - a single layer and - the formation of a mask layer of the embodiment. Area and conductive area. The mask layer material is removed from the dielectric layer region. The mask layer layer of the mask layer material is self-conducting. The formation of the self-conducting embodiment covers the conductive region. θ, 匕 selectively form a cover layer. The mask layer of an embodiment is configured as at least a portion of an electrical region. The overlayer material is formed in the overcoat layer of the embodiment to the adjacent region. / Method for inhibiting the diffusion of material from the conductive region. The method 15 is formed after the conductive region and the layer are formed. The thickness of the layer is compared with the thickness of the layer: The layer configuration is such that a dielectric barrier layer is used over the conductive regions and the dielectric regions. The method includes removing at least a portion of the mask layer after the cover layer is formed. The formation of the enamel layer includes forming a cover layer material on the mask layer and the conductive area. - a - The formation of the cover layer by the embodiment includes removing at least a portion of the cover material formed on the mask layer. - removal of the cover sheet from the f-box of the embodiment - including removing at least one P-knife of the mask layer and the removal of the cover layer on the cover layer (4) cover layer material package 53 At least - two = of the layer of cover material includes overlying the covered electrical area formed on the removed mask layer. \ The dielectric barrier layer is in the conductive region and is in the presence of a thickness that lacks the cover layer U. The thickness of the layer is relatively thin. The electrical layer is diffused. The cover layer of an embodiment is configured to inhibit the material from being guided into adjacent regions. The cover layer of the embodiment is configured to exclude the use of a dielectric barrier layer over the conductive regions and dielectric regions. The method of the embodiment comprises treating one or more of the exposed surface of the domain exposed surface and the dielectric domain in a specified manner prior to formation of the mask layer; the treatment of the consistent embodiment comprises the exposed surface system comprising One or more of the exposed surface of the conductive region and the exposed surface of the dielectric region are cleaned. It has been consistently contemplated that the exposed surface comprises one or more of the exposed surface of the functionalized conductive region and the exposed surface of the dielectric region. The mask layer of an embodiment comprises a decane-based material, wherein the material based on Shi Xi-sing includes organic stone shochu, qishixiyuan, oxoxane, ethoxy methoxy 'methoxy decane 'and one or more of hydroxydecane. The mask layer of an embodiment comprises one or more of a polyelectrolyte, a dendrimer, a superbranched polymer, a polymer brush, and a block copolymer. The cover layer of an embodiment comprises a conductive material. The cover layer of an embodiment includes one or more of a cobalt alloy, a nickel alloy, a tungsten, a button, and a nitride group. 54. The formation of the cover layer of the embodiment comprises forming the cover layer by one or more of electrodeless deposition, electrochemical deposition, chemical vapor deposition, physical vapor deposition, atomic layer deposition, and only the cover layer of the example includes An electrical insulating material. - the dielectric regions of the examples include oxides, nitrides, oxynitrides, cerium oxides, cerium-containing carbides, cerium-containing nitrides, carbon-containing oxides, nitrogen-containing cerium compounds, porous dielectrics, and At least one of low dielectric constant materials having a dielectric constant of less than 2.5. - The dielectric region of the embodiment comprises a hard mask layer formed on a dielectric material. The electronic device of an embodiment is selected from the group consisting of a semi-V body device, an optoelectronic device, a data storage device, a magnetoelectronic device, a magneto-optical device, a molecular electronic device, a photovoltaic device, and an electroluminescent device. , photoluminescent device, photonic device, and packaging device. Various different embodiments of the invention have been described. These descriptions are intended to be exemplary rather than limited. Therefore, specific modifications may be made to the invention as described herein without departing from the scope of the invention. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1A is a cross-sectional view of a portion of a semiconductor device showing a conductive region separated by a dielectric region; a cross-sectional view of a -1 V segment, which is formed in a conductive region and dielectric In the region, the second layer is a cross-sectional view of a portion of the semiconductor device, which shows a conductive region separated by a dielectric region; 1329349 2B is a semiconductor device of FIG. 2A a partial cross-sectional view showing a cover layer selectively formed on the exposed surface of the conductive region rather than the exposed surface of the dielectric region; FIG. 2C is a partial cross-section of a semiconductor device of FIGS. 2A and 2B 5 is a cross-sectional view showing a dielectric barrier layer formed on the exposed surface of the cap layer and the dielectric region; FIG. 3 is a conductive layer for generating a cap layer from an electronic device separated by a dielectric region A flow chart on a region, FIGS. 4A through 4E are cross-sectional 10 views of a series of a portion of an electronic device, shown in an embodiment for fabricating a cover layer separated by a dielectric region. Phases on the conductive area of the electronic device; Figures 5A through 5D are cross-sectional views of a series of a portion of an electronic device, shown in an embodiment for fabricating a cover layer separated by a dielectric region a stage on the conductive area of the electronic device; 15 Figures 6A through 6D are cross-sectional views of a series of a portion of an electronic device, shown in an embodiment for fabricating a cover layer separated by a dielectric region 7A to 7C are cross-sectional views of a series of a portion of an electronic device, shown in an embodiment for fabricating a cover layer separated by a dielectric region Phases on the conductive area of the electronic device; Figures 8A through 8E are cross-sectional views of a series of a portion of an electronic device, shown in an embodiment for fabricating a cover layer separated by a dielectric region Phases on the conductive area of the electronic device; Figures 9A through 9D are views of a series of cross-sections 56 1329349 of a portion of an electronic device, shown in an embodiment to cover a Manufacturing a stage on a conductive region of an electronic device separated by a dielectric region; FIGS. 10A through 10F are cross-sectional views of a series of a portion of an electronic device, shown in an embodiment for a cover layer Manufacturing a stage on a conductive region of an electronic device separated by a 5 dielectric region; FIGS. 11A through 11E are cross-sectional views of a series of a portion of an electronic device, shown in an embodiment for covering a portion The layer is fabricated at a stage on the conductive region of the electronic device separated by a dielectric region; FIGS. 12A through 12E are cross-sectional views of a series of a portion of a portion of an electronic device, shown in an embodiment for The cover layer is fabricated at a stage on the conductive region of the electronic device separated by a dielectric region; Figures 13A through 13D are cross-sectional views of a series of a portion of an electronic device, shown in an embodiment for The cover layer is fabricated at a stage on the conductive region of the electronic device separated by a dielectric region; 15 Figure 14A is a cross-sectional view of a structure including a dielectric region in one embodiment Forming a mask layer on the dielectric region, and FIGS. 14B through 14D are cross-sectional views of the structure of FIG. 14A after further processing to modify the mask layer in a manner that is intended to produce the desired features of the mask layer, wherein A different way of modifying the mask layer in an embodiment is shown; 20 15A is a cross-sectional view of a structure including a dielectric region in which an overcoat layer is formed on the dielectric region, 15B through 15E are cross-sectional views of the structure of Fig. 15A after further processing to remove the mask layer, showing different ways in which an embodiment can be used to effect removal of the cover layer. 57 1329349 [Description of main component symbols] 100,200...semiconductor device 105,110,210,410...conductive region 106,130,230,430...dielectric barrier layer 120,220,420,1401,1501.·dielectric region 120a,420a...hard mask layer 240,440,1503...cover layer 300...flow 301, 302, 303, 304, 305, 306, 307 ... method 450, 1402, 1502 ... mask layer 1400, 1500 · structure 1402a, 1502a.. head group 1402b, 1502b... linking group 1402c, 1502c · terminal group 58

Claims (1)

Patent Application No. 95112178 Applicable Patent Revision No. 98.10, 30 3 .. r · /., . 1 X. Patent Application Range: ..· ** · $ — * — — 1 1. A substrate comprising: An exposed conductive region; an exposed dielectric region adjacent to the conductive region; 1329349 a selective molecular self-assembled mask layer located on the dielectric region and not present in the conductive region And a cover layer on the conductive region and not present in the dielectric region. 2. The substrate of claim 1, wherein the substrate comprises a barrier layer formed over the conductive region and above the dielectric region. 3. The substrate of claim 1, wherein the dielectric region comprises a material selected from the group consisting of SiCxNYHz and SiCxOYHz, wherein each of the variables X, Y and Z represents a rational number . 4. The substrate of claim 1, wherein the molecular self-assembling mask layer is formed by a selective wet treatment. 5. The substrate of claim 1, wherein the molecular self-assembled mask layer comprises a decane-based material, wherein the molecular self-assembled mask layer comprises a head group and a terminal group . 6. The substrate of claim 5, wherein the molecular self-assembling mask layer comprises a linking group that chemically links the head group and the terminal group. 7. The substrate of claim 1, wherein the molecular self-assembling mask layer is formed using a wet process. 8. The substrate of claim 1, wherein the cover layer is selective to the electrical region of the guide 59 1329349. 9. The substrate of claim 1, wherein the cover layer is formed without a seed layer. 10. The substrate of claim 1, wherein the cover layer is formed by a method selected from the group consisting of electrodeless deposition and electrochemical deposition. 11. The substrate of claim 1, wherein the molecular self-assembled mask layer is removed from the dielectric region after the cover layer is formed. 12. The substrate of claim 1, wherein at least a portion of the molecular self-assembled mask layer is removed from the dielectric region during formation of the cover layer or after the cover layer is formed. 13. The substrate of claim 1, wherein the molecular self-assembling mask layer and the cover layer are formed without a precursor. 14. A method for forming a cap layer in an electronic device, comprising: providing an electronic device comprising a conductive region separated by a dielectric region®; forming a mask layer selectively located at the dielectric layer Forming a cap layer on only the conductive regions; and forming an additional interconnect layer over the cap layer and the cap layer. 15. The method of claim 14, wherein the forming a mask layer comprises forming a molecular self-assembled layer. 16. The method of claim 14, wherein the mask layer comprises one of a single layer and one of a plurality of layers. The method of claim 14, wherein the forming the cover layer comprises selectively forming a cover layer material on the electrically conductive regions. 18. The method of claim 14, wherein the masking layer inhibits the formation of a cover layer material on at least a portion of the dielectric region. 19. The method of claim 14, wherein the cover layer is configured to inhibit diffusion of material from the electrically conductive regions into adjacent regions. 20. The method of claim 14, further comprising forming a dielectric barrier layer over the cover layer and the mask layer after the mask layer and the cover layer are formed. 21. The method of claim 19, wherein the cover layer is configured to exclude the use of a dielectric barrier layer over the conductive regions and the dielectric regions. 22. The method of claim 14, further comprising removing at least a portion of the cover layer after the cover layer is formed. 23. The method of claim 14, wherein the forming the cover layer comprises: Forming a cover layer material on the mask layer and the conductive regions; and removing at least a portion of the cover layer material formed on the mask layer. 24. The method of claim 23, wherein the removing the cover layer material formed on the mask layer comprises removing only the cover layer material. 25. The method of claim 23, further comprising forming a dielectric barrier layer over the conductive regions and the dielectric regions after removing at least a portion of the cap layer formed on the mask layer . The method of claim 25, wherein the thickness of the dielectric barrier layer is relatively thinner than the thickness of a device lacking the cover layer. 27. The method of claim 23, wherein the cover layer is configured to inhibit diffusion of material from the electrically conductive regions into adjacent regions. 28. The method of claim 27, wherein the cover layer is configured to exclude the use of a dielectric barrier layer over the conductive regions and the dielectric regions. 29. The method of claim 14, further comprising processing one or more of the exposed surface of the electrically conductive region and the exposed surface of the electrically conductive region prior to formation of the mask layer. By. 30. The method of claim 29, wherein the treating the exposed surface comprises cleaning one or more of the exposed surface of the electrically conductive regions and the exposed surface of the dielectric region. 31. The method of claim 29, wherein the treated exposed surface comprises one or more of an exposed surface that functionalizes the electrically conductive regions and an exposed surface of the dielectric region. The method of claim 14, wherein the mask layer comprises a decane-based material, wherein the decane-based material comprises organodecane, chlorodecane, alkoxy oxane, ethoxylate One or more of decane, methoxydecane, and hydroxydecane. 33. The method of claim 14, wherein the mask layer comprises one or more of a polyelectrolyte, a dendrimer, a superbranched polymer, a polymer brush, and a block copolymer. 34. The method of claim 14, wherein the cover layer comprises a 62 1329349 conductive material. 35. The method of claim 34, wherein the cover layer comprises one or more of a cobalt alloy, a recorded alloy, a crane, a group, and a nitrided group. 36. The method of claim 14, wherein the forming the cover layer comprises forming the cover by one or more of electrodeless deposition, electrochemical deposition, chemical vapor deposition, physical vapor deposition, atomic layer deposition. Floor. 37. The method of claim 14, wherein the cover layer comprises an electrically insulating material. 38. The method of claim 14, wherein the dielectric region comprises an oxide, a nitride, an oxynitride, a oxidized oxide, a cerium-containing carbide, a cerium-containing nitride, a carbon-containing oxide At least one of a nitrogen oxide, a porous dielectric, and a low dielectric constant material having a dielectric constant less than 2.5. 39. The method of claim 14, wherein the dielectric region comprises a hard mask layer formed on a dielectric material. 40. The method of claim 14, wherein the electronic device is selected from the group consisting of: a semiconductor device, an optoelectronic device, a data storage device, a magnetoelectronic device, a magneto-optical device, a molecular electronic device , photovoltaic special devices, electroluminescent devices, photoluminescent devices, photonic devices, and packaging devices. 41. A method for producing a cap layer on a substrate having an exposed conductive region and a dielectric region, the method comprising: selectively depositing a mask layer over the dielectric regions, the mask The curtain layer is formed by a molecular self-assembled layer comprising a material that forms an electrochemical bond to the dielectric regions but does not form an electrochemical bond to one of the conductive regions. And forming the cover layer on the conductive regions after depositing the mask layer. 42. The method of claim 41, wherein selectively depositing the cover layer comprises depositing a reversibly adhesive mask layer. 43. The method of claim 41, wherein the selectively adhesive cover layer comprises a hydrolyzable decane-based material. Φ 44. The method of claim 43, further comprising rinsing the substrate with an aqueous solution to break the bond of the hydrolyzable decane mask layer. 45. The method of claim 41, further comprising forming a dielectric barrier layer over the electrically conductive regions and the dielectric regions after depositing the cover layer and forming the cover layer. The method of claim 41, further comprising the step of removing the mask layer, and wherein removing the mask layer comprises rinsing the layer with a rinse that interrupts the electrochemical bonding of the mask layer Substrate. ® 47. A method for producing a cap layer from an electrically conductive region adjacent a dielectric region of a substrate, the method comprising: selectively depositing a molecular self-assembled mask layer On the dielectric region, wherein the molecular self-assembled mask layer has a structure comprising a chain formed by different functionalities; and exposing a function to modify by removing a portion of the chain The molecular self-assembling mask layer; and 64 11329349 selectively forming a cover layer in the conductive region. 48. The method of claim 47, wherein the step of modifying the functional self-assembled mask layer by removing a portion of the chain comprises modifying the molecular self-assembling mask layer a group of the chain. 49. The method of claim 47, wherein the step of modifying a functional self-assembled mask layer by removing a portion of the chain to modify the molecular self-assembled mask layer establishes a feature of the mask layer to avoid the covering A layer of material is formed on the mask layer. 50. The method of claim 47, wherein the cover layer is deposited by an electrodeless deposition method, and the molecular self-assembled mask layer has an exposed function comprising a decane-based material, It has a saturated hydrocarbon-based surface that is non-reactive to electrodeless deposition of the mask layer. 51. The method of claim 47, wherein the step of modifying the functional self-assembled mask layer by removing a portion of the chain comprises interrupting one of the self-assembling mask layers Bonding. ® 52. The method of claim 47, further comprising reacting the exposed function to produce a desired feature. 53. The method of claim 47, wherein the molecular self-assembled mask layer having an exposed function has a barrier layer characteristic to protect the porous dielectric material during the wet treatment. 54. An electronic device comprising: a substrate comprising a dielectric region and a conductive region; at least one molecular self-assembled layer selectively formed on the electrical region of the dielectric 65 1329349; wherein the at least The molecular self-assembled layer is selected from the group consisting of a polyelectrolyte material, a dendrimer material, a superbranched polymer material, a polymer brush, a block copolymer material, and a a decane-based material; and a cover layer formed on the conductive region. 55. The device of claim 54, wherein the cover layer is an electrically conductive material selected from the group consisting of: a cobalt and boron alloy material, a cobalt, tungsten and phosphorus Alloy material, an alloy of nickel, molybdenum and scale. 56. The device of claim 54, wherein the decane-based material comprises one or more hydrolyzable substitutes having the general formula RnSiX4-n, wherein the R is selected from the group consisting of an alkyl group and a substituted alkyl group. a group consisting of a fluoroalkyl group, an aryl group, an substituted aryl group, and a fluoroaryl group, wherein X is selected from the group consisting of - a halogen group, an alkoxy group, an aryloxy group, an amino group, and an octadecyl group. A group consisting of Shixia and aminopropyltrimethoxysilane. The device of claim 54, wherein the cover layer is formed by electrodeless deposition. 58. The device of claim 54, wherein the at least one molecular self-assembled layer is formed by a selective wet treatment. 59. The device of claim 54, further comprising forming a barrier layer over the electrically conductive region and the dielectric region after the at least one molecular self-assembled layer is removed. 60. The device of claim 59, wherein the barrier layer comprises a material 66 1329349 The material is selected from the group consisting of SiCx, SiNx, and SiCxNy. 61. The device of claim 54, wherein the dielectric region further comprises a hard mask layer. 67