1325535 九、發明說明： 【發明所屬之技術領域】 本發明係關於遠端監視，特別是—種用以遠端監視電腦系統之供電初 始化的監視模組。 【先前技術】 一般而&，在電腦系統的系統初始化過程中有兩個主要的部分。—是 在第一次擷取起始程式碼（基本輸入輪出系統，Β丨os)之前，另一是在開 始操取BIOS之後。前者的主要程序是隨著適合的「基礎啟動序列」啟動所 有的基礎電壓執.（basic voltage mi丨s )並釋放重置(reset)訊號。在電腦系統之 « 系統主板上，通常由典型系統晶片組來控制基礎啟動序列。然而，只有數 個常用的、與電力相關之始化狀態，例如··「電力良好指示(powergood indication)」、「糸統重置訊號狀態(system reset signal status)」等，在系統初 始化過程期間被監視。就高穩定度的電腦系統而言，僅監視這些基礎電力 狀態訊號，欠缺應用的彈性且遠不及於控制的需求。 6月參閱苐1圖，為糸統主板上監視供電初始化的典型傳統架構，啟動 序列控制斋】0 (可内建於系統晶片組或南橋晶片）主要用以控制一個或多 個父流轉直流電源供應器21 ( AC-DC power supply )、直流轉直流變流器 (DC-DC converter) 410、420、430、440 及不同基礎電壓領域(basic v〇|tage domainsH卜4·2'43'44的基礎啟動序列。交流轉直流電源供應器21轉換 交流電為數個基礎直流電壓執予基礎電壓領域41、42、43、44。直流轉直 流變流器410、420、430、ΦΚ)轉換基礎直流電壓執為設定電壓執，並提供 U25535 給包含在專用的基礎電壓領域4卜42…、44中之電子元件犯、极 442。 當系統主板電Μ啟時，啟動序列測器丨〇需依據已決定在啟動序列 控制益料用的基5敝態機(state madljne)或序列機(鄉_騰㈣（圖 中未示）内之—频啟動序列（第2圖），傳送基礎致能訊號Sen以致能交‘ 流轉直流電祕應器2丨及直流轉直流變流器、、、 ^特定的 狀態監視器22、41丨、42丨1325535 IX. Description of the Invention: TECHNICAL FIELD OF THE INVENTION The present invention relates to remote monitoring, and more particularly to a monitoring module for remotely monitoring the power supply initialization of a computer system. [Prior Art] Generally, there are two main parts in the system initialization process of a computer system. —Yes before the first capture of the start code (basic input round-out system, Β丨 os), and after the start of the BIOS. The main procedure of the former is to activate all basic voltages (basic voltage mi丨s) and release the reset signal with the appropriate "base start sequence". On the system board of the computer system, the basic boot sequence is usually controlled by a typical system chipset. However, there are only a few commonly used power-related initialization states, such as "power good indication" and "system reset signal status" during system initialization. Being monitored. In the case of highly stable computer systems, only these basic power status signals are monitored, lacking the flexibility of the application and far from the control requirements. In June, see Figure 1 for a typical traditional architecture for monitoring power supply initialization on the SiS board. The boot sequence control is 0 (can be built into the system chipset or southbridge) to control one or more parent DC power supplies. Supply 21 (AC-DC power supply), DC-DC converter 410, 420, 430, 440 and different basic voltage fields (basic v〇|tage domainsH Bu 4·2'43'44 The basic starting sequence. The AC to DC power supply 21 converts the alternating current into a plurality of basic DC voltages to the basic voltage fields 41, 42, 43, 44. The DC to DC converters 410, 420, 430, Φ Κ) convert the basic DC voltage The voltage setting is performed, and U25535 is provided to the electronic component pirates and poles 442 included in the dedicated base voltage field 4, 42..., 44. When the system board is powered on, the start sequencer is not required to be based on the state machine (state madljne) or serial machine (township_teng (four) (not shown) that has been determined to control the benefit of the start sequence. The frequency-start sequence (Fig. 2) transmits the basic enable signal Sen so that it can be transferred to the 'DC converter's 2 丨 and DC-to-DC converters, ^, specific status monitors 22, 41丨, 42丨
43卜44〗偵測每-交流轉直流電源供應器21 及直流轉直流變流器之輪出電流，倘若輸出電流正常，便_基礎有效訊 號（或電力良好(pmvergood)訊號）§、至啟動序列控制器川。 然而，啟動序列控制器10並未監視整個系統初始化過程中，在系統主 板上的每-供電初始化狀態/事件或每—電魏。當供電初始化錯誤，啟動 序列控制器丨()可能無法精確查出那_電壓執故障。同樣地，除非使用—示 波器或邏輯分析儀，某些供電初触狀_件亦無法監視。 此外’某些重要的讀，例如：cpu(t央處理單元)需要一特定的啟動 序列以致能不同電壓軌，但啟動序賴觸機通常不允許基礎 啟動序_容細_。此外’大部_驗電減錄態訊號一 般皆發送至- LED類的指示器-(圖中未示），作為主板層歸―)的 管理；此即為遠端純管理_誠。㈣邏輯分㈣或讀取LED指示器 。即使在特定的實施例中， 管理控制器（Local BMC, 均需要打開機殼，無疑將造成時間/精力的浪費 這些基本的電力相關訊詭可被發送至區域基板43卜44〗Detects the current of each AC-DC power supply 21 and DC-to-DC converter. If the output current is normal, then the basic valid signal (or pmvergood signal) §, to start Sequence controller Chuan. However, the boot sequence controller 10 does not monitor the per-power initialization state/event or per-wei on the system main board during the entire system initialization process. When the power supply initialization error occurs, the start sequence controller 丨() may not be able to accurately detect the _voltage failure. Similarly, some power supply initials cannot be monitored unless an oscilloscope or logic analyzer is used. In addition, some important readings, such as cpu (t central processing unit), require a specific startup sequence to enable different voltage rails, but the startup sequence usually does not allow the basic startup sequence. In addition, the 'most of the _ electromechanical subtraction mode signals are generally sent to - LED class indicator - (not shown), as the management of the motherboard layer); this is the remote pure management _ honest. (4) Logic points (4) or read the LED indicator. Even in certain embodiments, the management controller (Local BMC, which needs to open the chassis, will undoubtedly waste time/energy. These basic power-related messages can be sent to the regional substrate.
Local Base Management Controller)類型 電路（第1圖之基板管理控制器30) 1325535 供遠端控制，《視之狀態/事件訊號減受魏似在线變更時欠缺彈 性。 【發明内容】 别述的問’可依據本發明增加一額外硬體電路以取得較多初始化狀 〜/事件％待到大。1^刀之解決。再者，本發明在額外硬體電路與基板管理 控制器間提供額外通訊路徑，錢打開機毅或連接至邏輯分析儀，即可存 I 取初始化狀態/事件。 . 依據柄明之μ婦1丨，遠端監視模組包含基板管理控繼及監視邏輯 • 器。基板管理控制器用u連接遠端管理主機。監視·邏輯器以電路連接基板 管理控制器、啟動序列控制器及系統主板的複數基礎電壓領域。邏輯監視 器傳送由啟動㈣控制ϋ所接收之複數基礎致能訊號（喊⑶敵s丨㈣s) 以致能基礎電壓領域，並傳送接收自基礎電壓領域之複數基礎有效訊號 (basic valid signals)至啟動序列控制器，最後邏輯監視器產生及傳送複數 • 供電初始化事件/狀態訊號經基板管理控制器至遠端管理主機。 依據本發明之另-實關，純雌㈣（basiepGwe「_upsequ_) 被定義於啟動序列控制器中，監視啟動序列（m〇nk〇rp〇wer_upsequence) 被定義於監視邏輯器中，而基礎啟動序列被包含於監視啟動序列，監視邏 輯器依據監視啟動序列傳送基礎致能訊號、基礎有效訊號與供電初始化事 件/狀態訊號。 依據本發明之另一實施例，監視邏輯器以電路連接額外電壓領域(ewm 7 1325535 vdtaged⑽ain)，監視邏輯器可依據監_動序列傳送額外致能訊號(_ enablesignal)以致能額外電壓領域，並自額外電壓領域接收額外有效訊號 (extra valid signal)。 有關本發明的較佳實施例及其功效’茲配合圖式說明如后。 【實施方式】 請參閱第3圖’在本發明之-實施例中，遠端監視模組％以電路連接 電腦.系統（圖令未示）之電源領域20 '啟動序列控制器1〇及電腦系統的系 統主板（圖巾未示）上的數個級電壓領域4G。在本發明之電料統中可 包含一個以上之系統主板。^ ， 如先前技術之背景所述’啟動序列控制器1〇最初設計為直接控制系統 主板的基礎啟動序列。通常肋序顺制H ω被包含在系統晶片组或南橋 晶片中，並如第2圖所示啟動序列控制器丨Q具有已定義基礎啟動序列之 狀態機。 電源領域20包含一個或多個交流轉直流電源供應器2丨及一個或多的狀 悲&視器22 ’主要供電至系統主板。狀態監視器22可為—監視電路，用以 偵測由交流轉直流電源供應器2丨所提供之基本直流電壓轨(BasicDc voltage rail)之電力狀態。在本發明中’交流轉直流電源供應器^可供電至 電腦系統中一個或多個系統主板，而且狀態監視器22可在系統主板上執 打，系統主板具有控制交流轉直流電源供應器之啟動序列控制器。某些類 型的電源供應器具有-專用的狀態監視器以指示其輸出電力的狀態，在— 8 1325535 具有夕系統主板的電腦系統中，僅在一特定系統主板上（例如：主節點） 之一啟動序列控制器可控制交流轉直流電源供應器。 基礎電壓領域40包含一直流轉直流變流器400、一狀態監視器4〇丨及 複數電子元件402。直流轉直流變流器400轉換基本直流電壓執至—設定電 壓執’並提供至每一基礎電壓領域40中之電子元件4〇2。狀態監視器4〇】 偵測由直流轉直流變流器400所提供之設定電壓軌之電力狀態。在本發明 中，基礎電壓領域是依據被定義在啟動序列控制器丨〇中之啟動序列，而最 ® 初設計使用之電壓領域；通常不同電壓領域會有不同的操作電壓。 . 本實施例之遠端監視模組50匕含監視邏輯器51及基板管理控制器52。 監視邏輯器51以電路連接基板管理控制器52、供電控制器⑴、電源 領域2〇及基礎電壓領域4〇。「監視啟動序列」被定義在監視邏輯器Μ中。 監視邏輯H 5丨將依據監視啟鱗列產生麟送㈣罐^雜可程式邏輯 裝置（CPLD，Complex Programmable Logic Device)、簡單可程式邏輯裝置 • (SPLD，SimP丨eP—ammabMogicDeviW 或現場可程式閘陣列（FpGA，Local Base Management Controller) Type Circuit (Base Management Controller 30 of Figure 1) 1325535 For remote control, "The status/event signal is less flexible than the online change." SUMMARY OF THE INVENTION An additional problem can be added to an additional hardware circuit in accordance with the present invention to achieve more initialization. 1 ^ knife solution. Furthermore, the present invention provides an additional communication path between the additional hardware circuitry and the baseboard management controller, allowing the memory to be turned on or connected to the logic analyzer to store the initialization state/event. According to the syllabus, the remote monitoring module includes the baseboard management control and monitoring logic. The baseboard management controller connects the remote management host with u. The monitoring logic is connected to the substrate management controller, the startup sequence controller, and the complex base voltage domain of the system board. The logic monitor transmits a plurality of base enable signals (called (3) enemy s丨 (4) s) received by the start (4) control 以 to enable the base voltage domain, and transmits the basic valid signals received from the base voltage domain to the start The sequence controller, the last logic monitor generates and transmits a complex number • The power initialization event/status signal is passed through the baseboard management controller to the remote management host. According to another aspect of the present invention, the pure female (four) (basiepGwe "_upsequ_" is defined in the startup sequence controller, and the monitoring startup sequence (m〇nk〇rp〇wer_upsequence) is defined in the monitoring logic, and the basic startup sequence Included in the monitoring initiation sequence, the monitoring logic transmits the base enable signal, the base valid signal, and the power initialization event/status signal according to the monitoring start sequence. According to another embodiment of the present invention, the monitor logic connects the additional voltage field with the circuit ( Ewm 7 1325535 vdtaged(10)ain), the monitoring logic can transmit an additional enable signal (_enabledignal) according to the monitoring sequence to enable additional voltage fields and receive extra valid signals from the additional voltage field. The preferred embodiment and its function are described in the following description. [Embodiment] Please refer to FIG. 3 'In the embodiment of the present invention, the remote monitoring module % is connected to the computer by a circuit. Show) the power field 20 'start sequence controller 1 〇 and the computer system's system motherboard (not shown) several levels of voltage collar 4G. More than one system motherboard may be included in the power system of the present invention. ^, as described in the prior art background, the 'Start Sequence Controller 1' was originally designed to directly control the base boot sequence of the system board. The system H ω is included in the system chip set or the south bridge chip, and the start sequence controller 丨Q has a defined state start sequence sequence state as shown in Figure 2. The power supply field 20 includes one or more AC to DC power supplies. The device 2 and one or more of the viewers 22 are primarily powered to the system board. The status monitor 22 can be a monitoring circuit for detecting the basic DC provided by the AC to DC power supply 2 The power state of the voltage rail (BasicDc voltage rail). In the present invention, the 'AC to DC power supply ^ can be supplied to one or more system boards in the computer system, and the status monitor 22 can be executed on the system board, the system The motherboard has a boot sequence controller that controls the AC to DC power supply. Some types of power supplies have a dedicated status monitor to indicate their output power. State, in - 8 1325535 computer system with eve system motherboard, only one of the specific system motherboard (for example: the master node) to start the sequence controller can control the AC to DC power supply. The base voltage field 40 contains all the way The DC converter 400, a state monitor 4A, and a plurality of electronic components 402. The DC-to-DC converter 400 converts the basic DC voltage to - set the voltage and provides the electronic components in each of the base voltage fields 40. 4〇2. Status monitor 4〇] detects the power state of the set voltage rail provided by the DC-to-DC converter 400. In the present invention, the basic voltage domain is defined in the startup sequence controller The start-up sequence, and most of the voltage areas used in the initial design; usually different voltage fields have different operating voltages. The remote monitoring module 50 of the present embodiment includes a monitoring logic 51 and a substrate management controller 52. The monitor logic 51 is connected in circuit to the base management controller 52, the power supply controller (1), the power supply area 2, and the base voltage area. The "Monitor Start Sequence" is defined in the monitor logic. The monitoring logic H 5丨 will generate a CPLD (Complex Programmable Logic Device), a simple programmable logic device (SPLD, SimP丨eP-ammabMogicDeviW or a field programmable gate) according to the monitoring scale. Array (FpGA,
FieldPr〇grammableGateArray)可用以將監視邏輯器51實現在—整合裝置 中。只要可實現本發明監視邏輯器之功能，在板(〇n_b〇ard)監視魏:定 組合也可如同監視邏輯器運作。 林上，本發明之賊啟鱗顺包含娜概祕财；但在本實 施例t，監視啟動序列即為基礎啟動序列。 t «线電關啟時’啟___將依據祕監視器之基礎 1325535 4 啟動序列傳送基礎致能訊號Sen至邏輯監視器51。這些基礎致能訊號Sen原 本是為了致能過程而發送至基礎電壓領域40及/或電源領域2〇。在本發明. • .實施例中’基礎致能訊號Sen對監視邏輯器51而言如同狀態訊號。由於在 • 本實施例中監視啟動序列即為基礎啟動序列，監視邏輯器5】將依據監視啟 動序列隨後僅僅產生並發送同一基礎致能訊號Se,,，以致能基礎電壓領域40 及/或電源領域20。 當每一基礎電壓領域40及/或電源領域20之輸出電力各自被偵測為正 ® 吊，基k有效δ札號Sen將由狀悲監視器2]、401產生，並透過監視邏輯器51 .,回傳至啟動序列控制器10 ;對監視邏輯器51而言，由狀態監視器21、4〇1 所產生之基％有效讯號Sen將當作狀態訊號而使用。同樣地，由於在本實施 例中監視啟動序列即為基礎啟動序列，監視邏輯器51將隨後產生並回傳同 一基礎有效訊號sv至啟動序列控制器丨〇。 此外’趲輯監視為' W可依據監視啟動序列及接收到的基礎致能與有效 • 瓣^及8、.產生供電初始化事件/狀態訊號。然後發送此供電初始化事件/ 狀態訊號至基板管理控儀52。基本±，基板f理控繼Μ連接至一遠端 官理主機（W中未示）。所錄餘始化事錄態訊號可透過餘管理控制 _被&U至必4理主機。在本發明巾，遠端管理主機可為被設置在一 叢集系統同-個機殼内部/外部之主節點、或—外部管理主機中。 —因此’本發明之實施例所揭露之遠端監視模組5〇，允許使用者從遠端 • 紐域躲供電初触料/狀驗號，I魅板讀電減化即可被監 現’而热彡貞打職殼或使用示波錢邏輯分析儀。 10 本發明之基板管理㈣m 52 it常透過—遠端f賴路連接遠端管理主 機，遠端管理鏈路相容於在智慧平台管理介面（讀，inteiiigentpiaUOimFieldPr 〇grammableGateArray) can be used to implement the monitoring logic 51 in the -integrated device. As long as the function of the monitoring logic of the present invention can be implemented, the monitoring can be performed on the board (〇n_b〇ard) as well as the monitoring logic. In the forest, the thief of the present invention contains the secrets of the genus; but in the present embodiment t, the monitoring initiation sequence is the basic initiation sequence. t «Line power off" ___ will be based on the basis of the secret monitor 1325535 4 Start sequence transfer base enable signal Sen to logic monitor 51. These basic enable signals, Sen, were originally sent to the base voltage field 40 and/or the power supply area for enabling the process. In the present invention, the "basic enable signal Sen" is like a status signal to the monitoring logic 51. Since the monitoring startup sequence is the basic startup sequence in the embodiment, the monitoring logic 5 will subsequently generate and transmit only the same basic enable signal Se according to the monitoring startup sequence, so as to enable the base voltage domain 40 and/or the power supply. Field 20. When the output power of each of the base voltage domain 40 and/or the power domain 20 is detected as a positive hang, the base κ effective δ number Sen will be generated by the sinister monitors 2], 401 and passed through the monitoring logic 51. It is passed back to the boot sequence controller 10; for the monitor logic 51, the base % valid signal Sen generated by the status monitors 21, 4〇1 will be used as the status signal. Similarly, since the boot sequence is monitored as the base boot sequence in this embodiment, the monitor logic 51 will subsequently generate and return the same base valid signal sv to the boot sequence controller. In addition, the 'survey monitor' can generate a power supply initialization event/status signal based on the monitor start sequence and the received base enable and enable. This power initialization event/status signal is then sent to the baseboard management controller 52. Basic ±, the substrate f is controlled and connected to a remote official host (not shown in W). The recording of the remaining recordings can be controlled by the remaining management _ by & U to the 4 host. In the present invention, the remote management host may be a master node disposed inside/outside of a cluster system, or an external management host. - Therefore, the remote monitoring module 5 disclosed in the embodiment of the present invention allows the user to hide the initial touch/check number from the remote area and the new area, and the I charm board can be monitored. 'And eager to play the shell or use the oscilloscope logic analyzer. 10 substrate management of the present invention (4) m 52 it is often transmitted through the remote end to the remote management host, and the remote management link is compatible with the smart platform management interface (read, inteiiigentpiaUOim
Management Interface) (communication links) · f,J 如：通過系統輸出/輸入匯流排（systemI/〇bus)、網路介面（Mc控制器與 連接器）、串列璋加al Port)，甚至在系統主板間的系統管理匯流排（smBus. System Μ腿gement Bus)等之通訊鏈路。此外，在本發明中，基板管理控 制器52可被簡單實施為設置於系統主板或系統管理子卡（sMDc s〉stem ManagementDaughterCard) ±之專用區域管理控制器，或在具有多系統主 板之電腦系統中’被實施為集中化系統等級―㈣辦⑽丨evd)之區 域管理控制器。 ’ 請參閱第4圖’為本發明所揭露之另—實施例，—種讓監視啟動序列 被監視邏輯H 51所定義之方法，是於監視邏輯器51中實施—額外狀態機。 常見的狀態機包含狀態監視電路’及一個或多個記憶單元用以記錄啟動序 列的當前狀態。在本實施例中，複數額外狀態監視器5]a及一記憶單元5】b Τκ現狀悉機的功at*。然而，具有適當硬體配置的整合額外狀態機亦可在 監視邏輯器中執行以定義監視啟動序列。 額外狀悲監視态51a以電路連接記憶單元51b、南橋晶片11 (内建啟 動序列控制器）、電源領域20及基礎電壓領域4〇。每一額外狀態監視哭51 包含同步器5丨1 (synchronizer)及狀態檢查器512 (condition checker)。同 步益51】接收來自南橋晶片〗丨之基礎致能訊號&、或來自電源領域2〇或 基礎電壓領域40之基礎有效訊號S、.，將其與一系統時序(system c丨〇ck)同步 ^25535 …、伎k域4查以2。在某些情形下，由於麵致能/有效訊號认 已經同步’同步器便非必要。狀態檢查器犯以電路連接同步器州，禮認 已解之基礎致猶細仏/s、,是否雄对醉位（絲某種設定 狀'悲）’卩錢傳賴_元5Ib。細外狀態監聽5丨a #之狀態檢查器 )丨2隨著H概轉觸需求喊f配置。 (shiftregiste〇 (c〇unter), 依據來自額外狀⑮監視器此、已同步益經檢麵基礎致能/有效訊號 sen/sv ’而記錄監視啟動序列的當前狀態。隨後記憶單元训發送一狀態訊 〜s . 土板B理控制益：)2 ’或允許基板管理控制，器52存取監視啟動序列 的當前狀態。 [視避輯器51的狀態機功能允許由遠端監視此監視啟動序列的當前狀 有而要來自頭外狀態監視器5丨a、已同步並檢查的基礎致能/有效 «se,A，也可傳送至基板管理控制器μ，以直接監視此監視啟動序列的 ^ 4 λ 1?亍、上’某些名頁外狀態監視器犯可被用以監視某些硬體並發 送相似的狀態訊號至基板管理控制器52。 有更户A弘力有關的事件需被監控，—個或多個額外事件監視器… p施在監視邏輯器52中。事件監視器化基本上包含同步器、狀態檢查 。.及事件_ 未顯示）。事件監視請之_及狀態檢查器 某些所需的額外狀態訊號。額外狀態 更體疋件、祕輸人/輪出匿流排或狀態監視^ (財皆未顯 與領外狀態監視器Ma之中的相似；惟'其僅處理來自額外狀態訊號源的 訊號源可為與供電初始化相關的系統 示）。事件閂 12 x^535 2 f-1顧鱗額外狀顏餘_特定電鲜位，並傳送至基板管理控制 ㈣。此外’所需的狀態訊號若已與系統時序同步，對額外事件監視器价 =。’。同”便非必要。並夠外狀態監視驗料⑽1卩可滿足事件 監視器的需求；整合醇件監視器便非必要。Management Interface) · f, J such as: through system output / input bus (systemI / 〇 bus), network interface (Mc controller and connector), serial port plus al Port), even in the system A communication link such as a system management bus (smBus. System) between the boards. In addition, in the present invention, the substrate management controller 52 can be simply implemented as a dedicated area management controller provided on a system motherboard or a system management daughter card (sMDc s>stem ManagementDarderCard), or in a computer system having a multi-system motherboard. The regional management controller that is implemented as a centralized system level - (four) office (10) 丨 evd. Referring to Figure 4, another embodiment of the present invention, a method for causing a monitoring initiation sequence to be defined by the monitoring logic H 51, is implemented in the monitoring logic 51 - an additional state machine. A common state machine includes a state monitoring circuit' and one or more memory cells for recording the current state of the startup sequence. In this embodiment, the plurality of additional status monitors 5]a and a memory unit 5]b Τ κ are present at the machine at*. However, an integrated additional state machine with a suitable hardware configuration can also be executed in the monitoring logic to define a monitoring boot sequence. The additional tracking state 51a is electrically connected to the memory unit 51b, the south bridge wafer 11 (built-in startup sequence controller), the power supply field 20, and the base voltage field. Each additional state monitoring cry 51 includes a synchronizer 5丨1 (synchronizer) and a status checker 512 (condition checker). Synchronous benefit 51] Receive the basic enable signal & from the South Bridge chip, or the basic valid signal S,. from the power supply field 2 or the base voltage field 40, and a system timing (system c丨〇ck) Synchronize ^25535 ..., 伎k field 4 to check 2. In some cases, it is not necessary because the face enable/effective signal is already synchronized. The state checker is guilty of circuit-connected synchronizer state, and the basis of the solution has been solved. It is still awkward/s, and whether it is a drunkenness (a certain setting of 'sorrow') 卩 money pass _ yuan 5Ib. Out-of-state status monitoring 5丨a # status checker) 丨2 With the H-touch demand shouting f configuration. (shiftregiste〇(c〇unter), according to the extra-sense 15 monitor, the synchronized benefit-based surface enable/effective signal sen/sv' records the current state of the monitoring start sequence. Then the memory unit sends a state News~s. Earthboard B control benefits:) 2' or allow the baseboard management control, the device 52 accesses the current state of the monitoring start sequence. [The state machine function of the avoidance processor 51 allows the remote monitoring of the current state of this monitoring start sequence to be from the head-out status monitor 5丨a, the synchronized and checked basic enable/effective «se, A, It can also be transferred to the baseboard management controller μ to directly monitor the monitoring start sequence of the ^4 λ 1?亍, on the 'some name out-of-page status monitors can be used to monitor certain hardware and send similar status Signal to the substrate management controller 52. There are more events related to A Hongli, which need to be monitored, one or more additional event monitors...p applied to the monitoring logic 52. Event monitors basically include synchronizers, state checks. . and events _ not shown). Event Monitoring _ and Status Checker Some additional status signals are required. The extra state is more sturdy, the secret input/rounding out or the state monitoring ^ (the money is not similar to that in the out-of-band status monitor Ma; only 'it only processes the signal source from the extra status signal source Can be shown for the system related to power supply initialization). The event latch 12 x^535 2 f-1 鳞 额外 extra _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ In addition, if the required status signal is synchronized with the system timing, the additional event monitor price =. ’. The same "is not necessary. And the external state monitoring and inspection (10) 1 卩 can meet the needs of the event monitor; integration of alcohol monitors is not necessary.
:本1种’所有的同步$·'狀態檢查器及事件⑽器可由具有正反 器之電路妓4過詳細的實際實施視情況而定。本發日种之所有與供電 初始化有關並發送至基板管理控㈣的狀_件訊號，均被觀為「供電 初始化事件/狀態訊號」。事件訊號通常是被閃鎖在一特定電壓準位以指示 —事件的狀態《。然而财㈣步及檢麵基賴能/有效導丄/s'會 被傳送至啟動序列控制|g (系統晶片組或南橋晶片）、電源領域或基礎電壓 領域。 因此，如第4圖所示，基板管理控制器52可能需要接受多數供電初始 化事件/狀態訊號。但常見的基板管理控制器僅有有限的匯流排頻寬，通常 餐 為針對各製化功鲍之通用輸入輸出（GPIO. Genei.d 丨叩必〇u_)接 腳。這些有限_流寬在同-時間並不足以接收全制初始化事件/狀 態訊號。因此，一個解決方法是遠端監視模組5〇更進一步包含設置在監視 邏輯器51與基板管理控制器52間之一匯流排多工器53。首先，供電初始 化事件/狀態訊號將傳送至匯流排多工器53。那麼，匯流排多工器53將依 .據來自基板管理控制盗52之選擇訊號，在多個供電初始化事件/狀態訊號中 . 選擇某一類型訊號’並傳送至基板管理控制器52。這些選擇訊號可依據遠 立而笞理主機之4曰々或基板管理控制52内之選擇邏輯(seiecti〇n丨〇gic)，被 基板管理控制器52所傳送。 鏈叫解/ 咖51與基板管理控_間通訊 用於 ，疋在遠端監視模組5G中採用—通用輸入輸出裝置54。通 =入輸出裝置⑽供足夠的通用輸入輸出接腳給供電初始化事件㈣ =1用輸入輸出擴張攀0expan蝴具有剩細輸入輪出接 用^控制器™爾入刪置54她。編侧器幻及通 匯^輸峨峨输嫩槪南_丨⑽之系統管理 4 12(SMBus，細emManageme_ ^破傳送至·輸人輪出裝置A並被歸理控齡a透—统管理匯 〜L排12而存取。 ‘ *本發明之遠端監視模組可允許使用者進行系統變更及調整啟動序列， 因此系統主板可改變某些與電力有關的硬體配置，而監視邏輯器5丨的監視 .啟動序列可具有較多於啟動序列控制器的基礎啟動序列之監視步驟/狀^視 以控制相對的供電初始化變更。 〜 請參閱苐6A圖及苐6B圖。當新的元件被加入到系統主板、某額外帝 t執而被li視’或當某些電力有關的硬體配置改變時，—個或多個額外带 壓領域A將被遠端監視模組5〇監視。額外電壓領域六以電路連接於於2 韙輯器5卜以接收額外致能訊號^並提供額外有效訊號&。因此 輯可依據監視啟動序列傳送額外致能訊號S邮以致能額外電壓領域 A ’並自額外電壓領域A接收額外有效訊號S〆假設額外電堡領域A必喟 在原始狀,¾ 1與2之間被啟動；亦即，額外電壓領域A在基礎電墨領域Μ 1325535 > 之後、基礎電壓領域42之前被啟動。那麼，啟動額外電壓領域A之監視啟 動序列的狀態將不同於基礎啟動序列。改變後的狀態序號如第6B圖f括號 内的狀態序號所示。額外致能訊號Senx及額外有效訊號$、,、.僅可遠過基板管 理控制器52監視，而非啟動序列控制器丨〇。 請麥閱第7圖，本發明所揭露之遠端監視模組，提供電腦系統在不同 對稱多處理（SMP，Symmetric Multi-Processing)配置間調整的能力。如第7 圖所示’一電腦系統1包含二系統主板〇丨、〇2及二電源供應器psi、PS2。 系統主板01包含具有專用系統記憶體Μ〇、Μ1之兩個處理器CPUO'CPLH、 .一南橋晶片SB1、一 BIOS (基本輸入輸出系統，内建於一記憶裝置之開機 映像）I丨及遠端監視模組MM1。同樣地，系統主板〇2包含具有專用系統 記憶體M2、M3之兩個處理器CPU2、cpu3、一南橋晶片犯2、一 m〇s (内建於一記憶裝置之開機映像）丨2及遠端監視模&MM2 ^ 在其中-個彈性對稱式多處理配輝exibleSMPc〇nflgurati〇n)中，兩系 φ 統主板0卜02可獨立的透過各自的⑴仍體開機，分別使用專用的電源 供應器PS1/PS2以個別的啟動電壓領域。兩系統主板⑴' 〇2可執行如同兩 部電腦’具有透過特定的軟體你體/硬職行叢集作#之能力。遠端監視模 組MM卜MM2可提供監視功能給上述每一系統主板〇ι、〇2。 在另對稱式多處理置中’兩系統主板⑴、Q2將被視同單—電腦而 . 開機。處理器CPU〇將運作為-主要處理器(primaryprocessor)，用以存取 • _11並啟動涵蓋於二系統主板⑴、02之所有系統元件。而處理器CPU卜 CPU2 CPLb操侧運作為從屬處理器⑶紙卩隱肅），並被處理器cpu〇 15 1325535 初始化。此時，遠端監視模組MMl、MM2可由一同步單元〇3加以同步， 將二個啟動序列結合為一。 或者，遠端監視模組MM1可接管整個電腦系統】的啟動序列的控制， 並使遠端監視模組MM2禁能。此種方式可被一可修改的監視邏輯器加以實 現，例如：現場可程式邏輯閘陣列(FPGA)基礎(FPGA_based)之裝置。 本發明雖未更進一步描述實施例的詳細執行方式。但透過本發明之遠 ^ 端監視模組的上述功能，已可解決具有彈性對稱式多處理配置的電腦系統 大部分供電初始化變更的主要技術問題。 ‘雖然本發明的技術内容已經以較佳實施例揭露如上，然其並非用以限 定本發明，任何熟習此技藝者，在不脫離本發明之精神所做些許之更動與 們錦’皆應涵盍於本發明之範B壽内，因此本發明之保護範圍當視後附之申 4專利範圍所界定者為準。 【圖式簡單說明】 第I圖為先前技術中供電初始化之控制架構示意圖。 第2圖為定義在第1 B之啟鱗顺繼巾之顧啟解列示意圖。 第3圖為本發明之供電初始化監視架構之—較佳實施例之示意圖。 弟4圖為本發明之供電初始化監視架構之另_較佳實施例之示意圖。 第5圖為本發明之供電初始化監視_之另-較佳實關示意圖。 第6A圖為本發明之供電初始化監視架構之另-較佳實施例示意圖。 16 1325535 第6B圖為定義在第6A圖之監視邏輯器中之監視啟動序列示意圖。 苐7圖為本發明另一較佳實施例之示意圖，說明在具有彈性對稱式多 處理結構之一電腦系統中，應用於供電初始化變更之監視結構。 【主要元件符號說明】 丨：電腦糸統 01、02 :系統主板 03 :同步單元 # 10:啟動序列控制器 • 11 .南橋晶片 • 12:系統管理匯流排 20 :電源領域 21 :交流轉直流電源供應器 22 :狀態監視器. 30:基板管理控制器 ® . 40、4卜42、43、44 :基礎電壓領域 400 :直流轉直流變流器 401 :狀態監視器 402 :電子元件 410、 420、430、440 :直流轉直流變流器 411、 42卜43卜441 :狀態監視器 412、 422 ' 432 ' 442 :電子元件 17 1325535 50 :遠端監視模組 51 監視邏輯器 5Ja:狀態監視器 51b :記憶單元 51c :額外事件監視器 52 :基板管理控制器 53 :匯流排多工器 54 :通用輸入輸出裝置 511 :同步器 « 512 :狀態檢查器 A:額外電壓領域: This type of 'all synchronization $·' state checkers and events (10) can be determined by the detailed implementation of the circuit 具有 4 with the forward and reverse. All the signals related to the power supply initialization and sent to the baseboard management control (4) are regarded as "power supply initialization event/status signal". The event signal is usually flashed at a specific voltage level to indicate the status of the event. However, the (4) step and the check surface/active 丄/s' will be transmitted to the start sequence control |g (system chipset or southbridge), power supply or base voltage. Thus, as shown in FIG. 4, the substrate management controller 52 may need to accept a majority of the power supply initialization event/status signals. However, the common substrate management controller has only a limited bus width, and the general meal is a general-purpose input/output (GPIO. Genei.d 〇u〇u_) pin for each system. These finite_flow widths are not sufficient at the same time to receive a full initialization event/status signal. Therefore, one solution is that the remote monitoring module 5 further includes a bus multiplexer 53 disposed between the monitoring logic 51 and the substrate management controller 52. First, the power initialization event/status signal is transmitted to the bus multiplexer 53. Then, the bus multiplexer 53 selects a certain type of signal 'and selects a certain type of signal' and transmits it to the substrate management controller 52 according to the selection signal from the substrate management control thief 52. These selection signals can be transmitted by the baseboard management controller 52 according to the selection logic (seiecti〇n丨〇gic) in the host or the base management control 52. The chain is called / coffee 51 and the baseboard management control _ communication. For the remote monitoring module 5G, the universal input/output device 54 is used. Pass = input and output device (10) for sufficient general-purpose input and output pin to supply power initialization event (4) =1 use input and output expansion to climb 0expan butterfly with left and right input wheel to exit with ^ controller TM into the deletion 54 her. Editing side illusion and convection ^ 峨峨 峨峨 槪 槪 丨 丨 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 The access to the L-row row 12 is accessed. ' * The remote monitoring module of the present invention allows the user to make system changes and adjust the boot sequence, so the system motherboard can change certain power-related hardware configurations, and the monitoring logic The monitoring sequence may have more monitoring steps/views of the basic startup sequence of the startup sequence controller to control the relative power supply initialization changes. ~ Refer to Figure 6A and Figure 6B. When new components When added to the system board, an additional emperor is deemed to be 'or when some of the power-related hardware configuration changes, one or more additional pressurized areas A will be monitored by the remote monitoring module 5〇. The additional voltage field is connected to the 2 器 器 5 以 to receive the additional enable signal ^ and provides an additional effective signal & amp. Therefore, the additional enable signal S can be transmitted according to the monitoring start sequence to enable the additional voltage field A 'And connected from the additional voltage field A The additional effective signal S is assumed to assume that the additional electric field A must be activated between the original and the 3⁄4 1 and 2; that is, the additional voltage field A is in the basic ink field Μ 1325535 >, before the basic voltage field 42 The status of the monitoring start sequence for starting the additional voltage field A will be different from the basic start sequence. The changed status number is shown in the status number in parentheses in Figure 6B. Additional enable signals Senx and additional valid signals $,,,. can only be monitored by the baseboard management controller 52 instead of the start sequence controller. Please refer to Figure 7, the remote monitoring module disclosed in the present invention provides a computer system with different symmetry SMP (Symmetric Multi-Processing) ability to adjust between configurations. As shown in Figure 7, 'one computer system 1 contains two system motherboards 〇, 〇 2 and two power supplies psi, PS2. System motherboard 01 contains dedicated System memory Μ〇, Μ1 two processors CPUO'CPLH, a south bridge chip SB1, a BIOS (basic input and output system, built-in image of a memory device) I 丨 and remote monitoring module MM1 Similarly, the system motherboard 〇2 includes two processors CPU2, cpu3 with a dedicated system memory M2, M3, a south bridge chip 2, a m〇s (built in a memory device boot image) 丨 2 and The remote monitoring module &MM2 ^ in which one of the elastic symmetry multi-processing splicing exibleSMPc〇nflgurati〇n), the two systems φ system motherboard 0 Bu 02 can be independently turned through their respective (1) still body, respectively, using dedicated The power supply PS1/PS2 is in the field of individual startup voltages. The two-system motherboard (1) '〇2 can be executed as two computers' with the ability to make your body/hard line clusters through a specific software. The remote monitoring module MM MM2 can provide monitoring functions to each of the above system boards 〇ι, 〇2. In another symmetric multi-processing center, the two system motherboards (1) and Q2 will be treated as the same computer-powered. The processor CPU will operate as a primary processor to access • _11 and start all system components covered by the two system boards (1), 02. The processor CPU, CPU2, CPLb, operates as a slave processor (3), and is initialized by the processor cpu〇 15 1325535. At this time, the remote monitoring modules MM1, MM2 can be synchronized by a synchronization unit 〇3, and the two startup sequences are combined into one. Alternatively, the remote monitoring module MM1 can take over the control of the boot sequence of the entire computer system and disable the remote monitoring module MM2. This approach can be implemented by a modifiable monitoring logic such as a field programmable logic gate array (FPGA) based device (FPGA_based). The present invention does not further describe the detailed implementation of the embodiments. However, through the above functions of the remote monitoring module of the present invention, it is possible to solve the main technical problems of most power supply initialization changes of a computer system having an elastic symmetric multiprocessing configuration. Although the technical content of the present invention has been disclosed in the above preferred embodiments, it is not intended to limit the present invention, and those skilled in the art can make some changes and do not depart from the spirit of the present invention. The scope of the present invention is defined by the scope of the appended claims. [Simple Description of the Drawing] Fig. I is a schematic diagram of the control architecture of the power supply initialization in the prior art. Figure 2 is a schematic diagram of the Gu Kaijie column defined in the first B. Figure 3 is a schematic diagram of a preferred embodiment of the power supply initialization monitoring architecture of the present invention. Figure 4 is a schematic diagram of another preferred embodiment of the power supply initialization monitoring architecture of the present invention. Figure 5 is a schematic diagram of the power supply initialization monitoring of the present invention. Figure 6A is a schematic diagram of another preferred embodiment of the power supply initialization monitoring architecture of the present invention. 16 1325535 Figure 6B is a schematic diagram of the monitoring initiation sequence defined in the monitoring logic of Figure 6A. Figure 7 is a schematic view of another preferred embodiment of the present invention, illustrating a monitoring structure applied to a power supply initialization change in a computer system having an elastic symmetric multi-processing structure. [Main component symbol description] 丨: computer system 01, 02: system main board 03: synchronization unit # 10: startup sequence controller • 11. south bridge chip • 12: system management bus 20: power supply area 21: AC to DC power supply Provider 22: Status Monitor. 30: Baseboard Management Controller®. 40, 4b 42, 43, 44: Base Voltage Field 400: DC to DC Converter 401: Status Monitor 402: Electronic Components 410, 420, 430, 440: DC-to-DC converters 411, 42b 43 441: Status monitor 412, 422 '432 ' 442: Electronic component 17 1325535 50: Remote monitoring module 51 Monitoring logic 5Ja: Status monitor 51b : Memory unit 51c: Extra event monitor 52: Baseboard management controller 53: Bus multiplexer 54: General-purpose input/output device 511: Synchronizer « 512: Status checker A: Extra voltage field